Implementado (não funciona)
This commit is contained in:
@@ -103,7 +103,7 @@
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1654875866" xil_pn:in_ck="-4144913829261074638" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="-2610007826355223435" xil_pn:start_ts="1654875855">
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<transform xil_pn:end_ts="1654877064" xil_pn:in_ck="-4144913829261074638" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="-2610007826355223435" xil_pn:start_ts="1654877053">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="WarningsGenerated"/>
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<status xil_pn:value="ReadyToRun"/>
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@@ -125,7 +125,7 @@
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1654875876" xil_pn:in_ck="6717519187032307095" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="7902521214899444903" xil_pn:start_ts="1654875870">
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<transform xil_pn:end_ts="1654877105" xil_pn:in_ck="6717519187032307095" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="7902521214899444903" xil_pn:start_ts="1654877098">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="WarningsGenerated"/>
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<status xil_pn:value="ReadyToRun"/>
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@@ -135,12 +135,10 @@
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<outfile xil_pn:name="textovhdl.ngd"/>
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<outfile xil_pn:name="textovhdl_ngdbuild.xrpt"/>
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</transform>
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<transform xil_pn:end_ts="1654875887" xil_pn:in_ck="6717519187032307096" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="-3180699873896808002" xil_pn:start_ts="1654875876">
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<transform xil_pn:end_ts="1654877116" xil_pn:in_ck="6717519187032307096" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="-3180699873896808002" xil_pn:start_ts="1654877105">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="WarningsGenerated"/>
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<status xil_pn:value="ReadyToRun"/>
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<status xil_pn:value="OutOfDateForOutputs"/>
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<status xil_pn:value="OutputChanged"/>
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<outfile xil_pn:name="_xmsgs/map.xmsgs"/>
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<outfile xil_pn:name="textovhdl.pcf"/>
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<outfile xil_pn:name="textovhdl_map.map"/>
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@@ -151,7 +149,7 @@
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<outfile xil_pn:name="textovhdl_summary.xml"/>
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<outfile xil_pn:name="textovhdl_usage.xml"/>
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</transform>
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<transform xil_pn:end_ts="1654875905" xil_pn:in_ck="-717353726922960719" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="-1178055513630676559" xil_pn:start_ts="1654875887">
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<transform xil_pn:end_ts="1654877134" xil_pn:in_ck="-717353726922960719" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="-1178055513630676559" xil_pn:start_ts="1654877116">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="WarningsGenerated"/>
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<status xil_pn:value="ReadyToRun"/>
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@@ -166,7 +164,7 @@
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<outfile xil_pn:name="textovhdl_pad.txt"/>
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<outfile xil_pn:name="textovhdl_par.xrpt"/>
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</transform>
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<transform xil_pn:end_ts="1654875919" xil_pn:in_ck="-4144913829261083515" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="5341574683187206424" xil_pn:start_ts="1654875906">
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<transform xil_pn:end_ts="1654877152" xil_pn:in_ck="-4144913829261083515" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="5341574683187206424" xil_pn:start_ts="1654877140">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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<outfile xil_pn:name="_xmsgs/bitgen.xmsgs"/>
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@@ -181,8 +179,10 @@
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<transform xil_pn:end_ts="1654875976" xil_pn:in_ck="-4144913829261096369" xil_pn:name="TRAN_configureTargetDevice" xil_pn:prop_ck="8482462020707587906" xil_pn:start_ts="1654875975">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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<status xil_pn:value="OutOfDateForInputs"/>
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<status xil_pn:value="InputChanged"/>
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</transform>
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<transform xil_pn:end_ts="1654875905" xil_pn:in_ck="6717519187032306964" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416184" xil_pn:start_ts="1654875898">
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<transform xil_pn:end_ts="1654877134" xil_pn:in_ck="6717519187032306964" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416184" xil_pn:start_ts="1654877127">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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<outfile xil_pn:name="_xmsgs/trce.xmsgs"/>
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@@ -1,2 +1,2 @@
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C:\Users\Gabriel\Xilinx\Aula20220603\textovhdl.ngc 1654875865
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C:\Users\Gabriel\Xilinx\Aula20220603\textovhdl.ngc 1654877063
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OK
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@@ -8,7 +8,7 @@
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<msg type="info" file="LIT" num="243" delta="old" >Logical network <arg fmt="%s" index="1">BUT<3>_IBUF</arg> has no load.
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</msg>
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<msg type="info" file="LIT" num="395" delta="new" >The above <arg fmt="%s" index="1">info</arg> message is repeated <arg fmt="%d" index="2">9</arg> more times for the following (max. 5 shown):
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<msg type="info" file="LIT" num="395" delta="old" >The above <arg fmt="%s" index="1">info</arg> message is repeated <arg fmt="%d" index="2">9</arg> more times for the following (max. 5 shown):
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<arg fmt="%s" index="3">BUT<2>_IBUF,
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BUT<1>_IBUF,
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DIPSW<3>_IBUF,
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@@ -8,7 +8,7 @@
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<msg type="info" file="Par" num="282" delta="old" >No user timing constraints were detected or you have set the option to ignore timing constraints ("par -x"). Place and Route will run in "Performance Evaluation Mode" to automatically improve the performance of all internal clocks in this design. Because there are not defined timing requirements, a timing score will not be reported in the PAR report in this mode. The PAR timing summary will list the performance achieved for each clock. Note: For the fastest runtime, set the effort level to "std". For best performance, set the effort level to "high".
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</msg>
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<msg type="warning" file="Par" num="288" delta="new" >The signal <arg fmt="%s" index="1">BUT<1>_IBUF</arg> has no load. PAR will not attempt to route this signal.
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<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">BUT<1>_IBUF</arg> has no load. PAR will not attempt to route this signal.
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</msg>
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<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">BUT<2>_IBUF</arg> has no load. PAR will not attempt to route this signal.
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@@ -17,7 +17,7 @@
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<msg type="warning" file="HDLCompiler" num="634" delta="old" >"C:\Users\Gabriel\Xilinx\Aula20220603\textovhdl.vhd" Line 20: Net <<arg fmt="%s" index="1">num4[3]</arg>> does not have a driver.
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</msg>
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<msg type="warning" file="Xst" num="647" delta="new" >Input <<arg fmt="%s" index="1">BUT<3:1></arg>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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<msg type="warning" file="Xst" num="647" delta="old" >Input <<arg fmt="%s" index="1">BUT<3:1></arg>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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</msg>
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<msg type="warning" file="Xst" num="647" delta="old" >Input <<arg fmt="%s" index="1">DIPSW</arg>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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@@ -1,12 +1,12 @@
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<TABLE BORDER CELLSPACING=0 WIDTH='100%'>
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<xtag-section name="ParStatistics">
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN=1><B>Par Statistics</B></TD></TR>
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<TR><TD><xtag-par-property-name>Total Non-vccgnd Signals</xtag-par-property-name>=<xtag-par-property-value>366</xtag-par-property-value></TD></TR>
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<TR><TD><xtag-par-property-name>Total Non-vccgnd Design Pins</xtag-par-property-name>=<xtag-par-property-value>1052</xtag-par-property-value></TD></TR>
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<TR><TD><xtag-par-property-name>Total Non-vccgnd Conns</xtag-par-property-name>=<xtag-par-property-value>1052</xtag-par-property-value></TD></TR>
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<TR><TD><xtag-par-property-name>Total Non-vccgnd Timing Constrained Conns</xtag-par-property-name>=<xtag-par-property-value>868</xtag-par-property-value></TD></TR>
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<TR><TD><xtag-par-property-name>Total Non-vccgnd Signals</xtag-par-property-name>=<xtag-par-property-value>324</xtag-par-property-value></TD></TR>
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<TR><TD><xtag-par-property-name>Total Non-vccgnd Design Pins</xtag-par-property-name>=<xtag-par-property-value>874</xtag-par-property-value></TD></TR>
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<TR><TD><xtag-par-property-name>Total Non-vccgnd Conns</xtag-par-property-name>=<xtag-par-property-value>874</xtag-par-property-value></TD></TR>
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<TR><TD><xtag-par-property-name>Total Non-vccgnd Timing Constrained Conns</xtag-par-property-name>=<xtag-par-property-value>691</xtag-par-property-value></TD></TR>
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<TR><TD><xtag-par-property-name>Phase 1 CPU</xtag-par-property-name>=<xtag-par-property-value>4.5 sec</xtag-par-property-value></TD></TR>
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<TR><TD><xtag-par-property-name>Phase 2 CPU</xtag-par-property-name>=<xtag-par-property-value>4.8 sec</xtag-par-property-value></TD></TR>
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<TR><TD><xtag-par-property-name>Phase 2 CPU</xtag-par-property-name>=<xtag-par-property-value>4.9 sec</xtag-par-property-value></TD></TR>
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||||
<TR><TD><xtag-par-property-name>Phase 3 CPU</xtag-par-property-name>=<xtag-par-property-value>5.6 sec</xtag-par-property-value></TD></TR>
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<TR><TD><xtag-par-property-name>Phase 4 CPU</xtag-par-property-name>=<xtag-par-property-value>6.4 sec</xtag-par-property-value></TD></TR>
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||||
<TR><TD><xtag-par-property-name>Phase 5 CPU</xtag-par-property-name>=<xtag-par-property-value>7.1 sec</xtag-par-property-value></TD></TR>
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@@ -16,17 +16,17 @@
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<TR><TD><xtag-par-property-name>Phase 9 CPU</xtag-par-property-name>=<xtag-par-property-value>7.2 sec</xtag-par-property-value></TD></TR>
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||||
<TR><TD><xtag-par-property-name>Phase 10 CPU</xtag-par-property-name>=<xtag-par-property-value>7.3 sec</xtag-par-property-value></TD></TR>
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||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 1</xtag-par-property-name>=<xtag-par-property-value>1.0</xtag-par-property-value></TD></TR>
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||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 2</xtag-par-property-name>=<xtag-par-property-value>1.0</xtag-par-property-value></TD></TR>
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||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 3</xtag-par-property-name>=<xtag-par-property-value>2.3</xtag-par-property-value></TD></TR>
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||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 4</xtag-par-property-name>=<xtag-par-property-value>2.0</xtag-par-property-value></TD></TR>
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||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 2</xtag-par-property-name>=<xtag-par-property-value>0.5</xtag-par-property-value></TD></TR>
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||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 3</xtag-par-property-name>=<xtag-par-property-value>3.7</xtag-par-property-value></TD></TR>
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||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 4</xtag-par-property-name>=<xtag-par-property-value>1.5</xtag-par-property-value></TD></TR>
|
||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 10</xtag-par-property-name>=<xtag-par-property-value>2.3</xtag-par-property-value></TD></TR>
|
||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 50</xtag-par-property-name>=<xtag-par-property-value>1.9</xtag-par-property-value></TD></TR>
|
||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 50</xtag-par-property-name>=<xtag-par-property-value>1.8</xtag-par-property-value></TD></TR>
|
||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 100</xtag-par-property-name>=<xtag-par-property-value>0.0</xtag-par-property-value></TD></TR>
|
||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 500</xtag-par-property-name>=<xtag-par-property-value>0.0</xtag-par-property-value></TD></TR>
|
||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 5000</xtag-par-property-name>=<xtag-par-property-value>0.0</xtag-par-property-value></TD></TR>
|
||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 20000</xtag-par-property-name>=<xtag-par-property-value>0.0</xtag-par-property-value></TD></TR>
|
||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 50000</xtag-par-property-name>=<xtag-par-property-value>0.0</xtag-par-property-value></TD></TR>
|
||||
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 100000</xtag-par-property-name>=<xtag-par-property-value>0.0</xtag-par-property-value></TD></TR>
|
||||
<TR><TD><xtag-par-property-name>IRR Gamma</xtag-par-property-name>=<xtag-par-property-value>1.1115</xtag-par-property-value></TD></TR>
|
||||
<TR><TD><xtag-par-property-name>IRR Gamma</xtag-par-property-name>=<xtag-par-property-value>1.0701</xtag-par-property-value></TD></TR>
|
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</xtag-section>
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</TABLE>
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|
||||
@@ -5,7 +5,7 @@ C:\Xilinx\14.7\ISE_DS\ISE\.
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"textovhdl" is an NCD, version 3.2, device xc6slx16, package csg324, speed -2
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Opened constraints file textovhdl.pcf.
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Fri Jun 10 12:45:11 2022
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Fri Jun 10 13:05:45 2022
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C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64\unwrapped\bitgen.exe -intstyle ise -w -g DebugBitstream:No -g Binary:no -g CRC:Enable -g Reset_on_err:No -g ConfigRate:2 -g ProgPin:PullUp -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullUp -g TmsPin:PullUp -g UnusedPin:PullDown -g UserID:0xFFFFFFFF -g ExtMasterCclk_en:No -g SPI_buswidth:1 -g TIMER_CFG:0xFFFF -g multipin_wakeup:No -g StartUpClk:CClk -g DONE_cycle:4 -g GTS_cycle:5 -g GWE_cycle:6 -g LCK_cycle:NoWait -g Security:None -g DonePipe:Yes -g DriveDone:No -g en_sw_gsr:No -g drive_awake:No -g sw_clk:Startupclk -g sw_gwe_cycle:5 -g sw_gts_cycle:4 textovhdl.ncd
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||||
|
||||
|
||||
BIN
textovhdl.bit
BIN
textovhdl.bit
Binary file not shown.
@@ -36,3 +36,9 @@ map -intstyle ise -p xc6slx16-csg324-2 -w -logic_opt off -ol high -t 1 -xt 0 -re
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||||
par -w -intstyle ise -ol high -mt off textovhdl_map.ncd textovhdl.ncd textovhdl.pcf
|
||||
trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml textovhdl.twx textovhdl.ncd -o textovhdl.twr textovhdl.pcf -ucf restricoes.ucf
|
||||
bitgen -intstyle ise -f textovhdl.ut textovhdl.ncd
|
||||
xst -intstyle ise -ifn "C:/Users/Gabriel/Xilinx/Aula20220603/textovhdl.xst" -ofn "C:/Users/Gabriel/Xilinx/Aula20220603/textovhdl.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc restricoes.ucf -p xc6slx16-csg324-2 textovhdl.ngc textovhdl.ngd
|
||||
map -intstyle ise -p xc6slx16-csg324-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o textovhdl_map.ncd textovhdl.ngd textovhdl.pcf
|
||||
par -w -intstyle ise -ol high -mt off textovhdl_map.ncd textovhdl.ncd textovhdl.pcf
|
||||
trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml textovhdl.twx textovhdl.ncd -o textovhdl.twr textovhdl.pcf -ucf restricoes.ucf
|
||||
bitgen -intstyle ise -f textovhdl.ut textovhdl.ncd
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
Release 14.7 Drc P.20131013 (nt64)
|
||||
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
|
||||
|
||||
Fri Jun 10 12:45:11 2022
|
||||
Fri Jun 10 13:05:45 2022
|
||||
|
||||
drc -z textovhdl.ncd textovhdl.pcf
|
||||
|
||||
|
||||
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
@@ -1,7 +1,7 @@
|
||||
Release 14.7 - par P.20131013 (nt64)
|
||||
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
|
||||
|
||||
Fri Jun 10 12:44:56 2022
|
||||
Fri Jun 10 13:05:25 2022
|
||||
|
||||
|
||||
# NOTE: This file is designed to be imported into a spreadsheet program
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
Release 14.7 par P.20131013 (nt64)
|
||||
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
|
||||
|
||||
GABRIEL-E5400:: Fri Jun 10 12:44:49 2022
|
||||
GABRIEL-E5400:: Fri Jun 10 13:05:17 2022
|
||||
|
||||
par -w -intstyle ise -ol high -mt off textovhdl_map.ncd textovhdl.ncd
|
||||
textovhdl.pcf
|
||||
@@ -27,30 +27,30 @@ Device speed data version: "PRODUCTION 1.23 2013-10-13".
|
||||
Device Utilization Summary:
|
||||
|
||||
Slice Logic Utilization:
|
||||
Number of Slice Registers: 232 out of 18,224 1%
|
||||
Number used as Flip Flops: 232
|
||||
Number of Slice Registers: 225 out of 18,224 1%
|
||||
Number used as Flip Flops: 225
|
||||
Number used as Latches: 0
|
||||
Number used as Latch-thrus: 0
|
||||
Number used as AND/OR logics: 0
|
||||
Number of Slice LUTs: 249 out of 9,112 2%
|
||||
Number used as logic: 227 out of 9,112 2%
|
||||
Number using O6 output only: 131
|
||||
Number of Slice LUTs: 218 out of 9,112 2%
|
||||
Number used as logic: 192 out of 9,112 2%
|
||||
Number using O6 output only: 94
|
||||
Number using O5 output only: 13
|
||||
Number using O5 and O6: 83
|
||||
Number using O5 and O6: 85
|
||||
Number used as ROM: 0
|
||||
Number used as Memory: 0 out of 2,176 0%
|
||||
Number used exclusively as route-thrus: 22
|
||||
Number with same-slice register load: 20
|
||||
Number used exclusively as route-thrus: 26
|
||||
Number with same-slice register load: 24
|
||||
Number with same-slice carry load: 2
|
||||
Number with other load: 0
|
||||
|
||||
Slice Logic Distribution:
|
||||
Number of occupied Slices: 79 out of 2,278 3%
|
||||
Number of occupied Slices: 70 out of 2,278 3%
|
||||
Number of MUXCYs used: 68 out of 4,556 1%
|
||||
Number of LUT Flip Flop pairs used: 275
|
||||
Number with an unused Flip Flop: 92 out of 275 33%
|
||||
Number with an unused LUT: 26 out of 275 9%
|
||||
Number of fully used LUT-FF pairs: 157 out of 275 57%
|
||||
Number of LUT Flip Flop pairs used: 235
|
||||
Number with an unused Flip Flop: 62 out of 235 26%
|
||||
Number with an unused LUT: 17 out of 235 7%
|
||||
Number of fully used LUT-FF pairs: 156 out of 235 66%
|
||||
Number of slice register sites lost
|
||||
to control set restrictions: 0 out of 18,224 0%
|
||||
|
||||
@@ -109,13 +109,13 @@ WARNING:Par:288 - The signal GPIO<7>_IBUF has no load. PAR will not attempt to
|
||||
Starting Router
|
||||
|
||||
|
||||
Phase 1 : 1150 unrouted; REAL time: 4 secs
|
||||
Phase 1 : 973 unrouted; REAL time: 4 secs
|
||||
|
||||
Phase 2 : 992 unrouted; REAL time: 4 secs
|
||||
Phase 2 : 819 unrouted; REAL time: 4 secs
|
||||
|
||||
Phase 3 : 232 unrouted; REAL time: 5 secs
|
||||
Phase 3 : 212 unrouted; REAL time: 5 secs
|
||||
|
||||
Phase 4 : 235 unrouted; (Par is working to improve performance) REAL time: 6 secs
|
||||
Phase 4 : 218 unrouted; (Par is working to improve performance) REAL time: 6 secs
|
||||
|
||||
Updating file: textovhdl.ncd with current fully routed design.
|
||||
|
||||
@@ -142,7 +142,7 @@ Partition Implementation Status
|
||||
|
||||
Generating "PAR" statistics.
|
||||
INFO:Par:459 - The Clock Report is not displayed in the non timing-driven mode.
|
||||
Timing Score: 29 (Setup: 29, Hold: 0)
|
||||
Timing Score: 33 (Setup: 33, Hold: 0)
|
||||
|
||||
Asterisk (*) preceding a constraint indicates it was not met.
|
||||
This may be due to a setup or hold violation.
|
||||
@@ -151,25 +151,25 @@ Asterisk (*) preceding a constraint indicates it was not met.
|
||||
Constraint | Check | Worst Case | Best Case | Timing | Timing
|
||||
| | Slack | Achievable | Errors | Score
|
||||
----------------------------------------------------------------------------------------------------------
|
||||
Autotimespec constraint for clock net con | SETUP | N/A| 4.530ns| N/A| 0
|
||||
t100k_8_BUFG | HOLD | 0.419ns| | 0| 0
|
||||
Autotimespec constraint for clock net con | SETUP | N/A| 4.182ns| N/A| 0
|
||||
t100k_8_BUFG | HOLD | 0.412ns| | 0| 0
|
||||
----------------------------------------------------------------------------------------------------------
|
||||
Autotimespec constraint for clock net clk | SETUP | N/A| 2.401ns| N/A| 0
|
||||
contbits | HOLD | 0.444ns| | 0| 0
|
||||
Autotimespec constraint for clock net clk | SETUP | N/A| 2.853ns| N/A| 0
|
||||
contbits | HOLD | 0.452ns| | 0| 0
|
||||
----------------------------------------------------------------------------------------------------------
|
||||
Autotimespec constraint for clock net clk | SETUP | N/A| 2.125ns| N/A| 0
|
||||
shift_BUFG | HOLD | 0.382ns| | 0| 0
|
||||
Autotimespec constraint for clock net clk | SETUP | N/A| 1.924ns| N/A| 0
|
||||
shift_BUFG | HOLD | 0.405ns| | 0| 0
|
||||
----------------------------------------------------------------------------------------------------------
|
||||
Autotimespec constraint for clock net con | SETUP | N/A| 3.381ns| N/A| 0
|
||||
Autotimespec constraint for clock net con | SETUP | N/A| 4.054ns| N/A| 0
|
||||
taux_5_BUFG | HOLD | 0.424ns| | 0| 0
|
||||
----------------------------------------------------------------------------------------------------------
|
||||
Autotimespec constraint for clock net con | SETUP | N/A| 1.765ns| N/A| 29
|
||||
t37915<8> | HOLD | 0.585ns| | 0| 0
|
||||
Autotimespec constraint for clock net CLK | SETUP | N/A| 3.584ns| N/A| 0
|
||||
27MHz_BUFGP | HOLD | 0.463ns| | 0| 0
|
||||
----------------------------------------------------------------------------------------------------------
|
||||
Autotimespec constraint for clock net CLK | SETUP | N/A| 3.572ns| N/A| 0
|
||||
27MHz_BUFGP | HOLD | 0.505ns| | 0| 0
|
||||
Autotimespec constraint for clock net con | SETUP | N/A| 1.769ns| N/A| 33
|
||||
t37915<8> | HOLD | 0.589ns| | 0| 0
|
||||
----------------------------------------------------------------------------------------------------------
|
||||
Autotimespec constraint for clock net GPI | SETUP | N/A| 1.818ns| N/A| 0
|
||||
Autotimespec constraint for clock net GPI | SETUP | N/A| 1.706ns| N/A| 0
|
||||
O_4_IBUF_BUFG | HOLD | 0.496ns| | 0| 0
|
||||
----------------------------------------------------------------------------------------------------------
|
||||
|
||||
@@ -188,10 +188,10 @@ All signals are completely routed.
|
||||
|
||||
WARNING:Par:283 - There are 10 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.
|
||||
|
||||
Total REAL time to PAR completion: 7 secs
|
||||
Total REAL time to PAR completion: 8 secs
|
||||
Total CPU time to PAR completion: 7 secs
|
||||
|
||||
Peak Memory Usage: 313 MB
|
||||
Peak Memory Usage: 312 MB
|
||||
|
||||
Placer: Placement generated during map.
|
||||
Routing: Completed - No errors found.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
//! **************************************************************************
|
||||
// Written by: Map P.20131013 on Fri Jun 10 12:44:45 2022
|
||||
// Written by: Map P.20131013 on Fri Jun 10 13:05:14 2022
|
||||
//! **************************************************************************
|
||||
|
||||
SCHEMATIC START;
|
||||
|
||||
@@ -329,4 +329,4 @@
|
||||
<!ELEMENT twName (#PCDATA)>
|
||||
<!ELEMENT twValue (#PCDATA)>
|
||||
]>
|
||||
<twReport><twBody><twSumRpt><twConstSummaryTable><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net cont100k_8_BUFG</twConstName><twConstData type="SETUP" best="4.530" units="ns" score="0"/><twConstData type="HOLD" slack="0.419" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net clkcontbits</twConstName><twConstData type="SETUP" best="2.401" units="ns" score="0"/><twConstData type="HOLD" slack="0.444" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net clkshift_BUFG</twConstName><twConstData type="SETUP" best="2.125" units="ns" score="0"/><twConstData type="HOLD" slack="0.382" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net contaux_5_BUFG</twConstName><twConstData type="SETUP" best="3.381" units="ns" score="0"/><twConstData type="HOLD" slack="0.424" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net cont37915<8></twConstName><twConstData type="SETUP" best="1.765" units="ns" score="29"/><twConstData type="HOLD" slack="0.585" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net CLK27MHz_BUFGP</twConstName><twConstData type="SETUP" best="3.572" units="ns" score="0"/><twConstData type="HOLD" slack="0.505" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net GPIO_4_IBUF_BUFG</twConstName><twConstData type="SETUP" best="1.818" units="ns" score="0"/><twConstData type="HOLD" slack="0.496" units="ns" errors="0" score="0"/></twConstSummary></twConstSummaryTable><twUnmetConstCnt anchorID="18">1</twUnmetConstCnt><twInfo anchorID="19">INFO:Timing:2761 - N/A entries in the Constraints List may indicate that the constraint is not analyzed due to the following: No paths covered by this constraint; Other constraints intersect with this constraint; or This constraint was disabled by a Path Tracing Control. Please run the Timespec Interaction Report (TSI) via command line (trce tsi) or Timing Analyzer GUI.</twInfo></twSumRpt></twBody></twReport>
|
||||
<twReport><twBody><twSumRpt><twConstSummaryTable><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net cont100k_8_BUFG</twConstName><twConstData type="SETUP" best="4.182" units="ns" score="0"/><twConstData type="HOLD" slack="0.412" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net clkcontbits</twConstName><twConstData type="SETUP" best="2.853" units="ns" score="0"/><twConstData type="HOLD" slack="0.452" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net clkshift_BUFG</twConstName><twConstData type="SETUP" best="1.924" units="ns" score="0"/><twConstData type="HOLD" slack="0.405" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net contaux_5_BUFG</twConstName><twConstData type="SETUP" best="4.054" units="ns" score="0"/><twConstData type="HOLD" slack="0.424" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net CLK27MHz_BUFGP</twConstName><twConstData type="SETUP" best="3.584" units="ns" score="0"/><twConstData type="HOLD" slack="0.463" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net cont37915<8></twConstName><twConstData type="SETUP" best="1.769" units="ns" score="33"/><twConstData type="HOLD" slack="0.589" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net GPIO_4_IBUF_BUFG</twConstName><twConstData type="SETUP" best="1.706" units="ns" score="0"/><twConstData type="HOLD" slack="0.496" units="ns" errors="0" score="0"/></twConstSummary></twConstSummaryTable><twUnmetConstCnt anchorID="18">1</twUnmetConstCnt><twInfo anchorID="19">INFO:Timing:2761 - N/A entries in the Constraints List may indicate that the constraint is not analyzed due to the following: No paths covered by this constraint; Other constraints intersect with this constraint; or This constraint was disabled by a Path Tracing Control. Please run the Timespec Interaction Report (TSI) via command line (trce tsi) or Timing Analyzer GUI.</twInfo></twSumRpt></twBody></twReport>
|
||||
|
||||
186
textovhdl.syr
186
textovhdl.syr
@@ -4,13 +4,13 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
|
||||
|
||||
|
||||
Total REAL time to Xst completion: 0.00 secs
|
||||
Total CPU time to Xst completion: 0.11 secs
|
||||
Total CPU time to Xst completion: 0.12 secs
|
||||
|
||||
--> Parameter xsthdpdir set to xst
|
||||
|
||||
|
||||
Total REAL time to Xst completion: 0.00 secs
|
||||
Total CPU time to Xst completion: 0.11 secs
|
||||
Total CPU time to Xst completion: 0.12 secs
|
||||
|
||||
--> Reading design: textovhdl.prj
|
||||
|
||||
@@ -312,12 +312,6 @@ Optimizing unit <display> ...
|
||||
Mapping all equations...
|
||||
Building and optimizing final netlist ...
|
||||
Found area constraint ratio of 100 (+ 5) on block textovhdl, actual ratio is 4.
|
||||
FlipFlop UC2/cont_3 has been replicated 1 time(s)
|
||||
FlipFlop atualTX_0 has been replicated 1 time(s)
|
||||
FlipFlop atualTX_1 has been replicated 2 time(s)
|
||||
FlipFlop atualTX_2 has been replicated 1 time(s)
|
||||
FlipFlop atualTX_3 has been replicated 1 time(s)
|
||||
FlipFlop cont100k_8 has been replicated 1 time(s)
|
||||
|
||||
Final Macro Processing ...
|
||||
|
||||
@@ -325,8 +319,8 @@ Final Macro Processing ...
|
||||
Final Register Report
|
||||
|
||||
Macro Statistics
|
||||
# Registers : 232
|
||||
Flip-Flops : 232
|
||||
# Registers : 225
|
||||
Flip-Flops : 225
|
||||
|
||||
=========================================================================
|
||||
|
||||
@@ -349,26 +343,27 @@ Top Level Output File Name : textovhdl.ngc
|
||||
|
||||
Primitive and Black Box Usage:
|
||||
------------------------------
|
||||
# BELS : 395
|
||||
# BELS : 358
|
||||
# GND : 1
|
||||
# INV : 58
|
||||
# LUT1 : 15
|
||||
# LUT2 : 13
|
||||
# LUT3 : 47
|
||||
# LUT4 : 17
|
||||
# LUT5 : 89
|
||||
# LUT6 : 32
|
||||
# LUT2 : 10
|
||||
# LUT3 : 45
|
||||
# LUT4 : 19
|
||||
# LUT5 : 56
|
||||
# LUT6 : 31
|
||||
# MUXCY : 59
|
||||
# VCC : 1
|
||||
# XORCY : 63
|
||||
# FlipFlops/Latches : 232
|
||||
# FD : 145
|
||||
# FlipFlops/Latches : 225
|
||||
# FD : 115
|
||||
# FD_1 : 17
|
||||
# FDC : 8
|
||||
# FDCE : 25
|
||||
# FDCE : 24
|
||||
# FDE : 4
|
||||
# FDE_1 : 32
|
||||
# FDR : 1
|
||||
# FDR : 20
|
||||
# FDS : 5
|
||||
# Clock Buffers : 6
|
||||
# BUFG : 5
|
||||
# BUFGP : 1
|
||||
@@ -383,16 +378,16 @@ Selected Device : 6slx16csg324-2
|
||||
|
||||
|
||||
Slice Logic Utilization:
|
||||
Number of Slice Registers: 232 out of 18224 1%
|
||||
Number of Slice LUTs: 271 out of 9112 2%
|
||||
Number used as Logic: 271 out of 9112 2%
|
||||
Number of Slice Registers: 225 out of 18224 1%
|
||||
Number of Slice LUTs: 234 out of 9112 2%
|
||||
Number used as Logic: 234 out of 9112 2%
|
||||
|
||||
Slice Logic Distribution:
|
||||
Number of LUT Flip Flop pairs used: 336
|
||||
Number with an unused Flip Flop: 104 out of 336 30%
|
||||
Number with an unused LUT: 65 out of 336 19%
|
||||
Number of fully used LUT-FF pairs: 167 out of 336 49%
|
||||
Number of unique control sets: 17
|
||||
Number of LUT Flip Flop pairs used: 294
|
||||
Number with an unused Flip Flop: 69 out of 294 23%
|
||||
Number with an unused LUT: 60 out of 294 20%
|
||||
Number of fully used LUT-FF pairs: 165 out of 294 56%
|
||||
Number of unique control sets: 18
|
||||
|
||||
IO Utilization:
|
||||
Number of IOs: 21
|
||||
@@ -422,12 +417,12 @@ Clock Information:
|
||||
-----------------------------------+------------------------+-------+
|
||||
Clock Signal | Clock buffer(FF name) | Load |
|
||||
-----------------------------------+------------------------+-------+
|
||||
cont100k_8 | BUFG | 46 |
|
||||
cont100k_8 | BUFG | 40 |
|
||||
cont37915_8 | NONE(clk37915) | 1 |
|
||||
clkshift | BUFG | 32 |
|
||||
GPIO<4> | IBUF+BUFG | 32 |
|
||||
UC2/cont_3 | BUFG | 32 |
|
||||
CLK27MHz | BUFGP | 55 |
|
||||
CLK27MHz | BUFGP | 54 |
|
||||
clkcontbits | NONE(UT1/cont_3) | 8 |
|
||||
contaux_5 | BUFG | 26 |
|
||||
-----------------------------------+------------------------+-------+
|
||||
@@ -441,8 +436,8 @@ Timing Summary:
|
||||
---------------
|
||||
Speed Grade: -2
|
||||
|
||||
Minimum period: 4.443ns (Maximum Frequency: 225.073MHz)
|
||||
Minimum input arrival time before clock: 6.555ns
|
||||
Minimum period: 5.302ns (Maximum Frequency: 188.608MHz)
|
||||
Minimum input arrival time before clock: 6.062ns
|
||||
Maximum output required time after clock: 5.607ns
|
||||
Maximum combinational path delay: No path found
|
||||
|
||||
@@ -452,27 +447,28 @@ All values displayed in nanoseconds (ns)
|
||||
|
||||
=========================================================================
|
||||
Timing constraint: Default period analysis for Clock 'cont100k_8'
|
||||
Clock period: 4.443ns (frequency: 225.073MHz)
|
||||
Total number of paths / destination ports: 752 / 88
|
||||
Clock period: 5.302ns (frequency: 188.608MHz)
|
||||
Total number of paths / destination ports: 720 / 80
|
||||
-------------------------------------------------------------------------
|
||||
Delay: 4.443ns (Levels of Logic = 3)
|
||||
Source: UT2/cont_1 (FF)
|
||||
Delay: 5.302ns (Levels of Logic = 4)
|
||||
Source: UT3/cont_3 (FF)
|
||||
Destination: atualTX_0 (FF)
|
||||
Source Clock: cont100k_8 rising
|
||||
Destination Clock: cont100k_8 rising
|
||||
|
||||
Data Path: UT2/cont_1 to atualTX_0
|
||||
Data Path: UT3/cont_3 to atualTX_0
|
||||
Gate Net
|
||||
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
||||
---------------------------------------- ------------
|
||||
FDC:C->Q 5 0.525 1.271 UT2/cont_1 (UT2/cont_1)
|
||||
LUT6:I1->O 2 0.254 0.726 proxTX<0>311 (proxTX<0>31)
|
||||
LUT6:I5->O 6 0.254 1.104 proxTX<0>1 (proxTX<0>1)
|
||||
LUT6:I3->O 3 0.235 0.000 proxTX<0>12 (proxTX<0>)
|
||||
FD:D 0.074 atualTX_0
|
||||
FDCE:C->Q 5 0.525 1.117 UT3/cont_3 (UT3/cont_3)
|
||||
LUT4:I0->O 2 0.254 0.726 proxTX<0>421 (proxTX<0>41)
|
||||
LUT5:I4->O 2 0.254 0.834 conttimeTXIR[7]_GND_5_o_equal_6_o<7>1 (conttimeTXIR[7]_GND_5_o_equal_6_o)
|
||||
LUT6:I4->O 7 0.250 1.018 proxTX<0>4 (proxTX<0>4)
|
||||
LUT6:I4->O 1 0.250 0.000 Mmux_proxCLR12BITS11 (proxCLR12BITS)
|
||||
FD:D 0.074 clr12bits
|
||||
----------------------------------------
|
||||
Total 4.443ns (1.342ns logic, 3.101ns route)
|
||||
(30.2% logic, 69.8% route)
|
||||
Total 5.302ns (1.607ns logic, 3.695ns route)
|
||||
(30.3% logic, 69.7% route)
|
||||
|
||||
=========================================================================
|
||||
Timing constraint: Default period analysis for Clock 'cont37915_8'
|
||||
@@ -540,56 +536,56 @@ Delay: 1.324ns (Levels of Logic = 0)
|
||||
|
||||
=========================================================================
|
||||
Timing constraint: Default period analysis for Clock 'CLK27MHz'
|
||||
Clock period: 3.944ns (frequency: 253.550MHz)
|
||||
Total number of paths / destination ports: 1806 / 55
|
||||
Clock period: 5.010ns (frequency: 199.601MHz)
|
||||
Total number of paths / destination ports: 1773 / 78
|
||||
-------------------------------------------------------------------------
|
||||
Delay: 3.944ns (Levels of Logic = 2)
|
||||
Source: cont100k_1 (FF)
|
||||
Destination: cont100k_0 (FF)
|
||||
Delay: 5.010ns (Levels of Logic = 2)
|
||||
Source: cont37915_13 (FF)
|
||||
Destination: cont37915_1 (FF)
|
||||
Source Clock: CLK27MHz rising
|
||||
Destination Clock: CLK27MHz rising
|
||||
|
||||
Data Path: cont100k_1 to cont100k_0
|
||||
Data Path: cont37915_13 to cont37915_1
|
||||
Gate Net
|
||||
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
||||
---------------------------------------- ------------
|
||||
FD:C->Q 2 0.525 1.181 cont100k_1 (cont100k_1)
|
||||
LUT6:I0->O 24 0.254 1.656 cont100k[23]_GND_5_o_equal_88_o<23>3 (cont100k[23]_GND_5_o_equal_88_o<23>2)
|
||||
LUT5:I1->O 1 0.254 0.000 Mcount_cont100k_eqn_01 (Mcount_cont100k_eqn_0)
|
||||
FD:D 0.074 cont100k_0
|
||||
FDR:C->Q 2 0.525 1.181 cont37915_13 (cont37915_13)
|
||||
LUT6:I0->O 1 0.254 0.958 cont37915[23]_GND_5_o_equal_10_o<23>1 (cont37915[23]_GND_5_o_equal_10_o<23>)
|
||||
LUT4:I0->O 24 0.254 1.379 cont37915[23]_GND_5_o_equal_10_o<23>5 (cont37915[23]_GND_5_o_equal_10_o)
|
||||
FDS:S 0.459 cont37915_1
|
||||
----------------------------------------
|
||||
Total 3.944ns (1.107ns logic, 2.837ns route)
|
||||
(28.1% logic, 71.9% route)
|
||||
Total 5.010ns (1.492ns logic, 3.518ns route)
|
||||
(29.8% logic, 70.2% route)
|
||||
|
||||
=========================================================================
|
||||
Timing constraint: Default period analysis for Clock 'clkcontbits'
|
||||
Clock period: 3.204ns (frequency: 312.110MHz)
|
||||
Clock period: 3.273ns (frequency: 305.530MHz)
|
||||
Total number of paths / destination ports: 48 / 12
|
||||
-------------------------------------------------------------------------
|
||||
Delay: 3.204ns (Levels of Logic = 2)
|
||||
Source: UT0/cont_2 (FF)
|
||||
Delay: 3.273ns (Levels of Logic = 2)
|
||||
Source: UT0/cont_0 (FF)
|
||||
Destination: UT1/cont_3 (FF)
|
||||
Source Clock: clkcontbits rising
|
||||
Destination Clock: clkcontbits rising
|
||||
|
||||
Data Path: UT0/cont_2 to UT1/cont_3
|
||||
Data Path: UT0/cont_0 to UT1/cont_3
|
||||
Gate Net
|
||||
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
||||
---------------------------------------- ------------
|
||||
FDC:C->Q 5 0.525 1.117 UT0/cont_2 (UT0/cont_2)
|
||||
FDC:C->Q 7 0.525 1.186 UT0/cont_0 (UT0/cont_0)
|
||||
LUT4:I0->O 6 0.254 0.984 UT0/Mmux_ENOUT11 (EOTX8<0>)
|
||||
LUT5:I3->O 1 0.250 0.000 UT1/Mmux_proxcont41 (UT1/proxcont<3>)
|
||||
FDCE:D 0.074 UT1/cont_3
|
||||
----------------------------------------
|
||||
Total 3.204ns (1.103ns logic, 2.101ns route)
|
||||
(34.4% logic, 65.6% route)
|
||||
Total 3.273ns (1.103ns logic, 2.170ns route)
|
||||
(33.7% logic, 66.3% route)
|
||||
|
||||
=========================================================================
|
||||
Timing constraint: Default period analysis for Clock 'contaux_5'
|
||||
Clock period: 3.532ns (frequency: 283.126MHz)
|
||||
Clock period: 3.637ns (frequency: 274.952MHz)
|
||||
Total number of paths / destination ports: 127 / 26
|
||||
-------------------------------------------------------------------------
|
||||
Delay: 3.532ns (Levels of Logic = 2)
|
||||
Delay: 3.637ns (Levels of Logic = 2)
|
||||
Source: UDISP/EN_5 (FF)
|
||||
Destination: UDISP/palavra_3 (FF)
|
||||
Source Clock: contaux_5 falling
|
||||
@@ -600,18 +596,18 @@ Delay: 3.532ns (Levels of Logic = 2)
|
||||
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
||||
---------------------------------------- ------------
|
||||
FD:C->Q 17 0.525 1.639 UDISP/EN_5 (UDISP/EN_5)
|
||||
LUT6:I1->O 1 0.254 0.790 UDISP/Mmux_palavra[14]_proxpalavra[15]_mux_38_OUT91 (UDISP/Mmux_palavra[14]_proxpalavra[15]_mux_38_OUT9)
|
||||
LUT5:I3->O 1 0.250 0.000 UDISP/Mmux_palavra[14]_proxpalavra[15]_mux_38_OUT93 (UDISP/palavra[14]_proxpalavra[15]_mux_38_OUT<2>)
|
||||
LUT5:I0->O 1 0.254 0.910 UDISP/Mmux_palavra[14]_proxpalavra[15]_mux_38_OUT92 (UDISP/Mmux_palavra[14]_proxpalavra[15]_mux_38_OUT91)
|
||||
LUT5:I2->O 1 0.235 0.000 UDISP/Mmux_palavra[14]_proxpalavra[15]_mux_38_OUT93 (UDISP/palavra[14]_proxpalavra[15]_mux_38_OUT<2>)
|
||||
FD_1:D 0.074 UDISP/palavra_2
|
||||
----------------------------------------
|
||||
Total 3.532ns (1.103ns logic, 2.429ns route)
|
||||
(31.2% logic, 68.8% route)
|
||||
Total 3.637ns (1.088ns logic, 2.549ns route)
|
||||
(29.9% logic, 70.1% route)
|
||||
|
||||
=========================================================================
|
||||
Timing constraint: Default OFFSET IN BEFORE for Clock 'cont100k_8'
|
||||
Total number of paths / destination ports: 39 / 32
|
||||
Total number of paths / destination ports: 33 / 28
|
||||
-------------------------------------------------------------------------
|
||||
Offset: 5.312ns (Levels of Logic = 4)
|
||||
Offset: 5.281ns (Levels of Logic = 4)
|
||||
Source: GPIO<4> (PAD)
|
||||
Destination: UC2/cont_3 (FF)
|
||||
Destination Clock: cont100k_8 rising
|
||||
@@ -621,19 +617,19 @@ Offset: 5.312ns (Levels of Logic = 4)
|
||||
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
||||
---------------------------------------- ------------
|
||||
IBUF:I->O 6 1.328 1.331 GPIO_4_IBUF (GPIO_4_IBUF)
|
||||
LUT6:I0->O 9 0.254 0.976 UC0/Mmux_ENOUT11 (EO<0>)
|
||||
LUT5:I4->O 5 0.254 0.841 UC1/Mmux_ENOUT11 (EO<1>)
|
||||
LUT6:I0->O 7 0.254 0.910 UC0/Mmux_ENOUT11 (EO<0>)
|
||||
LUT5:I4->O 6 0.254 0.876 UC1/Mmux_ENOUT11 (EO<1>)
|
||||
LUT5:I4->O 1 0.254 0.000 UC2/Mmux_proxcont21 (UC2/proxcont<1>)
|
||||
FDCE:D 0.074 UC2/cont_1
|
||||
----------------------------------------
|
||||
Total 5.312ns (2.164ns logic, 3.148ns route)
|
||||
(40.7% logic, 59.3% route)
|
||||
Total 5.281ns (2.164ns logic, 3.117ns route)
|
||||
(41.0% logic, 59.0% route)
|
||||
|
||||
=========================================================================
|
||||
Timing constraint: Default OFFSET IN BEFORE for Clock 'contaux_5'
|
||||
Total number of paths / destination ports: 2 / 2
|
||||
-------------------------------------------------------------------------
|
||||
Offset: 6.555ns (Levels of Logic = 5)
|
||||
Offset: 6.062ns (Levels of Logic = 5)
|
||||
Source: BUT<0> (PAD)
|
||||
Destination: UDISP/palavra_0 (FF)
|
||||
Destination Clock: contaux_5 falling
|
||||
@@ -642,15 +638,15 @@ Offset: 6.555ns (Levels of Logic = 5)
|
||||
Gate Net
|
||||
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
||||
---------------------------------------- ------------
|
||||
IBUF:I->O 13 1.328 1.374 BUT_0_IBUF (BUT_0_IBUF)
|
||||
LUT4:I0->O 2 0.254 1.002 proxTX<0>8 (proxTX<0>8)
|
||||
LUT6:I2->O 3 0.254 0.994 proxTX<0>12 (proxTX<0>)
|
||||
LUT5:I2->O 1 0.235 0.790 UDISP/Mmux_palavra[14]_proxpalavra[15]_mux_38_OUT12 (UDISP/Mmux_palavra[14]_proxpalavra[15]_mux_38_OUT11)
|
||||
LUT4:I2->O 1 0.250 0.000 UDISP/Mmux_palavra[14]_proxpalavra[15]_mux_38_OUT13 (UDISP/palavra[14]_proxpalavra[15]_mux_38_OUT<0>)
|
||||
IBUF:I->O 4 1.328 0.912 BUT_0_IBUF (BUT_0_IBUF)
|
||||
LUT4:I2->O 7 0.250 1.138 proxTX<0>9 (proxTX<0>9)
|
||||
LUT4:I1->O 2 0.235 0.954 proxTX<0>10 (proxTX<0>)
|
||||
LUT5:I2->O 1 0.235 0.682 UDISP/Mmux_palavra[14]_proxpalavra[15]_mux_38_OUT12 (UDISP/Mmux_palavra[14]_proxpalavra[15]_mux_38_OUT11)
|
||||
LUT4:I3->O 1 0.254 0.000 UDISP/Mmux_palavra[14]_proxpalavra[15]_mux_38_OUT13 (UDISP/palavra[14]_proxpalavra[15]_mux_38_OUT<0>)
|
||||
FD_1:D 0.074 UDISP/palavra_0
|
||||
----------------------------------------
|
||||
Total 6.555ns (2.395ns logic, 4.160ns route)
|
||||
(36.5% logic, 63.5% route)
|
||||
Total 6.062ns (2.376ns logic, 3.686ns route)
|
||||
(39.2% logic, 60.8% route)
|
||||
|
||||
=========================================================================
|
||||
Timing constraint: Default OFFSET OUT AFTER for Clock 'cont100k_8'
|
||||
@@ -741,7 +737,7 @@ Clock to Setup on destination clock CLK27MHz
|
||||
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
|
||||
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
|
||||
---------------+---------+---------+---------+---------+
|
||||
CLK27MHz | 3.944| | | |
|
||||
CLK27MHz | 5.010| | | |
|
||||
---------------+---------+---------+---------+---------+
|
||||
|
||||
Clock to Setup on destination clock GPIO<4>
|
||||
@@ -750,7 +746,7 @@ Clock to Setup on destination clock GPIO<4>
|
||||
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
|
||||
---------------+---------+---------+---------+---------+
|
||||
GPIO<4> | | | 1.324| |
|
||||
cont100k_8 | | | 3.614| |
|
||||
cont100k_8 | | | 3.648| |
|
||||
---------------+---------+---------+---------+---------+
|
||||
|
||||
Clock to Setup on destination clock UC2/cont_3
|
||||
@@ -766,7 +762,7 @@ Clock to Setup on destination clock clkcontbits
|
||||
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
|
||||
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
|
||||
---------------+---------+---------+---------+---------+
|
||||
clkcontbits | 3.204| | | |
|
||||
clkcontbits | 3.273| | | |
|
||||
cont100k_8 | 1.927| | | |
|
||||
---------------+---------+---------+---------+---------+
|
||||
|
||||
@@ -786,9 +782,9 @@ Clock to Setup on destination clock cont100k_8
|
||||
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
|
||||
---------------+---------+---------+---------+---------+
|
||||
UC2/cont_3 | 4.126| | | |
|
||||
clkcontbits | 5.790| | | |
|
||||
clkshift | 4.385| | | |
|
||||
cont100k_8 | 4.443| | | |
|
||||
clkcontbits | 7.052| | | |
|
||||
clkshift | 3.154| | | |
|
||||
cont100k_8 | 5.302| | | |
|
||||
---------------+---------+---------+---------+---------+
|
||||
|
||||
Clock to Setup on destination clock cont37915_8
|
||||
@@ -804,21 +800,21 @@ Clock to Setup on destination clock contaux_5
|
||||
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
|
||||
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
|
||||
---------------+---------+---------+---------+---------+
|
||||
clkcontbits | | | 6.448| |
|
||||
clkshift | | | 6.654| |
|
||||
cont100k_8 | | | 6.712| |
|
||||
contaux_5 | | | 3.532| |
|
||||
clkcontbits | | | 7.157| |
|
||||
clkshift | | | 5.279| |
|
||||
cont100k_8 | | | 7.427| |
|
||||
contaux_5 | | | 3.637| |
|
||||
---------------+---------+---------+---------+---------+
|
||||
|
||||
=========================================================================
|
||||
|
||||
|
||||
Total REAL time to Xst completion: 8.00 secs
|
||||
Total CPU time to Xst completion: 8.01 secs
|
||||
Total CPU time to Xst completion: 8.09 secs
|
||||
|
||||
-->
|
||||
|
||||
Total memory usage is 260040 kilobytes
|
||||
Total memory usage is 260168 kilobytes
|
||||
|
||||
Number of errors : 0 ( 0 filtered)
|
||||
Number of warnings : 26 ( 0 filtered)
|
||||
|
||||
@@ -37,7 +37,7 @@ Clock CLK27MHz to Pad
|
||||
|Max (slowest) clk| Process |Min (fastest) clk| Process | | Clock |
|
||||
Destination | (edge) to PAD | Corner | (edge) to PAD | Corner |Internal Clock(s) | Phase |
|
||||
------------+-----------------+------------+-----------------+------------+------------------+--------+
|
||||
GPIO<0> | 9.589(R)| SLOW | 4.046(R)| FAST |CLK27MHz_BUFGP | 0.000|
|
||||
GPIO<0> | 9.862(R)| SLOW | 4.202(R)| FAST |CLK27MHz_BUFGP | 0.000|
|
||||
------------+-----------------+------------+-----------------+------------+------------------+--------+
|
||||
|
||||
Clock to Setup on destination clock CLK27MHz
|
||||
@@ -45,7 +45,7 @@ Clock to Setup on destination clock CLK27MHz
|
||||
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
|
||||
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
|
||||
---------------+---------+---------+---------+---------+
|
||||
CLK27MHz | 3.572| | | |
|
||||
CLK27MHz | 3.584| | | |
|
||||
---------------+---------+---------+---------+---------+
|
||||
|
||||
Clock to Setup on destination clock GPIO<4>
|
||||
@@ -53,18 +53,18 @@ Clock to Setup on destination clock GPIO<4>
|
||||
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
|
||||
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
|
||||
---------------+---------+---------+---------+---------+
|
||||
GPIO<4> | | | | 1.818|
|
||||
GPIO<4> | | | | 1.706|
|
||||
---------------+---------+---------+---------+---------+
|
||||
|
||||
|
||||
Analysis completed Fri Jun 10 12:45:03 2022
|
||||
Analysis completed Fri Jun 10 13:05:32 2022
|
||||
--------------------------------------------------------------------------------
|
||||
|
||||
Trace Settings:
|
||||
-------------------------
|
||||
Trace Settings
|
||||
|
||||
Peak Memory Usage: 222 MB
|
||||
Peak Memory Usage: 221 MB
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -333,7 +333,7 @@
|
||||
-n 3 -fastpaths -xml textovhdl.twx textovhdl.ncd -o textovhdl.twr textovhdl.pcf
|
||||
-ucf restricoes.ucf
|
||||
|
||||
</twCmdLine><twDesign>textovhdl.ncd</twDesign><twDesignPath>textovhdl.ncd</twDesignPath><twPCF>textovhdl.pcf</twPCF><twPcfPath>textovhdl.pcf</twPcfPath><twDevInfo arch="spartan6" pkg="csg324"><twDevName>xc6slx16</twDevName><twDevRange>C</twDevRange><twSpeedGrade>-2</twSpeedGrade><twSpeedVer>PRODUCTION 1.23 2013-10-13</twSpeedVer><twQuadDly>1</twQuadDly></twDevInfo><twRptInfo twRptLvl="twVerbose" twReportMinPaths="true" dlyHyperLnks="t" ><twEndptLimit>3</twEndptLimit></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twInfo anchorID="2">INFO:Timing:2698 - No timing constraints found, doing default enumeration.</twInfo><twInfo anchorID="3">INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).</twInfo><twInfo anchorID="4">INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</twInfo><twInfo anchorID="5">INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model. For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</twInfo><twBody><twVerboseRpt><twDataSheet anchorID="6" twNameLen="15"><twClk2OutList anchorID="7" twDestWidth="7" twPhaseWidth="14"><twSrc>CLK27MHz</twSrc><twClk2Out twOutPad = "GPIO<0>" twMinTime = "4.046" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "9.589" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="CLK27MHz_BUFGP" twClkPhase="0.000" ></twClk2Out></twClk2OutList><twClk2SUList anchorID="8" twDestWidth="8"><twDest>CLK27MHz</twDest><twClk2SU><twSrc>CLK27MHz</twSrc><twRiseRise>3.572</twRiseRise></twClk2SU></twClk2SUList><twClk2SUList anchorID="9" twDestWidth="7"><twDest>GPIO<4></twDest><twClk2SU><twSrc>GPIO<4></twSrc><twFallFall>1.818</twFallFall></twClk2SU></twClk2SUList><twOffsetTables></twOffsetTables></twDataSheet></twVerboseRpt></twBody><twFoot><twTimestamp>Fri Jun 10 12:45:03 2022 </twTimestamp></twFoot><twClientInfo anchorID="10"><twClientName>Trace</twClientName><twAttrList><twAttrListItem><twName>Trace Settings</twName><twValue>
|
||||
</twCmdLine><twDesign>textovhdl.ncd</twDesign><twDesignPath>textovhdl.ncd</twDesignPath><twPCF>textovhdl.pcf</twPCF><twPcfPath>textovhdl.pcf</twPcfPath><twDevInfo arch="spartan6" pkg="csg324"><twDevName>xc6slx16</twDevName><twDevRange>C</twDevRange><twSpeedGrade>-2</twSpeedGrade><twSpeedVer>PRODUCTION 1.23 2013-10-13</twSpeedVer><twQuadDly>1</twQuadDly></twDevInfo><twRptInfo twRptLvl="twVerbose" twReportMinPaths="true" dlyHyperLnks="t" ><twEndptLimit>3</twEndptLimit></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twInfo anchorID="2">INFO:Timing:2698 - No timing constraints found, doing default enumeration.</twInfo><twInfo anchorID="3">INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).</twInfo><twInfo anchorID="4">INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</twInfo><twInfo anchorID="5">INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model. For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</twInfo><twBody><twVerboseRpt><twDataSheet anchorID="6" twNameLen="15"><twClk2OutList anchorID="7" twDestWidth="7" twPhaseWidth="14"><twSrc>CLK27MHz</twSrc><twClk2Out twOutPad = "GPIO<0>" twMinTime = "4.202" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "9.862" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="CLK27MHz_BUFGP" twClkPhase="0.000" ></twClk2Out></twClk2OutList><twClk2SUList anchorID="8" twDestWidth="8"><twDest>CLK27MHz</twDest><twClk2SU><twSrc>CLK27MHz</twSrc><twRiseRise>3.584</twRiseRise></twClk2SU></twClk2SUList><twClk2SUList anchorID="9" twDestWidth="7"><twDest>GPIO<4></twDest><twClk2SU><twSrc>GPIO<4></twSrc><twFallFall>1.706</twFallFall></twClk2SU></twClk2SUList><twOffsetTables></twOffsetTables></twDataSheet></twVerboseRpt></twBody><twFoot><twTimestamp>Fri Jun 10 13:05:32 2022 </twTimestamp></twFoot><twClientInfo anchorID="10"><twClientName>Trace</twClientName><twAttrList><twAttrListItem><twName>Trace Settings</twName><twValue>
|
||||
|
||||
Peak Memory Usage: 222 MB
|
||||
Peak Memory Usage: 221 MB
|
||||
</twValue></twAttrListItem></twAttrList></twClientInfo></twReport>
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
Release 14.7 - par P.20131013 (nt64)
|
||||
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
|
||||
|
||||
Fri Jun 10 12:44:57 2022
|
||||
Fri Jun 10 13:05:25 2022
|
||||
|
||||
All signals are completely routed.
|
||||
|
||||
|
||||
@@ -64,10 +64,10 @@ contbitsigual32 <= '1' when cont32TXIR="00110010" else '0';
|
||||
UT2: CONTBCD_C port map(CLK => clk100k, CLR => clr12bits, UP => '1', EN => '1', ENOUT => EOTX12(0), Q => conttimeTXIR(3 downto 0));
|
||||
UT3: CONTBCD_C port map(CLK => clk100k, CLR => clr12bits, UP => '1', EN => EOTX12(0), ENOUT => EOTX12(1), Q => conttimeTXIR(7 downto 4));
|
||||
UT4: CONTBCD_C port map(CLK => clk100k, CLR => clr12bits, UP => '1', EN => EOTX12(1), ENOUT => EOTX12(2), Q => conttimeTXIR(11 downto 8));
|
||||
Q900 <= '1' when conttimeTXIR(11 downto 8)="1001" else '0';
|
||||
Q450 <= '1' when conttimeTXIR(11 downto 4)="01000101" else '0';
|
||||
Q55 <= '1' when conttimeTXIR(7 downto 0)="01010101" else '0';
|
||||
Q165 <= '1' when conttimeTXIR="000101100101" else '0';
|
||||
Q900 <= '0' when conttimeTXIR(11 downto 8)="1001" else '1';
|
||||
Q450 <= '0' when conttimeTXIR(11 downto 4)="01000101" else '1';
|
||||
Q55 <= '0' when conttimeTXIR(7 downto 0)="01010101" else '1';
|
||||
Q165 <= '0' when conttimeTXIR="000101100101" else '1';
|
||||
|
||||
--shift register
|
||||
proxshift32 <= codigo32 when loadshift='1' else '0'&atualshift32(31 downto 1);
|
||||
|
||||
File diff suppressed because one or more lines are too long
@@ -10,7 +10,7 @@ Target Device : xc6slx16
|
||||
Target Package : csg324
|
||||
Target Speed : -2
|
||||
Mapper Version : spartan6 -- $Revision: 1.55 $
|
||||
Mapped Date : Fri Jun 10 12:44:37 2022
|
||||
Mapped Date : Fri Jun 10 13:05:06 2022
|
||||
|
||||
Mapping design into LUTs...
|
||||
Running directed packing...
|
||||
@@ -23,13 +23,13 @@ Total REAL time at the beginning of Placer: 5 secs
|
||||
Total CPU time at the beginning of Placer: 5 secs
|
||||
|
||||
Phase 1.1 Initial Placement Analysis
|
||||
Phase 1.1 Initial Placement Analysis (Checksum:fbd4caa6) REAL time: 5 secs
|
||||
Phase 1.1 Initial Placement Analysis (Checksum:38160aa6) REAL time: 5 secs
|
||||
|
||||
Phase 2.7 Design Feasibility Check
|
||||
Phase 2.7 Design Feasibility Check (Checksum:fbd4caa6) REAL time: 5 secs
|
||||
Phase 2.7 Design Feasibility Check (Checksum:38160aa6) REAL time: 6 secs
|
||||
|
||||
Phase 3.31 Local Placement Optimization
|
||||
Phase 3.31 Local Placement Optimization (Checksum:fbd4caa6) REAL time: 5 secs
|
||||
Phase 3.31 Local Placement Optimization (Checksum:38160aa6) REAL time: 6 secs
|
||||
|
||||
Phase 4.2 Initial Placement for Architecture Specific Features
|
||||
|
||||
@@ -47,36 +47,36 @@ WARNING:Place:1109 - A clock IOB / BUFGMUX clock component pair have been found
|
||||
lead to very poor timing results. It is recommended that this error condition
|
||||
be corrected in the design.
|
||||
Phase 4.2 Initial Placement for Architecture Specific Features
|
||||
(Checksum:82a13da3) REAL time: 7 secs
|
||||
(Checksum:bd11d922) REAL time: 7 secs
|
||||
|
||||
Phase 5.36 Local Placement Optimization
|
||||
Phase 5.36 Local Placement Optimization (Checksum:82a13da3) REAL time: 7 secs
|
||||
Phase 5.36 Local Placement Optimization (Checksum:bd11d922) REAL time: 7 secs
|
||||
|
||||
Phase 6.30 Global Clock Region Assignment
|
||||
Phase 6.30 Global Clock Region Assignment (Checksum:82a13da3) REAL time: 7 secs
|
||||
Phase 6.30 Global Clock Region Assignment (Checksum:bd11d922) REAL time: 7 secs
|
||||
|
||||
Phase 7.3 Local Placement Optimization
|
||||
Phase 7.3 Local Placement Optimization (Checksum:82a13da3) REAL time: 7 secs
|
||||
Phase 7.3 Local Placement Optimization (Checksum:bd11d922) REAL time: 7 secs
|
||||
|
||||
Phase 8.5 Local Placement Optimization
|
||||
Phase 8.5 Local Placement Optimization (Checksum:82a13da3) REAL time: 7 secs
|
||||
Phase 8.5 Local Placement Optimization (Checksum:bd11d922) REAL time: 7 secs
|
||||
|
||||
Phase 9.8 Global Placement
|
||||
................
|
||||
....................
|
||||
.............................................
|
||||
Phase 9.8 Global Placement (Checksum:631cdfac) REAL time: 7 secs
|
||||
Phase 9.8 Global Placement (Checksum:573d0fe) REAL time: 7 secs
|
||||
|
||||
Phase 10.5 Local Placement Optimization
|
||||
Phase 10.5 Local Placement Optimization (Checksum:631cdfac) REAL time: 7 secs
|
||||
Phase 10.5 Local Placement Optimization (Checksum:573d0fe) REAL time: 7 secs
|
||||
|
||||
Phase 11.18 Placement Optimization
|
||||
Phase 11.18 Placement Optimization (Checksum:50b10a04) REAL time: 7 secs
|
||||
Phase 11.18 Placement Optimization (Checksum:89be6bf6) REAL time: 7 secs
|
||||
|
||||
Phase 12.5 Local Placement Optimization
|
||||
Phase 12.5 Local Placement Optimization (Checksum:50b10a04) REAL time: 7 secs
|
||||
Phase 12.5 Local Placement Optimization (Checksum:89be6bf6) REAL time: 7 secs
|
||||
|
||||
Phase 13.34 Placement Validation
|
||||
Phase 13.34 Placement Validation (Checksum:50b10a04) REAL time: 7 secs
|
||||
Phase 13.34 Placement Validation (Checksum:89be6bf6) REAL time: 7 secs
|
||||
|
||||
Total REAL time to Placer completion: 7 secs
|
||||
Total CPU time to Placer completion: 7 secs
|
||||
@@ -90,33 +90,33 @@ Design Summary:
|
||||
Number of errors: 0
|
||||
Number of warnings: 1
|
||||
Slice Logic Utilization:
|
||||
Number of Slice Registers: 232 out of 18,224 1%
|
||||
Number used as Flip Flops: 232
|
||||
Number of Slice Registers: 225 out of 18,224 1%
|
||||
Number used as Flip Flops: 225
|
||||
Number used as Latches: 0
|
||||
Number used as Latch-thrus: 0
|
||||
Number used as AND/OR logics: 0
|
||||
Number of Slice LUTs: 249 out of 9,112 2%
|
||||
Number used as logic: 227 out of 9,112 2%
|
||||
Number using O6 output only: 131
|
||||
Number of Slice LUTs: 218 out of 9,112 2%
|
||||
Number used as logic: 192 out of 9,112 2%
|
||||
Number using O6 output only: 94
|
||||
Number using O5 output only: 13
|
||||
Number using O5 and O6: 83
|
||||
Number using O5 and O6: 85
|
||||
Number used as ROM: 0
|
||||
Number used as Memory: 0 out of 2,176 0%
|
||||
Number used exclusively as route-thrus: 22
|
||||
Number with same-slice register load: 20
|
||||
Number used exclusively as route-thrus: 26
|
||||
Number with same-slice register load: 24
|
||||
Number with same-slice carry load: 2
|
||||
Number with other load: 0
|
||||
|
||||
Slice Logic Distribution:
|
||||
Number of occupied Slices: 79 out of 2,278 3%
|
||||
Number of occupied Slices: 70 out of 2,278 3%
|
||||
Number of MUXCYs used: 68 out of 4,556 1%
|
||||
Number of LUT Flip Flop pairs used: 275
|
||||
Number with an unused Flip Flop: 92 out of 275 33%
|
||||
Number with an unused LUT: 26 out of 275 9%
|
||||
Number of fully used LUT-FF pairs: 157 out of 275 57%
|
||||
Number of unique control sets: 16
|
||||
Number of LUT Flip Flop pairs used: 235
|
||||
Number with an unused Flip Flop: 62 out of 235 26%
|
||||
Number with an unused LUT: 17 out of 235 7%
|
||||
Number of fully used LUT-FF pairs: 156 out of 235 66%
|
||||
Number of unique control sets: 17
|
||||
Number of slice register sites lost
|
||||
to control set restrictions: 56 out of 18,224 1%
|
||||
to control set restrictions: 55 out of 18,224 1%
|
||||
|
||||
A LUT Flip Flop pair for this architecture represents one LUT paired with
|
||||
one Flip Flop within a slice. A control set is a unique combination of
|
||||
@@ -153,7 +153,7 @@ Specific Feature Utilization:
|
||||
Number of STARTUPs: 0 out of 1 0%
|
||||
Number of SUSPEND_SYNCs: 0 out of 1 0%
|
||||
|
||||
Average Fanout of Non-Clock Nets: 2.86
|
||||
Average Fanout of Non-Clock Nets: 2.74
|
||||
|
||||
Peak Memory Usage: 356 MB
|
||||
Total REAL time to MAP completion: 8 secs
|
||||
|
||||
@@ -10,40 +10,40 @@ Target Device : xc6slx16
|
||||
Target Package : csg324
|
||||
Target Speed : -2
|
||||
Mapper Version : spartan6 -- $Revision: 1.55 $
|
||||
Mapped Date : Fri Jun 10 12:44:37 2022
|
||||
Mapped Date : Fri Jun 10 13:05:06 2022
|
||||
|
||||
Design Summary
|
||||
--------------
|
||||
Number of errors: 0
|
||||
Number of warnings: 1
|
||||
Slice Logic Utilization:
|
||||
Number of Slice Registers: 232 out of 18,224 1%
|
||||
Number used as Flip Flops: 232
|
||||
Number of Slice Registers: 225 out of 18,224 1%
|
||||
Number used as Flip Flops: 225
|
||||
Number used as Latches: 0
|
||||
Number used as Latch-thrus: 0
|
||||
Number used as AND/OR logics: 0
|
||||
Number of Slice LUTs: 249 out of 9,112 2%
|
||||
Number used as logic: 227 out of 9,112 2%
|
||||
Number using O6 output only: 131
|
||||
Number of Slice LUTs: 218 out of 9,112 2%
|
||||
Number used as logic: 192 out of 9,112 2%
|
||||
Number using O6 output only: 94
|
||||
Number using O5 output only: 13
|
||||
Number using O5 and O6: 83
|
||||
Number using O5 and O6: 85
|
||||
Number used as ROM: 0
|
||||
Number used as Memory: 0 out of 2,176 0%
|
||||
Number used exclusively as route-thrus: 22
|
||||
Number with same-slice register load: 20
|
||||
Number used exclusively as route-thrus: 26
|
||||
Number with same-slice register load: 24
|
||||
Number with same-slice carry load: 2
|
||||
Number with other load: 0
|
||||
|
||||
Slice Logic Distribution:
|
||||
Number of occupied Slices: 79 out of 2,278 3%
|
||||
Number of occupied Slices: 70 out of 2,278 3%
|
||||
Number of MUXCYs used: 68 out of 4,556 1%
|
||||
Number of LUT Flip Flop pairs used: 275
|
||||
Number with an unused Flip Flop: 92 out of 275 33%
|
||||
Number with an unused LUT: 26 out of 275 9%
|
||||
Number of fully used LUT-FF pairs: 157 out of 275 57%
|
||||
Number of unique control sets: 16
|
||||
Number of LUT Flip Flop pairs used: 235
|
||||
Number with an unused Flip Flop: 62 out of 235 26%
|
||||
Number with an unused LUT: 17 out of 235 7%
|
||||
Number of fully used LUT-FF pairs: 156 out of 235 66%
|
||||
Number of unique control sets: 17
|
||||
Number of slice register sites lost
|
||||
to control set restrictions: 56 out of 18,224 1%
|
||||
to control set restrictions: 55 out of 18,224 1%
|
||||
|
||||
A LUT Flip Flop pair for this architecture represents one LUT paired with
|
||||
one Flip Flop within a slice. A control set is a unique combination of
|
||||
@@ -80,7 +80,7 @@ Specific Feature Utilization:
|
||||
Number of STARTUPs: 0 out of 1 0%
|
||||
Number of SUSPEND_SYNCs: 0 out of 1 0%
|
||||
|
||||
Average Fanout of Non-Clock Nets: 2.86
|
||||
Average Fanout of Non-Clock Nets: 2.74
|
||||
|
||||
Peak Memory Usage: 356 MB
|
||||
Total REAL time to MAP completion: 8 secs
|
||||
|
||||
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
@@ -5,7 +5,7 @@
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
|
||||
<application stringID="Map" timeStamp="Fri Jun 10 12:44:46 2022">
|
||||
<application stringID="Map" timeStamp="Fri Jun 10 13:05:15 2022">
|
||||
<section stringID="User_Env">
|
||||
<table stringID="User_EnvVar">
|
||||
<column stringID="variable"/>
|
||||
@@ -65,16 +65,16 @@
|
||||
<item DEFAULT="None" label="-p" stringID="MAP_PARTNAME" value="xc6slx16-csg324-2"/>
|
||||
</section>
|
||||
<task stringID="MAP_PACK_REPORT">
|
||||
<item AVAILABLE="18224" dataType="int" label="Number of Slice Registers" stringID="MAP_SLICE_REGISTERS" value="232">
|
||||
<item dataType="int" label="Number of Slice Flip Flops" stringID="MAP_NUM_SLICE_FF" value="232"/>
|
||||
<item AVAILABLE="18224" dataType="int" label="Number of Slice Registers" stringID="MAP_SLICE_REGISTERS" value="225">
|
||||
<item dataType="int" label="Number of Slice Flip Flops" stringID="MAP_NUM_SLICE_FF" value="225"/>
|
||||
<item dataType="int" stringID="MAP_NUM_SLICE_LATCH" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_SLICE_LATCHTHRU" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_SLICE_LATCHLOGIC" value="0"/>
|
||||
</item>
|
||||
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTs" stringID="MAP_SLICE_LUTS" value="229">
|
||||
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTs" stringID="MAP_SLICE_LUTS" value="194">
|
||||
<item dataType="int" label="Number using O5 output only" stringID="MAP_NUM_LOGIC_O5ONLY" value="13"/>
|
||||
<item dataType="int" label="Number using O6 output only" stringID="MAP_NUM_LOGIC_O6ONLY" value="131"/>
|
||||
<item dataType="int" label="Number using O5 and O6" stringID="MAP_NUM_LOGIC_O5ANDO6" value="83"/>
|
||||
<item dataType="int" label="Number using O6 output only" stringID="MAP_NUM_LOGIC_O6ONLY" value="94"/>
|
||||
<item dataType="int" label="Number using O5 and O6" stringID="MAP_NUM_LOGIC_O5ANDO6" value="85"/>
|
||||
<item dataType="int" stringID="MAP_NUM_ROM_O5ONLY" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_ROM_O6ONLY" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_ROM_O5ANDO6" value="0"/>
|
||||
@@ -117,21 +117,21 @@
|
||||
<item dataType="int" stringID="MAP_NUM_ERRORS" value="0"/>
|
||||
<item dataType="int" stringID="MAP_FILTERED_WARNINGS" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_WARNINGS" value="1"/>
|
||||
<item UNITS="KB" dataType="int" stringID="MAP_PEAK_MEMORY" value="364236"/>
|
||||
<item UNITS="KB" dataType="int" stringID="MAP_PEAK_MEMORY" value="364364"/>
|
||||
<item stringID="MAP_TOTAL_REAL_TIME" value="8 secs "/>
|
||||
<item stringID="MAP_TOTAL_CPU_TIME" value="8 secs "/>
|
||||
</section>
|
||||
<section stringID="MAP_SLICE_REPORTING">
|
||||
<item AVAILABLE="18224" dataType="int" label="Number of Slice Registers" stringID="MAP_SLICE_REGISTERS" value="232">
|
||||
<item dataType="int" label="Number of Slice Flip Flops" stringID="MAP_NUM_SLICE_FF" value="232"/>
|
||||
<item AVAILABLE="18224" dataType="int" label="Number of Slice Registers" stringID="MAP_SLICE_REGISTERS" value="225">
|
||||
<item dataType="int" label="Number of Slice Flip Flops" stringID="MAP_NUM_SLICE_FF" value="225"/>
|
||||
<item dataType="int" stringID="MAP_NUM_SLICE_LATCH" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_SLICE_LATCHTHRU" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_SLICE_LATCHLOGIC" value="0"/>
|
||||
</item>
|
||||
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTs" stringID="MAP_SLICE_LUTS" value="249">
|
||||
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTs" stringID="MAP_SLICE_LUTS" value="218">
|
||||
<item dataType="int" label="Number using O5 output only" stringID="MAP_NUM_LOGIC_O5ONLY" value="13"/>
|
||||
<item dataType="int" label="Number using O6 output only" stringID="MAP_NUM_LOGIC_O6ONLY" value="131"/>
|
||||
<item dataType="int" label="Number using O5 and O6" stringID="MAP_NUM_LOGIC_O5ANDO6" value="83"/>
|
||||
<item dataType="int" label="Number using O6 output only" stringID="MAP_NUM_LOGIC_O6ONLY" value="94"/>
|
||||
<item dataType="int" label="Number using O5 and O6" stringID="MAP_NUM_LOGIC_O5ANDO6" value="85"/>
|
||||
<item dataType="int" stringID="MAP_NUM_ROM_O5ONLY" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_ROM_O6ONLY" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_ROM_O5ANDO6" value="0"/>
|
||||
@@ -145,21 +145,21 @@
|
||||
<item dataType="int" stringID="MAP_NUM_SRL_O6ONLY" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_SRL_O5ANDO6" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_LUT_RT_EXO6" value="2"/>
|
||||
<item dataType="int" stringID="MAP_NUM_LUT_RT_EXO5" value="20"/>
|
||||
<item dataType="int" stringID="MAP_NUM_LUT_RT_EXO5" value="24"/>
|
||||
<item dataType="int" stringID="MAP_NUM_LUT_RT_O5ANDO6" value="0"/>
|
||||
<item dataType="int" stringID="MAP_NUM_LUT_RT_DRIVES_FLOP" value="20"/>
|
||||
<item dataType="int" stringID="MAP_NUM_LUT_RT_DRIVES_FLOP" value="24"/>
|
||||
<item dataType="int" stringID="MAP_NUM_LUT_RT_DRIVES_CARRY4" value="2"/>
|
||||
<item dataType="int" stringID="MAP_NUM_LUT_RT_DRIVES_OTHERS" value="0"/>
|
||||
</item>
|
||||
<item AVAILABLE="2278" dataType="int" label="Number of occupied Slices" stringID="MAP_OCCUPIED_SLICES" value="79">
|
||||
<item AVAILABLE="2278" dataType="int" label="Number of occupied Slices" stringID="MAP_OCCUPIED_SLICES" value="70">
|
||||
<item AVAILABLE="595" dataType="int" stringID="MAP_NUM_SLICEL" value="17"/>
|
||||
<item AVAILABLE="544" dataType="int" stringID="MAP_NUM_SLICEM" value="0"/>
|
||||
<item AVAILABLE="1139" dataType="int" stringID="MAP_NUM_SLICEX" value="62"/>
|
||||
<item AVAILABLE="1139" dataType="int" stringID="MAP_NUM_SLICEX" value="53"/>
|
||||
</item>
|
||||
<item dataType="int" label="Number of LUT Flip Flop pairs used" stringID="MAP_OCCUPIED_LUT_AND_FF" value="275">
|
||||
<item dataType="int" stringID="MAP_OCCUPIED_LUT_ONLY" value="92"/>
|
||||
<item dataType="int" label="Number with an unused LUT" stringID="MAP_OCCUPIED_FF_ONLY" value="26"/>
|
||||
<item dataType="int" label="Number of fully used LUT-FF pairs" stringID="MAP_OCCUPIED_FF_AND_LUT" value="157"/>
|
||||
<item dataType="int" label="Number of LUT Flip Flop pairs used" stringID="MAP_OCCUPIED_LUT_AND_FF" value="235">
|
||||
<item dataType="int" stringID="MAP_OCCUPIED_LUT_ONLY" value="62"/>
|
||||
<item dataType="int" label="Number with an unused LUT" stringID="MAP_OCCUPIED_FF_ONLY" value="17"/>
|
||||
<item dataType="int" label="Number of fully used LUT-FF pairs" stringID="MAP_OCCUPIED_FF_AND_LUT" value="156"/>
|
||||
</item>
|
||||
</section>
|
||||
<section stringID="MAP_IOB_REPORTING">
|
||||
@@ -373,7 +373,7 @@
|
||||
<section stringID="MAP_CONFIGURATION_STRING_DETAILS"/>
|
||||
<section stringID="MAP_GENERAL_CONFIG_DATA"/>
|
||||
<section stringID="MAP_CONTROL_SET_INFORMATION">
|
||||
<item dataType="int" label="Number of unique control sets" stringID="MAP_NUM_CONTROL_SETS" value="16"/>
|
||||
<item dataType="int" label="Number of unique control sets" stringID="MAP_NUM_CONTROL_SETS" value="17"/>
|
||||
<tree stringID="MAP_CONTROL_SET_HIERARCHY">
|
||||
<property stringID="MAP_CLOCK_SIGNAL"/>
|
||||
<property stringID="MAP_RESET_SIGNAL"/>
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
|
||||
<application stringID="NgdBuild" timeStamp="Fri Jun 10 12:44:35 2022">
|
||||
<application stringID="NgdBuild" timeStamp="Fri Jun 10 13:05:03 2022">
|
||||
<section stringID="User_Env">
|
||||
<table stringID="User_EnvVar">
|
||||
<column stringID="variable"/>
|
||||
@@ -68,22 +68,23 @@
|
||||
<section stringID="NGDBUILD_PRE_UNISIM_SUMMARY">
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_BUFG" value="5"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_BUFGP" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FD" value="145"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FD" value="115"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDC" value="8"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="25"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="24"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDE" value="4"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDE_1" value="32"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDR" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDR" value="20"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDS" value="5"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FD_1" value="17"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="2"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="58"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT1" value="15"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT2" value="13"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT3" value="47"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT4" value="17"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT5" value="89"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT6" value="32"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT2" value="10"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT3" value="45"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT4" value="19"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT5" value="56"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT6" value="31"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_MUXCY" value="59"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="8"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
|
||||
@@ -91,23 +92,24 @@
|
||||
</section>
|
||||
<section stringID="NGDBUILD_POST_UNISIM_SUMMARY">
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_BUFG" value="6"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FD" value="145"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FD" value="115"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDC" value="8"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="25"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="24"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDE" value="4"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDE_1" value="32"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDR" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDR" value="20"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDS" value="5"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FD_1" value="17"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="12"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_IBUFG" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="58"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT1" value="15"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT2" value="13"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT3" value="47"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT4" value="17"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT5" value="89"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT6" value="32"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT2" value="10"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT3" value="45"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT4" value="19"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT5" value="56"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_LUT6" value="31"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_MUXCY" value="59"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="8"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
#Release 14.7 - par P.20131013 (nt64)
|
||||
#Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
|
||||
|
||||
#Fri Jun 10 12:44:56 2022
|
||||
#Fri Jun 10 13:05:25 2022
|
||||
|
||||
#
|
||||
## NOTE: This file is designed to be imported into a spreadsheet program
|
||||
|
||||
|
@@ -1,7 +1,7 @@
|
||||
Release 14.7 - par P.20131013 (nt64)
|
||||
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
|
||||
|
||||
Fri Jun 10 12:44:56 2022
|
||||
Fri Jun 10 13:05:25 2022
|
||||
|
||||
|
||||
INFO: The IO information is provided in three file formats as part of the Place and Route (PAR) process. These formats are:
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
|
||||
<application stringID="par" timeStamp="Fri Jun 10 12:44:52 2022">
|
||||
<application stringID="par" timeStamp="Fri Jun 10 13:05:21 2022">
|
||||
<section stringID="User_Env">
|
||||
<table stringID="User_EnvVar">
|
||||
<column stringID="variable"/>
|
||||
@@ -62,8 +62,8 @@
|
||||
<item stringID="PAR_REAL_TIME_COMPLETION_ROUTER" value="7 secs "/>
|
||||
<item stringID="PAR_CPU_TIME_COMPLETION_ROUTER" value="7 secs "/>
|
||||
<item dataType="int" stringID="PAR_UNROUTES" value="0"/>
|
||||
<item dataType="float" stringID="PAR_TIMING_SCORE" value="29.000000"/>
|
||||
<item stringID="PAR_REAL_TIME_COMPLETION_PAR" value="7 secs "/>
|
||||
<item dataType="float" stringID="PAR_TIMING_SCORE" value="33.000000"/>
|
||||
<item stringID="PAR_REAL_TIME_COMPLETION_PAR" value="8 secs "/>
|
||||
<item stringID="PAR_CPU_TIME_COMPLETION_PAR" value="7 secs "/>
|
||||
</section>
|
||||
</task>
|
||||
@@ -2297,7 +2297,7 @@
|
||||
</task>
|
||||
</application>
|
||||
|
||||
<application stringID="Par" timeStamp="Fri Jun 10 12:44:53 2022">
|
||||
<application stringID="Par" timeStamp="Fri Jun 10 13:05:21 2022">
|
||||
<section stringID="User_Env">
|
||||
<table stringID="User_EnvVar">
|
||||
<column stringID="variable"/>
|
||||
@@ -2343,16 +2343,16 @@
|
||||
</section>
|
||||
<task label="Device Utilization Summary" stringID="PAR_DEVICE_UTLIZATION">
|
||||
<section stringID="PAR_SLICE_REPORTING">
|
||||
<item AVAILABLE="18224" dataType="int" label="Number of Slice Registers" stringID="PAR_SLICE_REGISTERS" value="232">
|
||||
<item dataType="int" stringID="PAR_NUM_SLICE_FF" value="232"/>
|
||||
<item AVAILABLE="18224" dataType="int" label="Number of Slice Registers" stringID="PAR_SLICE_REGISTERS" value="225">
|
||||
<item dataType="int" stringID="PAR_NUM_SLICE_FF" value="225"/>
|
||||
<item dataType="int" stringID="PAR_NUM_SLICE_LATCH" value="0"/>
|
||||
<item dataType="int" stringID="PAR_NUM_SLICE_LATCHTHRU" value="0"/>
|
||||
<item dataType="int" stringID="PAR_NUM_SLICE_LATCHLOGIC" value="0"/>
|
||||
</item>
|
||||
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTS" stringID="PAR_SLICE_LUTS" value="249">
|
||||
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTS" stringID="PAR_SLICE_LUTS" value="218">
|
||||
<item dataType="int" stringID="PAR_NUM_LOGIC_O5ONLY" value="13"/>
|
||||
<item dataType="int" stringID="PAR_NUM_LOGIC_O6ONLY" value="131"/>
|
||||
<item dataType="int" stringID="PAR_NUM_LOGIC_O5ANDO6" value="83"/>
|
||||
<item dataType="int" stringID="PAR_NUM_LOGIC_O6ONLY" value="94"/>
|
||||
<item dataType="int" stringID="PAR_NUM_LOGIC_O5ANDO6" value="85"/>
|
||||
<item dataType="int" stringID="PAR_NUM_ROM_O5ONLY" value="0"/>
|
||||
<item dataType="int" stringID="PAR_NUM_ROM_O6ONLY" value="0"/>
|
||||
<item dataType="int" stringID="PAR_NUM_ROM_O5ANDO6" value="0"/>
|
||||
@@ -2366,21 +2366,21 @@
|
||||
<item dataType="int" stringID="PAR_NUM_SRL_O6ONLY" value="0"/>
|
||||
<item dataType="int" stringID="PAR_NUM_SRL_O5ANDO6" value="0"/>
|
||||
<item dataType="int" stringID="PAR_NUM_LUT_RT_EXO6" value="2"/>
|
||||
<item dataType="int" stringID="PAR_NUM_LUT_RT_EXO5" value="20"/>
|
||||
<item dataType="int" stringID="PAR_NUM_LUT_RT_EXO5" value="24"/>
|
||||
<item dataType="int" stringID="PAR_NUM_LUT_RT_O5ANDO6" value="0"/>
|
||||
<item dataType="int" stringID="PAR_NUM_LUT_RT_DRIVES_FLOP" value="20"/>
|
||||
<item dataType="int" stringID="PAR_NUM_LUT_RT_DRIVES_FLOP" value="24"/>
|
||||
<item dataType="int" stringID="PAR_NUM_LUT_RT_DRIVES_CARRY4" value="2"/>
|
||||
<item dataType="int" stringID="PAR_NUM_LUT_RT_DRIVES_OTHERS" value="0"/>
|
||||
</item>
|
||||
<item AVAILABLE="2278" dataType="int" stringID="PAR_OCCUPIED_SLICES" value="79">
|
||||
<item AVAILABLE="2278" dataType="int" stringID="PAR_OCCUPIED_SLICES" value="70">
|
||||
<item AVAILABLE="595" dataType="int" stringID="PAR_NUM_SLICEL" value="17"/>
|
||||
<item AVAILABLE="544" dataType="int" stringID="PAR_NUM_SLICEM" value="0"/>
|
||||
<item AVAILABLE="1139" dataType="int" stringID="PAR_NUM_SLICEX" value="62"/>
|
||||
<item AVAILABLE="1139" dataType="int" stringID="PAR_NUM_SLICEX" value="53"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="PAR_OCCUPIED_LUT_AND_FF" value="275">
|
||||
<item dataType="int" stringID="PAR_OCCUPIED_LUT_ONLY" value="92"/>
|
||||
<item dataType="int" stringID="PAR_OCCUPIED_FF_ONLY" value="26"/>
|
||||
<item dataType="int" stringID="PAR_OCCUPIED_FF_AND_LUT" value="157"/>
|
||||
<item dataType="int" stringID="PAR_OCCUPIED_LUT_AND_FF" value="235">
|
||||
<item dataType="int" stringID="PAR_OCCUPIED_LUT_ONLY" value="62"/>
|
||||
<item dataType="int" stringID="PAR_OCCUPIED_FF_ONLY" value="17"/>
|
||||
<item dataType="int" stringID="PAR_OCCUPIED_FF_AND_LUT" value="156"/>
|
||||
</item>
|
||||
</section>
|
||||
<section stringID="PAR_IOB_REPORTING">
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
|
||||
<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
|
||||
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
|
||||
<TD ALIGN=CENTER COLSPAN='4'><B>textovhdl Project Status (06/10/2022 - 12:45:19)</B></TD></TR>
|
||||
<TD ALIGN=CENTER COLSPAN='4'><B>textovhdl Project Status (06/10/2022 - 13:05:52)</B></TD></TR>
|
||||
<TR ALIGN=LEFT>
|
||||
<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
|
||||
<TD>Aula20220603.xise</TD>
|
||||
@@ -25,7 +25,7 @@ No Errors</TD>
|
||||
<TR ALIGN=LEFT>
|
||||
<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>ISE 14.7</TD>
|
||||
<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
|
||||
<TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/*.xmsgs?&DataKey=Warning'>42 Warnings (2 new)</A></TD>
|
||||
<TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/*.xmsgs?&DataKey=Warning'>42 Warnings (0 new)</A></TD>
|
||||
</TR>
|
||||
<TR ALIGN=LEFT>
|
||||
<TD BGCOLOR='#FFFF99'><B>Design Goal:</B></dif></TD>
|
||||
@@ -49,7 +49,7 @@ No Errors</TD>
|
||||
System Settings</A>
|
||||
</TD>
|
||||
<TD BGCOLOR='#FFFF99'><UL><LI><B>Final Timing Score:</B></LI></UL></TD>
|
||||
<TD>29 <A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl.twx?&DataKey=XmlTimingReport'>(Timing Report)</A></TD>
|
||||
<TD>33 <A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl.twx?&DataKey=XmlTimingReport'>(Timing Report)</A></TD>
|
||||
</TR>
|
||||
</TABLE>
|
||||
|
||||
@@ -61,13 +61,13 @@ System Settings</A>
|
||||
<TD ALIGN=LEFT><B>Slice Logic Utilization</B></TD><TD><B>Used</B></TD><TD><B>Available</B></TD><TD><B>Utilization</B></TD><TD COLSPAN='2'><B>Note(s)</B></TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice Registers</TD>
|
||||
<TD ALIGN=RIGHT>232</TD>
|
||||
<TD ALIGN=RIGHT>225</TD>
|
||||
<TD ALIGN=RIGHT>18,224</TD>
|
||||
<TD ALIGN=RIGHT>1%</TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Flip Flops</TD>
|
||||
<TD ALIGN=RIGHT>232</TD>
|
||||
<TD ALIGN=RIGHT>225</TD>
|
||||
<TD> </TD>
|
||||
<TD> </TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
@@ -91,19 +91,19 @@ System Settings</A>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice LUTs</TD>
|
||||
<TD ALIGN=RIGHT>249</TD>
|
||||
<TD ALIGN=RIGHT>218</TD>
|
||||
<TD ALIGN=RIGHT>9,112</TD>
|
||||
<TD ALIGN=RIGHT>2%</TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as logic</TD>
|
||||
<TD ALIGN=RIGHT>227</TD>
|
||||
<TD ALIGN=RIGHT>192</TD>
|
||||
<TD ALIGN=RIGHT>9,112</TD>
|
||||
<TD ALIGN=RIGHT>2%</TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O6 output only</TD>
|
||||
<TD ALIGN=RIGHT>131</TD>
|
||||
<TD ALIGN=RIGHT>94</TD>
|
||||
<TD> </TD>
|
||||
<TD> </TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
@@ -115,7 +115,7 @@ System Settings</A>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 and O6</TD>
|
||||
<TD ALIGN=RIGHT>83</TD>
|
||||
<TD ALIGN=RIGHT>85</TD>
|
||||
<TD> </TD>
|
||||
<TD> </TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
@@ -133,13 +133,13 @@ System Settings</A>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used exclusively as route-thrus</TD>
|
||||
<TD ALIGN=RIGHT>22</TD>
|
||||
<TD ALIGN=RIGHT>26</TD>
|
||||
<TD> </TD>
|
||||
<TD> </TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with same-slice register load</TD>
|
||||
<TD ALIGN=RIGHT>20</TD>
|
||||
<TD ALIGN=RIGHT>24</TD>
|
||||
<TD> </TD>
|
||||
<TD> </TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
@@ -157,7 +157,7 @@ System Settings</A>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of occupied Slices</TD>
|
||||
<TD ALIGN=RIGHT>79</TD>
|
||||
<TD ALIGN=RIGHT>70</TD>
|
||||
<TD ALIGN=RIGHT>2,278</TD>
|
||||
<TD ALIGN=RIGHT>3%</TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
@@ -169,37 +169,37 @@ System Settings</A>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of LUT Flip Flop pairs used</TD>
|
||||
<TD ALIGN=RIGHT>275</TD>
|
||||
<TD ALIGN=RIGHT>235</TD>
|
||||
<TD> </TD>
|
||||
<TD> </TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with an unused Flip Flop</TD>
|
||||
<TD ALIGN=RIGHT>92</TD>
|
||||
<TD ALIGN=RIGHT>275</TD>
|
||||
<TD ALIGN=RIGHT>33%</TD>
|
||||
<TD ALIGN=RIGHT>62</TD>
|
||||
<TD ALIGN=RIGHT>235</TD>
|
||||
<TD ALIGN=RIGHT>26%</TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with an unused LUT</TD>
|
||||
<TD ALIGN=RIGHT>26</TD>
|
||||
<TD ALIGN=RIGHT>275</TD>
|
||||
<TD ALIGN=RIGHT>9%</TD>
|
||||
<TD ALIGN=RIGHT>17</TD>
|
||||
<TD ALIGN=RIGHT>235</TD>
|
||||
<TD ALIGN=RIGHT>7%</TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of fully used LUT-FF pairs</TD>
|
||||
<TD ALIGN=RIGHT>157</TD>
|
||||
<TD ALIGN=RIGHT>275</TD>
|
||||
<TD ALIGN=RIGHT>57%</TD>
|
||||
<TD ALIGN=RIGHT>156</TD>
|
||||
<TD ALIGN=RIGHT>235</TD>
|
||||
<TD ALIGN=RIGHT>66%</TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of unique control sets</TD>
|
||||
<TD ALIGN=RIGHT>16</TD>
|
||||
<TD ALIGN=RIGHT>17</TD>
|
||||
<TD> </TD>
|
||||
<TD> </TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of slice register sites lost<BR> to control set restrictions</TD>
|
||||
<TD ALIGN=RIGHT>56</TD>
|
||||
<TD ALIGN=RIGHT>55</TD>
|
||||
<TD ALIGN=RIGHT>18,224</TD>
|
||||
<TD ALIGN=RIGHT>1%</TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
@@ -355,7 +355,7 @@ System Settings</A>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
</TR>
|
||||
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Average Fanout of Non-Clock Nets</TD>
|
||||
<TD ALIGN=RIGHT>2.86</TD>
|
||||
<TD ALIGN=RIGHT>2.74</TD>
|
||||
<TD> </TD>
|
||||
<TD> </TD>
|
||||
<TD COLSPAN='2'> </TD>
|
||||
@@ -368,7 +368,7 @@ System Settings</A>
|
||||
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='4'><B>Performance Summary</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=PerformanceSummary"><B>[-]</B></a></TD></TR>
|
||||
<TR ALIGN=LEFT>
|
||||
<TD BGCOLOR='#FFFF99'><B>Final Timing Score:</B></TD>
|
||||
<TD>29 (Setup: 29, Hold: 0)</TD>
|
||||
<TD>33 (Setup: 33, Hold: 0)</TD>
|
||||
<TD BGCOLOR='#FFFF99'><B>Pinout Data:</B></TD>
|
||||
<TD COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl_par.xrpt?&DataKey=PinoutData'>Pinout Report</A></TD>
|
||||
</TR>
|
||||
@@ -393,21 +393,21 @@ System Settings</A>
|
||||
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
|
||||
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
|
||||
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Fri Jun 10 12:44:25 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/xst.xmsgs?&DataKey=Warning'>26 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/xst.xmsgs?&DataKey=Info'>5 Infos (0 new)</A></TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl.bld'>Translation Report</A></TD><TD>Current</TD><TD>Fri Jun 10 12:44:35 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>3 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Fri Jun 10 12:44:46 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/map.xmsgs?&DataKey=Warning'>1 Warning (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/map.xmsgs?&DataKey=Info'>8 Infos (1 new)</A></TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Fri Jun 10 12:44:57 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/par.xmsgs?&DataKey=Warning'>12 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/par.xmsgs?&DataKey=Info'>3 Infos (0 new)</A></TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Fri Jun 10 13:04:23 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/xst.xmsgs?&DataKey=Warning'>26 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/xst.xmsgs?&DataKey=Info'>5 Infos (0 new)</A></TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl.bld'>Translation Report</A></TD><TD>Current</TD><TD>Fri Jun 10 13:05:04 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>3 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Fri Jun 10 13:05:15 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/map.xmsgs?&DataKey=Warning'>1 Warning (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/map.xmsgs?&DataKey=Info'>8 Infos (0 new)</A></TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Fri Jun 10 13:05:26 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/par.xmsgs?&DataKey=Warning'>12 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/par.xmsgs?&DataKey=Info'>3 Infos (0 new)</A></TD></TR>
|
||||
<TR ALIGN=LEFT><TD>Power Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl.twr'>Post-PAR Static Timing Report</A></TD><TD>Current</TD><TD>Fri Jun 10 12:45:03 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/trce.xmsgs?&DataKey=Info'>4 Infos (0 new)</A></TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Fri Jun 10 12:45:16 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl.twr'>Post-PAR Static Timing Report</A></TD><TD>Current</TD><TD>Fri Jun 10 13:05:32 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\_xmsgs/trce.xmsgs?&DataKey=Info'>4 Infos (0 new)</A></TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\textovhdl.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Fri Jun 10 13:05:50 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
|
||||
</TABLE>
|
||||
<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
|
||||
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='3'><B>Secondary Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=SecondaryReports"><B>[-]</B></a></TD></TR>
|
||||
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD COLSPAN='2'><B>Generated</B></TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\usage_statistics_webtalk.html'>WebTalk Report</A></TD><TD>Current</TD><TD COLSPAN='2'>Fri Jun 10 12:45:17 2022</TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\webtalk.log'>WebTalk Log File</A></TD><TD>Current</TD><TD COLSPAN='2'>Fri Jun 10 12:45:18 2022</TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\usage_statistics_webtalk.html'>WebTalk Report</A></TD><TD>Current</TD><TD COLSPAN='2'>Fri Jun 10 13:05:50 2022</TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220603\webtalk.log'>WebTalk Log File</A></TD><TD>Current</TD><TD COLSPAN='2'>Fri Jun 10 13:05:52 2022</TD></TR>
|
||||
</TABLE>
|
||||
|
||||
|
||||
<br><center><b>Date Generated:</b> 06/10/2022 - 12:45:19</center>
|
||||
<br><center><b>Date Generated:</b> 06/10/2022 - 13:05:52</center>
|
||||
</BODY></HTML>
|
||||
@@ -4,7 +4,7 @@
|
||||
changes made to this file may result in unpredictable
|
||||
behavior or data corruption. It is strongly advised that
|
||||
users do not edit the contents of this file. -->
|
||||
<DesignSummary rev="12">
|
||||
<DesignSummary rev="14">
|
||||
<CmdHistory>
|
||||
</CmdHistory>
|
||||
</DesignSummary>
|
||||
|
||||
@@ -4,202 +4,202 @@
|
||||
changes made to this file may result in unpredictable
|
||||
behavior or data corruption. It is strongly advised that
|
||||
users do not edit the contents of this file. -->
|
||||
<DeviceUsageSummary rev="12">
|
||||
<DesignStatistics TimeStamp="Fri Jun 10 12:45:16 2022"><group name="NetStatistics">
|
||||
<item name="NumNets_Active" rev="12">
|
||||
<attrib name="value" value="397"/></item>
|
||||
<item name="NumNets_Vcc" rev="12">
|
||||
<DeviceUsageSummary rev="14">
|
||||
<DesignStatistics TimeStamp="Fri Jun 10 13:05:49 2022"><group name="NetStatistics">
|
||||
<item name="NumNets_Active" rev="14">
|
||||
<attrib name="value" value="355"/></item>
|
||||
<item name="NumNets_Vcc" rev="14">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="NumNodesOfType_Active_BOUNCEACROSS" rev="12">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="NumNodesOfType_Active_BOUNCEIN" rev="12">
|
||||
<attrib name="value" value="40"/></item>
|
||||
<item name="NumNodesOfType_Active_BUFGOUT" rev="12">
|
||||
<item name="NumNodesOfType_Active_BOUNCEACROSS" rev="14">
|
||||
<attrib name="value" value="25"/></item>
|
||||
<item name="NumNodesOfType_Active_BOUNCEIN" rev="14">
|
||||
<attrib name="value" value="53"/></item>
|
||||
<item name="NumNodesOfType_Active_BUFGOUT" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="NumNodesOfType_Active_BUFHINP2OUT" rev="12">
|
||||
<attrib name="value" value="11"/></item>
|
||||
<item name="NumNodesOfType_Active_CLKPIN" rev="12">
|
||||
<attrib name="value" value="65"/></item>
|
||||
<item name="NumNodesOfType_Active_CLKPINFEED" rev="12">
|
||||
<attrib name="value" value="31"/></item>
|
||||
<item name="NumNodesOfType_Active_CNTRLPIN" rev="12">
|
||||
<attrib name="value" value="29"/></item>
|
||||
<item name="NumNodesOfType_Active_DOUBLE" rev="12">
|
||||
<attrib name="value" value="215"/></item>
|
||||
<item name="NumNodesOfType_Active_GENERIC" rev="12">
|
||||
<item name="NumNodesOfType_Active_BUFHINP2OUT" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="NumNodesOfType_Active_GLOBAL" rev="12">
|
||||
<attrib name="value" value="54"/></item>
|
||||
<item name="NumNodesOfType_Active_INPUT" rev="12">
|
||||
<attrib name="value" value="19"/></item>
|
||||
<item name="NumNodesOfType_Active_IOBIN2OUT" rev="12">
|
||||
<attrib name="value" value="10"/></item>
|
||||
<item name="NumNodesOfType_Active_IOBOUTPUT" rev="12">
|
||||
<attrib name="value" value="10"/></item>
|
||||
<item name="NumNodesOfType_Active_LUTINPUT" rev="12">
|
||||
<attrib name="value" value="880"/></item>
|
||||
<item name="NumNodesOfType_Active_OUTBOUND" rev="12">
|
||||
<attrib name="value" value="350"/></item>
|
||||
<item name="NumNodesOfType_Active_OUTPUT" rev="12">
|
||||
<attrib name="value" value="376"/></item>
|
||||
<item name="NumNodesOfType_Active_PADINPUT" rev="12">
|
||||
<attrib name="value" value="8"/></item>
|
||||
<item name="NumNodesOfType_Active_PADOUTPUT" rev="12">
|
||||
<attrib name="value" value="3"/></item>
|
||||
<item name="NumNodesOfType_Active_PINBOUNCE" rev="12">
|
||||
<attrib name="value" value="188"/></item>
|
||||
<item name="NumNodesOfType_Active_PINFEED" rev="12">
|
||||
<attrib name="value" value="977"/></item>
|
||||
<item name="NumNodesOfType_Active_QUAD" rev="12">
|
||||
<attrib name="value" value="110"/></item>
|
||||
<item name="NumNodesOfType_Active_REGINPUT" rev="12">
|
||||
<attrib name="value" value="51"/></item>
|
||||
<item name="NumNodesOfType_Active_SINGLE" rev="12">
|
||||
<attrib name="value" value="464"/></item>
|
||||
<item name="NumNodesOfType_Vcc_HVCCOUT" rev="12">
|
||||
<item name="NumNodesOfType_Active_CLKPIN" rev="14">
|
||||
<attrib name="value" value="60"/></item>
|
||||
<item name="NumNodesOfType_Active_CLKPINFEED" rev="14">
|
||||
<attrib name="value" value="33"/></item>
|
||||
<item name="NumNodesOfType_Vcc_KVCCOUT" rev="12">
|
||||
<item name="NumNodesOfType_Active_CNTRLPIN" rev="14">
|
||||
<attrib name="value" value="35"/></item>
|
||||
<item name="NumNodesOfType_Active_DOUBLE" rev="14">
|
||||
<attrib name="value" value="183"/></item>
|
||||
<item name="NumNodesOfType_Active_GENERIC" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="NumNodesOfType_Active_GLOBAL" rev="14">
|
||||
<attrib name="value" value="65"/></item>
|
||||
<item name="NumNodesOfType_Active_INPUT" rev="14">
|
||||
<attrib name="value" value="19"/></item>
|
||||
<item name="NumNodesOfType_Active_IOBIN2OUT" rev="14">
|
||||
<attrib name="value" value="10"/></item>
|
||||
<item name="NumNodesOfType_Active_IOBOUTPUT" rev="14">
|
||||
<attrib name="value" value="10"/></item>
|
||||
<item name="NumNodesOfType_Active_LUTINPUT" rev="14">
|
||||
<attrib name="value" value="712"/></item>
|
||||
<item name="NumNodesOfType_Active_OUTBOUND" rev="14">
|
||||
<attrib name="value" value="306"/></item>
|
||||
<item name="NumNodesOfType_Active_OUTPUT" rev="14">
|
||||
<attrib name="value" value="331"/></item>
|
||||
<item name="NumNodesOfType_Active_PADINPUT" rev="14">
|
||||
<attrib name="value" value="8"/></item>
|
||||
<item name="NumNodesOfType_Active_PADOUTPUT" rev="14">
|
||||
<attrib name="value" value="3"/></item>
|
||||
<item name="NumNodesOfType_Active_PINBOUNCE" rev="14">
|
||||
<attrib name="value" value="175"/></item>
|
||||
<item name="NumNodesOfType_Active_PINFEED" rev="14">
|
||||
<attrib name="value" value="810"/></item>
|
||||
<item name="NumNodesOfType_Active_QUAD" rev="14">
|
||||
<attrib name="value" value="106"/></item>
|
||||
<item name="NumNodesOfType_Active_REGINPUT" rev="14">
|
||||
<attrib name="value" value="40"/></item>
|
||||
<item name="NumNodesOfType_Active_SINGLE" rev="14">
|
||||
<attrib name="value" value="415"/></item>
|
||||
<item name="NumNodesOfType_Vcc_HVCCOUT" rev="14">
|
||||
<attrib name="value" value="34"/></item>
|
||||
<item name="NumNodesOfType_Vcc_KVCCOUT" rev="14">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="NumNodesOfType_Vcc_LUTINPUT" rev="12">
|
||||
<attrib name="value" value="97"/></item>
|
||||
<item name="NumNodesOfType_Vcc_PINBOUNCE" rev="12">
|
||||
<item name="NumNodesOfType_Vcc_LUTINPUT" rev="14">
|
||||
<attrib name="value" value="98"/></item>
|
||||
<item name="NumNodesOfType_Vcc_PINBOUNCE" rev="14">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="NumNodesOfType_Vcc_PINFEED" rev="12">
|
||||
<attrib name="value" value="97"/></item>
|
||||
<item name="NumNodesOfType_Vcc_REGINPUT" rev="12">
|
||||
<item name="NumNodesOfType_Vcc_PINFEED" rev="14">
|
||||
<attrib name="value" value="98"/></item>
|
||||
<item name="NumNodesOfType_Vcc_REGINPUT" rev="14">
|
||||
<attrib name="value" value="1"/></item>
|
||||
</group>
|
||||
<group name="SiteStatistics">
|
||||
<item name="BUFG-BUFGMUX" rev="12">
|
||||
<item name="BUFG-BUFGMUX" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="IOB-IOBM" rev="12">
|
||||
<item name="IOB-IOBM" rev="14">
|
||||
<attrib name="value" value="10"/></item>
|
||||
<item name="IOB-IOBS" rev="12">
|
||||
<item name="IOB-IOBS" rev="14">
|
||||
<attrib name="value" value="11"/></item>
|
||||
<item name="SLICEX-SLICEL" rev="12">
|
||||
<item name="SLICEL-SLICEM" rev="14">
|
||||
<attrib name="value" value="9"/></item>
|
||||
<item name="SLICEX-SLICEL" rev="14">
|
||||
<attrib name="value" value="10"/></item>
|
||||
<item name="SLICEX-SLICEM" rev="12">
|
||||
<attrib name="value" value="19"/></item>
|
||||
<item name="SLICEX-SLICEM" rev="14">
|
||||
<attrib name="value" value="11"/></item>
|
||||
</group>
|
||||
<group name="MiscellaneousStatistics">
|
||||
<item name="AGG_BONDED_IO" rev="11">
|
||||
<item name="AGG_BONDED_IO" rev="13">
|
||||
<attrib name="value" value="21"/></item>
|
||||
<item name="AGG_IO" rev="11">
|
||||
<item name="AGG_IO" rev="13">
|
||||
<attrib name="value" value="21"/></item>
|
||||
<item name="AGG_LOCED_IO" rev="11">
|
||||
<item name="AGG_LOCED_IO" rev="13">
|
||||
<attrib name="value" value="21"/></item>
|
||||
<item name="AGG_SLICE" rev="11">
|
||||
<attrib name="value" value="79"/></item>
|
||||
<item name="NUM_BONDED_IOB" rev="11">
|
||||
<item name="AGG_SLICE" rev="13">
|
||||
<attrib name="value" value="70"/></item>
|
||||
<item name="NUM_BONDED_IOB" rev="13">
|
||||
<attrib name="value" value="21"/></item>
|
||||
<item name="NUM_BSFULL" rev="11">
|
||||
<attrib name="value" value="157"/></item>
|
||||
<item name="NUM_BSLUTONLY" rev="11">
|
||||
<attrib name="value" value="92"/></item>
|
||||
<item name="NUM_BSREGONLY" rev="11">
|
||||
<attrib name="value" value="26"/></item>
|
||||
<item name="NUM_BSUSED" rev="11">
|
||||
<attrib name="value" value="275"/></item>
|
||||
<item name="NUM_BUFG" rev="11">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="NUM_LOCED_IOB" rev="11">
|
||||
<attrib name="value" value="21"/></item>
|
||||
<item name="NUM_LOGIC_O5ANDO6" rev="11">
|
||||
<attrib name="value" value="83"/></item>
|
||||
<item name="NUM_LOGIC_O5ONLY" rev="11">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="NUM_LOGIC_O6ONLY" rev="11">
|
||||
<attrib name="value" value="131"/></item>
|
||||
<item name="NUM_LUT_RT_DRIVES_CARRY4" rev="11">
|
||||
<attrib name="value" value="2"/></item>
|
||||
<item name="NUM_LUT_RT_DRIVES_FLOP" rev="11">
|
||||
<attrib name="value" value="20"/></item>
|
||||
<item name="NUM_LUT_RT_EXO5" rev="11">
|
||||
<attrib name="value" value="20"/></item>
|
||||
<item name="NUM_LUT_RT_EXO6" rev="11">
|
||||
<attrib name="value" value="2"/></item>
|
||||
<item name="NUM_LUT_RT_O5" rev="11">
|
||||
<attrib name="value" value="1"/></item>
|
||||
<item name="NUM_LUT_RT_O6" rev="11">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="NUM_SLICEL" rev="11">
|
||||
<attrib name="value" value="17"/></item>
|
||||
<item name="NUM_SLICEX" rev="11">
|
||||
<item name="NUM_BSFULL" rev="13">
|
||||
<attrib name="value" value="156"/></item>
|
||||
<item name="NUM_BSLUTONLY" rev="13">
|
||||
<attrib name="value" value="62"/></item>
|
||||
<item name="NUM_SLICE_CARRY4" rev="11">
|
||||
<item name="NUM_BSREGONLY" rev="13">
|
||||
<attrib name="value" value="17"/></item>
|
||||
<item name="NUM_SLICE_CONTROLSET" rev="11">
|
||||
<attrib name="value" value="16"/></item>
|
||||
<item name="NUM_SLICE_CYINIT" rev="11">
|
||||
<attrib name="value" value="350"/></item>
|
||||
<item name="NUM_SLICE_FF" rev="11">
|
||||
<attrib name="value" value="232"/></item>
|
||||
<item name="NUM_SLICE_UNUSEDCTRL" rev="11">
|
||||
<attrib name="value" value="14"/></item>
|
||||
<item name="NUM_UNUSABLE_FF_BELS" rev="11">
|
||||
<attrib name="value" value="56"/></item>
|
||||
<item name="NUM_BSUSED" rev="13">
|
||||
<attrib name="value" value="235"/></item>
|
||||
<item name="NUM_BUFG" rev="13">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="NUM_LOCED_IOB" rev="13">
|
||||
<attrib name="value" value="21"/></item>
|
||||
<item name="NUM_LOGIC_O5ANDO6" rev="13">
|
||||
<attrib name="value" value="85"/></item>
|
||||
<item name="NUM_LOGIC_O5ONLY" rev="13">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="NUM_LOGIC_O6ONLY" rev="13">
|
||||
<attrib name="value" value="94"/></item>
|
||||
<item name="NUM_LUT_RT_DRIVES_CARRY4" rev="13">
|
||||
<attrib name="value" value="2"/></item>
|
||||
<item name="NUM_LUT_RT_DRIVES_FLOP" rev="13">
|
||||
<attrib name="value" value="24"/></item>
|
||||
<item name="NUM_LUT_RT_EXO5" rev="13">
|
||||
<attrib name="value" value="24"/></item>
|
||||
<item name="NUM_LUT_RT_EXO6" rev="13">
|
||||
<attrib name="value" value="2"/></item>
|
||||
<item name="NUM_LUT_RT_O6" rev="13">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="NUM_SLICEL" rev="13">
|
||||
<attrib name="value" value="17"/></item>
|
||||
<item name="NUM_SLICEX" rev="13">
|
||||
<attrib name="value" value="53"/></item>
|
||||
<item name="NUM_SLICE_CARRY4" rev="13">
|
||||
<attrib name="value" value="17"/></item>
|
||||
<item name="NUM_SLICE_CONTROLSET" rev="13">
|
||||
<attrib name="value" value="17"/></item>
|
||||
<item name="NUM_SLICE_CYINIT" rev="13">
|
||||
<attrib name="value" value="320"/></item>
|
||||
<item name="NUM_SLICE_FF" rev="13">
|
||||
<attrib name="value" value="225"/></item>
|
||||
<item name="NUM_SLICE_UNUSEDCTRL" rev="13">
|
||||
<attrib name="value" value="10"/></item>
|
||||
<item name="NUM_UNUSABLE_FF_BELS" rev="13">
|
||||
<attrib name="value" value="55"/></item>
|
||||
</group>
|
||||
</DesignStatistics>
|
||||
<DeviceUsage TimeStamp="Fri Jun 10 12:45:16 2022"><group name="SiteSummary">
|
||||
<item name="BUFG" rev="12">
|
||||
<DeviceUsage TimeStamp="Fri Jun 10 13:05:49 2022"><group name="SiteSummary">
|
||||
<item name="BUFG" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="6"/></item>
|
||||
<item name="BUFG_BUFG" rev="12">
|
||||
<item name="BUFG_BUFG" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="6"/></item>
|
||||
<item name="CARRY4" rev="12">
|
||||
<item name="CARRY4" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="17"/></item>
|
||||
<item name="FF_SR" rev="12">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="54"/></item>
|
||||
<item name="HARD0" rev="12">
|
||||
<item name="FF_SR" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="60"/></item>
|
||||
<item name="HARD0" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="2"/></item>
|
||||
<item name="HARD1" rev="12">
|
||||
<item name="HARD1" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="2"/></item>
|
||||
<item name="IOB" rev="12">
|
||||
<item name="IOB" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="21"/></item>
|
||||
<item name="IOB_IMUX" rev="12">
|
||||
<item name="IOB_IMUX" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="13"/></item>
|
||||
<item name="IOB_INBUF" rev="12">
|
||||
<item name="IOB_INBUF" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="13"/></item>
|
||||
<item name="IOB_OUTBUF" rev="12">
|
||||
<item name="IOB_OUTBUF" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="8"/></item>
|
||||
<item name="LUT5" rev="12">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="117"/></item>
|
||||
<item name="LUT6" rev="12">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="229"/></item>
|
||||
<item name="PAD" rev="12">
|
||||
<item name="LUT5" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="122"/></item>
|
||||
<item name="LUT6" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="194"/></item>
|
||||
<item name="PAD" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="21"/></item>
|
||||
<item name="REG_SR" rev="12">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="178"/></item>
|
||||
<item name="SLICEL" rev="12">
|
||||
<item name="REG_SR" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="165"/></item>
|
||||
<item name="SLICEL" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="17"/></item>
|
||||
<item name="SLICEX" rev="12">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="62"/></item>
|
||||
<item name="SLICEX" rev="14">
|
||||
<attrib name="total" value="1000000"/><attrib name="used" value="53"/></item>
|
||||
</group>
|
||||
</DeviceUsage>
|
||||
<ReportConfigData TimeStamp="Fri Jun 10 12:45:16 2022"><group name="REG_SR">
|
||||
<item name="CK" rev="12">
|
||||
<attrib name="CK" value="139"/><attrib name="CK_INV" value="39"/></item>
|
||||
<item name="LATCH_OR_FF" rev="12">
|
||||
<attrib name="FF" value="178"/></item>
|
||||
<item name="SRINIT" rev="12">
|
||||
<attrib name="SRINIT0" value="178"/></item>
|
||||
<item name="SYNC_ATTR" rev="12">
|
||||
<attrib name="ASYNC" value="177"/><attrib name="SYNC" value="1"/></item>
|
||||
<ReportConfigData TimeStamp="Fri Jun 10 13:05:49 2022"><group name="REG_SR">
|
||||
<item name="CK" rev="14">
|
||||
<attrib name="CK" value="126"/><attrib name="CK_INV" value="39"/></item>
|
||||
<item name="LATCH_OR_FF" rev="14">
|
||||
<attrib name="FF" value="165"/></item>
|
||||
<item name="SRINIT" rev="14">
|
||||
<attrib name="SRINIT0" value="160"/><attrib name="SRINIT1" value="5"/></item>
|
||||
<item name="SYNC_ATTR" rev="14">
|
||||
<attrib name="ASYNC" value="140"/><attrib name="SYNC" value="25"/></item>
|
||||
</group>
|
||||
<group name="SLICEL">
|
||||
<item name="CLK" rev="12">
|
||||
<attrib name="CLK" value="2"/><attrib name="CLK_INV" value="3"/></item>
|
||||
<item name="CLK" rev="14">
|
||||
<attrib name="CLK" value="8"/><attrib name="CLK_INV" value="3"/></item>
|
||||
</group>
|
||||
<group name="IOB_OUTBUF">
|
||||
<item name="DRIVEATTRBOX" rev="12">
|
||||
<item name="DRIVEATTRBOX" rev="14">
|
||||
<attrib name="12" value="8"/></item>
|
||||
<item name="SLEW" rev="12">
|
||||
<item name="SLEW" rev="14">
|
||||
<attrib name="SLOW" value="8"/></item>
|
||||
<item name="SUSPEND" rev="12">
|
||||
<item name="SUSPEND" rev="14">
|
||||
<attrib name="3STATE" value="8"/></item>
|
||||
</group>
|
||||
<group name="SLICEX">
|
||||
<item name="CLK" rev="12">
|
||||
<attrib name="CLK" value="50"/><attrib name="CLK_INV" value="10"/></item>
|
||||
<item name="CLK" rev="14">
|
||||
<attrib name="CLK" value="39"/><attrib name="CLK_INV" value="10"/></item>
|
||||
</group>
|
||||
<group name="OLOGIC2">
|
||||
<item name="CLK0" rev="2">
|
||||
@@ -214,182 +214,184 @@
|
||||
<attrib name="0" value="4"/></item>
|
||||
</group>
|
||||
<group name="FF_SR">
|
||||
<item name="CK" rev="12">
|
||||
<attrib name="CK" value="35"/><attrib name="CK_INV" value="19"/></item>
|
||||
<item name="SRINIT" rev="12">
|
||||
<attrib name="SRINIT0" value="54"/></item>
|
||||
<item name="SYNC_ATTR" rev="12">
|
||||
<attrib name="ASYNC" value="54"/></item>
|
||||
<item name="CK" rev="14">
|
||||
<attrib name="CK" value="41"/><attrib name="CK_INV" value="19"/></item>
|
||||
<item name="SRINIT" rev="14">
|
||||
<attrib name="SRINIT0" value="60"/></item>
|
||||
<item name="SYNC_ATTR" rev="14">
|
||||
<attrib name="ASYNC" value="60"/></item>
|
||||
</group>
|
||||
</ReportConfigData>
|
||||
<ReportPinData TimeStamp="Fri Jun 10 12:45:16 2022"><group name="REG_SR">
|
||||
<item name="CE" rev="12">
|
||||
<attrib name="value" value="36"/></item>
|
||||
<item name="CK" rev="12">
|
||||
<attrib name="value" value="178"/></item>
|
||||
<item name="D" rev="12">
|
||||
<attrib name="value" value="178"/></item>
|
||||
<item name="Q" rev="12">
|
||||
<attrib name="value" value="178"/></item>
|
||||
<item name="SR" rev="12">
|
||||
<attrib name="value" value="23"/></item>
|
||||
<ReportPinData TimeStamp="Fri Jun 10 13:05:49 2022"><group name="REG_SR">
|
||||
<item name="CE" rev="14">
|
||||
<attrib name="value" value="32"/></item>
|
||||
<item name="CK" rev="14">
|
||||
<attrib name="value" value="165"/></item>
|
||||
<item name="D" rev="14">
|
||||
<attrib name="value" value="165"/></item>
|
||||
<item name="Q" rev="14">
|
||||
<attrib name="value" value="165"/></item>
|
||||
<item name="SR" rev="14">
|
||||
<attrib name="value" value="43"/></item>
|
||||
</group>
|
||||
<group name="SLICEL">
|
||||
<item name="A4" rev="12">
|
||||
<attrib name="value" value="5"/></item>
|
||||
<item name="A5" rev="12">
|
||||
<attrib name="value" value="12"/></item>
|
||||
<item name="A6" rev="12">
|
||||
<item name="A4" rev="14">
|
||||
<attrib name="value" value="11"/></item>
|
||||
<item name="A5" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="A6" rev="14">
|
||||
<attrib name="value" value="16"/></item>
|
||||
<item name="AMUX" rev="12">
|
||||
<attrib name="value" value="12"/></item>
|
||||
<item name="AQ" rev="12">
|
||||
<attrib name="value" value="5"/></item>
|
||||
<item name="B4" rev="12">
|
||||
<attrib name="value" value="4"/></item>
|
||||
<item name="B5" rev="12">
|
||||
<attrib name="value" value="12"/></item>
|
||||
<item name="B6" rev="12">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="BMUX" rev="12">
|
||||
<attrib name="value" value="12"/></item>
|
||||
<item name="BQ" rev="12">
|
||||
<attrib name="value" value="4"/></item>
|
||||
<item name="C4" rev="12">
|
||||
<attrib name="value" value="3"/></item>
|
||||
<item name="C5" rev="12">
|
||||
<attrib name="value" value="12"/></item>
|
||||
<item name="C6" rev="12">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="CIN" rev="12">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="CLK" rev="12">
|
||||
<attrib name="value" value="5"/></item>
|
||||
<item name="CMUX" rev="12">
|
||||
<attrib name="value" value="12"/></item>
|
||||
<item name="COUT" rev="12">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="CQ" rev="12">
|
||||
<attrib name="value" value="3"/></item>
|
||||
<item name="D4" rev="12">
|
||||
<attrib name="value" value="3"/></item>
|
||||
<item name="D5" rev="12">
|
||||
<item name="AMUX" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="AQ" rev="14">
|
||||
<attrib name="value" value="11"/></item>
|
||||
<item name="B4" rev="14">
|
||||
<attrib name="value" value="10"/></item>
|
||||
<item name="D6" rev="12">
|
||||
<item name="B5" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="B6" rev="14">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="DMUX" rev="12">
|
||||
<attrib name="value" value="12"/></item>
|
||||
<item name="DQ" rev="12">
|
||||
<attrib name="value" value="3"/></item>
|
||||
<item name="BMUX" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="BQ" rev="14">
|
||||
<attrib name="value" value="10"/></item>
|
||||
<item name="C4" rev="14">
|
||||
<attrib name="value" value="9"/></item>
|
||||
<item name="C5" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="C6" rev="14">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="CIN" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="CLK" rev="14">
|
||||
<attrib name="value" value="11"/></item>
|
||||
<item name="CMUX" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="COUT" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="CQ" rev="14">
|
||||
<attrib name="value" value="9"/></item>
|
||||
<item name="D4" rev="14">
|
||||
<attrib name="value" value="9"/></item>
|
||||
<item name="D5" rev="14">
|
||||
<attrib name="value" value="5"/></item>
|
||||
<item name="D6" rev="14">
|
||||
<attrib name="value" value="14"/></item>
|
||||
<item name="DMUX" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="DQ" rev="14">
|
||||
<attrib name="value" value="9"/></item>
|
||||
<item name="SR" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
</group>
|
||||
<group name="IOB_OUTBUF">
|
||||
<item name="IN" rev="12">
|
||||
<item name="IN" rev="14">
|
||||
<attrib name="value" value="8"/></item>
|
||||
<item name="OUT" rev="12">
|
||||
<item name="OUT" rev="14">
|
||||
<attrib name="value" value="8"/></item>
|
||||
</group>
|
||||
<group name="SLICEX">
|
||||
<item name="A" rev="12">
|
||||
<attrib name="value" value="9"/></item>
|
||||
<item name="A1" rev="12">
|
||||
<item name="A" rev="14">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="A1" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="A2" rev="12">
|
||||
<attrib name="value" value="34"/></item>
|
||||
<item name="A3" rev="12">
|
||||
<attrib name="value" value="37"/></item>
|
||||
<item name="A4" rev="12">
|
||||
<attrib name="value" value="44"/></item>
|
||||
<item name="A5" rev="12">
|
||||
<attrib name="value" value="42"/></item>
|
||||
<item name="A6" rev="12">
|
||||
<attrib name="value" value="39"/></item>
|
||||
<item name="AMUX" rev="12">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="AQ" rev="12">
|
||||
<attrib name="value" value="51"/></item>
|
||||
<item name="AX" rev="12">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="B" rev="12">
|
||||
<attrib name="value" value="19"/></item>
|
||||
<item name="B1" rev="12">
|
||||
<attrib name="value" value="19"/></item>
|
||||
<item name="B2" rev="12">
|
||||
<item name="A2" rev="14">
|
||||
<attrib name="value" value="27"/></item>
|
||||
<item name="A3" rev="14">
|
||||
<attrib name="value" value="30"/></item>
|
||||
<item name="A4" rev="14">
|
||||
<attrib name="value" value="38"/></item>
|
||||
<item name="B3" rev="12">
|
||||
<attrib name="value" value="40"/></item>
|
||||
<item name="B4" rev="12">
|
||||
<attrib name="value" value="40"/></item>
|
||||
<item name="B5" rev="12">
|
||||
<attrib name="value" value="47"/></item>
|
||||
<item name="B6" rev="12">
|
||||
<attrib name="value" value="42"/></item>
|
||||
<item name="BMUX" rev="12">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="BQ" rev="12">
|
||||
<attrib name="value" value="37"/></item>
|
||||
<item name="BX" rev="12">
|
||||
<item name="A5" rev="14">
|
||||
<attrib name="value" value="36"/></item>
|
||||
<item name="A6" rev="14">
|
||||
<attrib name="value" value="31"/></item>
|
||||
<item name="AMUX" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="C" rev="12">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="C1" rev="12">
|
||||
<item name="AQ" rev="14">
|
||||
<attrib name="value" value="36"/></item>
|
||||
<item name="AX" rev="14">
|
||||
<attrib name="value" value="11"/></item>
|
||||
<item name="C2" rev="12">
|
||||
<attrib name="value" value="37"/></item>
|
||||
<item name="C3" rev="12">
|
||||
<item name="B" rev="14">
|
||||
<attrib name="value" value="7"/></item>
|
||||
<item name="B1" rev="14">
|
||||
<attrib name="value" value="21"/></item>
|
||||
<item name="B2" rev="14">
|
||||
<attrib name="value" value="31"/></item>
|
||||
<item name="B3" rev="14">
|
||||
<attrib name="value" value="32"/></item>
|
||||
<item name="B4" rev="14">
|
||||
<attrib name="value" value="32"/></item>
|
||||
<item name="B5" rev="14">
|
||||
<attrib name="value" value="38"/></item>
|
||||
<item name="C4" rev="12">
|
||||
<attrib name="value" value="39"/></item>
|
||||
<item name="C5" rev="12">
|
||||
<attrib name="value" value="44"/></item>
|
||||
<item name="C6" rev="12">
|
||||
<attrib name="value" value="39"/></item>
|
||||
<item name="CE" rev="12">
|
||||
<item name="B6" rev="14">
|
||||
<attrib name="value" value="32"/></item>
|
||||
<item name="BMUX" rev="14">
|
||||
<attrib name="value" value="20"/></item>
|
||||
<item name="BQ" rev="14">
|
||||
<attrib name="value" value="36"/></item>
|
||||
<item name="BX" rev="14">
|
||||
<attrib name="value" value="10"/></item>
|
||||
<item name="C" rev="14">
|
||||
<attrib name="value" value="12"/></item>
|
||||
<item name="C1" rev="14">
|
||||
<attrib name="value" value="12"/></item>
|
||||
<item name="C2" rev="14">
|
||||
<attrib name="value" value="24"/></item>
|
||||
<item name="C3" rev="14">
|
||||
<attrib name="value" value="28"/></item>
|
||||
<item name="C4" rev="14">
|
||||
<attrib name="value" value="30"/></item>
|
||||
<item name="C5" rev="14">
|
||||
<attrib name="value" value="36"/></item>
|
||||
<item name="C6" rev="14">
|
||||
<attrib name="value" value="30"/></item>
|
||||
<item name="CE" rev="14">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="CLK" rev="12">
|
||||
<attrib name="value" value="60"/></item>
|
||||
<item name="CMUX" rev="12">
|
||||
<attrib name="value" value="14"/></item>
|
||||
<item name="CQ" rev="12">
|
||||
<attrib name="value" value="41"/></item>
|
||||
<item name="CX" rev="12">
|
||||
<item name="CLK" rev="14">
|
||||
<attrib name="value" value="49"/></item>
|
||||
<item name="CMUX" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="D" rev="12">
|
||||
<attrib name="value" value="19"/></item>
|
||||
<item name="D1" rev="12">
|
||||
<item name="CQ" rev="14">
|
||||
<attrib name="value" value="28"/></item>
|
||||
<item name="CX" rev="14">
|
||||
<attrib name="value" value="10"/></item>
|
||||
<item name="D" rev="14">
|
||||
<attrib name="value" value="16"/></item>
|
||||
<item name="D2" rev="12">
|
||||
<attrib name="value" value="35"/></item>
|
||||
<item name="D3" rev="12">
|
||||
<attrib name="value" value="37"/></item>
|
||||
<item name="D4" rev="12">
|
||||
<attrib name="value" value="39"/></item>
|
||||
<item name="D5" rev="12">
|
||||
<attrib name="value" value="45"/></item>
|
||||
<item name="D6" rev="12">
|
||||
<attrib name="value" value="40"/></item>
|
||||
<item name="DMUX" rev="12">
|
||||
<attrib name="value" value="14"/></item>
|
||||
<item name="DQ" rev="12">
|
||||
<attrib name="value" value="34"/></item>
|
||||
<item name="DX" rev="12">
|
||||
<attrib name="value" value="11"/></item>
|
||||
<item name="SR" rev="12">
|
||||
<item name="D1" rev="14">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="D2" rev="14">
|
||||
<attrib name="value" value="28"/></item>
|
||||
<item name="D3" rev="14">
|
||||
<attrib name="value" value="29"/></item>
|
||||
<item name="D4" rev="14">
|
||||
<attrib name="value" value="29"/></item>
|
||||
<item name="D5" rev="14">
|
||||
<attrib name="value" value="36"/></item>
|
||||
<item name="D6" rev="14">
|
||||
<attrib name="value" value="30"/></item>
|
||||
<item name="DMUX" rev="14">
|
||||
<attrib name="value" value="17"/></item>
|
||||
<item name="DQ" rev="14">
|
||||
<attrib name="value" value="26"/></item>
|
||||
<item name="DX" rev="14">
|
||||
<attrib name="value" value="10"/></item>
|
||||
<item name="SR" rev="14">
|
||||
<attrib name="value" value="14"/></item>
|
||||
</group>
|
||||
<group name="BUFG_BUFG">
|
||||
<item name="I0" rev="12">
|
||||
<item name="I0" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="O" rev="12">
|
||||
<item name="O" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
</group>
|
||||
<group name="PAD">
|
||||
<item name="PAD" rev="12">
|
||||
<item name="PAD" rev="14">
|
||||
<attrib name="value" value="21"/></item>
|
||||
</group>
|
||||
<group name="IOB_INBUF">
|
||||
<item name="OUT" rev="12">
|
||||
<item name="OUT" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="PAD" rev="12">
|
||||
<item name="PAD" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
</group>
|
||||
<group name="OLOGIC2">
|
||||
@@ -403,35 +405,35 @@
|
||||
<attrib name="value" value="4"/></item>
|
||||
</group>
|
||||
<group name="CARRY4">
|
||||
<item name="CIN" rev="12">
|
||||
<item name="CIN" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="CO3" rev="12">
|
||||
<item name="CO3" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="CYINIT" rev="12">
|
||||
<item name="CYINIT" rev="14">
|
||||
<attrib name="value" value="4"/></item>
|
||||
<item name="DI0" rev="12">
|
||||
<item name="DI0" rev="14">
|
||||
<attrib name="value" value="16"/></item>
|
||||
<item name="DI1" rev="12">
|
||||
<item name="DI1" rev="14">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="DI2" rev="12">
|
||||
<item name="DI2" rev="14">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="DI3" rev="12">
|
||||
<item name="DI3" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="O0" rev="12">
|
||||
<item name="O0" rev="14">
|
||||
<attrib name="value" value="17"/></item>
|
||||
<item name="O1" rev="12">
|
||||
<item name="O1" rev="14">
|
||||
<attrib name="value" value="16"/></item>
|
||||
<item name="O2" rev="12">
|
||||
<item name="O2" rev="14">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="O3" rev="12">
|
||||
<item name="O3" rev="14">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="S0" rev="12">
|
||||
<item name="S0" rev="14">
|
||||
<attrib name="value" value="17"/></item>
|
||||
<item name="S1" rev="12">
|
||||
<item name="S1" rev="14">
|
||||
<attrib name="value" value="16"/></item>
|
||||
<item name="S2" rev="12">
|
||||
<item name="S2" rev="14">
|
||||
<attrib name="value" value="15"/></item>
|
||||
<item name="S3" rev="12">
|
||||
<item name="S3" rev="14">
|
||||
<attrib name="value" value="15"/></item>
|
||||
</group>
|
||||
<group name="OLOGIC2_OUTFF">
|
||||
@@ -445,34 +447,34 @@
|
||||
<attrib name="value" value="4"/></item>
|
||||
</group>
|
||||
<group name="LUT5">
|
||||
<item name="A1" rev="12">
|
||||
<item name="A1" rev="14">
|
||||
<attrib name="value" value="28"/></item>
|
||||
<item name="A2" rev="14">
|
||||
<attrib name="value" value="36"/></item>
|
||||
<item name="A3" rev="14">
|
||||
<attrib name="value" value="27"/></item>
|
||||
<item name="A2" rev="12">
|
||||
<attrib name="value" value="35"/></item>
|
||||
<item name="A3" rev="12">
|
||||
<attrib name="value" value="27"/></item>
|
||||
<item name="A4" rev="12">
|
||||
<attrib name="value" value="27"/></item>
|
||||
<item name="A5" rev="12">
|
||||
<attrib name="value" value="33"/></item>
|
||||
<item name="O5" rev="12">
|
||||
<attrib name="value" value="117"/></item>
|
||||
<item name="A4" rev="14">
|
||||
<attrib name="value" value="30"/></item>
|
||||
<item name="A5" rev="14">
|
||||
<attrib name="value" value="38"/></item>
|
||||
<item name="O5" rev="14">
|
||||
<attrib name="value" value="122"/></item>
|
||||
</group>
|
||||
<group name="LUT6">
|
||||
<item name="A1" rev="12">
|
||||
<attrib name="value" value="38"/></item>
|
||||
<item name="A2" rev="12">
|
||||
<attrib name="value" value="131"/></item>
|
||||
<item name="A3" rev="12">
|
||||
<item name="A1" rev="14">
|
||||
<attrib name="value" value="37"/></item>
|
||||
<item name="A2" rev="14">
|
||||
<attrib name="value" value="98"/></item>
|
||||
<item name="A3" rev="14">
|
||||
<attrib name="value" value="114"/></item>
|
||||
<item name="A4" rev="14">
|
||||
<attrib name="value" value="155"/></item>
|
||||
<item name="A5" rev="14">
|
||||
<attrib name="value" value="145"/></item>
|
||||
<item name="A4" rev="12">
|
||||
<attrib name="value" value="166"/></item>
|
||||
<item name="A5" rev="12">
|
||||
<attrib name="value" value="204"/></item>
|
||||
<item name="A6" rev="12">
|
||||
<attrib name="value" value="221"/></item>
|
||||
<item name="O6" rev="12">
|
||||
<attrib name="value" value="229"/></item>
|
||||
<item name="A6" rev="14">
|
||||
<attrib name="value" value="183"/></item>
|
||||
<item name="O6" rev="14">
|
||||
<attrib name="value" value="194"/></item>
|
||||
</group>
|
||||
<group name="SELMUX2_1">
|
||||
<item name="0" rev="6">
|
||||
@@ -485,43 +487,43 @@
|
||||
<attrib name="value" value="9"/></item>
|
||||
</group>
|
||||
<group name="IOB_IMUX">
|
||||
<item name="I" rev="12">
|
||||
<item name="I" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="OUT" rev="12">
|
||||
<item name="OUT" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
</group>
|
||||
<group name="IOB">
|
||||
<item name="I" rev="12">
|
||||
<item name="I" rev="14">
|
||||
<attrib name="value" value="13"/></item>
|
||||
<item name="O" rev="12">
|
||||
<item name="O" rev="14">
|
||||
<attrib name="value" value="8"/></item>
|
||||
<item name="PAD" rev="12">
|
||||
<item name="PAD" rev="14">
|
||||
<attrib name="value" value="21"/></item>
|
||||
</group>
|
||||
<group name="HARD0">
|
||||
<item name="0" rev="12">
|
||||
<item name="0" rev="14">
|
||||
<attrib name="value" value="2"/></item>
|
||||
</group>
|
||||
<group name="HARD1">
|
||||
<item name="1" rev="12">
|
||||
<item name="1" rev="14">
|
||||
<attrib name="value" value="2"/></item>
|
||||
</group>
|
||||
<group name="FF_SR">
|
||||
<item name="CE" rev="12">
|
||||
<attrib name="value" value="25"/></item>
|
||||
<item name="CK" rev="12">
|
||||
<attrib name="value" value="54"/></item>
|
||||
<item name="D" rev="12">
|
||||
<attrib name="value" value="54"/></item>
|
||||
<item name="Q" rev="12">
|
||||
<attrib name="value" value="54"/></item>
|
||||
<item name="SR" rev="12">
|
||||
<attrib name="value" value="11"/></item>
|
||||
<item name="CE" rev="14">
|
||||
<attrib name="value" value="28"/></item>
|
||||
<item name="CK" rev="14">
|
||||
<attrib name="value" value="60"/></item>
|
||||
<item name="D" rev="14">
|
||||
<attrib name="value" value="60"/></item>
|
||||
<item name="Q" rev="14">
|
||||
<attrib name="value" value="60"/></item>
|
||||
<item name="SR" rev="14">
|
||||
<attrib name="value" value="14"/></item>
|
||||
</group>
|
||||
<group name="BUFG">
|
||||
<item name="I0" rev="12">
|
||||
<item name="I0" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
<item name="O" rev="12">
|
||||
<item name="O" rev="14">
|
||||
<attrib name="value" value="6"/></item>
|
||||
</group>
|
||||
</ReportPinData>
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
|
||||
<application stringID="Xst" timeStamp="Fri Jun 10 12:44:17 2022">
|
||||
<application stringID="Xst" timeStamp="Fri Jun 10 13:04:15 2022">
|
||||
<section stringID="User_Env">
|
||||
<table stringID="User_EnvVar">
|
||||
<column stringID="variable"/>
|
||||
@@ -140,8 +140,8 @@
|
||||
</item>
|
||||
</section>
|
||||
<section stringID="XST_FINAL_REGISTER_REPORT">
|
||||
<item dataType="int" stringID="XST_REGISTERS" value="232">
|
||||
<item dataType="int" stringID="XST_FLIPFLOPS" value="232"/>
|
||||
<item dataType="int" stringID="XST_REGISTERS" value="225">
|
||||
<item dataType="int" stringID="XST_FLIPFLOPS" value="225"/>
|
||||
</item>
|
||||
</section>
|
||||
<section stringID="XST_PARTITION_REPORT">
|
||||
@@ -154,27 +154,28 @@
|
||||
<item stringID="XST_TOP_LEVEL_OUTPUT_FILE_NAME" value="textovhdl.ngc"/>
|
||||
</section>
|
||||
<section stringID="XST_PRIMITIVE_AND_BLACK_BOX_USAGE">
|
||||
<item dataType="int" stringID="XST_BELS" value="395">
|
||||
<item dataType="int" stringID="XST_BELS" value="358">
|
||||
<item dataType="int" stringID="XST_GND" value="1"/>
|
||||
<item dataType="int" stringID="XST_INV" value="58"/>
|
||||
<item dataType="int" stringID="XST_LUT1" value="15"/>
|
||||
<item dataType="int" stringID="XST_LUT2" value="13"/>
|
||||
<item dataType="int" stringID="XST_LUT3" value="47"/>
|
||||
<item dataType="int" stringID="XST_LUT4" value="17"/>
|
||||
<item dataType="int" stringID="XST_LUT5" value="89"/>
|
||||
<item dataType="int" stringID="XST_LUT6" value="32"/>
|
||||
<item dataType="int" stringID="XST_LUT2" value="10"/>
|
||||
<item dataType="int" stringID="XST_LUT3" value="45"/>
|
||||
<item dataType="int" stringID="XST_LUT4" value="19"/>
|
||||
<item dataType="int" stringID="XST_LUT5" value="56"/>
|
||||
<item dataType="int" stringID="XST_LUT6" value="31"/>
|
||||
<item dataType="int" stringID="XST_MUXCY" value="59"/>
|
||||
<item dataType="int" stringID="XST_VCC" value="1"/>
|
||||
<item dataType="int" stringID="XST_XORCY" value="63"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="232">
|
||||
<item dataType="int" stringID="XST_FD" value="145"/>
|
||||
<item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="225">
|
||||
<item dataType="int" stringID="XST_FD" value="115"/>
|
||||
<item dataType="int" stringID="XST_FD1" value="17"/>
|
||||
<item dataType="int" stringID="XST_FDC" value="8"/>
|
||||
<item dataType="int" stringID="XST_FDCE" value="25"/>
|
||||
<item dataType="int" stringID="XST_FDCE" value="24"/>
|
||||
<item dataType="int" stringID="XST_FDE" value="4"/>
|
||||
<item dataType="int" stringID="XST_FDE1" value="32"/>
|
||||
<item dataType="int" stringID="XST_FDR" value="1"/>
|
||||
<item dataType="int" stringID="XST_FDR" value="20"/>
|
||||
<item dataType="int" stringID="XST_FDS" value="5"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_CLOCK_BUFFERS" value="6">
|
||||
<item dataType="int" label="-bufg" stringID="XST_BUFG" value="5"/>
|
||||
@@ -188,14 +189,14 @@
|
||||
</section>
|
||||
<section stringID="XST_DEVICE_UTILIZATION_SUMMARY">
|
||||
<item stringID="XST_SELECTED_DEVICE" value="6slx16csg324-2"/>
|
||||
<item AVAILABLE="18224" dataType="int" label="Number of Slice Registers" stringID="XST_NUMBER_OF_SLICE_REGISTERS" value="232"/>
|
||||
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTs" stringID="XST_NUMBER_OF_SLICE_LUTS" value="271"/>
|
||||
<item AVAILABLE="9112" dataType="int" label="Number used as Logic" stringID="XST_NUMBER_USED_AS_LOGIC" value="271"/>
|
||||
<item dataType="int" label="Number of LUT Flip Flop pairs used" stringID="XST_NUMBER_OF_LUT_FLIP_FLOP_PAIRS_USED" value="336"/>
|
||||
<item AVAILABLE="336" dataType="int" label="Number with an unused Flip Flop" stringID="XST_NUMBER_WITH_AN_UNUSED_FLIP_FLOP" value="104"/>
|
||||
<item AVAILABLE="336" dataType="int" label="Number with an unused LUT" stringID="XST_NUMBER_WITH_AN_UNUSED_LUT" value="65"/>
|
||||
<item AVAILABLE="336" dataType="int" label="Number of fully used LUT-FF pairs" stringID="XST_NUMBER_OF_FULLY_USED_LUTFF_PAIRS" value="167"/>
|
||||
<item dataType="int" label="Number of unique control sets" stringID="XST_NUMBER_OF_UNIQUE_CONTROL_SETS" value="17"/>
|
||||
<item AVAILABLE="18224" dataType="int" label="Number of Slice Registers" stringID="XST_NUMBER_OF_SLICE_REGISTERS" value="225"/>
|
||||
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTs" stringID="XST_NUMBER_OF_SLICE_LUTS" value="234"/>
|
||||
<item AVAILABLE="9112" dataType="int" label="Number used as Logic" stringID="XST_NUMBER_USED_AS_LOGIC" value="234"/>
|
||||
<item dataType="int" label="Number of LUT Flip Flop pairs used" stringID="XST_NUMBER_OF_LUT_FLIP_FLOP_PAIRS_USED" value="294"/>
|
||||
<item AVAILABLE="294" dataType="int" label="Number with an unused Flip Flop" stringID="XST_NUMBER_WITH_AN_UNUSED_FLIP_FLOP" value="69"/>
|
||||
<item AVAILABLE="294" dataType="int" label="Number with an unused LUT" stringID="XST_NUMBER_WITH_AN_UNUSED_LUT" value="60"/>
|
||||
<item AVAILABLE="294" dataType="int" label="Number of fully used LUT-FF pairs" stringID="XST_NUMBER_OF_FULLY_USED_LUTFF_PAIRS" value="165"/>
|
||||
<item dataType="int" label="Number of unique control sets" stringID="XST_NUMBER_OF_UNIQUE_CONTROL_SETS" value="18"/>
|
||||
<item dataType="int" label="Number of IOs" stringID="XST_NUMBER_OF_IOS" value="21"/>
|
||||
<item AVAILABLE="232" dataType="int" label="Number of bonded IOBs" stringID="XST_NUMBER_OF_BONDED_IOBS" value="11"/>
|
||||
<item AVAILABLE="16" dataType="int" label="Number of BUFG/BUFGCTRLs" stringID="XST_NUMBER_OF_BUFGBUFGCTRLS" value="6"/>
|
||||
|
||||
@@ -17,7 +17,7 @@
|
||||
</TR>
|
||||
<TR ALIGN=LEFT>
|
||||
<TD BGCOLOR='#FFFF99'><B>Project ID (random number)</B></TD>
|
||||
<TD><xtag-property name="RandomID">bd16c3ee05c44948bef10dae3c70184a</xtag-property>.<xtag-property name="ProjectID">870CEC42C91B420AB3E8346AAC208971</xtag-property>.<xtag-property name="ProjectIteration">6</xtag-property></TD>
|
||||
<TD><xtag-property name="RandomID">bd16c3ee05c44948bef10dae3c70184a</xtag-property>.<xtag-property name="ProjectID">870CEC42C91B420AB3E8346AAC208971</xtag-property>.<xtag-property name="ProjectIteration">7</xtag-property></TD>
|
||||
<TD BGCOLOR='#FFFF99'><B>Target Package:</B></TD>
|
||||
<TD><xtag-property name="TargetPackage">csg324</xtag-property></TD>
|
||||
</TR>
|
||||
@@ -29,7 +29,7 @@
|
||||
</TR>
|
||||
<TR ALIGN=LEFT>
|
||||
<TD BGCOLOR='#FFFF99'><B>Date Generated</B></TD>
|
||||
<TD><xtag-property name="Date Generated">2022-06-10T12:45:17</xtag-property></TD>
|
||||
<TD><xtag-property name="Date Generated">2022-06-10T13:05:50</xtag-property></TD>
|
||||
<TD BGCOLOR='#FFFF99'><B>Tool Flow</B></TD>
|
||||
<TD><xtag-property name="ToolFlow">ISE</xtag-property></TD>
|
||||
</TR>
|
||||
@@ -108,67 +108,66 @@
|
||||
<LI><xtag-item1>AGG_BONDED_IO=21</xtag-item1></LI>
|
||||
<LI><xtag-item1>AGG_IO=21</xtag-item1></LI>
|
||||
<LI><xtag-item1>AGG_LOCED_IO=21</xtag-item1></LI>
|
||||
<LI><xtag-item1>AGG_SLICE=79</xtag-item1></LI>
|
||||
<LI><xtag-item1>AGG_SLICE=70</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_BONDED_IOB=21</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_BSFULL=157</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_BSLUTONLY=92</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_BSREGONLY=26</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_BSUSED=275</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_BSFULL=156</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_BSLUTONLY=62</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_BSREGONLY=17</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_BSUSED=235</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_BUFG=6</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LOCED_IOB=21</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LOGIC_O5ANDO6=83</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LOGIC_O5ANDO6=85</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LOGIC_O5ONLY=13</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LOGIC_O6ONLY=131</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LOGIC_O6ONLY=94</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LUT_RT_DRIVES_CARRY4=2</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LUT_RT_DRIVES_FLOP=20</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LUT_RT_EXO5=20</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LUT_RT_DRIVES_FLOP=24</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LUT_RT_EXO5=24</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LUT_RT_EXO6=2</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LUT_RT_O5=1</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_LUT_RT_O6=13</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_SLICEL=17</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_SLICEX=62</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_SLICEX=53</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_SLICE_CARRY4=17</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_SLICE_CONTROLSET=16</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_SLICE_CYINIT=350</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_SLICE_FF=232</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_SLICE_UNUSEDCTRL=14</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_UNUSABLE_FF_BELS=56</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_SLICE_CONTROLSET=17</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_SLICE_CYINIT=320</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_SLICE_FF=225</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_SLICE_UNUSEDCTRL=10</xtag-item1></LI>
|
||||
<LI><xtag-item1>NUM_UNUSABLE_FF_BELS=55</xtag-item1></LI>
|
||||
</UL>
|
||||
</xtag-group>
|
||||
</TD>
|
||||
<TD>
|
||||
<xtag-group><xtag-group-name name="NetStatistics">NetStatistics</xtag-group-name>
|
||||
<UL>
|
||||
<LI><xtag-item1>NumNets_Active=397</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNets_Active=355</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNets_Vcc=1</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_BOUNCEACROSS=15</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_BOUNCEIN=40</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_BOUNCEACROSS=25</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_BOUNCEIN=53</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_BUFGOUT=6</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_BUFHINP2OUT=11</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_CLKPIN=65</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_CLKPINFEED=31</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_CNTRLPIN=29</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_DOUBLE=215</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_BUFHINP2OUT=13</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_CLKPIN=60</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_CLKPINFEED=33</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_CNTRLPIN=35</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_DOUBLE=183</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_GENERIC=13</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_GLOBAL=54</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_GLOBAL=65</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_INPUT=19</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_IOBIN2OUT=10</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_IOBOUTPUT=10</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_LUTINPUT=880</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_OUTBOUND=350</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_OUTPUT=376</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_LUTINPUT=712</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_OUTBOUND=306</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_OUTPUT=331</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_PADINPUT=8</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_PADOUTPUT=3</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_PINBOUNCE=188</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_PINFEED=977</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_QUAD=110</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_REGINPUT=51</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_SINGLE=464</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Vcc_HVCCOUT=33</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_PINBOUNCE=175</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_PINFEED=810</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_QUAD=106</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_REGINPUT=40</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Active_SINGLE=415</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Vcc_HVCCOUT=34</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Vcc_KVCCOUT=1</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Vcc_LUTINPUT=97</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Vcc_LUTINPUT=98</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Vcc_PINBOUNCE=1</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Vcc_PINFEED=97</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Vcc_PINFEED=98</xtag-item1></LI>
|
||||
<LI><xtag-item1>NumNodesOfType_Vcc_REGINPUT=1</xtag-item1></LI>
|
||||
</UL>
|
||||
</xtag-group>
|
||||
@@ -177,8 +176,9 @@
|
||||
<LI><xtag-item1>BUFG-BUFGMUX=6</xtag-item1></LI>
|
||||
<LI><xtag-item1>IOB-IOBM=10</xtag-item1></LI>
|
||||
<LI><xtag-item1>IOB-IOBS=11</xtag-item1></LI>
|
||||
<LI><xtag-item1>SLICEL-SLICEM=9</xtag-item1></LI>
|
||||
<LI><xtag-item1>SLICEX-SLICEL=10</xtag-item1></LI>
|
||||
<LI><xtag-item1>SLICEX-SLICEM=19</xtag-item1></LI>
|
||||
<LI><xtag-item1>SLICEX-SLICEM=11</xtag-item1></LI>
|
||||
</UL>
|
||||
</xtag-group>
|
||||
</TD>
|
||||
@@ -190,19 +190,19 @@
|
||||
<LI><xtag-item2>BUFG=6</xtag-item2></LI>
|
||||
<LI><xtag-item2>BUFG_BUFG=6</xtag-item2></LI>
|
||||
<LI><xtag-item2>CARRY4=17</xtag-item2></LI>
|
||||
<LI><xtag-item2>FF_SR=54</xtag-item2></LI>
|
||||
<LI><xtag-item2>FF_SR=60</xtag-item2></LI>
|
||||
<LI><xtag-item2>HARD0=2</xtag-item2></LI>
|
||||
<LI><xtag-item2>HARD1=2</xtag-item2></LI>
|
||||
<LI><xtag-item2>IOB=21</xtag-item2></LI>
|
||||
<LI><xtag-item2>IOB_IMUX=13</xtag-item2></LI>
|
||||
<LI><xtag-item2>IOB_INBUF=13</xtag-item2></LI>
|
||||
<LI><xtag-item2>IOB_OUTBUF=8</xtag-item2></LI>
|
||||
<LI><xtag-item2>LUT5=117</xtag-item2></LI>
|
||||
<LI><xtag-item2>LUT6=229</xtag-item2></LI>
|
||||
<LI><xtag-item2>LUT5=122</xtag-item2></LI>
|
||||
<LI><xtag-item2>LUT6=194</xtag-item2></LI>
|
||||
<LI><xtag-item2>PAD=21</xtag-item2></LI>
|
||||
<LI><xtag-item2>REG_SR=178</xtag-item2></LI>
|
||||
<LI><xtag-item2>REG_SR=165</xtag-item2></LI>
|
||||
<LI><xtag-item2>SLICEL=17</xtag-item2></LI>
|
||||
<LI><xtag-item2>SLICEX=62</xtag-item2></LI>
|
||||
<LI><xtag-item2>SLICEX=53</xtag-item2></LI>
|
||||
</UL>
|
||||
</xtag-group>
|
||||
</TD>
|
||||
@@ -214,9 +214,9 @@
|
||||
<TD>
|
||||
<xtag-group><xtag-group-name name="FF_SR">FF_SR</xtag-group-name>
|
||||
<UL>
|
||||
<LI><xtag-item3>CK=[CK:35] [CK_INV:19]</xtag-item3></LI>
|
||||
<LI><xtag-item3>SRINIT=[SRINIT0:54]</xtag-item3></LI>
|
||||
<LI><xtag-item3>SYNC_ATTR=[ASYNC:54]</xtag-item3></LI>
|
||||
<LI><xtag-item3>CK=[CK:41] [CK_INV:19]</xtag-item3></LI>
|
||||
<LI><xtag-item3>SRINIT=[SRINIT0:60]</xtag-item3></LI>
|
||||
<LI><xtag-item3>SYNC_ATTR=[ASYNC:60]</xtag-item3></LI>
|
||||
</UL>
|
||||
</xtag-group>
|
||||
<xtag-group><xtag-group-name name="IOB_OUTBUF">IOB_OUTBUF</xtag-group-name>
|
||||
@@ -244,22 +244,22 @@
|
||||
</xtag-group>
|
||||
<xtag-group><xtag-group-name name="REG_SR">REG_SR</xtag-group-name>
|
||||
<UL>
|
||||
<LI><xtag-item3>CK=[CK:139] [CK_INV:39]</xtag-item3></LI>
|
||||
<LI><xtag-item3>LATCH_OR_FF=[FF:178]</xtag-item3></LI>
|
||||
<LI><xtag-item3>SRINIT=[SRINIT0:178]</xtag-item3></LI>
|
||||
<LI><xtag-item3>SYNC_ATTR=[ASYNC:177] [SYNC:1]</xtag-item3></LI>
|
||||
<LI><xtag-item3>CK=[CK:126] [CK_INV:39]</xtag-item3></LI>
|
||||
<LI><xtag-item3>LATCH_OR_FF=[FF:165]</xtag-item3></LI>
|
||||
<LI><xtag-item3>SRINIT=[SRINIT0:160] [SRINIT1:5]</xtag-item3></LI>
|
||||
<LI><xtag-item3>SYNC_ATTR=[ASYNC:140] [SYNC:25]</xtag-item3></LI>
|
||||
</UL>
|
||||
</TD>
|
||||
<TD>
|
||||
</xtag-group>
|
||||
<xtag-group><xtag-group-name name="SLICEL">SLICEL</xtag-group-name>
|
||||
<UL>
|
||||
<LI><xtag-item3>CLK=[CLK:2] [CLK_INV:3]</xtag-item3></LI>
|
||||
<LI><xtag-item3>CLK=[CLK:8] [CLK_INV:3]</xtag-item3></LI>
|
||||
</UL>
|
||||
</xtag-group>
|
||||
<xtag-group><xtag-group-name name="SLICEX">SLICEX</xtag-group-name>
|
||||
<UL>
|
||||
<LI><xtag-item3>CLK=[CLK:50] [CLK_INV:10]</xtag-item3></LI>
|
||||
<LI><xtag-item3>CLK=[CLK:39] [CLK_INV:10]</xtag-item3></LI>
|
||||
</UL>
|
||||
</xtag-group>
|
||||
</TD>
|
||||
@@ -302,11 +302,11 @@
|
||||
</xtag-group>
|
||||
<xtag-group><xtag-group-name name="FF_SR">FF_SR</xtag-group-name>
|
||||
<UL>
|
||||
<LI><xtag-item1>CE=25</xtag-item1></LI>
|
||||
<LI><xtag-item1>CK=54</xtag-item1></LI>
|
||||
<LI><xtag-item1>D=54</xtag-item1></LI>
|
||||
<LI><xtag-item1>Q=54</xtag-item1></LI>
|
||||
<LI><xtag-item1>SR=11</xtag-item1></LI>
|
||||
<LI><xtag-item1>CE=28</xtag-item1></LI>
|
||||
<LI><xtag-item1>CK=60</xtag-item1></LI>
|
||||
<LI><xtag-item1>D=60</xtag-item1></LI>
|
||||
<LI><xtag-item1>Q=60</xtag-item1></LI>
|
||||
<LI><xtag-item1>SR=14</xtag-item1></LI>
|
||||
</UL>
|
||||
</xtag-group>
|
||||
<xtag-group><xtag-group-name name="HARD0">HARD0</xtag-group-name>
|
||||
@@ -348,23 +348,23 @@
|
||||
</xtag-group>
|
||||
<xtag-group><xtag-group-name name="LUT5">LUT5</xtag-group-name>
|
||||
<UL>
|
||||
<LI><xtag-item1>A1=27</xtag-item1></LI>
|
||||
<LI><xtag-item1>A2=35</xtag-item1></LI>
|
||||
<LI><xtag-item1>A1=28</xtag-item1></LI>
|
||||
<LI><xtag-item1>A2=36</xtag-item1></LI>
|
||||
<LI><xtag-item1>A3=27</xtag-item1></LI>
|
||||
<LI><xtag-item1>A4=27</xtag-item1></LI>
|
||||
<LI><xtag-item1>A5=33</xtag-item1></LI>
|
||||
<LI><xtag-item1>O5=117</xtag-item1></LI>
|
||||
<LI><xtag-item1>A4=30</xtag-item1></LI>
|
||||
<LI><xtag-item1>A5=38</xtag-item1></LI>
|
||||
<LI><xtag-item1>O5=122</xtag-item1></LI>
|
||||
</UL>
|
||||
</xtag-group>
|
||||
<xtag-group><xtag-group-name name="LUT6">LUT6</xtag-group-name>
|
||||
<UL>
|
||||
<LI><xtag-item1>A1=38</xtag-item1></LI>
|
||||
<LI><xtag-item1>A2=131</xtag-item1></LI>
|
||||
<LI><xtag-item1>A3=145</xtag-item1></LI>
|
||||
<LI><xtag-item1>A4=166</xtag-item1></LI>
|
||||
<LI><xtag-item1>A5=204</xtag-item1></LI>
|
||||
<LI><xtag-item1>A6=221</xtag-item1></LI>
|
||||
<LI><xtag-item1>O6=229</xtag-item1></LI>
|
||||
<LI><xtag-item1>A1=37</xtag-item1></LI>
|
||||
<LI><xtag-item1>A2=98</xtag-item1></LI>
|
||||
<LI><xtag-item1>A3=114</xtag-item1></LI>
|
||||
<LI><xtag-item1>A4=155</xtag-item1></LI>
|
||||
<LI><xtag-item1>A5=145</xtag-item1></LI>
|
||||
<LI><xtag-item1>A6=183</xtag-item1></LI>
|
||||
<LI><xtag-item1>O6=194</xtag-item1></LI>
|
||||
</UL>
|
||||
</xtag-group>
|
||||
<xtag-group><xtag-group-name name="OLOGIC2">OLOGIC2</xtag-group-name>
|
||||
@@ -390,11 +390,11 @@
|
||||
</xtag-group>
|
||||
<xtag-group><xtag-group-name name="REG_SR">REG_SR</xtag-group-name>
|
||||
<UL>
|
||||
<LI><xtag-item1>CE=36</xtag-item1></LI>
|
||||
<LI><xtag-item1>CK=178</xtag-item1></LI>
|
||||
<LI><xtag-item1>D=178</xtag-item1></LI>
|
||||
<LI><xtag-item1>Q=178</xtag-item1></LI>
|
||||
<LI><xtag-item1>SR=23</xtag-item1></LI>
|
||||
<LI><xtag-item1>CE=32</xtag-item1></LI>
|
||||
<LI><xtag-item1>CK=165</xtag-item1></LI>
|
||||
<LI><xtag-item1>D=165</xtag-item1></LI>
|
||||
<LI><xtag-item1>Q=165</xtag-item1></LI>
|
||||
<LI><xtag-item1>SR=43</xtag-item1></LI>
|
||||
</UL>
|
||||
</xtag-group>
|
||||
<xtag-group><xtag-group-name name="SELMUX2_1">SELMUX2_1</xtag-group-name>
|
||||
@@ -409,75 +409,76 @@
|
||||
</xtag-group>
|
||||
<xtag-group><xtag-group-name name="SLICEL">SLICEL</xtag-group-name>
|
||||
<UL>
|
||||
<LI><xtag-item1>A4=5</xtag-item1></LI>
|
||||
<LI><xtag-item1>A5=12</xtag-item1></LI>
|
||||
<LI><xtag-item1>A4=11</xtag-item1></LI>
|
||||
<LI><xtag-item1>A5=6</xtag-item1></LI>
|
||||
<LI><xtag-item1>A6=16</xtag-item1></LI>
|
||||
<LI><xtag-item1>AMUX=12</xtag-item1></LI>
|
||||
<LI><xtag-item1>AQ=5</xtag-item1></LI>
|
||||
<LI><xtag-item1>B4=4</xtag-item1></LI>
|
||||
<LI><xtag-item1>B5=12</xtag-item1></LI>
|
||||
<LI><xtag-item1>AMUX=6</xtag-item1></LI>
|
||||
<LI><xtag-item1>AQ=11</xtag-item1></LI>
|
||||
<LI><xtag-item1>B4=10</xtag-item1></LI>
|
||||
<LI><xtag-item1>B5=6</xtag-item1></LI>
|
||||
<LI><xtag-item1>B6=15</xtag-item1></LI>
|
||||
<LI><xtag-item1>BMUX=12</xtag-item1></LI>
|
||||
<LI><xtag-item1>BQ=4</xtag-item1></LI>
|
||||
<LI><xtag-item1>C4=3</xtag-item1></LI>
|
||||
<LI><xtag-item1>C5=12</xtag-item1></LI>
|
||||
<LI><xtag-item1>BMUX=6</xtag-item1></LI>
|
||||
<LI><xtag-item1>BQ=10</xtag-item1></LI>
|
||||
<LI><xtag-item1>C4=9</xtag-item1></LI>
|
||||
<LI><xtag-item1>C5=6</xtag-item1></LI>
|
||||
<LI><xtag-item1>C6=15</xtag-item1></LI>
|
||||
<LI><xtag-item1>CIN=13</xtag-item1></LI>
|
||||
<LI><xtag-item1>CLK=5</xtag-item1></LI>
|
||||
<LI><xtag-item1>CMUX=12</xtag-item1></LI>
|
||||
<LI><xtag-item1>CLK=11</xtag-item1></LI>
|
||||
<LI><xtag-item1>CMUX=6</xtag-item1></LI>
|
||||
<LI><xtag-item1>COUT=13</xtag-item1></LI>
|
||||
<LI><xtag-item1>CQ=3</xtag-item1></LI>
|
||||
<LI><xtag-item1>D4=3</xtag-item1></LI>
|
||||
<LI><xtag-item1>D5=10</xtag-item1></LI>
|
||||
<LI><xtag-item1>D6=15</xtag-item1></LI>
|
||||
<LI><xtag-item1>DMUX=12</xtag-item1></LI>
|
||||
<LI><xtag-item1>DQ=3</xtag-item1></LI>
|
||||
<LI><xtag-item1>CQ=9</xtag-item1></LI>
|
||||
<LI><xtag-item1>D4=9</xtag-item1></LI>
|
||||
<LI><xtag-item1>D5=5</xtag-item1></LI>
|
||||
<LI><xtag-item1>D6=14</xtag-item1></LI>
|
||||
<LI><xtag-item1>DMUX=6</xtag-item1></LI>
|
||||
<LI><xtag-item1>DQ=9</xtag-item1></LI>
|
||||
<LI><xtag-item1>SR=6</xtag-item1></LI>
|
||||
</UL>
|
||||
</xtag-group>
|
||||
<xtag-group><xtag-group-name name="SLICEX">SLICEX</xtag-group-name>
|
||||
<UL>
|
||||
<LI><xtag-item1>A=9</xtag-item1></LI>
|
||||
<LI><xtag-item1>A=15</xtag-item1></LI>
|
||||
<LI><xtag-item1>A1=13</xtag-item1></LI>
|
||||
<LI><xtag-item1>A2=34</xtag-item1></LI>
|
||||
<LI><xtag-item1>A3=37</xtag-item1></LI>
|
||||
<LI><xtag-item1>A4=44</xtag-item1></LI>
|
||||
<LI><xtag-item1>A5=42</xtag-item1></LI>
|
||||
<LI><xtag-item1>A6=39</xtag-item1></LI>
|
||||
<LI><xtag-item1>AMUX=15</xtag-item1></LI>
|
||||
<LI><xtag-item1>AQ=51</xtag-item1></LI>
|
||||
<LI><xtag-item1>AX=15</xtag-item1></LI>
|
||||
<LI><xtag-item1>B=19</xtag-item1></LI>
|
||||
<LI><xtag-item1>B1=19</xtag-item1></LI>
|
||||
<LI><xtag-item1>B2=38</xtag-item1></LI>
|
||||
<LI><xtag-item1>B3=40</xtag-item1></LI>
|
||||
<LI><xtag-item1>B4=40</xtag-item1></LI>
|
||||
<LI><xtag-item1>B5=47</xtag-item1></LI>
|
||||
<LI><xtag-item1>B6=42</xtag-item1></LI>
|
||||
<LI><xtag-item1>BMUX=15</xtag-item1></LI>
|
||||
<LI><xtag-item1>BQ=37</xtag-item1></LI>
|
||||
<LI><xtag-item1>BX=13</xtag-item1></LI>
|
||||
<LI><xtag-item1>C=13</xtag-item1></LI>
|
||||
<LI><xtag-item1>C1=11</xtag-item1></LI>
|
||||
<LI><xtag-item1>C2=37</xtag-item1></LI>
|
||||
<LI><xtag-item1>C3=38</xtag-item1></LI>
|
||||
<LI><xtag-item1>C4=39</xtag-item1></LI>
|
||||
<LI><xtag-item1>C5=44</xtag-item1></LI>
|
||||
<LI><xtag-item1>C6=39</xtag-item1></LI>
|
||||
<LI><xtag-item1>A2=27</xtag-item1></LI>
|
||||
<LI><xtag-item1>A3=30</xtag-item1></LI>
|
||||
<LI><xtag-item1>A4=38</xtag-item1></LI>
|
||||
<LI><xtag-item1>A5=36</xtag-item1></LI>
|
||||
<LI><xtag-item1>A6=31</xtag-item1></LI>
|
||||
<LI><xtag-item1>AMUX=13</xtag-item1></LI>
|
||||
<LI><xtag-item1>AQ=36</xtag-item1></LI>
|
||||
<LI><xtag-item1>AX=11</xtag-item1></LI>
|
||||
<LI><xtag-item1>B=7</xtag-item1></LI>
|
||||
<LI><xtag-item1>B1=21</xtag-item1></LI>
|
||||
<LI><xtag-item1>B2=31</xtag-item1></LI>
|
||||
<LI><xtag-item1>B3=32</xtag-item1></LI>
|
||||
<LI><xtag-item1>B4=32</xtag-item1></LI>
|
||||
<LI><xtag-item1>B5=38</xtag-item1></LI>
|
||||
<LI><xtag-item1>B6=32</xtag-item1></LI>
|
||||
<LI><xtag-item1>BMUX=20</xtag-item1></LI>
|
||||
<LI><xtag-item1>BQ=36</xtag-item1></LI>
|
||||
<LI><xtag-item1>BX=10</xtag-item1></LI>
|
||||
<LI><xtag-item1>C=12</xtag-item1></LI>
|
||||
<LI><xtag-item1>C1=12</xtag-item1></LI>
|
||||
<LI><xtag-item1>C2=24</xtag-item1></LI>
|
||||
<LI><xtag-item1>C3=28</xtag-item1></LI>
|
||||
<LI><xtag-item1>C4=30</xtag-item1></LI>
|
||||
<LI><xtag-item1>C5=36</xtag-item1></LI>
|
||||
<LI><xtag-item1>C6=30</xtag-item1></LI>
|
||||
<LI><xtag-item1>CE=15</xtag-item1></LI>
|
||||
<LI><xtag-item1>CLK=60</xtag-item1></LI>
|
||||
<LI><xtag-item1>CMUX=14</xtag-item1></LI>
|
||||
<LI><xtag-item1>CQ=41</xtag-item1></LI>
|
||||
<LI><xtag-item1>CX=13</xtag-item1></LI>
|
||||
<LI><xtag-item1>D=19</xtag-item1></LI>
|
||||
<LI><xtag-item1>D1=16</xtag-item1></LI>
|
||||
<LI><xtag-item1>D2=35</xtag-item1></LI>
|
||||
<LI><xtag-item1>D3=37</xtag-item1></LI>
|
||||
<LI><xtag-item1>D4=39</xtag-item1></LI>
|
||||
<LI><xtag-item1>D5=45</xtag-item1></LI>
|
||||
<LI><xtag-item1>D6=40</xtag-item1></LI>
|
||||
<LI><xtag-item1>DMUX=14</xtag-item1></LI>
|
||||
<LI><xtag-item1>DQ=34</xtag-item1></LI>
|
||||
<LI><xtag-item1>DX=11</xtag-item1></LI>
|
||||
<LI><xtag-item1>CLK=49</xtag-item1></LI>
|
||||
<LI><xtag-item1>CMUX=13</xtag-item1></LI>
|
||||
<LI><xtag-item1>CQ=28</xtag-item1></LI>
|
||||
<LI><xtag-item1>CX=10</xtag-item1></LI>
|
||||
<LI><xtag-item1>D=16</xtag-item1></LI>
|
||||
<LI><xtag-item1>D1=15</xtag-item1></LI>
|
||||
<LI><xtag-item1>D2=28</xtag-item1></LI>
|
||||
<LI><xtag-item1>D3=29</xtag-item1></LI>
|
||||
<LI><xtag-item1>D4=29</xtag-item1></LI>
|
||||
<LI><xtag-item1>D5=36</xtag-item1></LI>
|
||||
<LI><xtag-item1>D6=30</xtag-item1></LI>
|
||||
<LI><xtag-item1>DMUX=17</xtag-item1></LI>
|
||||
<LI><xtag-item1>DQ=26</xtag-item1></LI>
|
||||
<LI><xtag-item1>DX=10</xtag-item1></LI>
|
||||
<LI><xtag-item1>SR=14</xtag-item1></LI>
|
||||
</UL>
|
||||
</TD>
|
||||
@@ -527,14 +528,20 @@
|
||||
<LI><xtag-cmdline>par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf</xtag-cmdline></LI>
|
||||
<LI><xtag-cmdline>trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf</xtag-cmdline></LI>
|
||||
<LI><xtag-cmdline>bitgen -intstyle ise -f <fname>.ut <fname>.ncd</xtag-cmdline></LI>
|
||||
<LI><xtag-cmdline>xst -intstyle ise -ifn <ise_file></xtag-cmdline></LI>
|
||||
<LI><xtag-cmdline>ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-2 <fname>.ngc <fname>.ngd</xtag-cmdline></LI>
|
||||
<LI><xtag-cmdline>map -intstyle ise -p xc6slx16-csg324-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf</xtag-cmdline></LI>
|
||||
<LI><xtag-cmdline>par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf</xtag-cmdline></LI>
|
||||
<LI><xtag-cmdline>trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf</xtag-cmdline></LI>
|
||||
<LI><xtag-cmdline>bitgen -intstyle ise -f <fname>.ut <fname>.ncd</xtag-cmdline></LI>
|
||||
</xtag-section></UL></TD></TR>
|
||||
</TABLE>
|
||||
<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'><xtag-section name="RunStatistics"><TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN=8><B>Software Quality</B></TD></TR><TR ALIGN=LEFT><TD COLSPAN=8><B>Run Statistics</B></TD></TR><TR ALIGN=CENTER BGCOLOR='#FFFF99'><TD><B>Program Name</B></TD><TD><B>Runs Started</B></TD><TD><B>Runs Finished</B></TD><TD><B>Errors</B></TD><TD><B>Fatal Errors</B></TD><TD><B>Internal Errors</B></TD><TD><B>Exceptions</B></TD><TD><B>Core Dumps</B></TD></TR>
|
||||
|
||||
<tr>
|
||||
<td><xtag-program-name>_impact</xtag-program-name></td>
|
||||
<td><xtag-total-run-started>25</xtag-total-run-started></td>
|
||||
<td><xtag-total-run-finished>22</xtag-total-run-finished></td>
|
||||
<td><xtag-total-run-started>26</xtag-total-run-started></td>
|
||||
<td><xtag-total-run-finished>23</xtag-total-run-finished></td>
|
||||
<td><xtag-total-error>0</xtag-total-error></td>
|
||||
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
|
||||
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
|
||||
@@ -543,6 +550,36 @@
|
||||
</tr>
|
||||
<tr>
|
||||
<td><xtag-program-name>bitgen</xtag-program-name></td>
|
||||
<td><xtag-total-run-started>45</xtag-total-run-started></td>
|
||||
<td><xtag-total-run-finished>45</xtag-total-run-finished></td>
|
||||
<td><xtag-total-error>0</xtag-total-error></td>
|
||||
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
|
||||
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
|
||||
<td><xtag-total-exception>0</xtag-total-exception></td>
|
||||
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td><xtag-program-name>map</xtag-program-name></td>
|
||||
<td><xtag-total-run-started>49</xtag-total-run-started></td>
|
||||
<td><xtag-total-run-finished>44</xtag-total-run-finished></td>
|
||||
<td><xtag-total-error>0</xtag-total-error></td>
|
||||
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
|
||||
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
|
||||
<td><xtag-total-exception>0</xtag-total-exception></td>
|
||||
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td><xtag-program-name>ngdbuild</xtag-program-name></td>
|
||||
<td><xtag-total-run-started>49</xtag-total-run-started></td>
|
||||
<td><xtag-total-run-finished>49</xtag-total-run-finished></td>
|
||||
<td><xtag-total-error>0</xtag-total-error></td>
|
||||
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
|
||||
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
|
||||
<td><xtag-total-exception>0</xtag-total-exception></td>
|
||||
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td><xtag-program-name>par</xtag-program-name></td>
|
||||
<td><xtag-total-run-started>44</xtag-total-run-started></td>
|
||||
<td><xtag-total-run-finished>44</xtag-total-run-finished></td>
|
||||
<td><xtag-total-error>0</xtag-total-error></td>
|
||||
@@ -551,40 +588,10 @@
|
||||
<td><xtag-total-exception>0</xtag-total-exception></td>
|
||||
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td><xtag-program-name>map</xtag-program-name></td>
|
||||
<td><xtag-total-run-started>48</xtag-total-run-started></td>
|
||||
<td><xtag-total-run-finished>43</xtag-total-run-finished></td>
|
||||
<td><xtag-total-error>0</xtag-total-error></td>
|
||||
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
|
||||
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
|
||||
<td><xtag-total-exception>0</xtag-total-exception></td>
|
||||
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td><xtag-program-name>ngdbuild</xtag-program-name></td>
|
||||
<td><xtag-total-run-started>48</xtag-total-run-started></td>
|
||||
<td><xtag-total-run-finished>48</xtag-total-run-finished></td>
|
||||
<td><xtag-total-error>0</xtag-total-error></td>
|
||||
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
|
||||
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
|
||||
<td><xtag-total-exception>0</xtag-total-exception></td>
|
||||
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td><xtag-program-name>par</xtag-program-name></td>
|
||||
<td><xtag-total-run-started>43</xtag-total-run-started></td>
|
||||
<td><xtag-total-run-finished>43</xtag-total-run-finished></td>
|
||||
<td><xtag-total-error>0</xtag-total-error></td>
|
||||
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
|
||||
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
|
||||
<td><xtag-total-exception>0</xtag-total-exception></td>
|
||||
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td><xtag-program-name>trce</xtag-program-name></td>
|
||||
<td><xtag-total-run-started>43</xtag-total-run-started></td>
|
||||
<td><xtag-total-run-finished>43</xtag-total-run-finished></td>
|
||||
<td><xtag-total-run-started>44</xtag-total-run-started></td>
|
||||
<td><xtag-total-run-finished>44</xtag-total-run-finished></td>
|
||||
<td><xtag-total-error>0</xtag-total-error></td>
|
||||
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
|
||||
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
|
||||
@@ -593,8 +600,8 @@
|
||||
</tr>
|
||||
<tr>
|
||||
<td><xtag-program-name>xst</xtag-program-name></td>
|
||||
<td><xtag-total-run-started>84</xtag-total-run-started></td>
|
||||
<td><xtag-total-run-finished>84</xtag-total-run-finished></td>
|
||||
<td><xtag-total-run-started>85</xtag-total-run-started></td>
|
||||
<td><xtag-total-run-finished>85</xtag-total-run-finished></td>
|
||||
<td><xtag-total-error>0</xtag-total-error></td>
|
||||
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
|
||||
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
|
||||
@@ -628,7 +635,7 @@
|
||||
</TR><TR><TD><xtag-design-property-name>PROP_intProjectCreationTimestamp</xtag-design-property-name>=<xtag-design-property-value>2022-06-03T11:32:48</xtag-design-property-value></TD>
|
||||
<TD><xtag-design-property-name>PROP_intWbtProjectID</xtag-design-property-name>=<xtag-design-property-value>870CEC42C91B420AB3E8346AAC208971</xtag-design-property-value></TD>
|
||||
|
||||
</TR><TR><TD><xtag-process-property-name>PROP_intWbtProjectIteration</xtag-process-property-name>=<xtag-process-property-value>6</xtag-process-property-value></TD>
|
||||
</TR><TR><TD><xtag-process-property-name>PROP_intWbtProjectIteration</xtag-process-property-name>=<xtag-process-property-value>7</xtag-process-property-value></TD>
|
||||
<TD><xtag-design-property-name>PROP_intWorkingDirLocWRTProjDir</xtag-design-property-name>=<xtag-design-property-value>Same</xtag-design-property-value></TD>
|
||||
|
||||
</TR><TR><TD><xtag-design-property-name>PROP_intWorkingDirUsed</xtag-design-property-name>=<xtag-design-property-value>No</xtag-design-property-value></TD>
|
||||
@@ -655,67 +662,69 @@
|
||||
<TR ALIGN=CENTER><TD COLSPAN=4><B><xtag-unisim-type-name>NGDBUILD_PRE_UNISIM_SUMMARY</xtag-unisim-type-name></B></TD></TR><TR>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_BUFG</xtag-preunisim-param-name>=<xtag-preunisim-param-value>5</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_BUFGP</xtag-preunisim-param-name>=<xtag-preunisim-param-value>1</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FD</xtag-preunisim-param-name>=<xtag-preunisim-param-value>145</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FD</xtag-preunisim-param-name>=<xtag-preunisim-param-value>115</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FDC</xtag-preunisim-param-name>=<xtag-preunisim-param-value>8</xtag-preunisim-param-value></TD>
|
||||
</TR>
|
||||
<TR>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FDCE</xtag-preunisim-param-name>=<xtag-preunisim-param-value>25</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FDCE</xtag-preunisim-param-name>=<xtag-preunisim-param-value>24</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FDE</xtag-preunisim-param-name>=<xtag-preunisim-param-value>4</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FDE_1</xtag-preunisim-param-name>=<xtag-preunisim-param-value>32</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FDR</xtag-preunisim-param-name>=<xtag-preunisim-param-value>1</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FDR</xtag-preunisim-param-name>=<xtag-preunisim-param-value>20</xtag-preunisim-param-value></TD>
|
||||
</TR>
|
||||
<TR>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FDS</xtag-preunisim-param-name>=<xtag-preunisim-param-value>5</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FD_1</xtag-preunisim-param-name>=<xtag-preunisim-param-value>17</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_GND</xtag-preunisim-param-name>=<xtag-preunisim-param-value>1</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_IBUF</xtag-preunisim-param-name>=<xtag-preunisim-param-value>2</xtag-preunisim-param-value></TD>
|
||||
</TR>
|
||||
<TR>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_INV</xtag-preunisim-param-name>=<xtag-preunisim-param-value>58</xtag-preunisim-param-value></TD>
|
||||
</TR>
|
||||
<TR>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT1</xtag-preunisim-param-name>=<xtag-preunisim-param-value>15</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT2</xtag-preunisim-param-name>=<xtag-preunisim-param-value>13</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT3</xtag-preunisim-param-name>=<xtag-preunisim-param-value>47</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT4</xtag-preunisim-param-name>=<xtag-preunisim-param-value>17</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT2</xtag-preunisim-param-name>=<xtag-preunisim-param-value>10</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT3</xtag-preunisim-param-name>=<xtag-preunisim-param-value>45</xtag-preunisim-param-value></TD>
|
||||
</TR>
|
||||
<TR>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT5</xtag-preunisim-param-name>=<xtag-preunisim-param-value>89</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT6</xtag-preunisim-param-name>=<xtag-preunisim-param-value>32</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT4</xtag-preunisim-param-name>=<xtag-preunisim-param-value>19</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT5</xtag-preunisim-param-name>=<xtag-preunisim-param-value>56</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT6</xtag-preunisim-param-name>=<xtag-preunisim-param-value>31</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_MUXCY</xtag-preunisim-param-name>=<xtag-preunisim-param-value>59</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_OBUF</xtag-preunisim-param-name>=<xtag-preunisim-param-value>8</xtag-preunisim-param-value></TD>
|
||||
</TR>
|
||||
<TR>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_OBUF</xtag-preunisim-param-name>=<xtag-preunisim-param-value>8</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_VCC</xtag-preunisim-param-name>=<xtag-preunisim-param-value>1</xtag-preunisim-param-value></TD>
|
||||
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_XORCY</xtag-preunisim-param-name>=<xtag-preunisim-param-value>63</xtag-preunisim-param-value></TD>
|
||||
<TR ALIGN=CENTER><TD COLSPAN=4><B><xtag-unisim-type-name>NGDBUILD_POST_UNISIM_SUMMARY</xtag-unisim-type-name></B></TD></TR><TR>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_BUFG</xtag-postunisim-param-name>=<xtag-postunisim-param-value>6</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FD</xtag-postunisim-param-name>=<xtag-postunisim-param-value>145</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FD</xtag-postunisim-param-name>=<xtag-postunisim-param-value>115</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FDC</xtag-postunisim-param-name>=<xtag-postunisim-param-value>8</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FDCE</xtag-postunisim-param-name>=<xtag-postunisim-param-value>25</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FDCE</xtag-postunisim-param-name>=<xtag-postunisim-param-value>24</xtag-postunisim-param-value></TD>
|
||||
</TR>
|
||||
<TR>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FDE</xtag-postunisim-param-name>=<xtag-postunisim-param-value>4</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FDE_1</xtag-postunisim-param-name>=<xtag-postunisim-param-value>32</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FDR</xtag-postunisim-param-name>=<xtag-postunisim-param-value>1</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FD_1</xtag-postunisim-param-name>=<xtag-postunisim-param-value>17</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FDR</xtag-postunisim-param-name>=<xtag-postunisim-param-value>20</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FDS</xtag-postunisim-param-name>=<xtag-postunisim-param-value>5</xtag-postunisim-param-value></TD>
|
||||
</TR>
|
||||
<TR>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FD_1</xtag-postunisim-param-name>=<xtag-postunisim-param-value>17</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_GND</xtag-postunisim-param-name>=<xtag-postunisim-param-value>1</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_IBUF</xtag-postunisim-param-name>=<xtag-postunisim-param-value>12</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_IBUFG</xtag-postunisim-param-name>=<xtag-postunisim-param-value>1</xtag-postunisim-param-value></TD>
|
||||
</TR>
|
||||
<TR>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_INV</xtag-postunisim-param-name>=<xtag-postunisim-param-value>58</xtag-postunisim-param-value></TD>
|
||||
</TR>
|
||||
<TR>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT1</xtag-postunisim-param-name>=<xtag-postunisim-param-value>15</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT2</xtag-postunisim-param-name>=<xtag-postunisim-param-value>13</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT3</xtag-postunisim-param-name>=<xtag-postunisim-param-value>47</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT4</xtag-postunisim-param-name>=<xtag-postunisim-param-value>17</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT2</xtag-postunisim-param-name>=<xtag-postunisim-param-value>10</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT3</xtag-postunisim-param-name>=<xtag-postunisim-param-value>45</xtag-postunisim-param-value></TD>
|
||||
</TR>
|
||||
<TR>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT5</xtag-postunisim-param-name>=<xtag-postunisim-param-value>89</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT6</xtag-postunisim-param-name>=<xtag-postunisim-param-value>32</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT4</xtag-postunisim-param-name>=<xtag-postunisim-param-value>19</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT5</xtag-postunisim-param-name>=<xtag-postunisim-param-value>56</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT6</xtag-postunisim-param-name>=<xtag-postunisim-param-value>31</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_MUXCY</xtag-postunisim-param-name>=<xtag-postunisim-param-value>59</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_OBUF</xtag-postunisim-param-name>=<xtag-postunisim-param-value>8</xtag-postunisim-param-value></TD>
|
||||
</TR>
|
||||
<TR>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_OBUF</xtag-postunisim-param-name>=<xtag-postunisim-param-value>8</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_VCC</xtag-postunisim-param-name>=<xtag-postunisim-param-value>1</xtag-postunisim-param-value></TD>
|
||||
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_XORCY</xtag-postunisim-param-name>=<xtag-postunisim-param-value>63</xtag-postunisim-param-value></TD>
|
||||
</xtag-section></TABLE>
|
||||
|
||||
@@ -4,7 +4,7 @@ Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.
|
||||
Project Information
|
||||
--------------------
|
||||
ProjectID=870CEC42C91B420AB3E8346AAC208971
|
||||
ProjectIteration=6
|
||||
ProjectIteration=7
|
||||
|
||||
WebTalk Summary
|
||||
----------------
|
||||
|
||||
@@ -3,10 +3,10 @@
|
||||
<!--The data in this file is primarily intended for consumption by Xilinx tools.
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
<application name="pn" timeStamp="Fri Jun 10 12:44:48 2022">
|
||||
<application name="pn" timeStamp="Fri Jun 10 13:05:16 2022">
|
||||
<section name="Project Information" visible="false">
|
||||
<property name="ProjectID" value="870CEC42C91B420AB3E8346AAC208971" type="project"/>
|
||||
<property name="ProjectIteration" value="6" type="project"/>
|
||||
<property name="ProjectIteration" value="7" type="project"/>
|
||||
<property name="ProjectFile" value="C:/Users/Gabriel/Xilinx/Aula20220603/Aula20220603.xise" type="project"/>
|
||||
<property name="ProjectCreationTimestamp" value="2022-06-03T11:32:48" type="project"/>
|
||||
</section>
|
||||
@@ -25,7 +25,7 @@ This means code written to parse this file will need to be revisited each subseq
|
||||
<property name="PROP_UserConstraintEditorPreference" value="Text Editor" type="process"/>
|
||||
<property name="PROP_intProjectCreationTimestamp" value="2022-06-03T11:32:48" type="design"/>
|
||||
<property name="PROP_intWbtProjectID" value="870CEC42C91B420AB3E8346AAC208971" type="design"/>
|
||||
<property name="PROP_intWbtProjectIteration" value="6" type="process"/>
|
||||
<property name="PROP_intWbtProjectIteration" value="7" type="process"/>
|
||||
<property name="PROP_intWorkingDirLocWRTProjDir" value="Same" type="design"/>
|
||||
<property name="PROP_intWorkingDirUsed" value="No" type="design"/>
|
||||
<property name="PROP_xilxBitgStart_IntDone" value="true" type="process"/>
|
||||
|
||||
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Reference in New Issue
Block a user