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This commit is contained in:
Gabriel Lima
2022-06-01 13:03:29 -03:00
parent 39fe8c87c4
commit 3fb46705fa
43 changed files with 1005 additions and 872 deletions
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14
Aula20220601.gise
View File

@@ -59,6 +59,7 @@
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="textovhdl_map.ncd" xil_pn:subbranch="Map"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGM" xil_pn:name="textovhdl_map.ngm" xil_pn:subbranch="Map"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="textovhdl_map.xrpt"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="textovhdl_ngdbuild.xrpt"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_EXCEL_REPORT" xil_pn:name="textovhdl_pad.csv" xil_pn:subbranch="Par"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_TXT_REPORT" xil_pn:name="textovhdl_pad.txt" xil_pn:subbranch="Par"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="textovhdl_par.xrpt"/>
@@ -101,7 +102,7 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1654098660" xil_pn:in_ck="-4144913829261074638" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="-2610007826355223435" xil_pn:start_ts="1654098650">
<transform xil_pn:end_ts="1654099331" xil_pn:in_ck="-4144913829261074638" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="-2610007826355223435" xil_pn:start_ts="1654099321">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
@@ -123,7 +124,7 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1654098668" xil_pn:in_ck="6717519187032307095" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="7902521214899444903" xil_pn:start_ts="1654098662">
<transform xil_pn:end_ts="1654099342" xil_pn:in_ck="6717519187032307095" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="7902521214899444903" xil_pn:start_ts="1654099335">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
@@ -131,8 +132,9 @@
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
<outfile xil_pn:name="textovhdl.bld"/>
<outfile xil_pn:name="textovhdl.ngd"/>
<outfile xil_pn:name="textovhdl_ngdbuild.xrpt"/>
</transform>
<transform xil_pn:end_ts="1654098679" xil_pn:in_ck="6717519187032307096" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="-3180699873896808002" xil_pn:start_ts="1654098668">
<transform xil_pn:end_ts="1654099352" xil_pn:in_ck="6717519187032307096" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="-3180699873896808002" xil_pn:start_ts="1654099342">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
@@ -146,7 +148,7 @@
<outfile xil_pn:name="textovhdl_summary.xml"/>
<outfile xil_pn:name="textovhdl_usage.xml"/>
</transform>
<transform xil_pn:end_ts="1654098695" xil_pn:in_ck="-717353726922960719" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="-1178055513630676559" xil_pn:start_ts="1654098679">
<transform xil_pn:end_ts="1654099368" xil_pn:in_ck="-717353726922960719" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="-1178055513630676559" xil_pn:start_ts="1654099352">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
@@ -161,7 +163,7 @@
<outfile xil_pn:name="textovhdl_pad.txt"/>
<outfile xil_pn:name="textovhdl_par.xrpt"/>
</transform>
<transform xil_pn:end_ts="1654098709" xil_pn:in_ck="-4144913829261083515" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="396117104113915555" xil_pn:start_ts="1654098696">
<transform xil_pn:end_ts="1654099383" xil_pn:in_ck="-4144913829261083515" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="396117104113915555" xil_pn:start_ts="1654099370">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="_xmsgs/bitgen.xmsgs"/>
@@ -179,7 +181,7 @@
<status xil_pn:value="OutOfDateForInputs"/>
<status xil_pn:value="InputChanged"/>
</transform>
<transform xil_pn:end_ts="1654098695" xil_pn:in_ck="6717519187032306964" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416184" xil_pn:start_ts="1654098688">
<transform xil_pn:end_ts="1654099368" xil_pn:in_ck="6717519187032306964" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416184" xil_pn:start_ts="1654099362">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="_xmsgs/trce.xmsgs"/>

2
_ngo/netlist.lst
View File

@@ -1,2 +1,2 @@
C:\Users\Gabriel\Xilinx\Aula20220601\textovhdl.ngc 1654098659
C:\Users\Gabriel\Xilinx\Aula20220601\textovhdl.ngc 1654099330
OK

30
_xmsgs/par.xmsgs
View File

@@ -8,21 +8,6 @@
<msg type="info" file="Par" num="282" delta="old" >No user timing constraints were detected or you have set the option to ignore timing constraints (&quot;par -x&quot;). Place and Route will run in &quot;Performance Evaluation Mode&quot; to automatically improve the performance of all internal clocks in this design. Because there are not defined timing requirements, a timing score will not be reported in the PAR report in this mode. The PAR timing summary will list the performance achieved for each clock. Note: For the fastest runtime, set the effort level to &quot;std&quot;. For best performance, set the effort level to &quot;high&quot;.
</msg>
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">GPIO&lt;7&gt;_IBUF</arg> has no load. PAR will not attempt to route this signal.
</msg>
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">DIPSW&lt;0&gt;_IBUF</arg> has no load. PAR will not attempt to route this signal.
</msg>
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">DIPSW&lt;1&gt;_IBUF</arg> has no load. PAR will not attempt to route this signal.
</msg>
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">DIPSW&lt;2&gt;_IBUF</arg> has no load. PAR will not attempt to route this signal.
</msg>
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">DIPSW&lt;3&gt;_IBUF</arg> has no load. PAR will not attempt to route this signal.
</msg>
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">BUT&lt;0&gt;_IBUF</arg> has no load. PAR will not attempt to route this signal.
</msg>
@@ -44,6 +29,21 @@
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">GPIO&lt;6&gt;_IBUF</arg> has no load. PAR will not attempt to route this signal.
</msg>
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">GPIO&lt;7&gt;_IBUF</arg> has no load. PAR will not attempt to route this signal.
</msg>
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">DIPSW&lt;0&gt;_IBUF</arg> has no load. PAR will not attempt to route this signal.
</msg>
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">DIPSW&lt;1&gt;_IBUF</arg> has no load. PAR will not attempt to route this signal.
</msg>
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">DIPSW&lt;2&gt;_IBUF</arg> has no load. PAR will not attempt to route this signal.
</msg>
<msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">DIPSW&lt;3&gt;_IBUF</arg> has no load. PAR will not attempt to route this signal.
</msg>
<msg type="info" file="Par" num="459" delta="old" >The Clock Report is not displayed in the non timing-driven mode.
</msg>

100
_xmsgs/xst.xmsgs
View File

@@ -23,7 +23,7 @@
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">DIPSW</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="info" file="Xst" num="3210" delta="new" >&quot;<arg fmt="%s" index="1">C:\Users\Gabriel\Xilinx\Aula20220601\textovhdl.vhd</arg>&quot; line <arg fmt="%s" index="2">82</arg>: Output port &lt;<arg fmt="%s" index="3">ENOUT</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">UC2</arg>&gt; is unconnected or connected to loadless signal.
<msg type="info" file="Xst" num="3210" delta="old" >&quot;<arg fmt="%s" index="1">C:\Users\Gabriel\Xilinx\Aula20220601\textovhdl.vhd</arg>&quot; line <arg fmt="%s" index="2">82</arg>: Output port &lt;<arg fmt="%s" index="3">ENOUT</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">UC2</arg>&gt; is unconnected or connected to loadless signal.
</msg>
<msg type="warning" file="Xst" num="653" delta="old" >Signal &lt;<arg fmt="%s" index="1">num6</arg>&gt; is used but never assigned. This sourceless signal will be automatically connected to value <arg fmt="%s" index="2">GND</arg>.
@@ -62,6 +62,54 @@
<msg type="warning" file="Xst" num="2677" delta="old" >Node &lt;<arg fmt="%s" index="1">atualshift_7</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_8</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_9</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_10</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_11</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_12</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_13</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_14</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_15</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_16</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_17</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_18</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_19</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_20</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_21</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_22</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_23</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="info" file="Xst" num="3218" delta="old" >HDL ADVISOR - The RAM &lt;<arg fmt="%s" index="1">Mram_proxdisplay</arg>&gt; will be implemented on LUTs either because you have described an asynchronous read or because of currently unsupported block RAM features. If you have described an asynchronous read, making it synchronous would allow you to take advantage of available block RAM resources, for optimized device usage and improved timings. Please refer to your documentation for coding guidelines.
</msg>
@@ -89,7 +137,55 @@
<msg type="warning" file="Xst" num="2677" delta="old" >Node &lt;<arg fmt="%s" index="1">atualshift_7</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch &lt;<arg fmt="%s" index="1">num7_3</arg>&gt; (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block &lt;<arg fmt="%s" index="3">textovhdl</arg>&gt;. This FF/Latch will be trimmed during the optimization process.
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_8</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_9</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_10</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_11</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_12</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_13</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_14</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_15</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_16</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_17</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_18</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_19</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_20</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_21</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_22</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="2677" delta="new" >Node &lt;<arg fmt="%s" index="1">atualshift_23</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.
</msg>
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch &lt;<arg fmt="%s" index="1">num7_3</arg>&gt; (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block &lt;<arg fmt="%s" index="3">textovhdl</arg>&gt;. This FF/Latch will be trimmed during the optimization process.
</msg>
<msg type="warning" file="Xst" num="2677" delta="old" >Node &lt;<arg fmt="%s" index="1">contaux_6</arg>&gt; of sequential type is unconnected in block &lt;<arg fmt="%s" index="2">textovhdl</arg>&gt;.

32
par_usage_statistics.html
View File

@@ -2,31 +2,31 @@
<xtag-section name="ParStatistics">
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN=1><B>Par Statistics</B></TD></TR>
<TR><TD><xtag-par-property-name>Total Non-vccgnd Signals</xtag-par-property-name>=<xtag-par-property-value>150</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Total Non-vccgnd Design Pins</xtag-par-property-name>=<xtag-par-property-value>435</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Total Non-vccgnd Conns</xtag-par-property-name>=<xtag-par-property-value>435</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Total Non-vccgnd Timing Constrained Conns</xtag-par-property-name>=<xtag-par-property-value>365</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 1 CPU</xtag-par-property-name>=<xtag-par-property-value>4.4 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Total Non-vccgnd Design Pins</xtag-par-property-name>=<xtag-par-property-value>429</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Total Non-vccgnd Conns</xtag-par-property-name>=<xtag-par-property-value>429</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Total Non-vccgnd Timing Constrained Conns</xtag-par-property-name>=<xtag-par-property-value>364</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 1 CPU</xtag-par-property-name>=<xtag-par-property-value>4.5 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 2 CPU</xtag-par-property-name>=<xtag-par-property-value>4.9 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 3 CPU</xtag-par-property-name>=<xtag-par-property-value>5.2 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 4 CPU</xtag-par-property-name>=<xtag-par-property-value>5.9 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 5 CPU</xtag-par-property-name>=<xtag-par-property-value>6.3 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 6 CPU</xtag-par-property-name>=<xtag-par-property-value>6.3 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 7 CPU</xtag-par-property-name>=<xtag-par-property-value>6.3 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 8 CPU</xtag-par-property-name>=<xtag-par-property-value>6.3 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 9 CPU</xtag-par-property-name>=<xtag-par-property-value>6.3 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 10 CPU</xtag-par-property-name>=<xtag-par-property-value>6.3 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 5 CPU</xtag-par-property-name>=<xtag-par-property-value>6.1 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 6 CPU</xtag-par-property-name>=<xtag-par-property-value>6.1 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 7 CPU</xtag-par-property-name>=<xtag-par-property-value>6.1 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 8 CPU</xtag-par-property-name>=<xtag-par-property-value>6.1 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 9 CPU</xtag-par-property-name>=<xtag-par-property-value>6.1 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>Phase 10 CPU</xtag-par-property-name>=<xtag-par-property-value>6.1 sec</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 1</xtag-par-property-name>=<xtag-par-property-value>1.0</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 2</xtag-par-property-name>=<xtag-par-property-value>2.0</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 3</xtag-par-property-name>=<xtag-par-property-value>2.0</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 4</xtag-par-property-name>=<xtag-par-property-value>3.0</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 10</xtag-par-property-name>=<xtag-par-property-value>4.2</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 50</xtag-par-property-name>=<xtag-par-property-value>1.0</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 2</xtag-par-property-name>=<xtag-par-property-value>1.5</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 3</xtag-par-property-name>=<xtag-par-property-value>4.0</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 4</xtag-par-property-name>=<xtag-par-property-value>3.5</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 10</xtag-par-property-name>=<xtag-par-property-value>4.4</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 50</xtag-par-property-name>=<xtag-par-property-value>1.1</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 100</xtag-par-property-name>=<xtag-par-property-value>0.0</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 500</xtag-par-property-name>=<xtag-par-property-value>0.0</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 5000</xtag-par-property-name>=<xtag-par-property-value>0.0</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 20000</xtag-par-property-name>=<xtag-par-property-value>0.0</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 50000</xtag-par-property-name>=<xtag-par-property-value>0.0</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>AvgWirelenPerPin Fanout 100000</xtag-par-property-name>=<xtag-par-property-value>0.0</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>IRR Gamma</xtag-par-property-name>=<xtag-par-property-value>1.0403</xtag-par-property-value></TD></TR>
<TR><TD><xtag-par-property-name>IRR Gamma</xtag-par-property-name>=<xtag-par-property-value>1.0363</xtag-par-property-value></TD></TR>
</xtag-section>
</TABLE>

2
textovhdl.bgn
View File

@@ -5,7 +5,7 @@ C:\Xilinx\14.7\ISE_DS\ISE\.
"textovhdl" is an NCD, version 3.2, device xc6slx16, package csg324, speed -2
Opened constraints file textovhdl.pcf.
Wed Jun 01 12:51:41 2022
Wed Jun 01 13:02:55 2022
C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64\unwrapped\bitgen.exe -intstyle ise -w -g DebugBitstream:No -g Binary:no -g CRC:Enable -g Reset_on_err:No -g ConfigRate:2 -g ProgPin:PullUp -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullUp -g TmsPin:PullUp -g UnusedPin:PullDown -g UserID:0xFFFFFFFF -g ExtMasterCclk_en:No -g SPI_buswidth:1 -g TIMER_CFG:0xFFFF -g multipin_wakeup:No -g StartUpClk:CClk -g DONE_cycle:4 -g GTS_cycle:5 -g GWE_cycle:6 -g LCK_cycle:NoWait -g Security:None -g DonePipe:No -g DriveDone:No -g en_sw_gsr:No -g drive_awake:No -g sw_clk:Startupclk -g sw_gwe_cycle:5 -g sw_gts_cycle:4 textovhdl.ncd

BIN
textovhdl.bit
View File

Binary file not shown.

2
textovhdl.bld
View File

@@ -31,7 +31,7 @@ NGDBUILD Design Results Summary:
Number of errors: 0
Number of warnings: 4
Total memory usage is 162032 kilobytes
Total memory usage is 161584 kilobytes
Writing NGD file "textovhdl.ngd" ...
Total REAL time to NGDBUILD completion: 4 sec

6
textovhdl.cmd_log
View File

@@ -46,3 +46,9 @@ map -intstyle ise -p xc6slx16-csg324-2 -w -logic_opt off -ol high -t 1 -xt 0 -re
par -w -intstyle ise -ol high -mt off textovhdl_map.ncd textovhdl.ncd textovhdl.pcf
trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml textovhdl.twx textovhdl.ncd -o textovhdl.twr textovhdl.pcf -ucf restricoes.ucf
bitgen -intstyle ise -f textovhdl.ut textovhdl.ncd
xst -intstyle ise -ifn "C:/Users/Gabriel/Xilinx/Aula20220601/textovhdl.xst" -ofn "C:/Users/Gabriel/Xilinx/Aula20220601/textovhdl.syr"
ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc restricoes.ucf -p xc6slx16-csg324-2 textovhdl.ngc textovhdl.ngd
map -intstyle ise -p xc6slx16-csg324-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o textovhdl_map.ncd textovhdl.ngd textovhdl.pcf
par -w -intstyle ise -ol high -mt off textovhdl_map.ncd textovhdl.ncd textovhdl.pcf
trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml textovhdl.twx textovhdl.ncd -o textovhdl.twr textovhdl.pcf -ucf restricoes.ucf
bitgen -intstyle ise -f textovhdl.ut textovhdl.ncd

2
textovhdl.drc
View File

@@ -1,7 +1,7 @@
Release 14.7 Drc P.20131013 (nt64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Wed Jun 01 12:51:41 2022
Wed Jun 01 13:02:55 2022
drc -z textovhdl.ncd textovhdl.pcf

2
textovhdl.ncd
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File diff suppressed because one or more lines are too long

2
textovhdl.ngc
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File diff suppressed because one or more lines are too long

2
textovhdl.ngd
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File diff suppressed because one or more lines are too long

2
textovhdl.ngr
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File diff suppressed because one or more lines are too long

2
textovhdl.pad
View File

@@ -1,7 +1,7 @@
Release 14.7 - par P.20131013 (nt64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Wed Jun 01 12:51:27 2022
Wed Jun 01 13:02:40 2022
# NOTE: This file is designed to be imported into a spreadsheet program

60
textovhdl.par
View File

@@ -1,7 +1,7 @@
Release 14.7 par P.20131013 (nt64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
GABRIEL-E5400:: Wed Jun 01 12:51:20 2022
GABRIEL-E5400:: Wed Jun 01 13:02:33 2022
par -w -intstyle ise -ol high -mt off textovhdl_map.ncd textovhdl.ncd
textovhdl.pcf
@@ -32,31 +32,25 @@ Slice Logic Utilization:
Number used as Latches: 0
Number used as Latch-thrus: 0
Number used as AND/OR logics: 0
Number of Slice LUTs: 110 out of 9,112 1%
Number of Slice LUTs: 113 out of 9,112 1%
Number used as logic: 103 out of 9,112 1%
Number using O6 output only: 57
Number using O5 output only: 12
Number using O5 and O6: 34
Number used as ROM: 0
Number used as Memory: 1 out of 2,176 1%
Number used as Dual Port RAM: 0
Number used as Single Port RAM: 0
Number used as Shift Register: 1
Number using O6 output only: 1
Number using O5 output only: 0
Number using O5 and O6: 0
Number used exclusively as route-thrus: 6
Number with same-slice register load: 4
Number used as Memory: 0 out of 2,176 0%
Number used exclusively as route-thrus: 10
Number with same-slice register load: 8
Number with same-slice carry load: 2
Number with other load: 0
Slice Logic Distribution:
Number of occupied Slices: 36 out of 2,278 1%
Number of occupied Slices: 34 out of 2,278 1%
Number of MUXCYs used: 44 out of 4,556 1%
Number of LUT Flip Flop pairs used: 120
Number with an unused Flip Flop: 40 out of 120 33%
Number with an unused LUT: 10 out of 120 8%
Number of fully used LUT-FF pairs: 70 out of 120 58%
Number of LUT Flip Flop pairs used: 116
Number with an unused Flip Flop: 40 out of 116 34%
Number with an unused LUT: 3 out of 116 2%
Number of fully used LUT-FF pairs: 73 out of 116 62%
Number of slice register sites lost
to control set restrictions: 0 out of 18,224 0%
@@ -105,11 +99,6 @@ Router effort level (-rl): High
Starting initial Timing Analysis. REAL time: 4 secs
Finished initial Timing Analysis. REAL time: 4 secs
WARNING:Par:288 - The signal GPIO<7>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal DIPSW<0>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal DIPSW<1>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal DIPSW<2>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal DIPSW<3>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal BUT<0>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal BUT<1>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal BUT<2>_IBUF has no load. PAR will not attempt to route this signal.
@@ -117,16 +106,21 @@ WARNING:Par:288 - The signal BUT<3>_IBUF has no load. PAR will not attempt to r
WARNING:Par:288 - The signal GPIO<3>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal GPIO<5>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal GPIO<6>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal GPIO<7>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal DIPSW<0>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal DIPSW<1>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal DIPSW<2>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal DIPSW<3>_IBUF has no load. PAR will not attempt to route this signal.
Starting Router
Phase 1 : 488 unrouted; REAL time: 4 secs
Phase 1 : 476 unrouted; REAL time: 4 secs
Phase 2 : 405 unrouted; REAL time: 5 secs
Phase 2 : 400 unrouted; REAL time: 4 secs
Phase 3 : 59 unrouted; REAL time: 5 secs
Phase 3 : 50 unrouted; REAL time: 5 secs
Phase 4 : 61 unrouted; (Par is working to improve performance) REAL time: 6 secs
Phase 4 : 50 unrouted; (Par is working to improve performance) REAL time: 5 secs
Updating file: textovhdl.ncd with current fully routed design.
@@ -162,17 +156,17 @@ Asterisk (*) preceding a constraint indicates it was not met.
Constraint | Check | Worst Case | Best Case | Timing | Timing
| | Slack | Achievable | Errors | Score
----------------------------------------------------------------------------------------------------------
Autotimespec constraint for clock net con | SETUP | N/A| 3.834ns| N/A| 0
t100k<8> | HOLD | 0.438ns| | 0| 0
Autotimespec constraint for clock net con | SETUP | N/A| 3.303ns| N/A| 0
t100k<8> | HOLD | 0.428ns| | 0| 0
----------------------------------------------------------------------------------------------------------
Autotimespec constraint for clock net CLK | SETUP | N/A| 3.333ns| N/A| 0
Autotimespec constraint for clock net CLK | SETUP | N/A| 3.282ns| N/A| 0
27MHz_BUFGP | HOLD | 0.530ns| | 0| 0
----------------------------------------------------------------------------------------------------------
Autotimespec constraint for clock net GPI | SETUP | N/A| 1.617ns| N/A| 0
O_4_IBUF_BUFG | HOLD | 0.575ns| | 0| 0
Autotimespec constraint for clock net GPI | SETUP | N/A| 1.632ns| N/A| 0
O_4_IBUF_BUFG | HOLD | 0.546ns| | 0| 0
----------------------------------------------------------------------------------------------------------
Autotimespec constraint for clock net con | SETUP | N/A| 2.655ns| N/A| 0
taux_5_BUFG | HOLD | 0.501ns| | 0| 0
Autotimespec constraint for clock net con | SETUP | N/A| 2.364ns| N/A| 0
taux_5_BUFG | HOLD | 0.464ns| | 0| 0
----------------------------------------------------------------------------------------------------------
@@ -190,7 +184,7 @@ All signals are completely routed.
WARNING:Par:283 - There are 12 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.
Total REAL time to PAR completion: 7 secs
Total REAL time to PAR completion: 6 secs
Total CPU time to PAR completion: 6 secs
Peak Memory Usage: 315 MB

22
textovhdl.pcf
View File

@@ -1,18 +1,8 @@
//! **************************************************************************
// Written by: Map P.20131013 on Wed Jun 01 12:51:17 2022
// Written by: Map P.20131013 on Wed Jun 01 13:02:30 2022
//! **************************************************************************
SCHEMATIC START;
COMP "GPIO<7>" LOCATE = SITE "P12" LEVEL 1;
COMP "LEDS<0>" LOCATE = SITE "E13" LEVEL 1;
COMP "LEDS<1>" LOCATE = SITE "C14" LEVEL 1;
COMP "LEDS<2>" LOCATE = SITE "C4" LEVEL 1;
COMP "LEDS<3>" LOCATE = SITE "A4" LEVEL 1;
COMP "DIPSW<0>" LOCATE = SITE "D14" LEVEL 1;
COMP "DIPSW<1>" LOCATE = SITE "E12" LEVEL 1;
COMP "CLK27MHz" LOCATE = SITE "V10" LEVEL 1;
COMP "DIPSW<2>" LOCATE = SITE "F12" LEVEL 1;
COMP "DIPSW<3>" LOCATE = SITE "V13" LEVEL 1;
COMP "BUT<0>" LOCATE = SITE "P4" LEVEL 1;
COMP "BUT<1>" LOCATE = SITE "F6" LEVEL 1;
COMP "BUT<2>" LOCATE = SITE "E4" LEVEL 1;
@@ -28,5 +18,15 @@ COMP "GPIO<5>" LOCATE = SITE "B4" LEVEL 1;
COMP "GPIO<6>" LOCATE = SITE "F13" LEVEL 1;
PIN GPIO<6>_pin<0> = BEL "GPIO<6>" PINNAME PAD;
PIN "GPIO<6>_pin<0>" CLOCK_DEDICATED_ROUTE = FALSE;
COMP "GPIO<7>" LOCATE = SITE "P12" LEVEL 1;
COMP "LEDS<0>" LOCATE = SITE "E13" LEVEL 1;
COMP "LEDS<1>" LOCATE = SITE "C14" LEVEL 1;
COMP "LEDS<2>" LOCATE = SITE "C4" LEVEL 1;
COMP "LEDS<3>" LOCATE = SITE "A4" LEVEL 1;
COMP "DIPSW<0>" LOCATE = SITE "D14" LEVEL 1;
COMP "DIPSW<1>" LOCATE = SITE "E12" LEVEL 1;
COMP "CLK27MHz" LOCATE = SITE "V10" LEVEL 1;
COMP "DIPSW<2>" LOCATE = SITE "F12" LEVEL 1;
COMP "DIPSW<3>" LOCATE = SITE "V13" LEVEL 1;
SCHEMATIC END;

2
textovhdl.ptwx
View File

@@ -329,4 +329,4 @@
<!ELEMENT twName (#PCDATA)>
<!ELEMENT twValue (#PCDATA)>
]>
<twReport><twBody><twSumRpt><twConstSummaryTable><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net cont100k&lt;8&gt;</twConstName><twConstData type="SETUP" best="3.834" units="ns" score="0"/><twConstData type="HOLD" slack="0.438" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net CLK27MHz_BUFGP</twConstName><twConstData type="SETUP" best="3.333" units="ns" score="0"/><twConstData type="HOLD" slack="0.530" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net GPIO_4_IBUF_BUFG</twConstName><twConstData type="SETUP" best="1.617" units="ns" score="0"/><twConstData type="HOLD" slack="0.575" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net contaux_5_BUFG</twConstName><twConstData type="SETUP" best="2.655" units="ns" score="0"/><twConstData type="HOLD" slack="0.501" units="ns" errors="0" score="0"/></twConstSummary></twConstSummaryTable><twUnmetConstCnt anchorID="10">0</twUnmetConstCnt><twInfo anchorID="11">INFO:Timing:2761 - N/A entries in the Constraints List may indicate that the constraint is not analyzed due to the following: No paths covered by this constraint; Other constraints intersect with this constraint; or This constraint was disabled by a Path Tracing Control. Please run the Timespec Interaction Report (TSI) via command line (trce tsi) or Timing Analyzer GUI.</twInfo></twSumRpt></twBody></twReport>
<twReport><twBody><twSumRpt><twConstSummaryTable><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net cont100k&lt;8&gt;</twConstName><twConstData type="SETUP" best="3.303" units="ns" score="0"/><twConstData type="HOLD" slack="0.428" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net CLK27MHz_BUFGP</twConstName><twConstData type="SETUP" best="3.282" units="ns" score="0"/><twConstData type="HOLD" slack="0.530" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net GPIO_4_IBUF_BUFG</twConstName><twConstData type="SETUP" best="1.632" units="ns" score="0"/><twConstData type="HOLD" slack="0.546" units="ns" errors="0" score="0"/></twConstSummary><twConstSummary><twConstName UCFConstName="" ScopeName="">Autotimespec constraint for clock net contaux_5_BUFG</twConstName><twConstData type="SETUP" best="2.364" units="ns" score="0"/><twConstData type="HOLD" slack="0.464" units="ns" errors="0" score="0"/></twConstSummary></twConstSummaryTable><twUnmetConstCnt anchorID="10">0</twUnmetConstCnt><twInfo anchorID="11">INFO:Timing:2761 - N/A entries in the Constraints List may indicate that the constraint is not analyzed due to the following: No paths covered by this constraint; Other constraints intersect with this constraint; or This constraint was disabled by a Path Tracing Control. Please run the Timespec Interaction Report (TSI) via command line (trce tsi) or Timing Analyzer GUI.</twInfo></twSumRpt></twBody></twReport>

128
textovhdl.syr
View File

@@ -3,13 +3,13 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
--> Parameter TMPDIR set to xst/projnav.tmp
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.11 secs
Total REAL time to Xst completion: 1.00 secs
Total CPU time to Xst completion: 0.12 secs
--> Parameter xsthdpdir set to xst
Total REAL time to Xst completion: 0.00 secs
Total REAL time to Xst completion: 1.00 secs
Total CPU time to Xst completion: 0.12 secs
--> Reading design: textovhdl.prj
@@ -148,7 +148,7 @@ WARNING:Xst:653 - Signal <num6> is used but never assigned. This sourceless sign
WARNING:Xst:653 - Signal <num5> is used but never assigned. This sourceless signal will be automatically connected to value GND.
WARNING:Xst:653 - Signal <num4> is used but never assigned. This sourceless signal will be automatically connected to value GND.
WARNING:Xst:653 - Signal <num3> is used but never assigned. This sourceless signal will be automatically connected to value GND.
Found 8-bit register for signal <codigo32<15:8>>.
Found 8-bit register for signal <codigo32<31:24>>.
Found 2-bit register for signal <atual_S>.
Found 4-bit register for signal <_n0101>.
Found 24-bit register for signal <cont100k>.
@@ -231,6 +231,22 @@ WARNING:Xst:2677 - Node <atualshift_4> of sequential type is unconnected in bloc
WARNING:Xst:2677 - Node <atualshift_5> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_6> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_7> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_8> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_9> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_10> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_11> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_12> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_13> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_14> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_15> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_16> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_17> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_18> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_19> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_20> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_21> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_22> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_23> of sequential type is unconnected in block <textovhdl>.
Synthesizing (advanced) Unit <display>.
The following registers are absorbed into counter <EN>: 1 register on signal <EN>.
@@ -259,6 +275,22 @@ WARNING:Xst:2677 - Node <atualshift_4> of sequential type is unconnected in bloc
WARNING:Xst:2677 - Node <atualshift_5> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_6> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_7> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_8> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_9> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_10> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_11> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_12> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_13> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_14> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_15> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_16> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_17> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_18> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_19> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_20> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_21> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_22> of sequential type is unconnected in block <textovhdl>.
WARNING:Xst:2677 - Node <atualshift_23> of sequential type is unconnected in block <textovhdl>.
=========================================================================
Advanced HDL Synthesis Report
@@ -272,8 +304,8 @@ Macro Statistics
24-bit down counter : 1
24-bit up counter : 1
9-bit up counter : 1
# Registers : 67
Flip-Flops : 67
# Registers : 51
Flip-Flops : 51
# Multiplexers : 21
1-bit 2-to-1 multiplexer : 3
16-bit 2-to-1 multiplexer : 5
@@ -314,25 +346,19 @@ Optimizing unit <display> ...
Mapping all equations...
Building and optimizing final netlist ...
Found area constraint ratio of 100 (+ 5) on block textovhdl, actual ratio is 2.
Found area constraint ratio of 100 (+ 5) on block textovhdl, actual ratio is 1.
FlipFlop num7_2 has been replicated 1 time(s) to handle iob=true attribute.
FlipFlop num7_1 has been replicated 1 time(s) to handle iob=true attribute.
FlipFlop num7_0 has been replicated 1 time(s) to handle iob=true attribute.
Final Macro Processing ...
Processing Unit <textovhdl> :
Found 17-bit shift register for signal <atualshift_15>.
Unit <textovhdl> processed.
=========================================================================
Final Register Report
Macro Statistics
# Registers : 91
Flip-Flops : 91
# Shift Registers : 1
17-bit shift register : 1
# Registers : 92
Flip-Flops : 92
=========================================================================
@@ -355,15 +381,15 @@ Top Level Output File Name : textovhdl.ngc
Primitive and Black Box Usage:
------------------------------
# BELS : 196
# BELS : 195
# GND : 1
# INV : 31
# INV : 30
# LUT1 : 14
# LUT2 : 9
# LUT3 : 8
# LUT4 : 6
# LUT5 : 34
# LUT6 : 17
# LUT3 : 7
# LUT4 : 7
# LUT5 : 35
# LUT6 : 16
# MUXCY : 36
# VCC : 1
# XORCY : 39
@@ -371,10 +397,8 @@ Primitive and Black Box Usage:
# FD : 49
# FD_1 : 17
# FDCE : 12
# FDE : 7
# FDE_1 : 7
# Shift Registers : 1
# SRLC16E : 1
# FDE : 6
# FDE_1 : 8
# Clock Buffers : 3
# BUFG : 2
# BUFGP : 1
@@ -390,17 +414,15 @@ Selected Device : 6slx16csg324-2
Slice Logic Utilization:
Number of Slice Registers: 89 out of 18224 0%
Number of Slice LUTs: 120 out of 9112 1%
Number used as Logic: 119 out of 9112 1%
Number used as Memory: 1 out of 2176 0%
Number used as SRL: 1
Number of Slice LUTs: 118 out of 9112 1%
Number used as Logic: 118 out of 9112 1%
Slice Logic Distribution:
Number of LUT Flip Flop pairs used: 130
Number with an unused Flip Flop: 41 out of 130 31%
Number with an unused LUT: 10 out of 130 7%
Number of fully used LUT-FF pairs: 79 out of 130 60%
Number of unique control sets: 11
Number of LUT Flip Flop pairs used: 129
Number with an unused Flip Flop: 40 out of 129 31%
Number with an unused LUT: 11 out of 129 8%
Number of fully used LUT-FF pairs: 78 out of 129 60%
Number of unique control sets: 10
IO Utilization:
Number of IOs: 21
@@ -432,8 +454,8 @@ Clock Information:
Clock Signal | Clock buffer(FF name) | Load |
-----------------------------------+------------------------+-------+
cont100k_8 | NONE(atual_S_0) | 20 |
GPIO<4> | IBUF+BUFG | 9 |
UC2/cont_3 | NONE(codigo32_8) | 8 |
GPIO<4> | IBUF+BUFG | 8 |
UC2/cont_3 | NONE(codigo32_24) | 8 |
CLK27MHz | BUFGP | 30 |
contaux_5 | BUFG | 26 |
-----------------------------------+------------------------+-------+
@@ -482,24 +504,24 @@ Delay: 4.375ns (Levels of Logic = 3)
=========================================================================
Timing constraint: Default period analysis for Clock 'GPIO<4>'
Clock period: 1.820ns (frequency: 549.451MHz)
Total number of paths / destination ports: 8 / 8
Clock period: 1.324ns (frequency: 755.287MHz)
Total number of paths / destination ports: 7 / 7
-------------------------------------------------------------------------
Delay: 1.820ns (Levels of Logic = 0)
Source: Mshreg_atualshift_15 (FF)
Destination: atualshift_15 (FF)
Delay: 1.324ns (Levels of Logic = 0)
Source: atualshift_25 (FF)
Destination: atualshift_24 (FF)
Source Clock: GPIO<4> falling
Destination Clock: GPIO<4> falling
Data Path: Mshreg_atualshift_15 to atualshift_15
Data Path: atualshift_25 to atualshift_24
Gate Net
Cell:in->out fanout Delay Delay Logical Name (Net Name)
---------------------------------------- ------------
SRLC16E:CLK->Q 1 1.746 0.000 Mshreg_atualshift_15 (Mshreg_atualshift_15)
FDE:D 0.074 atualshift_15
FDE_1:C->Q 2 0.525 0.725 atualshift_25 (atualshift_25)
FDE_1:D 0.074 atualshift_24
----------------------------------------
Total 1.820ns (1.820ns logic, 0.000ns route)
(100.0% logic, 0.0% route)
Total 1.324ns (0.599ns logic, 0.725ns route)
(45.2% logic, 54.8% route)
=========================================================================
Timing constraint: Default period analysis for Clock 'CLK27MHz'
@@ -656,8 +678,8 @@ Clock to Setup on destination clock GPIO<4>
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
GPIO<4> | | | 1.820| |
cont100k_8 | | | 3.342| |
GPIO<4> | | | 1.324| |
cont100k_8 | | | 3.310| |
---------------+---------+---------+---------+---------+
Clock to Setup on destination clock UC2/cont_3
@@ -673,7 +695,7 @@ Clock to Setup on destination clock cont100k_8
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
UC2/cont_3 | 4.238| | | |
UC2/cont_3 | 4.126| | | |
cont100k_8 | 4.375| | | |
---------------+---------+---------+---------+---------+
@@ -689,14 +711,14 @@ contaux_5 | | | 3.399| |
=========================================================================
Total REAL time to Xst completion: 7.00 secs
Total CPU time to Xst completion: 7.17 secs
Total REAL time to Xst completion: 8.00 secs
Total CPU time to Xst completion: 7.21 secs
-->
Total memory usage is 259336 kilobytes
Total memory usage is 260104 kilobytes
Number of errors : 0 ( 0 filtered)
Number of warnings : 45 ( 0 filtered)
Number of warnings : 77 ( 0 filtered)
Number of infos : 3 ( 0 filtered)

6
textovhdl.twr
View File

@@ -45,7 +45,7 @@ Clock to Setup on destination clock CLK27MHz
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
CLK27MHz | 3.333| | | |
CLK27MHz | 3.282| | | |
---------------+---------+---------+---------+---------+
Clock to Setup on destination clock GPIO<4>
@@ -53,11 +53,11 @@ Clock to Setup on destination clock GPIO<4>
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
GPIO<4> | | | | 1.617|
GPIO<4> | | | | 1.632|
---------------+---------+---------+---------+---------+
Analysis completed Wed Jun 01 12:51:34 2022
Analysis completed Wed Jun 01 13:02:47 2022
--------------------------------------------------------------------------------
Trace Settings:

2
textovhdl.twx
View File

@@ -333,7 +333,7 @@
-n 3 -fastpaths -xml textovhdl.twx textovhdl.ncd -o textovhdl.twr textovhdl.pcf
-ucf restricoes.ucf
</twCmdLine><twDesign>textovhdl.ncd</twDesign><twDesignPath>textovhdl.ncd</twDesignPath><twPCF>textovhdl.pcf</twPCF><twPcfPath>textovhdl.pcf</twPcfPath><twDevInfo arch="spartan6" pkg="csg324"><twDevName>xc6slx16</twDevName><twDevRange>C</twDevRange><twSpeedGrade>-2</twSpeedGrade><twSpeedVer>PRODUCTION 1.23 2013-10-13</twSpeedVer><twQuadDly>1</twQuadDly></twDevInfo><twRptInfo twRptLvl="twVerbose" twReportMinPaths="true" dlyHyperLnks="t" ><twEndptLimit>3</twEndptLimit></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twInfo anchorID="2">INFO:Timing:2698 - No timing constraints found, doing default enumeration.</twInfo><twInfo anchorID="3">INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).</twInfo><twInfo anchorID="4">INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</twInfo><twInfo anchorID="5">INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model. For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</twInfo><twBody><twVerboseRpt><twDataSheet anchorID="6" twNameLen="15"><twClk2OutList anchorID="7" twDestWidth="7" twPhaseWidth="14"><twSrc>CLK27MHz</twSrc><twClk2Out twOutPad = "GPIO&lt;0&gt;" twMinTime = "4.139" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "9.716" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="CLK27MHz_BUFGP" twClkPhase="0.000" ></twClk2Out></twClk2OutList><twClk2SUList anchorID="8" twDestWidth="8"><twDest>CLK27MHz</twDest><twClk2SU><twSrc>CLK27MHz</twSrc><twRiseRise>3.333</twRiseRise></twClk2SU></twClk2SUList><twClk2SUList anchorID="9" twDestWidth="7"><twDest>GPIO&lt;4&gt;</twDest><twClk2SU><twSrc>GPIO&lt;4&gt;</twSrc><twFallFall>1.617</twFallFall></twClk2SU></twClk2SUList><twOffsetTables></twOffsetTables></twDataSheet></twVerboseRpt></twBody><twFoot><twTimestamp>Wed Jun 01 12:51:34 2022 </twTimestamp></twFoot><twClientInfo anchorID="10"><twClientName>Trace</twClientName><twAttrList><twAttrListItem><twName>Trace Settings</twName><twValue>
</twCmdLine><twDesign>textovhdl.ncd</twDesign><twDesignPath>textovhdl.ncd</twDesignPath><twPCF>textovhdl.pcf</twPCF><twPcfPath>textovhdl.pcf</twPcfPath><twDevInfo arch="spartan6" pkg="csg324"><twDevName>xc6slx16</twDevName><twDevRange>C</twDevRange><twSpeedGrade>-2</twSpeedGrade><twSpeedVer>PRODUCTION 1.23 2013-10-13</twSpeedVer><twQuadDly>1</twQuadDly></twDevInfo><twRptInfo twRptLvl="twVerbose" twReportMinPaths="true" dlyHyperLnks="t" ><twEndptLimit>3</twEndptLimit></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twInfo anchorID="2">INFO:Timing:2698 - No timing constraints found, doing default enumeration.</twInfo><twInfo anchorID="3">INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).</twInfo><twInfo anchorID="4">INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</twInfo><twInfo anchorID="5">INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model. For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</twInfo><twBody><twVerboseRpt><twDataSheet anchorID="6" twNameLen="15"><twClk2OutList anchorID="7" twDestWidth="7" twPhaseWidth="14"><twSrc>CLK27MHz</twSrc><twClk2Out twOutPad = "GPIO&lt;0&gt;" twMinTime = "4.139" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "9.716" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="CLK27MHz_BUFGP" twClkPhase="0.000" ></twClk2Out></twClk2OutList><twClk2SUList anchorID="8" twDestWidth="8"><twDest>CLK27MHz</twDest><twClk2SU><twSrc>CLK27MHz</twSrc><twRiseRise>3.282</twRiseRise></twClk2SU></twClk2SUList><twClk2SUList anchorID="9" twDestWidth="7"><twDest>GPIO&lt;4&gt;</twDest><twClk2SU><twSrc>GPIO&lt;4&gt;</twSrc><twFallFall>1.632</twFallFall></twClk2SU></twClk2SUList><twOffsetTables></twOffsetTables></twDataSheet></twVerboseRpt></twBody><twFoot><twTimestamp>Wed Jun 01 13:02:47 2022 </twTimestamp></twFoot><twClientInfo anchorID="10"><twClientName>Trace</twClientName><twAttrList><twAttrListItem><twName>Trace Settings</twName><twValue>
Peak Memory Usage: 219 MB
</twValue></twAttrListItem></twAttrList></twClientInfo></twReport>

2
textovhdl.unroutes
View File

@@ -1,7 +1,7 @@
Release 14.7 - par P.20131013 (nt64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Wed Jun 01 12:51:27 2022
Wed Jun 01 13:02:40 2022
All signals are completely routed.

20
textovhdl.vhd
View File

@@ -88,16 +88,16 @@ Q8ms <= num2(3);
ENshift <= not Q8ms and not Q4ms;
SIshift <= Q1ms;
proxnum7 <= "0000" when codigo32(15 downto 8)="11101001" else -- 0 = E9
"0001" when codigo32(15 downto 8)="11110011" else -- 1 = F3
"0010" when codigo32(15 downto 8)="11100111" else -- 2 = E7
"0011" when codigo32(15 downto 8)="10100001" else -- 3 = A1
"0100" when codigo32(15 downto 8)="11110111" else -- 4 = F7
"0101" when codigo32(15 downto 8)="11100011" else -- 5 = E3
"0110" when codigo32(15 downto 8)="10100101" else -- 6 = A5
"0111" when codigo32(15 downto 8)="10111101" else -- 7 = BD
"0110" when codigo32(15 downto 8)="10101101" else -- 8 = AD
"0111" when codigo32(15 downto 8)="10110101" else -- 9 = B5
proxnum7 <= "0000" when codigo32(31 downto 24)="11101001" else -- 0 = E9
"0001" when codigo32(31 downto 24)="11110011" else -- 1 = F3
"0010" when codigo32(31 downto 24)="11100111" else -- 2 = E7
"0011" when codigo32(31 downto 24)="10100001" else -- 3 = A1
"0100" when codigo32(31 downto 24)="11110111" else -- 4 = F7
"0101" when codigo32(31 downto 24)="11100011" else -- 5 = E3
"0110" when codigo32(31 downto 24)="10100101" else -- 6 = A5
"0111" when codigo32(31 downto 24)="10111101" else -- 7 = BD
"0110" when codigo32(31 downto 24)="10101101" else -- 8 = AD
"0111" when codigo32(31 downto 24)="10110101" else -- 9 = B5
num7;
process(CLK27MHz)

108
textovhdl_envsettings.html
View File

@@ -16,44 +16,44 @@
<tr>
<td>PATHEXT</td>
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
<td><font color=gray>&lt;&nbsp;data not available&nbsp;&gt;</font></td>
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
<td><font color=gray>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</font></td>
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
</tr>
<tr>
<td>Path</td>
<td>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;<br>C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;<br>C:\Xilinx\14.7\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\common\lib\nt64;<br>C:\ProgramData\Oracle\Java\javapath;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Intel\WiFi\bin\;<br>C:\Program Files\Common Files\Intel\WirelessCommon\;<br>C:\Program Files\TortoiseGit\bin;<br>C:\Program Files\Git\cmd;<br>C:\Program Files\Microsoft VS Code\bin;<br>C:\Program Files\MATLAB\R2022a\bin</td>
<td><font color=gray>&lt;&nbsp;data not available&nbsp;&gt;</font></td>
<td>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;<br>C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;<br>C:\Xilinx\14.7\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\common\lib\nt64;<br>C:\ProgramData\Oracle\Java\javapath;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Intel\WiFi\bin\;<br>C:\Program Files\Common Files\Intel\WirelessCommon\;<br>C:\Program Files\TortoiseGit\bin;<br>C:\Program Files\Git\cmd;<br>C:\Program Files\Microsoft VS Code\bin;<br>C:\Program Files\MATLAB\R2022a\bin</td>
<td><font color=gray>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;<br>C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;<br>C:\Xilinx\14.7\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\common\lib\nt64;<br>C:\ProgramData\Oracle\Java\javapath;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Intel\WiFi\bin\;<br>C:\Program Files\Common Files\Intel\WirelessCommon\;<br>C:\Program Files\TortoiseGit\bin;<br>C:\Program Files\Git\cmd;<br>C:\Program Files\Microsoft VS Code\bin;<br>C:\Program Files\MATLAB\R2022a\bin</font></td>
<td>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;<br>C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;<br>C:\Xilinx\14.7\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\common\lib\nt64;<br>C:\ProgramData\Oracle\Java\javapath;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Intel\WiFi\bin\;<br>C:\Program Files\Common Files\Intel\WirelessCommon\;<br>C:\Program Files\TortoiseGit\bin;<br>C:\Program Files\Git\cmd;<br>C:\Program Files\Microsoft VS Code\bin;<br>C:\Program Files\MATLAB\R2022a\bin</td>
<td>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;<br>C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;<br>C:\Xilinx\14.7\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\common\lib\nt64;<br>C:\ProgramData\Oracle\Java\javapath;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Intel\WiFi\bin\;<br>C:\Program Files\Common Files\Intel\WirelessCommon\;<br>C:\Program Files\TortoiseGit\bin;<br>C:\Program Files\Git\cmd;<br>C:\Program Files\Microsoft VS Code\bin;<br>C:\Program Files\MATLAB\R2022a\bin</td>
</tr>
<tr>
<td>XILINX</td>
<td>C:\Xilinx\14.7\ISE_DS\ISE\</td>
<td><font color=gray>&lt;&nbsp;data not available&nbsp;&gt;</font></td>
<td>C:\Xilinx\14.7\ISE_DS\ISE\</td>
<td><font color=gray>C:\Xilinx\14.7\ISE_DS\ISE\</font></td>
<td>C:\Xilinx\14.7\ISE_DS\ISE\</td>
<td>C:\Xilinx\14.7\ISE_DS\ISE\</td>
</tr>
<tr>
<td>XILINX_DSP</td>
<td>C:\Xilinx\14.7\ISE_DS\ISE</td>
<td><font color=gray>&lt;&nbsp;data not available&nbsp;&gt;</font></td>
<td>C:\Xilinx\14.7\ISE_DS\ISE</td>
<td><font color=gray>C:\Xilinx\14.7\ISE_DS\ISE</font></td>
<td>C:\Xilinx\14.7\ISE_DS\ISE</td>
<td>C:\Xilinx\14.7\ISE_DS\ISE</td>
</tr>
<tr>
<td>XILINX_EDK</td>
<td>C:\Xilinx\14.7\ISE_DS\EDK</td>
<td><font color=gray>&lt;&nbsp;data not available&nbsp;&gt;</font></td>
<td>C:\Xilinx\14.7\ISE_DS\EDK</td>
<td><font color=gray>C:\Xilinx\14.7\ISE_DS\EDK</font></td>
<td>C:\Xilinx\14.7\ISE_DS\EDK</td>
<td>C:\Xilinx\14.7\ISE_DS\EDK</td>
</tr>
<tr>
<td>XILINX_PLANAHEAD</td>
<td>C:\Xilinx\14.7\ISE_DS\PlanAhead</td>
<td><font color=gray>&lt;&nbsp;data not available&nbsp;&gt;</font></td>
<td>C:\Xilinx\14.7\ISE_DS\PlanAhead</td>
<td><font color=gray>C:\Xilinx\14.7\ISE_DS\PlanAhead</font></td>
<td>C:\Xilinx\14.7\ISE_DS\PlanAhead</td>
<td>C:\Xilinx\14.7\ISE_DS\PlanAhead</td>
</tr>
</TABLE>
<A NAME="Synthesis Property Settings"></A>
@@ -344,6 +344,42 @@
<td>0</td>
</tr>
</TABLE>
<A NAME="Translation Property Settings"></A>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TD ALIGN=CENTER COLSPAN='4'><B>Translation Property Settings </B></TD>
</tr>
<tr bgcolor='#ffff99'>
<td><b>Switch Name</b></td>
<td><b>Property Name</b></td>
<td><b>Value</b></td>
<td><b>Default Value</b></td>
</tr>
<tr>
<td>-intstyle</td>
<td>&nbsp;</td>
<td>ise</td>
<td>None</td>
</tr>
<tr>
<td>-dd</td>
<td>&nbsp;</td>
<td>_ngo</td>
<td>None</td>
</tr>
<tr>
<td>-p</td>
<td>&nbsp;</td>
<td>xc6slx16-csg324-2</td>
<td>None</td>
</tr>
<tr>
<td>-uc</td>
<td>&nbsp;</td>
<td>restricoes.ucf</td>
<td>None</td>
</tr>
</TABLE>
<A NAME="Map Property Settings"></A>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
@@ -434,28 +470,28 @@
<td><b>Default Value</b></td>
</tr>
<tr>
<td><font color=gray>-intstyle</font></td>
<td><font color=gray>&nbsp;</font></td>
<td><font color=gray>ise</font></td>
<td><font color=gray>&nbsp;</font></td>
<td>-intstyle</td>
<td>&nbsp;</td>
<td>ise</td>
<td>&nbsp;</td>
</tr>
<tr>
<td><font color=gray>-mt</font></td>
<td><font color=gray>Enable Multi-Threading</font></td>
<td><font color=gray>off</font></td>
<td><font color=gray>off</font></td>
<td>-mt</td>
<td>Enable Multi-Threading</td>
<td>off</td>
<td>off</td>
</tr>
<tr>
<td><font color=gray>-ol</font></td>
<td><font color=gray>Place & Route Effort Level (Overall)</font></td>
<td><font color=gray>high</font></td>
<td><font color=gray>std</font></td>
<td>-ol</td>
<td>Place & Route Effort Level (Overall)</td>
<td>high</td>
<td>std</td>
</tr>
<tr>
<td><font color=gray>-w</font></td>
<td><font color=gray>&nbsp;</font></td>
<td><font color=gray>true</font></td>
<td><font color=gray>false</font></td>
<td>-w</td>
<td>&nbsp;</td>
<td>true</td>
<td>false</td>
</tr>
</TABLE>
<A NAME="Operating System Information"></A>
@@ -473,30 +509,30 @@
<tr>
<td>CPU Architecture/Speed</td>
<td>Intel(R) Core(TM)2 Duo CPU T9600 @ 2.80GHz/2793 MHz</td>
<td><font color=gray>&lt;&nbsp; data not available &nbsp;&gt;</font></td>
<td>Intel(R) Core(TM)2 Duo CPU T9600 @ 2.80GHz/2793 MHz</td>
<td><font color=gray>Intel(R) Core(TM)2 Duo CPU T9600 @ 2.80GHz/2793 MHz</font></td>
<td>Intel(R) Core(TM)2 Duo CPU T9600 @ 2.80GHz/2793 MHz</td>
<td>Intel(R) Core(TM)2 Duo CPU T9600 @ 2.80GHz/2793 MHz</td>
</tr>
<tr>
<td>Host</td>
<td>GABRIEL-E5400</td>
<td><font color=gray>&lt;&nbsp; data not available &nbsp;&gt;</font></td>
<td>GABRIEL-E5400</td>
<td><font color=gray>GABRIEL-E5400</font></td>
<td>GABRIEL-E5400</td>
<td>GABRIEL-E5400</td>
</tr>
<tr>
<td>OS Name</td>
<td>Microsoft Windows 7 , 64-bit</td>
<td><font color=gray>&lt;&nbsp; data not available &nbsp;&gt;</font></td>
<td>Microsoft Windows 7 , 64-bit</td>
<td><font color=gray>Microsoft Windows 7 , 64-bit</font></td>
<td>Microsoft Windows 7 , 64-bit</td>
<td>Microsoft Windows 7 , 64-bit</td>
</tr>
<tr>
<td>OS Release</td>
<td>Service Pack 1 (build 7601)</td>
<td><font color=gray>&lt;&nbsp; data not available &nbsp;&gt;</font></td>
<td>Service Pack 1 (build 7601)</td>
<td><font color=gray>Service Pack 1 (build 7601)</font></td>
<td>Service Pack 1 (build 7601)</td>
<td>Service Pack 1 (build 7601)</td>
</tr>
</TABLE>
</BODY> </HTML>

2
textovhdl_guide.ncd
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62
textovhdl_map.map
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@@ -10,7 +10,7 @@ Target Device : xc6slx16
Target Package : csg324
Target Speed : -2
Mapper Version : spartan6 -- $Revision: 1.55 $
Mapped Date : Wed Jun 01 12:51:10 2022
Mapped Date : Wed Jun 01 13:02:23 2022
Mapping design into LUTs...
Running directed packing...
@@ -23,13 +23,13 @@ Total REAL time at the beginning of Placer: 5 secs
Total CPU time at the beginning of Placer: 5 secs
Phase 1.1 Initial Placement Analysis
Phase 1.1 Initial Placement Analysis (Checksum:7e94597e) REAL time: 5 secs
Phase 1.1 Initial Placement Analysis (Checksum:996cd345) REAL time: 5 secs
Phase 2.7 Design Feasibility Check
Phase 2.7 Design Feasibility Check (Checksum:7e94597e) REAL time: 5 secs
Phase 2.7 Design Feasibility Check (Checksum:996cd345) REAL time: 5 secs
Phase 3.31 Local Placement Optimization
Phase 3.31 Local Placement Optimization (Checksum:7e94597e) REAL time: 5 secs
Phase 3.31 Local Placement Optimization (Checksum:996cd345) REAL time: 5 secs
Phase 4.2 Initial Placement for Architecture Specific Features
@@ -47,38 +47,38 @@ WARNING:Place:1109 - A clock IOB / BUFGMUX clock component pair have been found
lead to very poor timing results. It is recommended that this error condition
be corrected in the design.
Phase 4.2 Initial Placement for Architecture Specific Features
(Checksum:60f7af33) REAL time: 6 secs
(Checksum:e4d73fc) REAL time: 6 secs
Phase 5.36 Local Placement Optimization
Phase 5.36 Local Placement Optimization (Checksum:60f7af33) REAL time: 6 secs
Phase 5.36 Local Placement Optimization (Checksum:e4d73fc) REAL time: 6 secs
Phase 6.30 Global Clock Region Assignment
Phase 6.30 Global Clock Region Assignment (Checksum:60f7af33) REAL time: 6 secs
Phase 6.30 Global Clock Region Assignment (Checksum:e4d73fc) REAL time: 6 secs
Phase 7.3 Local Placement Optimization
Phase 7.3 Local Placement Optimization (Checksum:60f7af33) REAL time: 6 secs
Phase 7.3 Local Placement Optimization (Checksum:e4d73fc) REAL time: 6 secs
Phase 8.5 Local Placement Optimization
Phase 8.5 Local Placement Optimization (Checksum:60f7af33) REAL time: 6 secs
Phase 8.5 Local Placement Optimization (Checksum:e4d73fc) REAL time: 6 secs
Phase 9.8 Global Placement
..
..
Phase 9.8 Global Placement (Checksum:35ded3b9) REAL time: 6 secs
......
......
Phase 9.8 Global Placement (Checksum:65128a07) REAL time: 6 secs
Phase 10.5 Local Placement Optimization
Phase 10.5 Local Placement Optimization (Checksum:35ded3b9) REAL time: 6 secs
Phase 10.5 Local Placement Optimization (Checksum:65128a07) REAL time: 6 secs
Phase 11.18 Placement Optimization
Phase 11.18 Placement Optimization (Checksum:436df9b9) REAL time: 6 secs
Phase 11.18 Placement Optimization (Checksum:184167b7) REAL time: 7 secs
Phase 12.5 Local Placement Optimization
Phase 12.5 Local Placement Optimization (Checksum:436df9b9) REAL time: 6 secs
Phase 12.5 Local Placement Optimization (Checksum:184167b7) REAL time: 7 secs
Phase 13.34 Placement Validation
Phase 13.34 Placement Validation (Checksum:436df9b9) REAL time: 6 secs
Phase 13.34 Placement Validation (Checksum:184167b7) REAL time: 7 secs
Total REAL time to Placer completion: 6 secs
Total REAL time to Placer completion: 7 secs
Total CPU time to Placer completion: 6 secs
Running post-placement packing...
Writing output files...
@@ -95,34 +95,28 @@ Slice Logic Utilization:
Number used as Latches: 0
Number used as Latch-thrus: 0
Number used as AND/OR logics: 0
Number of Slice LUTs: 110 out of 9,112 1%
Number of Slice LUTs: 113 out of 9,112 1%
Number used as logic: 103 out of 9,112 1%
Number using O6 output only: 57
Number using O5 output only: 12
Number using O5 and O6: 34
Number used as ROM: 0
Number used as Memory: 1 out of 2,176 1%
Number used as Dual Port RAM: 0
Number used as Single Port RAM: 0
Number used as Shift Register: 1
Number using O6 output only: 1
Number using O5 output only: 0
Number using O5 and O6: 0
Number used exclusively as route-thrus: 6
Number with same-slice register load: 4
Number used as Memory: 0 out of 2,176 0%
Number used exclusively as route-thrus: 10
Number with same-slice register load: 8
Number with same-slice carry load: 2
Number with other load: 0
Slice Logic Distribution:
Number of occupied Slices: 36 out of 2,278 1%
Number of occupied Slices: 34 out of 2,278 1%
Number of MUXCYs used: 44 out of 4,556 1%
Number of LUT Flip Flop pairs used: 120
Number with an unused Flip Flop: 40 out of 120 33%
Number with an unused LUT: 10 out of 120 8%
Number of fully used LUT-FF pairs: 70 out of 120 58%
Number of LUT Flip Flop pairs used: 116
Number with an unused Flip Flop: 40 out of 116 34%
Number with an unused LUT: 3 out of 116 2%
Number of fully used LUT-FF pairs: 73 out of 116 62%
Number of unique control sets: 9
Number of slice register sites lost
to control set restrictions: 38 out of 18,224 1%
to control set restrictions: 31 out of 18,224 1%
A LUT Flip Flop pair for this architecture represents one LUT paired with
one Flip Flop within a slice. A control set is a unique combination of
@@ -162,7 +156,7 @@ Specific Feature Utilization:
Number of STARTUPs: 0 out of 1 0%
Number of SUSPEND_SYNCs: 0 out of 1 0%
Average Fanout of Non-Clock Nets: 2.68
Average Fanout of Non-Clock Nets: 2.66
Peak Memory Usage: 349 MB
Total REAL time to MAP completion: 7 secs

30
textovhdl_map.mrp
View File

@@ -10,7 +10,7 @@ Target Device : xc6slx16
Target Package : csg324
Target Speed : -2
Mapper Version : spartan6 -- $Revision: 1.55 $
Mapped Date : Wed Jun 01 12:51:10 2022
Mapped Date : Wed Jun 01 13:02:23 2022
Design Summary
--------------
@@ -22,34 +22,28 @@ Slice Logic Utilization:
Number used as Latches: 0
Number used as Latch-thrus: 0
Number used as AND/OR logics: 0
Number of Slice LUTs: 110 out of 9,112 1%
Number of Slice LUTs: 113 out of 9,112 1%
Number used as logic: 103 out of 9,112 1%
Number using O6 output only: 57
Number using O5 output only: 12
Number using O5 and O6: 34
Number used as ROM: 0
Number used as Memory: 1 out of 2,176 1%
Number used as Dual Port RAM: 0
Number used as Single Port RAM: 0
Number used as Shift Register: 1
Number using O6 output only: 1
Number using O5 output only: 0
Number using O5 and O6: 0
Number used exclusively as route-thrus: 6
Number with same-slice register load: 4
Number used as Memory: 0 out of 2,176 0%
Number used exclusively as route-thrus: 10
Number with same-slice register load: 8
Number with same-slice carry load: 2
Number with other load: 0
Slice Logic Distribution:
Number of occupied Slices: 36 out of 2,278 1%
Number of occupied Slices: 34 out of 2,278 1%
Number of MUXCYs used: 44 out of 4,556 1%
Number of LUT Flip Flop pairs used: 120
Number with an unused Flip Flop: 40 out of 120 33%
Number with an unused LUT: 10 out of 120 8%
Number of fully used LUT-FF pairs: 70 out of 120 58%
Number of LUT Flip Flop pairs used: 116
Number with an unused Flip Flop: 40 out of 116 34%
Number with an unused LUT: 3 out of 116 2%
Number of fully used LUT-FF pairs: 73 out of 116 62%
Number of unique control sets: 9
Number of slice register sites lost
to control set restrictions: 38 out of 18,224 1%
to control set restrictions: 31 out of 18,224 1%
A LUT Flip Flop pair for this architecture represents one LUT paired with
one Flip Flop within a slice. A control set is a unique combination of
@@ -89,7 +83,7 @@ Specific Feature Utilization:
Number of STARTUPs: 0 out of 1 0%
Number of SUSPEND_SYNCs: 0 out of 1 0%
Average Fanout of Non-Clock Nets: 2.68
Average Fanout of Non-Clock Nets: 2.66
Peak Memory Usage: 349 MB
Total REAL time to MAP completion: 7 secs

2
textovhdl_map.ncd
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2
textovhdl_map.ngm
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28
textovhdl_map.xrpt
View File

@@ -5,7 +5,7 @@
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application stringID="Map" timeStamp="Wed Jun 01 12:51:17 2022">
<application stringID="Map" timeStamp="Wed Jun 01 13:02:31 2022">
<section stringID="User_Env">
<table stringID="User_EnvVar">
<column stringID="variable"/>
@@ -71,7 +71,7 @@
<item dataType="int" stringID="MAP_NUM_SLICE_LATCHTHRU" value="0"/>
<item dataType="int" stringID="MAP_NUM_SLICE_LATCHLOGIC" value="0"/>
</item>
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTs" stringID="MAP_SLICE_LUTS" value="106">
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTs" stringID="MAP_SLICE_LUTS" value="105">
<item dataType="int" label="Number using O5 output only" stringID="MAP_NUM_LOGIC_O5ONLY" value="12"/>
<item dataType="int" label="Number using O6 output only" stringID="MAP_NUM_LOGIC_O6ONLY" value="57"/>
<item dataType="int" label="Number using O5 and O6" stringID="MAP_NUM_LOGIC_O5ANDO6" value="34"/>
@@ -85,7 +85,7 @@
<item dataType="int" stringID="MAP_NUM_SPRAM_O6ONLY" value="0"/>
<item dataType="int" stringID="MAP_NUM_SPRAM_O5ANDO6" value="0"/>
<item dataType="int" stringID="MAP_NUM_SRL_O5ONLY" value="0"/>
<item dataType="int" stringID="MAP_NUM_SRL_O6ONLY" value="1"/>
<item dataType="int" stringID="MAP_NUM_SRL_O6ONLY" value="0"/>
<item dataType="int" stringID="MAP_NUM_SRL_O5ANDO6" value="0"/>
<item dataType="int" stringID="MAP_NUM_LUT_RT_EXO6" value="2"/>
<item dataType="int" stringID="MAP_NUM_LUT_RT_EXO5" value="0"/>
@@ -117,7 +117,7 @@
<item dataType="int" stringID="MAP_NUM_ERRORS" value="0"/>
<item dataType="int" stringID="MAP_FILTERED_WARNINGS" value="0"/>
<item dataType="int" stringID="MAP_NUM_WARNINGS" value="1"/>
<item UNITS="KB" dataType="int" stringID="MAP_PEAK_MEMORY" value="356940"/>
<item UNITS="KB" dataType="int" stringID="MAP_PEAK_MEMORY" value="357260"/>
<item stringID="MAP_TOTAL_REAL_TIME" value="7 secs "/>
<item stringID="MAP_TOTAL_CPU_TIME" value="7 secs "/>
</section>
@@ -128,7 +128,7 @@
<item dataType="int" stringID="MAP_NUM_SLICE_LATCHTHRU" value="0"/>
<item dataType="int" stringID="MAP_NUM_SLICE_LATCHLOGIC" value="0"/>
</item>
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTs" stringID="MAP_SLICE_LUTS" value="110">
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTs" stringID="MAP_SLICE_LUTS" value="113">
<item dataType="int" label="Number using O5 output only" stringID="MAP_NUM_LOGIC_O5ONLY" value="12"/>
<item dataType="int" label="Number using O6 output only" stringID="MAP_NUM_LOGIC_O6ONLY" value="57"/>
<item dataType="int" label="Number using O5 and O6" stringID="MAP_NUM_LOGIC_O5ANDO6" value="34"/>
@@ -142,24 +142,24 @@
<item dataType="int" stringID="MAP_NUM_SPRAM_O6ONLY" value="0"/>
<item dataType="int" stringID="MAP_NUM_SPRAM_O5ANDO6" value="0"/>
<item dataType="int" stringID="MAP_NUM_SRL_O5ONLY" value="0"/>
<item dataType="int" stringID="MAP_NUM_SRL_O6ONLY" value="1"/>
<item dataType="int" stringID="MAP_NUM_SRL_O6ONLY" value="0"/>
<item dataType="int" stringID="MAP_NUM_SRL_O5ANDO6" value="0"/>
<item dataType="int" stringID="MAP_NUM_LUT_RT_EXO6" value="2"/>
<item dataType="int" stringID="MAP_NUM_LUT_RT_EXO5" value="4"/>
<item dataType="int" stringID="MAP_NUM_LUT_RT_EXO5" value="8"/>
<item dataType="int" stringID="MAP_NUM_LUT_RT_O5ANDO6" value="0"/>
<item dataType="int" stringID="MAP_NUM_LUT_RT_DRIVES_FLOP" value="4"/>
<item dataType="int" stringID="MAP_NUM_LUT_RT_DRIVES_FLOP" value="8"/>
<item dataType="int" stringID="MAP_NUM_LUT_RT_DRIVES_CARRY4" value="2"/>
<item dataType="int" stringID="MAP_NUM_LUT_RT_DRIVES_OTHERS" value="0"/>
</item>
<item AVAILABLE="2278" dataType="int" label="Number of occupied Slices" stringID="MAP_OCCUPIED_SLICES" value="36">
<item AVAILABLE="2278" dataType="int" label="Number of occupied Slices" stringID="MAP_OCCUPIED_SLICES" value="34">
<item AVAILABLE="595" dataType="int" stringID="MAP_NUM_SLICEL" value="11"/>
<item AVAILABLE="544" dataType="int" stringID="MAP_NUM_SLICEM" value="1"/>
<item AVAILABLE="1139" dataType="int" stringID="MAP_NUM_SLICEX" value="24"/>
<item AVAILABLE="544" dataType="int" stringID="MAP_NUM_SLICEM" value="0"/>
<item AVAILABLE="1139" dataType="int" stringID="MAP_NUM_SLICEX" value="23"/>
</item>
<item dataType="int" label="Number of LUT Flip Flop pairs used" stringID="MAP_OCCUPIED_LUT_AND_FF" value="120">
<item dataType="int" label="Number of LUT Flip Flop pairs used" stringID="MAP_OCCUPIED_LUT_AND_FF" value="116">
<item dataType="int" stringID="MAP_OCCUPIED_LUT_ONLY" value="40"/>
<item dataType="int" label="Number with an unused LUT" stringID="MAP_OCCUPIED_FF_ONLY" value="10"/>
<item dataType="int" label="Number of fully used LUT-FF pairs" stringID="MAP_OCCUPIED_FF_AND_LUT" value="70"/>
<item dataType="int" label="Number with an unused LUT" stringID="MAP_OCCUPIED_FF_ONLY" value="3"/>
<item dataType="int" label="Number of fully used LUT-FF pairs" stringID="MAP_OCCUPIED_FF_AND_LUT" value="73"/>
</item>
</section>
<section stringID="MAP_IOB_REPORTING">

2
textovhdl_pad.csv
View File

@@ -1,7 +1,7 @@
#Release 14.7 - par P.20131013 (nt64)
#Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
#Wed Jun 01 12:51:27 2022
#Wed Jun 01 13:02:40 2022
#
## NOTE: This file is designed to be imported into a spreadsheet program
1 #Release 14.7 - par P.20131013 (nt64)
2 #Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
3 #Wed Jun 01 12:51:27 2022 #Wed Jun 01 13:02:40 2022
4 #
5 ## NOTE: This file is designed to be imported into a spreadsheet program
6 # such as Microsoft Excel for viewing, printing and sorting. The |
7 # character is used as the data field separator. This file is also designed

2
textovhdl_pad.txt
View File

@@ -1,7 +1,7 @@
Release 14.7 - par P.20131013 (nt64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Wed Jun 01 12:51:27 2022
Wed Jun 01 13:02:40 2022
INFO: The IO information is provided in three file formats as part of the Place and Route (PAR) process. These formats are:

26
textovhdl_par.xrpt
View File

@@ -5,7 +5,7 @@
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application stringID="par" timeStamp="Wed Jun 01 12:51:24 2022">
<application stringID="par" timeStamp="Wed Jun 01 13:02:37 2022">
<section stringID="User_Env">
<table stringID="User_EnvVar">
<column stringID="variable"/>
@@ -63,7 +63,7 @@
<item stringID="PAR_CPU_TIME_COMPLETION_ROUTER" value="6 secs "/>
<item dataType="int" stringID="PAR_UNROUTES" value="0"/>
<item dataType="float" stringID="PAR_TIMING_SCORE" value="0.000000"/>
<item stringID="PAR_REAL_TIME_COMPLETION_PAR" value="7 secs "/>
<item stringID="PAR_REAL_TIME_COMPLETION_PAR" value="6 secs "/>
<item stringID="PAR_CPU_TIME_COMPLETION_PAR" value="6 secs "/>
</section>
</task>
@@ -2296,7 +2296,7 @@
</task>
</application>
<application stringID="Par" timeStamp="Wed Jun 01 12:51:24 2022">
<application stringID="Par" timeStamp="Wed Jun 01 13:02:37 2022">
<section stringID="User_Env">
<table stringID="User_EnvVar">
<column stringID="variable"/>
@@ -2348,7 +2348,7 @@
<item dataType="int" stringID="PAR_NUM_SLICE_LATCHTHRU" value="0"/>
<item dataType="int" stringID="PAR_NUM_SLICE_LATCHLOGIC" value="0"/>
</item>
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTS" stringID="PAR_SLICE_LUTS" value="110">
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTS" stringID="PAR_SLICE_LUTS" value="113">
<item dataType="int" stringID="PAR_NUM_LOGIC_O5ONLY" value="12"/>
<item dataType="int" stringID="PAR_NUM_LOGIC_O6ONLY" value="57"/>
<item dataType="int" stringID="PAR_NUM_LOGIC_O5ANDO6" value="34"/>
@@ -2362,24 +2362,24 @@
<item dataType="int" stringID="PAR_NUM_SPRAM_O6ONLY" value="0"/>
<item dataType="int" stringID="PAR_NUM_SPRAM_O5ANDO6" value="0"/>
<item dataType="int" stringID="PAR_NUM_SRL_O5ONLY" value="0"/>
<item dataType="int" stringID="PAR_NUM_SRL_O6ONLY" value="1"/>
<item dataType="int" stringID="PAR_NUM_SRL_O6ONLY" value="0"/>
<item dataType="int" stringID="PAR_NUM_SRL_O5ANDO6" value="0"/>
<item dataType="int" stringID="PAR_NUM_LUT_RT_EXO6" value="2"/>
<item dataType="int" stringID="PAR_NUM_LUT_RT_EXO5" value="4"/>
<item dataType="int" stringID="PAR_NUM_LUT_RT_EXO5" value="8"/>
<item dataType="int" stringID="PAR_NUM_LUT_RT_O5ANDO6" value="0"/>
<item dataType="int" stringID="PAR_NUM_LUT_RT_DRIVES_FLOP" value="4"/>
<item dataType="int" stringID="PAR_NUM_LUT_RT_DRIVES_FLOP" value="8"/>
<item dataType="int" stringID="PAR_NUM_LUT_RT_DRIVES_CARRY4" value="2"/>
<item dataType="int" stringID="PAR_NUM_LUT_RT_DRIVES_OTHERS" value="0"/>
</item>
<item AVAILABLE="2278" dataType="int" stringID="PAR_OCCUPIED_SLICES" value="36">
<item AVAILABLE="2278" dataType="int" stringID="PAR_OCCUPIED_SLICES" value="34">
<item AVAILABLE="595" dataType="int" stringID="PAR_NUM_SLICEL" value="11"/>
<item AVAILABLE="544" dataType="int" stringID="PAR_NUM_SLICEM" value="1"/>
<item AVAILABLE="1139" dataType="int" stringID="PAR_NUM_SLICEX" value="24"/>
<item AVAILABLE="544" dataType="int" stringID="PAR_NUM_SLICEM" value="0"/>
<item AVAILABLE="1139" dataType="int" stringID="PAR_NUM_SLICEX" value="23"/>
</item>
<item dataType="int" stringID="PAR_OCCUPIED_LUT_AND_FF" value="120">
<item dataType="int" stringID="PAR_OCCUPIED_LUT_AND_FF" value="116">
<item dataType="int" stringID="PAR_OCCUPIED_LUT_ONLY" value="40"/>
<item dataType="int" stringID="PAR_OCCUPIED_FF_ONLY" value="10"/>
<item dataType="int" stringID="PAR_OCCUPIED_FF_AND_LUT" value="70"/>
<item dataType="int" stringID="PAR_OCCUPIED_FF_ONLY" value="3"/>
<item dataType="int" stringID="PAR_OCCUPIED_FF_AND_LUT" value="73"/>
</item>
</section>
<section stringID="PAR_IOB_REPORTING">

92
textovhdl_summary.html
View File

@@ -2,7 +2,7 @@
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TD ALIGN=CENTER COLSPAN='4'><B>textovhdl Project Status (06/01/2022 - 12:51:49)</B></TD></TR>
<TD ALIGN=CENTER COLSPAN='4'><B>textovhdl Project Status (06/01/2022 - 13:03:03)</B></TD></TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
<TD>Aula20220601.xise</TD>
@@ -25,7 +25,7 @@ No Errors</TD>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>ISE 14.7</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
<TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/*.xmsgs?&DataKey=Warning'>64 Warnings (1 new)</A></TD>
<TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/*.xmsgs?&DataKey=Warning'>96 Warnings (32 new)</A></TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Design Goal:</B></dif></TD>
@@ -90,7 +90,7 @@ System Settings</A>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice LUTs</TD>
<TD ALIGN=RIGHT>110</TD>
<TD ALIGN=RIGHT>113</TD>
<TD ALIGN=RIGHT>9,112</TD>
<TD ALIGN=RIGHT>1%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
@@ -126,55 +126,19 @@ System Settings</A>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number used as Memory</TD>
<TD ALIGN=RIGHT>1</TD>
<TD ALIGN=RIGHT>0</TD>
<TD ALIGN=RIGHT>2,176</TD>
<TD ALIGN=RIGHT>1%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Number used as Dual Port RAM</TD>
<TD ALIGN=RIGHT>0</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Number used as Single Port RAM</TD>
<TD ALIGN=RIGHT>0</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Number used as Shift Register</TD>
<TD ALIGN=RIGHT>1</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Number using O6 output only</TD>
<TD ALIGN=RIGHT>1</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Number using O5 output only</TD>
<TD ALIGN=RIGHT>0</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Number using O5 and O6</TD>
<TD ALIGN=RIGHT>0</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD ALIGN=RIGHT>0%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number used exclusively as route-thrus</TD>
<TD ALIGN=RIGHT>6</TD>
<TD ALIGN=RIGHT>10</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Number with same-slice register load</TD>
<TD ALIGN=RIGHT>4</TD>
<TD ALIGN=RIGHT>8</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
@@ -192,7 +156,7 @@ System Settings</A>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of occupied Slices</TD>
<TD ALIGN=RIGHT>36</TD>
<TD ALIGN=RIGHT>34</TD>
<TD ALIGN=RIGHT>2,278</TD>
<TD ALIGN=RIGHT>1%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
@@ -204,27 +168,27 @@ System Settings</A>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of LUT Flip Flop pairs used</TD>
<TD ALIGN=RIGHT>120</TD>
<TD ALIGN=RIGHT>116</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number with an unused Flip Flop</TD>
<TD ALIGN=RIGHT>40</TD>
<TD ALIGN=RIGHT>120</TD>
<TD ALIGN=RIGHT>33%</TD>
<TD ALIGN=RIGHT>116</TD>
<TD ALIGN=RIGHT>34%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number with an unused LUT</TD>
<TD ALIGN=RIGHT>10</TD>
<TD ALIGN=RIGHT>120</TD>
<TD ALIGN=RIGHT>8%</TD>
<TD ALIGN=RIGHT>3</TD>
<TD ALIGN=RIGHT>116</TD>
<TD ALIGN=RIGHT>2%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number of fully used LUT-FF pairs</TD>
<TD ALIGN=RIGHT>70</TD>
<TD ALIGN=RIGHT>120</TD>
<TD ALIGN=RIGHT>58%</TD>
<TD ALIGN=RIGHT>73</TD>
<TD ALIGN=RIGHT>116</TD>
<TD ALIGN=RIGHT>62%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number of unique control sets</TD>
@@ -234,7 +198,7 @@ System Settings</A>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number of slice register sites lost<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;to control set restrictions</TD>
<TD ALIGN=RIGHT>38</TD>
<TD ALIGN=RIGHT>31</TD>
<TD ALIGN=RIGHT>18,224</TD>
<TD ALIGN=RIGHT>1%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
@@ -408,7 +372,7 @@ System Settings</A>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Average Fanout of Non-Clock Nets</TD>
<TD ALIGN=RIGHT>2.68</TD>
<TD ALIGN=RIGHT>2.66</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
@@ -445,21 +409,21 @@ System Settings</A>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\textovhdl.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Wed Jun 1 12:50:59 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/xst.xmsgs?&DataKey=Warning'>45 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/xst.xmsgs?&DataKey=Info'>3 Infos (1 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\textovhdl.bld'>Translation Report</A></TD><TD>Current</TD><TD>Wed Jun 1 12:51:07 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>4 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\textovhdl_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Wed Jun 1 12:51:17 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/map.xmsgs?&DataKey=Warning'>1 Warning (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/map.xmsgs?&DataKey=Info'>8 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\textovhdl.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Wed Jun 1 12:51:27 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/par.xmsgs?&DataKey=Warning'>14 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/par.xmsgs?&DataKey=Info'>3 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\textovhdl.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Wed Jun 1 13:02:10 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/xst.xmsgs?&DataKey=Warning'>77 Warnings (32 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/xst.xmsgs?&DataKey=Info'>3 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\textovhdl.bld'>Translation Report</A></TD><TD>Current</TD><TD>Wed Jun 1 13:02:20 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>4 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\textovhdl_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Wed Jun 1 13:02:31 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/map.xmsgs?&DataKey=Warning'>1 Warning (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/map.xmsgs?&DataKey=Info'>8 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\textovhdl.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Wed Jun 1 13:02:40 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/par.xmsgs?&DataKey=Warning'>14 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/par.xmsgs?&DataKey=Info'>3 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD>Power Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\textovhdl.twr'>Post-PAR Static Timing Report</A></TD><TD>Current</TD><TD>Wed Jun 1 12:51:34 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/trce.xmsgs?&DataKey=Info'>4 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\textovhdl.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Wed Jun 1 12:51:46 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\textovhdl.twr'>Post-PAR Static Timing Report</A></TD><TD>Current</TD><TD>Wed Jun 1 13:02:47 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\_xmsgs/trce.xmsgs?&DataKey=Info'>4 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\textovhdl.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Wed Jun 1 13:03:00 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
</TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='3'><B>Secondary Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=SecondaryReports"><B>[-]</B></a></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD COLSPAN='2'><B>Generated</B></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\usage_statistics_webtalk.html'>WebTalk Report</A></TD><TD>Current</TD><TD COLSPAN='2'>Wed Jun 1 12:51:47 2022</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\webtalk.log'>WebTalk Log File</A></TD><TD>Current</TD><TD COLSPAN='2'>Wed Jun 1 12:51:48 2022</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\usage_statistics_webtalk.html'>WebTalk Report</A></TD><TD>Current</TD><TD COLSPAN='2'>Wed Jun 1 13:03:00 2022</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Gabriel/Xilinx/Aula20220601\webtalk.log'>WebTalk Log File</A></TD><TD>Current</TD><TD COLSPAN='2'>Wed Jun 1 13:03:02 2022</TD></TR>
</TABLE>
<br><center><b>Date Generated:</b> 06/01/2022 - 12:51:49</center>
<br><center><b>Date Generated:</b> 06/01/2022 - 13:03:03</center>
</BODY></HTML>

2
textovhdl_summary.xml
View File

@@ -4,7 +4,7 @@
changes made to this file may result in unpredictable
behavior or data corruption. It is strongly advised that
users do not edit the contents of this file. -->
<DesignSummary rev="15">
<DesignSummary rev="17">
<CmdHistory>
</CmdHistory>
</DesignSummary>

688
textovhdl_usage.xml
View File

@@ -4,218 +4,192 @@
changes made to this file may result in unpredictable
behavior or data corruption. It is strongly advised that
users do not edit the contents of this file. -->
<DeviceUsageSummary rev="15">
<DesignStatistics TimeStamp="Wed Jun 01 12:51:46 2022"><group name="NetStatistics">
<item name="NumNets_Active" rev="15">
<DeviceUsageSummary rev="17">
<DesignStatistics TimeStamp="Wed Jun 01 13:02:59 2022"><group name="NetStatistics">
<item name="NumNets_Active" rev="17">
<attrib name="value" value="183"/></item>
<item name="NumNets_Gnd" rev="15">
<item name="NumNets_Gnd" rev="17">
<attrib name="value" value="1"/></item>
<item name="NumNets_Vcc" rev="15">
<item name="NumNets_Vcc" rev="17">
<attrib name="value" value="1"/></item>
<item name="NumNodesOfType_Active_BOUNCEACROSS" rev="15">
<attrib name="value" value="7"/></item>
<item name="NumNodesOfType_Active_BOUNCEIN" rev="15">
<attrib name="value" value="17"/></item>
<item name="NumNodesOfType_Active_BUFGOUT" rev="15">
<item name="NumNodesOfType_Active_BOUNCEACROSS" rev="17">
<attrib name="value" value="4"/></item>
<item name="NumNodesOfType_Active_BOUNCEIN" rev="17">
<attrib name="value" value="21"/></item>
<item name="NumNodesOfType_Active_BUFGOUT" rev="17">
<attrib name="value" value="3"/></item>
<item name="NumNodesOfType_Active_BUFHINP2OUT" rev="15">
<item name="NumNodesOfType_Active_BUFHINP2OUT" rev="17">
<attrib name="value" value="5"/></item>
<item name="NumNodesOfType_Active_CLKPIN" rev="15">
<attrib name="value" value="29"/></item>
<item name="NumNodesOfType_Active_CLKPINFEED" rev="15">
<item name="NumNodesOfType_Active_CLKPIN" rev="17">
<attrib name="value" value="28"/></item>
<item name="NumNodesOfType_Active_CLKPINFEED" rev="17">
<attrib name="value" value="13"/></item>
<item name="NumNodesOfType_Active_CNTRLPIN" rev="15">
<attrib name="value" value="14"/></item>
<item name="NumNodesOfType_Active_DOUBLE" rev="15">
<attrib name="value" value="102"/></item>
<item name="NumNodesOfType_Active_GENERIC" rev="15">
<item name="NumNodesOfType_Active_CNTRLPIN" rev="17">
<attrib name="value" value="13"/></item>
<item name="NumNodesOfType_Active_DOUBLE" rev="17">
<attrib name="value" value="93"/></item>
<item name="NumNodesOfType_Active_GENERIC" rev="17">
<attrib name="value" value="9"/></item>
<item name="NumNodesOfType_Active_GLOBAL" rev="15">
<attrib name="value" value="30"/></item>
<item name="NumNodesOfType_Active_INPUT" rev="15">
<attrib name="value" value="12"/></item>
<item name="NumNodesOfType_Active_IOBIN2OUT" rev="15">
<item name="NumNodesOfType_Active_GLOBAL" rev="17">
<attrib name="value" value="27"/></item>
<item name="NumNodesOfType_Active_INPUT" rev="17">
<attrib name="value" value="11"/></item>
<item name="NumNodesOfType_Active_IOBIN2OUT" rev="17">
<attrib name="value" value="7"/></item>
<item name="NumNodesOfType_Active_IOBOUTPUT" rev="15">
<item name="NumNodesOfType_Active_IOBOUTPUT" rev="17">
<attrib name="value" value="7"/></item>
<item name="NumNodesOfType_Active_LUTINPUT" rev="15">
<item name="NumNodesOfType_Active_LUTINPUT" rev="17">
<attrib name="value" value="357"/></item>
<item name="NumNodesOfType_Active_OUTBOUND" rev="15">
<attrib name="value" value="138"/></item>
<item name="NumNodesOfType_Active_OUTPUT" rev="15">
<attrib name="value" value="151"/></item>
<item name="NumNodesOfType_Active_PADINPUT" rev="15">
<item name="NumNodesOfType_Active_OUTBOUND" rev="17">
<attrib name="value" value="136"/></item>
<item name="NumNodesOfType_Active_OUTPUT" rev="17">
<attrib name="value" value="149"/></item>
<item name="NumNodesOfType_Active_PADINPUT" rev="17">
<attrib name="value" value="6"/></item>
<item name="NumNodesOfType_Active_PADOUTPUT" rev="15">
<item name="NumNodesOfType_Active_PADOUTPUT" rev="17">
<attrib name="value" value="2"/></item>
<item name="NumNodesOfType_Active_PINBOUNCE" rev="15">
<attrib name="value" value="81"/></item>
<item name="NumNodesOfType_Active_PINFEED" rev="15">
<attrib name="value" value="406"/></item>
<item name="NumNodesOfType_Active_PINFEED2" rev="15">
<item name="NumNodesOfType_Active_PINBOUNCE" rev="17">
<attrib name="value" value="68"/></item>
<item name="NumNodesOfType_Active_PINFEED" rev="17">
<attrib name="value" value="405"/></item>
<item name="NumNodesOfType_Active_PINFEED2" rev="17">
<attrib name="value" value="3"/></item>
<item name="NumNodesOfType_Active_QUAD" rev="15">
<attrib name="value" value="61"/></item>
<item name="NumNodesOfType_Active_REGINPUT" rev="15">
<attrib name="value" value="14"/></item>
<item name="NumNodesOfType_Active_SINGLE" rev="15">
<attrib name="value" value="228"/></item>
<item name="NumNodesOfType_Gnd_DOUBLE" rev="15">
<attrib name="value" value="1"/></item>
<item name="NumNodesOfType_Gnd_GENERIC" rev="15">
<attrib name="value" value="1"/></item>
<item name="NumNodesOfType_Gnd_IOBIN2OUT" rev="15">
<attrib name="value" value="1"/></item>
<item name="NumNodesOfType_Gnd_IOBOUTPUT" rev="15">
<attrib name="value" value="1"/></item>
<item name="NumNodesOfType_Gnd_OUTBOUND" rev="15">
<attrib name="value" value="1"/></item>
<item name="NumNodesOfType_Gnd_OUTPUT" rev="15">
<attrib name="value" value="1"/></item>
<item name="NumNodesOfType_Gnd_PADINPUT" rev="15">
<attrib name="value" value="1"/></item>
<item name="NumNodesOfType_Gnd_PINFEED" rev="15">
<attrib name="value" value="1"/></item>
<item name="NumNodesOfType_Vcc_HVCCOUT" rev="15">
<attrib name="value" value="17"/></item>
<item name="NumNodesOfType_Vcc_KVCCOUT" rev="15">
<attrib name="value" value="1"/></item>
<item name="NumNodesOfType_Vcc_LUTINPUT" rev="15">
<attrib name="value" value="52"/></item>
<item name="NumNodesOfType_Vcc_PINFEED" rev="15">
<attrib name="value" value="52"/></item>
<item name="NumNodesOfType_Active_QUAD" rev="17">
<attrib name="value" value="64"/></item>
<item name="NumNodesOfType_Active_REGINPUT" rev="17">
<attrib name="value" value="11"/></item>
<item name="NumNodesOfType_Active_SINGLE" rev="17">
<attrib name="value" value="204"/></item>
<item name="NumNodesOfType_Vcc_HVCCOUT" rev="17">
<attrib name="value" value="18"/></item>
<item name="NumNodesOfType_Vcc_LUTINPUT" rev="17">
<attrib name="value" value="46"/></item>
<item name="NumNodesOfType_Vcc_PINFEED" rev="17">
<attrib name="value" value="46"/></item>
</group>
<group name="SiteStatistics">
<item name="BUFG-BUFGMUX" rev="15">
<item name="BUFG-BUFGMUX" rev="17">
<attrib name="value" value="3"/></item>
<item name="IOB-IOBM" rev="15">
<item name="IOB-IOBM" rev="17">
<attrib name="value" value="10"/></item>
<item name="IOB-IOBS" rev="15">
<item name="IOB-IOBS" rev="17">
<attrib name="value" value="11"/></item>
<item name="SLICEL-SLICEM" rev="15">
<attrib name="value" value="11"/></item>
<item name="SLICEX-SLICEL" rev="15">
<item name="SLICEL-SLICEM" rev="17">
<attrib name="value" value="8"/></item>
<item name="SLICEX-SLICEM" rev="15">
<attrib name="value" value="2"/></item>
<item name="SLICEX-SLICEL" rev="17">
<attrib name="value" value="6"/></item>
<item name="SLICEX-SLICEM" rev="17">
<attrib name="value" value="6"/></item>
</group>
<group name="MiscellaneousStatistics">
<item name="AGG_BONDED_IO" rev="14">
<item name="AGG_BONDED_IO" rev="16">
<attrib name="value" value="21"/></item>
<item name="AGG_IO" rev="14">
<item name="AGG_IO" rev="16">
<attrib name="value" value="21"/></item>
<item name="AGG_LOCED_IO" rev="14">
<item name="AGG_LOCED_IO" rev="16">
<attrib name="value" value="21"/></item>
<item name="AGG_SLICE" rev="14">
<attrib name="value" value="36"/></item>
<item name="NUM_BONDED_IOB" rev="14">
<attrib name="value" value="21"/></item>
<item name="NUM_BSFULL" rev="14">
<attrib name="value" value="70"/></item>
<item name="NUM_BSLUTONLY" rev="14">
<attrib name="value" value="40"/></item>
<item name="NUM_BSREGONLY" rev="14">
<attrib name="value" value="10"/></item>
<item name="NUM_BSUSED" rev="14">
<attrib name="value" value="120"/></item>
<item name="NUM_BUFG" rev="14">
<attrib name="value" value="3"/></item>
<item name="NUM_IOB_FF" rev="14">
<attrib name="value" value="3"/></item>
<item name="NUM_LOCED_IOB" rev="14">
<attrib name="value" value="21"/></item>
<item name="NUM_LOGIC_O5ANDO6" rev="14">
<item name="AGG_SLICE" rev="16">
<attrib name="value" value="34"/></item>
<item name="NUM_LOGIC_O5ONLY" rev="14">
<attrib name="value" value="12"/></item>
<item name="NUM_LOGIC_O6ONLY" rev="14">
<attrib name="value" value="57"/></item>
<item name="NUM_LUT_RT_DRIVES_CARRY4" rev="14">
<attrib name="value" value="2"/></item>
<item name="NUM_LUT_RT_DRIVES_FLOP" rev="14">
<attrib name="value" value="4"/></item>
<item name="NUM_LUT_RT_EXO5" rev="14">
<attrib name="value" value="4"/></item>
<item name="NUM_LUT_RT_EXO6" rev="14">
<attrib name="value" value="2"/></item>
<item name="NUM_LUT_RT_O6" rev="14">
<attrib name="value" value="12"/></item>
<item name="NUM_OLOGIC2" rev="14">
<item name="NUM_BONDED_IOB" rev="16">
<attrib name="value" value="21"/></item>
<item name="NUM_BSFULL" rev="16">
<attrib name="value" value="73"/></item>
<item name="NUM_BSLUTONLY" rev="16">
<attrib name="value" value="40"/></item>
<item name="NUM_BSREGONLY" rev="16">
<attrib name="value" value="3"/></item>
<item name="NUM_SLICEL" rev="14">
<item name="NUM_BSUSED" rev="16">
<attrib name="value" value="116"/></item>
<item name="NUM_BUFG" rev="16">
<attrib name="value" value="3"/></item>
<item name="NUM_IOB_FF" rev="16">
<attrib name="value" value="3"/></item>
<item name="NUM_LOCED_IOB" rev="16">
<attrib name="value" value="21"/></item>
<item name="NUM_LOGIC_O5ANDO6" rev="16">
<attrib name="value" value="34"/></item>
<item name="NUM_LOGIC_O5ONLY" rev="16">
<attrib name="value" value="12"/></item>
<item name="NUM_LOGIC_O6ONLY" rev="16">
<attrib name="value" value="57"/></item>
<item name="NUM_LUT_RT_DRIVES_CARRY4" rev="16">
<attrib name="value" value="2"/></item>
<item name="NUM_LUT_RT_DRIVES_FLOP" rev="16">
<attrib name="value" value="8"/></item>
<item name="NUM_LUT_RT_EXO5" rev="16">
<attrib name="value" value="8"/></item>
<item name="NUM_LUT_RT_EXO6" rev="16">
<attrib name="value" value="2"/></item>
<item name="NUM_LUT_RT_O6" rev="16">
<attrib name="value" value="12"/></item>
<item name="NUM_OLOGIC2" rev="16">
<attrib name="value" value="3"/></item>
<item name="NUM_SLICEL" rev="16">
<attrib name="value" value="11"/></item>
<item name="NUM_SLICEM" rev="14">
<attrib name="value" value="1"/></item>
<item name="NUM_SLICEX" rev="14">
<attrib name="value" value="24"/></item>
<item name="NUM_SLICE_CARRY4" rev="14">
<item name="NUM_SLICEX" rev="16">
<attrib name="value" value="23"/></item>
<item name="NUM_SLICE_CARRY4" rev="16">
<attrib name="value" value="11"/></item>
<item name="NUM_SLICE_CONTROLSET" rev="14">
<item name="NUM_SLICE_CONTROLSET" rev="16">
<attrib name="value" value="9"/></item>
<item name="NUM_SLICE_CYINIT" rev="14">
<attrib name="value" value="159"/></item>
<item name="NUM_SLICE_FF" rev="14">
<item name="NUM_SLICE_CYINIT" rev="16">
<attrib name="value" value="162"/></item>
<item name="NUM_SLICE_FF" rev="16">
<attrib name="value" value="89"/></item>
<item name="NUM_SLICE_UNUSEDCTRL" rev="14">
<attrib name="value" value="10"/></item>
<item name="NUM_SRL_O6ONLY" rev="14">
<attrib name="value" value="1"/></item>
<item name="NUM_UNUSABLE_FF_BELS" rev="14">
<attrib name="value" value="38"/></item>
<item name="NUM_SLICE_UNUSEDCTRL" rev="16">
<attrib name="value" value="9"/></item>
<item name="NUM_UNUSABLE_FF_BELS" rev="16">
<attrib name="value" value="31"/></item>
</group>
</DesignStatistics>
<DeviceUsage TimeStamp="Wed Jun 01 12:51:46 2022"><group name="SiteSummary">
<item name="BUFG" rev="15">
<DeviceUsage TimeStamp="Wed Jun 01 13:02:59 2022"><group name="SiteSummary">
<item name="BUFG" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="3"/></item>
<item name="BUFG_BUFG" rev="15">
<item name="BUFG_BUFG" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="3"/></item>
<item name="CARRY4" rev="15">
<item name="CARRY4" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="11"/></item>
<item name="FF_SR" rev="15">
<attrib name="total" value="1000000"/><attrib name="used" value="10"/></item>
<item name="HARD0" rev="15">
<item name="FF_SR" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="14"/></item>
<item name="HARD0" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="2"/></item>
<item name="HARD1" rev="15">
<item name="HARD1" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="1"/></item>
<item name="IOB" rev="15">
<item name="IOB" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="21"/></item>
<item name="IOB_IMUX" rev="15">
<item name="IOB_IMUX" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="14"/></item>
<item name="IOB_INBUF" rev="15">
<item name="IOB_INBUF" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="14"/></item>
<item name="IOB_OUTBUF" rev="15">
<item name="IOB_OUTBUF" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="7"/></item>
<item name="LUT5" rev="15">
<attrib name="total" value="1000000"/><attrib name="used" value="50"/></item>
<item name="LUT6" rev="15">
<item name="LUT5" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="54"/></item>
<item name="LUT6" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="105"/></item>
<item name="LUT_OR_MEM6" rev="15">
<attrib name="total" value="1000000"/><attrib name="used" value="1"/></item>
<item name="OLOGIC2" rev="15">
<item name="OLOGIC2" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="3"/></item>
<item name="OLOGIC2_OUTFF" rev="15">
<item name="OLOGIC2_OUTFF" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="3"/></item>
<item name="PAD" rev="15">
<item name="PAD" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="21"/></item>
<item name="REG_SR" rev="15">
<attrib name="total" value="1000000"/><attrib name="used" value="79"/></item>
<item name="SLICEL" rev="15">
<item name="REG_SR" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="75"/></item>
<item name="SLICEL" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="11"/></item>
<item name="SLICEM" rev="15">
<attrib name="total" value="1000000"/><attrib name="used" value="1"/></item>
<item name="SLICEX" rev="15">
<attrib name="total" value="1000000"/><attrib name="used" value="24"/></item>
<item name="SLICEX" rev="17">
<attrib name="total" value="1000000"/><attrib name="used" value="23"/></item>
</group>
</DeviceUsage>
<ReportConfigData TimeStamp="Wed Jun 01 12:51:46 2022"><group name="REG_SR">
<item name="CK" rev="15">
<attrib name="CK" value="47"/><attrib name="CK_INV" value="32"/></item>
<item name="LATCH_OR_FF" rev="15">
<attrib name="FF" value="79"/></item>
<item name="SRINIT" rev="15">
<attrib name="SRINIT0" value="79"/></item>
<item name="SYNC_ATTR" rev="15">
<attrib name="ASYNC" value="79"/></item>
<ReportConfigData TimeStamp="Wed Jun 01 13:02:59 2022"><group name="REG_SR">
<item name="CK" rev="17">
<attrib name="CK" value="47"/><attrib name="CK_INV" value="28"/></item>
<item name="LATCH_OR_FF" rev="17">
<attrib name="FF" value="75"/></item>
<item name="SRINIT" rev="17">
<attrib name="SRINIT0" value="75"/></item>
<item name="SYNC_ATTR" rev="17">
<attrib name="ASYNC" value="75"/></item>
</group>
<group name="LUT_OR_MEM6">
<item name="CLK" rev="15">
@@ -226,7 +200,7 @@
<attrib name="SRL16" value="1"/></item>
</group>
<group name="SLICEL">
<item name="CLK" rev="15">
<item name="CLK" rev="17">
<attrib name="CLK" value="2"/><attrib name="CLK_INV" value="3"/></item>
</group>
<group name="SLICEM">
@@ -234,48 +208,48 @@
<attrib name="CLK" value="0"/><attrib name="CLK_INV" value="1"/></item>
</group>
<group name="IOB_OUTBUF">
<item name="DRIVEATTRBOX" rev="15">
<item name="DRIVEATTRBOX" rev="17">
<attrib name="12" value="7"/></item>
<item name="SLEW" rev="15">
<item name="SLEW" rev="17">
<attrib name="SLOW" value="7"/></item>
<item name="SUSPEND" rev="15">
<item name="SUSPEND" rev="17">
<attrib name="3STATE" value="7"/></item>
</group>
<group name="SLICEX">
<item name="CLK" rev="15">
<item name="CLK" rev="17">
<attrib name="CLK" value="14"/><attrib name="CLK_INV" value="6"/></item>
</group>
<group name="OLOGIC2">
<item name="CLK0" rev="15">
<item name="CLK0" rev="17">
<attrib name="CLK0_INV" value="0"/><attrib name="CLK0" value="3"/></item>
</group>
<group name="OLOGIC2_OUTFF">
<item name="CK0" rev="15">
<item name="CK0" rev="17">
<attrib name="CK0_INV" value="0"/><attrib name="CK0" value="3"/></item>
<item name="OUTFFTYPE" rev="15">
<item name="OUTFFTYPE" rev="17">
<attrib name="FF" value="3"/></item>
<item name="SRINIT_OQ" rev="15">
<item name="SRINIT_OQ" rev="17">
<attrib name="0" value="3"/></item>
</group>
<group name="FF_SR">
<item name="CK" rev="15">
<attrib name="CK" value="8"/><attrib name="CK_INV" value="2"/></item>
<item name="SRINIT" rev="15">
<attrib name="SRINIT0" value="10"/></item>
<item name="SYNC_ATTR" rev="15">
<attrib name="ASYNC" value="10"/></item>
<item name="CK" rev="17">
<attrib name="CK" value="8"/><attrib name="CK_INV" value="6"/></item>
<item name="SRINIT" rev="17">
<attrib name="SRINIT0" value="14"/></item>
<item name="SYNC_ATTR" rev="17">
<attrib name="ASYNC" value="14"/></item>
</group>
</ReportConfigData>
<ReportPinData TimeStamp="Wed Jun 01 12:51:46 2022"><group name="REG_SR">
<item name="CE" rev="15">
<attrib name="value" value="20"/></item>
<item name="CK" rev="15">
<attrib name="value" value="79"/></item>
<item name="D" rev="15">
<attrib name="value" value="79"/></item>
<item name="Q" rev="15">
<attrib name="value" value="79"/></item>
<item name="SR" rev="15">
<ReportPinData TimeStamp="Wed Jun 01 13:02:59 2022"><group name="REG_SR">
<item name="CE" rev="17">
<attrib name="value" value="16"/></item>
<item name="CK" rev="17">
<attrib name="value" value="75"/></item>
<item name="D" rev="17">
<attrib name="value" value="75"/></item>
<item name="Q" rev="17">
<attrib name="value" value="75"/></item>
<item name="SR" rev="17">
<attrib name="value" value="9"/></item>
</group>
<group name="LUT_OR_MEM6">
@@ -301,51 +275,51 @@
<attrib name="value" value="1"/></item>
</group>
<group name="SLICEL">
<item name="A4" rev="15">
<item name="A4" rev="17">
<attrib name="value" value="5"/></item>
<item name="A5" rev="15">
<item name="A5" rev="17">
<attrib name="value" value="6"/></item>
<item name="A6" rev="15">
<item name="A6" rev="17">
<attrib name="value" value="10"/></item>
<item name="AMUX" rev="15">
<item name="AMUX" rev="17">
<attrib name="value" value="6"/></item>
<item name="AQ" rev="15">
<item name="AQ" rev="17">
<attrib name="value" value="5"/></item>
<item name="B4" rev="15">
<item name="B4" rev="17">
<attrib name="value" value="4"/></item>
<item name="B5" rev="15">
<item name="B5" rev="17">
<attrib name="value" value="6"/></item>
<item name="B6" rev="15">
<item name="B6" rev="17">
<attrib name="value" value="9"/></item>
<item name="BMUX" rev="15">
<item name="BMUX" rev="17">
<attrib name="value" value="6"/></item>
<item name="BQ" rev="15">
<item name="BQ" rev="17">
<attrib name="value" value="4"/></item>
<item name="C4" rev="15">
<item name="C4" rev="17">
<attrib name="value" value="3"/></item>
<item name="C5" rev="15">
<item name="C5" rev="17">
<attrib name="value" value="6"/></item>
<item name="C6" rev="15">
<item name="C6" rev="17">
<attrib name="value" value="9"/></item>
<item name="CIN" rev="15">
<item name="CIN" rev="17">
<attrib name="value" value="8"/></item>
<item name="CLK" rev="15">
<item name="CLK" rev="17">
<attrib name="value" value="5"/></item>
<item name="CMUX" rev="15">
<item name="CMUX" rev="17">
<attrib name="value" value="6"/></item>
<item name="COUT" rev="15">
<item name="COUT" rev="17">
<attrib name="value" value="8"/></item>
<item name="CQ" rev="15">
<item name="CQ" rev="17">
<attrib name="value" value="3"/></item>
<item name="D4" rev="15">
<item name="D4" rev="17">
<attrib name="value" value="3"/></item>
<item name="D5" rev="15">
<item name="D5" rev="17">
<attrib name="value" value="5"/></item>
<item name="D6" rev="15">
<item name="D6" rev="17">
<attrib name="value" value="9"/></item>
<item name="DMUX" rev="15">
<item name="DMUX" rev="17">
<attrib name="value" value="6"/></item>
<item name="DQ" rev="15">
<item name="DQ" rev="17">
<attrib name="value" value="3"/></item>
</group>
<group name="SLICEM">
@@ -383,235 +357,235 @@
<attrib name="value" value="1"/></item>
</group>
<group name="IOB_OUTBUF">
<item name="IN" rev="15">
<item name="IN" rev="17">
<attrib name="value" value="7"/></item>
<item name="OUT" rev="15">
<item name="OUT" rev="17">
<attrib name="value" value="7"/></item>
</group>
<group name="SLICEX">
<item name="A" rev="15">
<attrib name="value" value="4"/></item>
<item name="A1" rev="15">
<item name="A" rev="17">
<attrib name="value" value="5"/></item>
<item name="A2" rev="15">
<attrib name="value" value="14"/></item>
<item name="A3" rev="15">
<attrib name="value" value="14"/></item>
<item name="A4" rev="15">
<attrib name="value" value="16"/></item>
<item name="A5" rev="15">
<attrib name="value" value="15"/></item>
<item name="A6" rev="15">
<attrib name="value" value="15"/></item>
<item name="AMUX" rev="15">
<attrib name="value" value="3"/></item>
<item name="AQ" rev="15">
<attrib name="value" value="16"/></item>
<item name="AX" rev="15">
<attrib name="value" value="3"/></item>
<item name="B" rev="15">
<attrib name="value" value="6"/></item>
<item name="B1" rev="15">
<attrib name="value" value="9"/></item>
<item name="B2" rev="15">
<attrib name="value" value="15"/></item>
<item name="B3" rev="15">
<attrib name="value" value="15"/></item>
<item name="B4" rev="15">
<attrib name="value" value="15"/></item>
<item name="B5" rev="15">
<attrib name="value" value="16"/></item>
<item name="B6" rev="15">
<attrib name="value" value="15"/></item>
<item name="BMUX" rev="15">
<attrib name="value" value="3"/></item>
<item name="BQ" rev="15">
<attrib name="value" value="12"/></item>
<item name="BX" rev="15">
<attrib name="value" value="3"/></item>
<item name="C" rev="15">
<attrib name="value" value="2"/></item>
<item name="C1" rev="15">
<attrib name="value" value="4"/></item>
<item name="C2" rev="15">
<attrib name="value" value="13"/></item>
<item name="C3" rev="15">
<attrib name="value" value="13"/></item>
<item name="C4" rev="15">
<attrib name="value" value="14"/></item>
<item name="C5" rev="15">
<attrib name="value" value="16"/></item>
<item name="C6" rev="15">
<attrib name="value" value="15"/></item>
<item name="CE" rev="15">
<attrib name="value" value="6"/></item>
<item name="CLK" rev="15">
<attrib name="value" value="20"/></item>
<item name="CMUX" rev="15">
<attrib name="value" value="2"/></item>
<item name="CQ" rev="15">
<attrib name="value" value="16"/></item>
<item name="CX" rev="15">
<attrib name="value" value="3"/></item>
<item name="D" rev="15">
<item name="A1" rev="17">
<attrib name="value" value="5"/></item>
<item name="D1" rev="15">
<attrib name="value" value="4"/></item>
<item name="D2" rev="15">
<attrib name="value" value="13"/></item>
<item name="D3" rev="15">
<item name="A2" rev="17">
<attrib name="value" value="15"/></item>
<item name="A3" rev="17">
<attrib name="value" value="16"/></item>
<item name="D4" rev="15">
<item name="A4" rev="17">
<attrib name="value" value="18"/></item>
<item name="A5" rev="17">
<attrib name="value" value="18"/></item>
<item name="A6" rev="17">
<attrib name="value" value="17"/></item>
<item name="D5" rev="15">
<attrib name="value" value="20"/></item>
<item name="D6" rev="15">
<attrib name="value" value="19"/></item>
<item name="DMUX" rev="15">
<attrib name="value" value="6"/></item>
<item name="DQ" rev="15">
<item name="AMUX" rev="17">
<attrib name="value" value="5"/></item>
<item name="AQ" rev="17">
<attrib name="value" value="17"/></item>
<item name="AX" rev="17">
<attrib name="value" value="3"/></item>
<item name="B" rev="17">
<attrib name="value" value="7"/></item>
<item name="B1" rev="17">
<attrib name="value" value="10"/></item>
<item name="B2" rev="17">
<attrib name="value" value="16"/></item>
<item name="DX" rev="15">
<item name="B3" rev="17">
<attrib name="value" value="16"/></item>
<item name="B4" rev="17">
<attrib name="value" value="16"/></item>
<item name="B5" rev="17">
<attrib name="value" value="18"/></item>
<item name="B6" rev="17">
<attrib name="value" value="16"/></item>
<item name="BMUX" rev="17">
<attrib name="value" value="5"/></item>
<item name="BQ" rev="17">
<attrib name="value" value="12"/></item>
<item name="BX" rev="17">
<attrib name="value" value="3"/></item>
<item name="C" rev="17">
<attrib name="value" value="2"/></item>
<item name="SR" rev="15">
<item name="C1" rev="17">
<attrib name="value" value="3"/></item>
<item name="C2" rev="17">
<attrib name="value" value="12"/></item>
<item name="C3" rev="17">
<attrib name="value" value="12"/></item>
<item name="C4" rev="17">
<attrib name="value" value="14"/></item>
<item name="C5" rev="17">
<attrib name="value" value="17"/></item>
<item name="C6" rev="17">
<attrib name="value" value="16"/></item>
<item name="CE" rev="17">
<attrib name="value" value="6"/></item>
<item name="CLK" rev="17">
<attrib name="value" value="20"/></item>
<item name="CMUX" rev="17">
<attrib name="value" value="3"/></item>
<item name="CQ" rev="17">
<attrib name="value" value="17"/></item>
<item name="CX" rev="17">
<attrib name="value" value="3"/></item>
<item name="D" rev="17">
<attrib name="value" value="3"/></item>
<item name="D1" rev="17">
<attrib name="value" value="3"/></item>
<item name="D2" rev="17">
<attrib name="value" value="11"/></item>
<item name="D3" rev="17">
<attrib name="value" value="13"/></item>
<item name="D4" rev="17">
<attrib name="value" value="14"/></item>
<item name="D5" rev="17">
<attrib name="value" value="17"/></item>
<item name="D6" rev="17">
<attrib name="value" value="15"/></item>
<item name="DMUX" rev="17">
<attrib name="value" value="5"/></item>
<item name="DQ" rev="17">
<attrib name="value" value="14"/></item>
<item name="DX" rev="17">
<attrib name="value" value="2"/></item>
<item name="SR" rev="17">
<attrib name="value" value="4"/></item>
</group>
<group name="BUFG_BUFG">
<item name="I0" rev="15">
<item name="I0" rev="17">
<attrib name="value" value="3"/></item>
<item name="O" rev="15">
<item name="O" rev="17">
<attrib name="value" value="3"/></item>
</group>
<group name="PAD">
<item name="PAD" rev="15">
<item name="PAD" rev="17">
<attrib name="value" value="21"/></item>
</group>
<group name="IOB_INBUF">
<item name="OUT" rev="15">
<item name="OUT" rev="17">
<attrib name="value" value="14"/></item>
<item name="PAD" rev="15">
<item name="PAD" rev="17">
<attrib name="value" value="14"/></item>
</group>
<group name="OLOGIC2">
<item name="CLK0" rev="15">
<item name="CLK0" rev="17">
<attrib name="value" value="3"/></item>
<item name="D1" rev="15">
<item name="D1" rev="17">
<attrib name="value" value="3"/></item>
<item name="OCE" rev="15">
<item name="OCE" rev="17">
<attrib name="value" value="3"/></item>
<item name="OQ" rev="15">
<item name="OQ" rev="17">
<attrib name="value" value="3"/></item>
</group>
<group name="CARRY4">
<item name="CIN" rev="15">
<item name="CIN" rev="17">
<attrib name="value" value="8"/></item>
<item name="CO3" rev="15">
<item name="CO3" rev="17">
<attrib name="value" value="8"/></item>
<item name="CYINIT" rev="15">
<item name="CYINIT" rev="17">
<attrib name="value" value="3"/></item>
<item name="DI0" rev="15">
<item name="DI0" rev="17">
<attrib name="value" value="10"/></item>
<item name="DI1" rev="15">
<item name="DI1" rev="17">
<attrib name="value" value="9"/></item>
<item name="DI2" rev="15">
<item name="DI2" rev="17">
<attrib name="value" value="9"/></item>
<item name="DI3" rev="15">
<item name="DI3" rev="17">
<attrib name="value" value="8"/></item>
<item name="O0" rev="15">
<item name="O0" rev="17">
<attrib name="value" value="11"/></item>
<item name="O1" rev="15">
<item name="O1" rev="17">
<attrib name="value" value="10"/></item>
<item name="O2" rev="15">
<item name="O2" rev="17">
<attrib name="value" value="9"/></item>
<item name="O3" rev="15">
<item name="O3" rev="17">
<attrib name="value" value="9"/></item>
<item name="S0" rev="15">
<item name="S0" rev="17">
<attrib name="value" value="11"/></item>
<item name="S1" rev="15">
<item name="S1" rev="17">
<attrib name="value" value="10"/></item>
<item name="S2" rev="15">
<item name="S2" rev="17">
<attrib name="value" value="9"/></item>
<item name="S3" rev="15">
<item name="S3" rev="17">
<attrib name="value" value="9"/></item>
</group>
<group name="OLOGIC2_OUTFF">
<item name="CE" rev="15">
<item name="CE" rev="17">
<attrib name="value" value="3"/></item>
<item name="CK0" rev="15">
<item name="CK0" rev="17">
<attrib name="value" value="3"/></item>
<item name="D1" rev="15">
<item name="D1" rev="17">
<attrib name="value" value="3"/></item>
<item name="Q" rev="15">
<item name="Q" rev="17">
<attrib name="value" value="3"/></item>
</group>
<group name="LUT5">
<item name="A1" rev="15">
<item name="A1" rev="17">
<attrib name="value" value="5"/></item>
<item name="A2" rev="15">
<item name="A2" rev="17">
<attrib name="value" value="7"/></item>
<item name="A3" rev="15">
<item name="A3" rev="17">
<attrib name="value" value="10"/></item>
<item name="A4" rev="15">
<attrib name="value" value="9"/></item>
<item name="A5" rev="15">
<attrib name="value" value="9"/></item>
<item name="O5" rev="15">
<attrib name="value" value="50"/></item>
<item name="A4" rev="17">
<attrib name="value" value="10"/></item>
<item name="A5" rev="17">
<attrib name="value" value="14"/></item>
<item name="O5" rev="17">
<attrib name="value" value="54"/></item>
</group>
<group name="LUT6">
<item name="A1" rev="15">
<attrib name="value" value="19"/></item>
<item name="A2" rev="15">
<item name="A1" rev="17">
<attrib name="value" value="18"/></item>
<item name="A2" rev="17">
<attrib name="value" value="51"/></item>
<item name="A3" rev="15">
<item name="A3" rev="17">
<attrib name="value" value="54"/></item>
<item name="A4" rev="15">
<item name="A4" rev="17">
<attrib name="value" value="76"/></item>
<item name="A5" rev="15">
<attrib name="value" value="86"/></item>
<item name="A6" rev="15">
<item name="A5" rev="17">
<attrib name="value" value="85"/></item>
<item name="A6" rev="17">
<attrib name="value" value="101"/></item>
<item name="O6" rev="15">
<item name="O6" rev="17">
<attrib name="value" value="105"/></item>
</group>
<group name="IOB_IMUX">
<item name="I" rev="15">
<item name="I" rev="17">
<attrib name="value" value="14"/></item>
<item name="OUT" rev="15">
<item name="OUT" rev="17">
<attrib name="value" value="14"/></item>
</group>
<group name="IOB">
<item name="I" rev="15">
<item name="I" rev="17">
<attrib name="value" value="14"/></item>
<item name="O" rev="15">
<item name="O" rev="17">
<attrib name="value" value="7"/></item>
<item name="PAD" rev="15">
<item name="PAD" rev="17">
<attrib name="value" value="21"/></item>
</group>
<group name="HARD0">
<item name="0" rev="15">
<item name="0" rev="17">
<attrib name="value" value="2"/></item>
</group>
<group name="HARD1">
<item name="1" rev="15">
<item name="1" rev="17">
<attrib name="value" value="1"/></item>
</group>
<group name="FF_SR">
<item name="CE" rev="15">
<attrib name="value" value="3"/></item>
<item name="CK" rev="15">
<attrib name="value" value="10"/></item>
<item name="D" rev="15">
<attrib name="value" value="10"/></item>
<item name="Q" rev="15">
<attrib name="value" value="10"/></item>
<item name="SR" rev="15">
<item name="CE" rev="17">
<attrib name="value" value="7"/></item>
<item name="CK" rev="17">
<attrib name="value" value="14"/></item>
<item name="D" rev="17">
<attrib name="value" value="14"/></item>
<item name="Q" rev="17">
<attrib name="value" value="14"/></item>
<item name="SR" rev="17">
<attrib name="value" value="3"/></item>
</group>
<group name="BUFG">
<item name="I0" rev="15">
<item name="I0" rev="17">
<attrib name="value" value="3"/></item>
<item name="O" rev="15">
<item name="O" rev="17">
<attrib name="value" value="3"/></item>
</group>
</ReportPinData>

48
textovhdl_xst.xrpt
View File

@@ -5,7 +5,7 @@
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application stringID="Xst" timeStamp="Wed Jun 01 12:50:52 2022">
<application stringID="Xst" timeStamp="Wed Jun 01 13:02:03 2022">
<section stringID="User_Env">
<table stringID="User_EnvVar">
<column stringID="variable"/>
@@ -129,8 +129,8 @@
<item dataType="int" stringID="XST_COUNTERS" value="3">
<item dataType="int" stringID="XST_9BIT_UP_COUNTER" value="1"/>
</item>
<item dataType="int" stringID="XST_REGISTERS" value="67">
<item dataType="int" stringID="XST_FLIPFLOPS" value="67"/>
<item dataType="int" stringID="XST_REGISTERS" value="51">
<item dataType="int" stringID="XST_FLIPFLOPS" value="51"/>
</item>
<item dataType="int" stringID="XST_MULTIPLEXERS" value="21">
<item dataType="int" stringID="XST_1BIT_2TO1_MULTIPLEXER" value="3"/>
@@ -139,10 +139,9 @@
</item>
</section>
<section stringID="XST_FINAL_REGISTER_REPORT">
<item dataType="int" stringID="XST_REGISTERS" value="91">
<item dataType="int" stringID="XST_FLIPFLOPS" value="91"/>
<item dataType="int" stringID="XST_REGISTERS" value="92">
<item dataType="int" stringID="XST_FLIPFLOPS" value="92"/>
</item>
<item dataType="int" stringID="XST_SHIFT_REGISTERS" value="1"></item>
</section>
<section stringID="XST_PARTITION_REPORT">
<section stringID="XST_PARTITION_IMPLEMENTATION_STATUS">
@@ -154,15 +153,15 @@
<item stringID="XST_TOP_LEVEL_OUTPUT_FILE_NAME" value="textovhdl.ngc"/>
</section>
<section stringID="XST_PRIMITIVE_AND_BLACK_BOX_USAGE">
<item dataType="int" stringID="XST_BELS" value="196">
<item dataType="int" stringID="XST_BELS" value="195">
<item dataType="int" stringID="XST_GND" value="1"/>
<item dataType="int" stringID="XST_INV" value="31"/>
<item dataType="int" stringID="XST_INV" value="30"/>
<item dataType="int" stringID="XST_LUT1" value="14"/>
<item dataType="int" stringID="XST_LUT2" value="9"/>
<item dataType="int" stringID="XST_LUT3" value="8"/>
<item dataType="int" stringID="XST_LUT4" value="6"/>
<item dataType="int" stringID="XST_LUT5" value="34"/>
<item dataType="int" stringID="XST_LUT6" value="17"/>
<item dataType="int" stringID="XST_LUT3" value="7"/>
<item dataType="int" stringID="XST_LUT4" value="7"/>
<item dataType="int" stringID="XST_LUT5" value="35"/>
<item dataType="int" stringID="XST_LUT6" value="16"/>
<item dataType="int" stringID="XST_MUXCY" value="36"/>
<item dataType="int" stringID="XST_VCC" value="1"/>
<item dataType="int" stringID="XST_XORCY" value="39"/>
@@ -171,11 +170,8 @@
<item dataType="int" stringID="XST_FD" value="49"/>
<item dataType="int" stringID="XST_FD1" value="17"/>
<item dataType="int" stringID="XST_FDCE" value="12"/>
<item dataType="int" stringID="XST_FDE" value="7"/>
<item dataType="int" stringID="XST_FDE1" value="7"/>
</item>
<item dataType="int" stringID="XST_SHIFT_REGISTERS" value="1">
<item dataType="int" stringID="XST_SRLC16E" value="1"/>
<item dataType="int" stringID="XST_FDE" value="6"/>
<item dataType="int" stringID="XST_FDE1" value="8"/>
</item>
<item dataType="int" stringID="XST_CLOCK_BUFFERS" value="3">
<item dataType="int" label="-bufg" stringID="XST_BUFG" value="2"/>
@@ -190,15 +186,13 @@
<section stringID="XST_DEVICE_UTILIZATION_SUMMARY">
<item stringID="XST_SELECTED_DEVICE" value="6slx16csg324-2"/>
<item AVAILABLE="18224" dataType="int" label="Number of Slice Registers" stringID="XST_NUMBER_OF_SLICE_REGISTERS" value="89"/>
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTs" stringID="XST_NUMBER_OF_SLICE_LUTS" value="120"/>
<item AVAILABLE="9112" dataType="int" label="Number used as Logic" stringID="XST_NUMBER_USED_AS_LOGIC" value="119"/>
<item AVAILABLE="2176" dataType="int" stringID="XST_NUMBER_USED_AS_MEMORY" value="1"/>
<item dataType="int" stringID="XST_NUMBER_USED_AS_SRL" value="1"/>
<item dataType="int" label="Number of LUT Flip Flop pairs used" stringID="XST_NUMBER_OF_LUT_FLIP_FLOP_PAIRS_USED" value="130"/>
<item AVAILABLE="130" dataType="int" label="Number with an unused Flip Flop" stringID="XST_NUMBER_WITH_AN_UNUSED_FLIP_FLOP" value="41"/>
<item AVAILABLE="130" dataType="int" label="Number with an unused LUT" stringID="XST_NUMBER_WITH_AN_UNUSED_LUT" value="10"/>
<item AVAILABLE="130" dataType="int" label="Number of fully used LUT-FF pairs" stringID="XST_NUMBER_OF_FULLY_USED_LUTFF_PAIRS" value="79"/>
<item dataType="int" label="Number of unique control sets" stringID="XST_NUMBER_OF_UNIQUE_CONTROL_SETS" value="11"/>
<item AVAILABLE="9112" dataType="int" label="Number of Slice LUTs" stringID="XST_NUMBER_OF_SLICE_LUTS" value="118"/>
<item AVAILABLE="9112" dataType="int" label="Number used as Logic" stringID="XST_NUMBER_USED_AS_LOGIC" value="118"/>
<item dataType="int" label="Number of LUT Flip Flop pairs used" stringID="XST_NUMBER_OF_LUT_FLIP_FLOP_PAIRS_USED" value="129"/>
<item AVAILABLE="129" dataType="int" label="Number with an unused Flip Flop" stringID="XST_NUMBER_WITH_AN_UNUSED_FLIP_FLOP" value="40"/>
<item AVAILABLE="129" dataType="int" label="Number with an unused LUT" stringID="XST_NUMBER_WITH_AN_UNUSED_LUT" value="11"/>
<item AVAILABLE="129" dataType="int" label="Number of fully used LUT-FF pairs" stringID="XST_NUMBER_OF_FULLY_USED_LUTFF_PAIRS" value="78"/>
<item dataType="int" label="Number of unique control sets" stringID="XST_NUMBER_OF_UNIQUE_CONTROL_SETS" value="10"/>
<item dataType="int" label="Number of IOs" stringID="XST_NUMBER_OF_IOS" value="21"/>
<item AVAILABLE="232" dataType="int" label="Number of bonded IOBs" stringID="XST_NUMBER_OF_BONDED_IOBS" value="9"/>
<item dataType="int" label="IOB Flip Flops/Latches" stringID="XST_IOB_FLIP_FLOPSLATCHES" value="3"/>
@@ -209,7 +203,7 @@
</section>
<section stringID="XST_ERRORS_STATISTICS">
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_ERRORS" value="0"/>
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="45"/>
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="77"/>
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="3"/>
</section>
</application>

333
usage_statistics_webtalk.html
View File

@@ -17,7 +17,7 @@
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Project ID (random number)</B></TD>
<TD><xtag-property name="RandomID">bd16c3ee05c44948bef10dae3c70184a</xtag-property>.<xtag-property name="ProjectID">C59F24DEFAA841F7B8F7FB3A62750569</xtag-property>.<xtag-property name="ProjectIteration">7</xtag-property></TD>
<TD><xtag-property name="RandomID">bd16c3ee05c44948bef10dae3c70184a</xtag-property>.<xtag-property name="ProjectID">C59F24DEFAA841F7B8F7FB3A62750569</xtag-property>.<xtag-property name="ProjectIteration">8</xtag-property></TD>
<TD BGCOLOR='#FFFF99'><B>Target Package:</B></TD>
<TD><xtag-property name="TargetPackage">csg324</xtag-property></TD>
</TR>
@@ -29,7 +29,7 @@
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Date Generated</B></TD>
<TD><xtag-property name="Date Generated">2022-06-01T12:51:47</xtag-property></TD>
<TD><xtag-property name="Date Generated">2022-06-01T13:03:00</xtag-property></TD>
<TD BGCOLOR='#FFFF99'><B>Tool Flow</B></TD>
<TD><xtag-property name="ToolFlow">ISE</xtag-property></TD>
</TR>
@@ -93,9 +93,9 @@
<LI><xtag-item1>8x4-bit single-port distributed Read Only RAM=1</xtag-item1></LI>
</UL>
</xtag-group>
<xtag-group><xtag-group-name name="Registers=67">Registers=67</xtag-group-name>
<xtag-group><xtag-group-name name="Registers=51">Registers=51</xtag-group-name>
<UL>
<LI><xtag-item1>Flip-Flops=67</xtag-item1></LI>
<LI><xtag-item1>Flip-Flops=51</xtag-item1></LI>
</UL>
</xtag-group>
</TD>
@@ -107,12 +107,12 @@
<LI><xtag-item1>AGG_BONDED_IO=21</xtag-item1></LI>
<LI><xtag-item1>AGG_IO=21</xtag-item1></LI>
<LI><xtag-item1>AGG_LOCED_IO=21</xtag-item1></LI>
<LI><xtag-item1>AGG_SLICE=36</xtag-item1></LI>
<LI><xtag-item1>AGG_SLICE=34</xtag-item1></LI>
<LI><xtag-item1>NUM_BONDED_IOB=21</xtag-item1></LI>
<LI><xtag-item1>NUM_BSFULL=70</xtag-item1></LI>
<LI><xtag-item1>NUM_BSFULL=73</xtag-item1></LI>
<LI><xtag-item1>NUM_BSLUTONLY=40</xtag-item1></LI>
<LI><xtag-item1>NUM_BSREGONLY=10</xtag-item1></LI>
<LI><xtag-item1>NUM_BSUSED=120</xtag-item1></LI>
<LI><xtag-item1>NUM_BSREGONLY=3</xtag-item1></LI>
<LI><xtag-item1>NUM_BSUSED=116</xtag-item1></LI>
<LI><xtag-item1>NUM_BUFG=3</xtag-item1></LI>
<LI><xtag-item1>NUM_IOB_FF=3</xtag-item1></LI>
<LI><xtag-item1>NUM_LOCED_IOB=21</xtag-item1></LI>
@@ -120,21 +120,19 @@
<LI><xtag-item1>NUM_LOGIC_O5ONLY=12</xtag-item1></LI>
<LI><xtag-item1>NUM_LOGIC_O6ONLY=57</xtag-item1></LI>
<LI><xtag-item1>NUM_LUT_RT_DRIVES_CARRY4=2</xtag-item1></LI>
<LI><xtag-item1>NUM_LUT_RT_DRIVES_FLOP=4</xtag-item1></LI>
<LI><xtag-item1>NUM_LUT_RT_EXO5=4</xtag-item1></LI>
<LI><xtag-item1>NUM_LUT_RT_DRIVES_FLOP=8</xtag-item1></LI>
<LI><xtag-item1>NUM_LUT_RT_EXO5=8</xtag-item1></LI>
<LI><xtag-item1>NUM_LUT_RT_EXO6=2</xtag-item1></LI>
<LI><xtag-item1>NUM_LUT_RT_O6=12</xtag-item1></LI>
<LI><xtag-item1>NUM_OLOGIC2=3</xtag-item1></LI>
<LI><xtag-item1>NUM_SLICEL=11</xtag-item1></LI>
<LI><xtag-item1>NUM_SLICEM=1</xtag-item1></LI>
<LI><xtag-item1>NUM_SLICEX=24</xtag-item1></LI>
<LI><xtag-item1>NUM_SLICEX=23</xtag-item1></LI>
<LI><xtag-item1>NUM_SLICE_CARRY4=11</xtag-item1></LI>
<LI><xtag-item1>NUM_SLICE_CONTROLSET=9</xtag-item1></LI>
<LI><xtag-item1>NUM_SLICE_CYINIT=159</xtag-item1></LI>
<LI><xtag-item1>NUM_SLICE_CYINIT=162</xtag-item1></LI>
<LI><xtag-item1>NUM_SLICE_FF=89</xtag-item1></LI>
<LI><xtag-item1>NUM_SLICE_UNUSEDCTRL=10</xtag-item1></LI>
<LI><xtag-item1>NUM_SRL_O6ONLY=1</xtag-item1></LI>
<LI><xtag-item1>NUM_UNUSABLE_FF_BELS=38</xtag-item1></LI>
<LI><xtag-item1>NUM_SLICE_UNUSEDCTRL=9</xtag-item1></LI>
<LI><xtag-item1>NUM_UNUSABLE_FF_BELS=31</xtag-item1></LI>
</UL>
</xtag-group>
</TD>
@@ -144,42 +142,33 @@
<LI><xtag-item1>NumNets_Active=183</xtag-item1></LI>
<LI><xtag-item1>NumNets_Gnd=1</xtag-item1></LI>
<LI><xtag-item1>NumNets_Vcc=1</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_BOUNCEACROSS=7</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_BOUNCEIN=17</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_BOUNCEACROSS=4</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_BOUNCEIN=21</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_BUFGOUT=3</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_BUFHINP2OUT=5</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_CLKPIN=29</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_CLKPIN=28</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_CLKPINFEED=13</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_CNTRLPIN=14</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_DOUBLE=102</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_CNTRLPIN=13</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_DOUBLE=93</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_GENERIC=9</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_GLOBAL=30</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_INPUT=12</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_GLOBAL=27</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_INPUT=11</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_IOBIN2OUT=7</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_IOBOUTPUT=7</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_LUTINPUT=357</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_OUTBOUND=138</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_OUTPUT=151</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_OUTBOUND=136</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_OUTPUT=149</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_PADINPUT=6</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_PADOUTPUT=2</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_PINBOUNCE=81</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_PINFEED=406</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_PINBOUNCE=68</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_PINFEED=405</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_PINFEED2=3</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_QUAD=61</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_REGINPUT=14</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_SINGLE=228</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Gnd_DOUBLE=1</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Gnd_GENERIC=1</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Gnd_IOBIN2OUT=1</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Gnd_IOBOUTPUT=1</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Gnd_OUTBOUND=1</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Gnd_OUTPUT=1</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Gnd_PADINPUT=1</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Gnd_PINFEED=1</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Vcc_HVCCOUT=17</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Vcc_KVCCOUT=1</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Vcc_LUTINPUT=52</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Vcc_PINFEED=52</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_QUAD=64</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_REGINPUT=11</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Active_SINGLE=204</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Vcc_HVCCOUT=18</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Vcc_LUTINPUT=46</xtag-item1></LI>
<LI><xtag-item1>NumNodesOfType_Vcc_PINFEED=46</xtag-item1></LI>
</UL>
</xtag-group>
<xtag-group><xtag-group-name name="SiteStatistics">SiteStatistics</xtag-group-name>
@@ -187,9 +176,9 @@
<LI><xtag-item1>BUFG-BUFGMUX=3</xtag-item1></LI>
<LI><xtag-item1>IOB-IOBM=10</xtag-item1></LI>
<LI><xtag-item1>IOB-IOBS=11</xtag-item1></LI>
<LI><xtag-item1>SLICEL-SLICEM=11</xtag-item1></LI>
<LI><xtag-item1>SLICEX-SLICEL=8</xtag-item1></LI>
<LI><xtag-item1>SLICEX-SLICEM=2</xtag-item1></LI>
<LI><xtag-item1>SLICEL-SLICEM=8</xtag-item1></LI>
<LI><xtag-item1>SLICEX-SLICEL=6</xtag-item1></LI>
<LI><xtag-item1>SLICEX-SLICEM=6</xtag-item1></LI>
</UL>
</xtag-group>
</TD>
@@ -201,23 +190,21 @@
<LI><xtag-item2>BUFG=3</xtag-item2></LI>
<LI><xtag-item2>BUFG_BUFG=3</xtag-item2></LI>
<LI><xtag-item2>CARRY4=11</xtag-item2></LI>
<LI><xtag-item2>FF_SR=10</xtag-item2></LI>
<LI><xtag-item2>FF_SR=14</xtag-item2></LI>
<LI><xtag-item2>HARD0=2</xtag-item2></LI>
<LI><xtag-item2>HARD1=1</xtag-item2></LI>
<LI><xtag-item2>IOB=21</xtag-item2></LI>
<LI><xtag-item2>IOB_IMUX=14</xtag-item2></LI>
<LI><xtag-item2>IOB_INBUF=14</xtag-item2></LI>
<LI><xtag-item2>IOB_OUTBUF=7</xtag-item2></LI>
<LI><xtag-item2>LUT5=50</xtag-item2></LI>
<LI><xtag-item2>LUT5=54</xtag-item2></LI>
<LI><xtag-item2>LUT6=105</xtag-item2></LI>
<LI><xtag-item2>LUT_OR_MEM6=1</xtag-item2></LI>
<LI><xtag-item2>OLOGIC2=3</xtag-item2></LI>
<LI><xtag-item2>OLOGIC2_OUTFF=3</xtag-item2></LI>
<LI><xtag-item2>PAD=21</xtag-item2></LI>
<LI><xtag-item2>REG_SR=79</xtag-item2></LI>
<LI><xtag-item2>REG_SR=75</xtag-item2></LI>
<LI><xtag-item2>SLICEL=11</xtag-item2></LI>
<LI><xtag-item2>SLICEM=1</xtag-item2></LI>
<LI><xtag-item2>SLICEX=24</xtag-item2></LI>
<LI><xtag-item2>SLICEX=23</xtag-item2></LI>
</UL>
</xtag-group>
</TD>
@@ -229,9 +216,9 @@
<TD>
<xtag-group><xtag-group-name name="FF_SR">FF_SR</xtag-group-name>
<UL>
<LI><xtag-item3>CK=[CK:8] [CK_INV:2]</xtag-item3></LI>
<LI><xtag-item3>SRINIT=[SRINIT0:10]</xtag-item3></LI>
<LI><xtag-item3>SYNC_ATTR=[ASYNC:10]</xtag-item3></LI>
<LI><xtag-item3>CK=[CK:8] [CK_INV:6]</xtag-item3></LI>
<LI><xtag-item3>SRINIT=[SRINIT0:14]</xtag-item3></LI>
<LI><xtag-item3>SYNC_ATTR=[ASYNC:14]</xtag-item3></LI>
</UL>
</xtag-group>
<xtag-group><xtag-group-name name="IOB_OUTBUF">IOB_OUTBUF</xtag-group-name>
@@ -266,10 +253,10 @@
</xtag-group>
<xtag-group><xtag-group-name name="REG_SR">REG_SR</xtag-group-name>
<UL>
<LI><xtag-item3>CK=[CK:47] [CK_INV:32]</xtag-item3></LI>
<LI><xtag-item3>LATCH_OR_FF=[FF:79]</xtag-item3></LI>
<LI><xtag-item3>SRINIT=[SRINIT0:79]</xtag-item3></LI>
<LI><xtag-item3>SYNC_ATTR=[ASYNC:79]</xtag-item3></LI>
<LI><xtag-item3>CK=[CK:47] [CK_INV:28]</xtag-item3></LI>
<LI><xtag-item3>LATCH_OR_FF=[FF:75]</xtag-item3></LI>
<LI><xtag-item3>SRINIT=[SRINIT0:75]</xtag-item3></LI>
<LI><xtag-item3>SYNC_ATTR=[ASYNC:75]</xtag-item3></LI>
</UL>
</xtag-group>
<xtag-group><xtag-group-name name="SLICEL">SLICEL</xtag-group-name>
@@ -329,10 +316,10 @@
</xtag-group>
<xtag-group><xtag-group-name name="FF_SR">FF_SR</xtag-group-name>
<UL>
<LI><xtag-item1>CE=3</xtag-item1></LI>
<LI><xtag-item1>CK=10</xtag-item1></LI>
<LI><xtag-item1>D=10</xtag-item1></LI>
<LI><xtag-item1>Q=10</xtag-item1></LI>
<LI><xtag-item1>CE=7</xtag-item1></LI>
<LI><xtag-item1>CK=14</xtag-item1></LI>
<LI><xtag-item1>D=14</xtag-item1></LI>
<LI><xtag-item1>Q=14</xtag-item1></LI>
<LI><xtag-item1>SR=3</xtag-item1></LI>
</UL>
</xtag-group>
@@ -376,20 +363,20 @@
<LI><xtag-item1>A1=5</xtag-item1></LI>
<LI><xtag-item1>A2=7</xtag-item1></LI>
<LI><xtag-item1>A3=10</xtag-item1></LI>
<LI><xtag-item1>A4=9</xtag-item1></LI>
<LI><xtag-item1>A5=9</xtag-item1></LI>
<LI><xtag-item1>O5=50</xtag-item1></LI>
<LI><xtag-item1>A4=10</xtag-item1></LI>
<LI><xtag-item1>A5=14</xtag-item1></LI>
<LI><xtag-item1>O5=54</xtag-item1></LI>
</UL>
</TD>
<TD>
</xtag-group>
<xtag-group><xtag-group-name name="LUT6">LUT6</xtag-group-name>
<UL>
<LI><xtag-item1>A1=19</xtag-item1></LI>
<LI><xtag-item1>A1=18</xtag-item1></LI>
<LI><xtag-item1>A2=51</xtag-item1></LI>
<LI><xtag-item1>A3=54</xtag-item1></LI>
<LI><xtag-item1>A4=76</xtag-item1></LI>
<LI><xtag-item1>A5=86</xtag-item1></LI>
<LI><xtag-item1>A5=85</xtag-item1></LI>
<LI><xtag-item1>A6=101</xtag-item1></LI>
<LI><xtag-item1>O6=105</xtag-item1></LI>
</UL>
@@ -431,10 +418,10 @@
</xtag-group>
<xtag-group><xtag-group-name name="REG_SR">REG_SR</xtag-group-name>
<UL>
<LI><xtag-item1>CE=20</xtag-item1></LI>
<LI><xtag-item1>CK=79</xtag-item1></LI>
<LI><xtag-item1>D=79</xtag-item1></LI>
<LI><xtag-item1>Q=79</xtag-item1></LI>
<LI><xtag-item1>CE=16</xtag-item1></LI>
<LI><xtag-item1>CK=75</xtag-item1></LI>
<LI><xtag-item1>D=75</xtag-item1></LI>
<LI><xtag-item1>Q=75</xtag-item1></LI>
<LI><xtag-item1>SR=9</xtag-item1></LI>
</UL>
</xtag-group>
@@ -489,47 +476,47 @@
</xtag-group>
<xtag-group><xtag-group-name name="SLICEX">SLICEX</xtag-group-name>
<UL>
<LI><xtag-item1>A=4</xtag-item1></LI>
<LI><xtag-item1>A=5</xtag-item1></LI>
<LI><xtag-item1>A1=5</xtag-item1></LI>
<LI><xtag-item1>A2=14</xtag-item1></LI>
<LI><xtag-item1>A3=14</xtag-item1></LI>
<LI><xtag-item1>A4=16</xtag-item1></LI>
<LI><xtag-item1>A5=15</xtag-item1></LI>
<LI><xtag-item1>A6=15</xtag-item1></LI>
<LI><xtag-item1>AMUX=3</xtag-item1></LI>
<LI><xtag-item1>AQ=16</xtag-item1></LI>
<LI><xtag-item1>A2=15</xtag-item1></LI>
<LI><xtag-item1>A3=16</xtag-item1></LI>
<LI><xtag-item1>A4=18</xtag-item1></LI>
<LI><xtag-item1>A5=18</xtag-item1></LI>
<LI><xtag-item1>A6=17</xtag-item1></LI>
<LI><xtag-item1>AMUX=5</xtag-item1></LI>
<LI><xtag-item1>AQ=17</xtag-item1></LI>
<LI><xtag-item1>AX=3</xtag-item1></LI>
<LI><xtag-item1>B=6</xtag-item1></LI>
<LI><xtag-item1>B1=9</xtag-item1></LI>
<LI><xtag-item1>B2=15</xtag-item1></LI>
<LI><xtag-item1>B3=15</xtag-item1></LI>
<LI><xtag-item1>B4=15</xtag-item1></LI>
<LI><xtag-item1>B5=16</xtag-item1></LI>
<LI><xtag-item1>B6=15</xtag-item1></LI>
<LI><xtag-item1>BMUX=3</xtag-item1></LI>
<LI><xtag-item1>B=7</xtag-item1></LI>
<LI><xtag-item1>B1=10</xtag-item1></LI>
<LI><xtag-item1>B2=16</xtag-item1></LI>
<LI><xtag-item1>B3=16</xtag-item1></LI>
<LI><xtag-item1>B4=16</xtag-item1></LI>
<LI><xtag-item1>B5=18</xtag-item1></LI>
<LI><xtag-item1>B6=16</xtag-item1></LI>
<LI><xtag-item1>BMUX=5</xtag-item1></LI>
<LI><xtag-item1>BQ=12</xtag-item1></LI>
<LI><xtag-item1>BX=3</xtag-item1></LI>
<LI><xtag-item1>C=2</xtag-item1></LI>
<LI><xtag-item1>C1=4</xtag-item1></LI>
<LI><xtag-item1>C2=13</xtag-item1></LI>
<LI><xtag-item1>C3=13</xtag-item1></LI>
<LI><xtag-item1>C1=3</xtag-item1></LI>
<LI><xtag-item1>C2=12</xtag-item1></LI>
<LI><xtag-item1>C3=12</xtag-item1></LI>
<LI><xtag-item1>C4=14</xtag-item1></LI>
<LI><xtag-item1>C5=16</xtag-item1></LI>
<LI><xtag-item1>C6=15</xtag-item1></LI>
<LI><xtag-item1>C5=17</xtag-item1></LI>
<LI><xtag-item1>C6=16</xtag-item1></LI>
<LI><xtag-item1>CE=6</xtag-item1></LI>
<LI><xtag-item1>CLK=20</xtag-item1></LI>
<LI><xtag-item1>CMUX=2</xtag-item1></LI>
<LI><xtag-item1>CQ=16</xtag-item1></LI>
<LI><xtag-item1>CMUX=3</xtag-item1></LI>
<LI><xtag-item1>CQ=17</xtag-item1></LI>
<LI><xtag-item1>CX=3</xtag-item1></LI>
<LI><xtag-item1>D=5</xtag-item1></LI>
<LI><xtag-item1>D1=4</xtag-item1></LI>
<LI><xtag-item1>D2=13</xtag-item1></LI>
<LI><xtag-item1>D3=16</xtag-item1></LI>
<LI><xtag-item1>D4=17</xtag-item1></LI>
<LI><xtag-item1>D5=20</xtag-item1></LI>
<LI><xtag-item1>D6=19</xtag-item1></LI>
<LI><xtag-item1>DMUX=6</xtag-item1></LI>
<LI><xtag-item1>DQ=16</xtag-item1></LI>
<LI><xtag-item1>D=3</xtag-item1></LI>
<LI><xtag-item1>D1=3</xtag-item1></LI>
<LI><xtag-item1>D2=11</xtag-item1></LI>
<LI><xtag-item1>D3=13</xtag-item1></LI>
<LI><xtag-item1>D4=14</xtag-item1></LI>
<LI><xtag-item1>D5=17</xtag-item1></LI>
<LI><xtag-item1>D6=15</xtag-item1></LI>
<LI><xtag-item1>DMUX=5</xtag-item1></LI>
<LI><xtag-item1>DQ=14</xtag-item1></LI>
<LI><xtag-item1>DX=2</xtag-item1></LI>
<LI><xtag-item1>SR=4</xtag-item1></LI>
</UL>
@@ -590,6 +577,12 @@
<LI><xtag-cmdline>par -w -intstyle ise -ol high -mt off &lt;fname&gt;.ncd &lt;fname&gt;.ncd &lt;fname&gt;.pcf</xtag-cmdline></LI>
<LI><xtag-cmdline>trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml &lt;fname&gt;.twx &lt;fname&gt;.ncd -o &lt;fname&gt;.twr &lt;fname&gt;.pcf -ucf &lt;fname&gt;.ucf</xtag-cmdline></LI>
<LI><xtag-cmdline>bitgen -intstyle ise -f &lt;fname&gt;.ut &lt;fname&gt;.ncd</xtag-cmdline></LI>
<LI><xtag-cmdline>xst -intstyle ise -ifn &lt;ise_file&gt;</xtag-cmdline></LI>
<LI><xtag-cmdline>ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc &lt;fname&gt;.ucf -p xc6slx16-csg324-2 &lt;fname&gt;.ngc &lt;fname&gt;.ngd</xtag-cmdline></LI>
<LI><xtag-cmdline>map -intstyle ise -p xc6slx16-csg324-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o &lt;fname&gt;.ncd &lt;fname&gt;.ngd &lt;fname&gt;.pcf</xtag-cmdline></LI>
<LI><xtag-cmdline>par -w -intstyle ise -ol high -mt off &lt;fname&gt;.ncd &lt;fname&gt;.ncd &lt;fname&gt;.pcf</xtag-cmdline></LI>
<LI><xtag-cmdline>trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml &lt;fname&gt;.twx &lt;fname&gt;.ncd -o &lt;fname&gt;.twr &lt;fname&gt;.pcf -ucf &lt;fname&gt;.ucf</xtag-cmdline></LI>
<LI><xtag-cmdline>bitgen -intstyle ise -f &lt;fname&gt;.ut &lt;fname&gt;.ncd</xtag-cmdline></LI>
</xtag-section></UL></TD></TR>
</TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'><xtag-section name="RunStatistics"><TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN=8><B>Software Quality</B></TD></TR><TR ALIGN=LEFT><TD COLSPAN=8><B>Run Statistics</B></TD></TR><TR ALIGN=CENTER BGCOLOR='#FFFF99'><TD><B>Program Name</B></TD><TD><B>Runs Started</B></TD><TD><B>Runs Finished</B></TD><TD><B>Errors</B></TD><TD><B>Fatal Errors</B></TD><TD><B>Internal Errors</B></TD><TD><B>Exceptions</B></TD><TD><B>Core Dumps</B></TD></TR>
@@ -606,6 +599,36 @@
</tr>
<tr>
<td><xtag-program-name>bitgen</xtag-program-name></td>
<td><xtag-total-run-started>32</xtag-total-run-started></td>
<td><xtag-total-run-finished>32</xtag-total-run-finished></td>
<td><xtag-total-error>0</xtag-total-error></td>
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
<td><xtag-total-exception>0</xtag-total-exception></td>
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
</tr>
<tr>
<td><xtag-program-name>map</xtag-program-name></td>
<td><xtag-total-run-started>36</xtag-total-run-started></td>
<td><xtag-total-run-finished>31</xtag-total-run-finished></td>
<td><xtag-total-error>0</xtag-total-error></td>
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
<td><xtag-total-exception>0</xtag-total-exception></td>
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
</tr>
<tr>
<td><xtag-program-name>ngdbuild</xtag-program-name></td>
<td><xtag-total-run-started>36</xtag-total-run-started></td>
<td><xtag-total-run-finished>36</xtag-total-run-finished></td>
<td><xtag-total-error>0</xtag-total-error></td>
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
<td><xtag-total-exception>0</xtag-total-exception></td>
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
</tr>
<tr>
<td><xtag-program-name>par</xtag-program-name></td>
<td><xtag-total-run-started>31</xtag-total-run-started></td>
<td><xtag-total-run-finished>31</xtag-total-run-finished></td>
<td><xtag-total-error>0</xtag-total-error></td>
@@ -614,40 +637,10 @@
<td><xtag-total-exception>0</xtag-total-exception></td>
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
</tr>
<tr>
<td><xtag-program-name>map</xtag-program-name></td>
<td><xtag-total-run-started>35</xtag-total-run-started></td>
<td><xtag-total-run-finished>30</xtag-total-run-finished></td>
<td><xtag-total-error>0</xtag-total-error></td>
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
<td><xtag-total-exception>0</xtag-total-exception></td>
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
</tr>
<tr>
<td><xtag-program-name>ngdbuild</xtag-program-name></td>
<td><xtag-total-run-started>35</xtag-total-run-started></td>
<td><xtag-total-run-finished>35</xtag-total-run-finished></td>
<td><xtag-total-error>0</xtag-total-error></td>
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
<td><xtag-total-exception>0</xtag-total-exception></td>
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
</tr>
<tr>
<td><xtag-program-name>par</xtag-program-name></td>
<td><xtag-total-run-started>30</xtag-total-run-started></td>
<td><xtag-total-run-finished>30</xtag-total-run-finished></td>
<td><xtag-total-error>0</xtag-total-error></td>
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
<td><xtag-total-exception>0</xtag-total-exception></td>
<td><xtag-total-core-dump>0</xtag-total-core-dump></td>
</tr>
<tr>
<td><xtag-program-name>trce</xtag-program-name></td>
<td><xtag-total-run-started>30</xtag-total-run-started></td>
<td><xtag-total-run-finished>30</xtag-total-run-finished></td>
<td><xtag-total-run-started>31</xtag-total-run-started></td>
<td><xtag-total-run-finished>31</xtag-total-run-finished></td>
<td><xtag-total-error>0</xtag-total-error></td>
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
@@ -656,8 +649,8 @@
</tr>
<tr>
<td><xtag-program-name>xst</xtag-program-name></td>
<td><xtag-total-run-started>65</xtag-total-run-started></td>
<td><xtag-total-run-finished>65</xtag-total-run-finished></td>
<td><xtag-total-run-started>66</xtag-total-run-started></td>
<td><xtag-total-run-finished>66</xtag-total-run-finished></td>
<td><xtag-total-error>0</xtag-total-error></td>
<td><xtag-total-fatal-error>0</xtag-total-fatal-error></td>
<td><xtag-total-internal-error>0</xtag-total-internal-error></td>
@@ -691,7 +684,7 @@
</TR><TR><TD><xtag-design-property-name>PROP_intProjectCreationTimestamp</xtag-design-property-name>=<xtag-design-property-value>2022-06-01T11:23:26</xtag-design-property-value></TD>
<TD><xtag-design-property-name>PROP_intWbtProjectID</xtag-design-property-name>=<xtag-design-property-value>C59F24DEFAA841F7B8F7FB3A62750569</xtag-design-property-value></TD>
</TR><TR><TD><xtag-process-property-name>PROP_intWbtProjectIteration</xtag-process-property-name>=<xtag-process-property-value>7</xtag-process-property-value></TD>
</TR><TR><TD><xtag-process-property-name>PROP_intWbtProjectIteration</xtag-process-property-name>=<xtag-process-property-value>8</xtag-process-property-value></TD>
<TD><xtag-design-property-name>PROP_intWorkingDirLocWRTProjDir</xtag-design-property-name>=<xtag-design-property-value>Same</xtag-design-property-value></TD>
</TR><TR><TD><xtag-design-property-name>PROP_intWorkingDirUsed</xtag-design-property-name>=<xtag-design-property-value>No</xtag-design-property-value></TD>
@@ -712,6 +705,70 @@
</TR><TR><TD><xtag-source-property-name>FILE_VHDL</xtag-source-property-name>=<xtag-source-property-value>1</xtag-source-property-value></TD>
</TR></xtag-section></TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
<xtag-section name="UnisimStatistics">
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN=4><B>Unisim Statistics</B></TD></TR>
<TR ALIGN=CENTER><TD COLSPAN=4><B><xtag-unisim-type-name>NGDBUILD_PRE_UNISIM_SUMMARY</xtag-unisim-type-name></B></TD></TR><TR>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_BUFG</xtag-preunisim-param-name>=<xtag-preunisim-param-value>2</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_BUFGP</xtag-preunisim-param-name>=<xtag-preunisim-param-value>1</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FD</xtag-preunisim-param-name>=<xtag-preunisim-param-value>49</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FDCE</xtag-preunisim-param-name>=<xtag-preunisim-param-value>12</xtag-preunisim-param-value></TD>
</TR>
<TR>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FDE</xtag-preunisim-param-name>=<xtag-preunisim-param-value>6</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FDE_1</xtag-preunisim-param-name>=<xtag-preunisim-param-value>8</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_FD_1</xtag-preunisim-param-name>=<xtag-preunisim-param-value>17</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_GND</xtag-preunisim-param-name>=<xtag-preunisim-param-value>1</xtag-preunisim-param-value></TD>
</TR>
<TR>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_IBUF</xtag-preunisim-param-name>=<xtag-preunisim-param-value>1</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_INV</xtag-preunisim-param-name>=<xtag-preunisim-param-value>30</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT1</xtag-preunisim-param-name>=<xtag-preunisim-param-value>14</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT2</xtag-preunisim-param-name>=<xtag-preunisim-param-value>9</xtag-preunisim-param-value></TD>
</TR>
<TR>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT3</xtag-preunisim-param-name>=<xtag-preunisim-param-value>7</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT4</xtag-preunisim-param-name>=<xtag-preunisim-param-value>7</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT5</xtag-preunisim-param-name>=<xtag-preunisim-param-value>35</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_LUT6</xtag-preunisim-param-name>=<xtag-preunisim-param-value>16</xtag-preunisim-param-value></TD>
</TR>
<TR>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_MUXCY</xtag-preunisim-param-name>=<xtag-preunisim-param-value>36</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_OBUF</xtag-preunisim-param-name>=<xtag-preunisim-param-value>7</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_VCC</xtag-preunisim-param-name>=<xtag-preunisim-param-value>1</xtag-preunisim-param-value></TD>
<TD><xtag-preunisim-param-name>NGDBUILD_NUM_XORCY</xtag-preunisim-param-name>=<xtag-preunisim-param-value>39</xtag-preunisim-param-value></TD>
</TR>
<TR ALIGN=CENTER><TD COLSPAN=4><B><xtag-unisim-type-name>NGDBUILD_POST_UNISIM_SUMMARY</xtag-unisim-type-name></B></TD></TR><TR>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_BUFG</xtag-postunisim-param-name>=<xtag-postunisim-param-value>3</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FD</xtag-postunisim-param-name>=<xtag-postunisim-param-value>49</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FDCE</xtag-postunisim-param-name>=<xtag-postunisim-param-value>12</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FDE</xtag-postunisim-param-name>=<xtag-postunisim-param-value>6</xtag-postunisim-param-value></TD>
</TR>
<TR>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FDE_1</xtag-postunisim-param-name>=<xtag-postunisim-param-value>8</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_FD_1</xtag-postunisim-param-name>=<xtag-postunisim-param-value>17</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_GND</xtag-postunisim-param-name>=<xtag-postunisim-param-value>1</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_IBUF</xtag-postunisim-param-name>=<xtag-postunisim-param-value>13</xtag-postunisim-param-value></TD>
</TR>
<TR>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_IBUFG</xtag-postunisim-param-name>=<xtag-postunisim-param-value>1</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_INV</xtag-postunisim-param-name>=<xtag-postunisim-param-value>30</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT1</xtag-postunisim-param-name>=<xtag-postunisim-param-value>14</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT2</xtag-postunisim-param-name>=<xtag-postunisim-param-value>9</xtag-postunisim-param-value></TD>
</TR>
<TR>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT3</xtag-postunisim-param-name>=<xtag-postunisim-param-value>7</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT4</xtag-postunisim-param-name>=<xtag-postunisim-param-value>7</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT5</xtag-postunisim-param-name>=<xtag-postunisim-param-value>35</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_LUT6</xtag-postunisim-param-name>=<xtag-postunisim-param-value>16</xtag-postunisim-param-value></TD>
</TR>
<TR>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_MUXCY</xtag-postunisim-param-name>=<xtag-postunisim-param-value>36</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_OBUF</xtag-postunisim-param-name>=<xtag-postunisim-param-value>7</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_VCC</xtag-postunisim-param-name>=<xtag-postunisim-param-value>1</xtag-postunisim-param-value></TD>
<TD><xtag-postunisim-param-name>NGDBUILD_NUM_XORCY</xtag-postunisim-param-name>=<xtag-postunisim-param-value>39</xtag-postunisim-param-value></TD>
</TR>
</xtag-section></TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
<xtag-section name="XstCommandLineOptions">
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN=4><B>XST Command Line Options</B></TD></TR>
<TR ALIGN=CENTER><TD COLSPAN=4><B><xtag-xstoption-type-name>XST_OPTION_SUMMARY</xtag-xstoption-type-name></B></TD></TR><TR>

2
webtalk.log
View File

@@ -4,7 +4,7 @@ Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.
Project Information
--------------------
ProjectID=C59F24DEFAA841F7B8F7FB3A62750569
ProjectIteration=7
ProjectIteration=8
WebTalk Summary
----------------

6
webtalk_pn.xml
View File

@@ -3,10 +3,10 @@
<!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application name="pn" timeStamp="Wed Jun 01 12:51:19 2022">
<application name="pn" timeStamp="Wed Jun 01 13:02:32 2022">
<section name="Project Information" visible="false">
<property name="ProjectID" value="C59F24DEFAA841F7B8F7FB3A62750569" type="project"/>
<property name="ProjectIteration" value="7" type="project"/>
<property name="ProjectIteration" value="8" type="project"/>
<property name="ProjectFile" value="C:/Users/Gabriel/Xilinx/Aula20220601/Aula20220601.xise" type="project"/>
<property name="ProjectCreationTimestamp" value="2022-06-01T11:23:26" type="project"/>
</section>
@@ -25,7 +25,7 @@ This means code written to parse this file will need to be revisited each subseq
<property name="PROP_UserConstraintEditorPreference" value="Text Editor" type="process"/>
<property name="PROP_intProjectCreationTimestamp" value="2022-06-01T11:23:26" type="design"/>
<property name="PROP_intWbtProjectID" value="C59F24DEFAA841F7B8F7FB3A62750569" type="design"/>
<property name="PROP_intWbtProjectIteration" value="7" type="process"/>
<property name="PROP_intWbtProjectIteration" value="8" type="process"/>
<property name="PROP_intWorkingDirLocWRTProjDir" value="Same" type="design"/>
<property name="PROP_intWorkingDirUsed" value="No" type="design"/>
<property name="PROP_AutoTop" value="true" type="design"/>

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