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9045688601
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TXing
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2023-05-29 11:00:35 -03:00 |
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c8c3455cfa
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JZing
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2023-03-20 10:56:35 -03:00 |
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cded134bdb
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JMPing
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2023-03-20 10:26:11 -03:00 |
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4f3f899330
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ALU OPing
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2023-03-20 10:11:58 -03:00 |
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f3589be154
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MOVing
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2023-03-20 09:36:03 -03:00 |
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09670afe91
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program counter changed to signal
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2023-03-01 12:21:20 -03:00 |
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4789da663e
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Reset signal on registers
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2023-02-27 16:40:36 -03:00 |
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8ded0a35c9
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Implement Zero and carry flags in ALU (untested)
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2023-02-27 16:18:27 -03:00 |
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3f7517185d
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Implemented program counter (untested)
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2023-02-27 15:25:31 -03:00 |
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074a714239
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Add Opcode descriptions.txt
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2023-02-27 14:47:18 -03:00 |
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8d7de4454b
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Merge branch 'develop' of https://git.gmlima.com/Playgrounds/XC3S400 into develop
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2023-02-27 14:46:35 -03:00 |
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6608412c04
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Fake flash with simple example code
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2023-02-27 14:32:08 -03:00 |
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4c7dc5090b
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Add Registers.vhdl
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2023-02-27 13:29:58 -03:00 |
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e8ef7cc2fb
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Remove examples
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2023-02-27 13:29:46 -03:00 |
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feffe97c18
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16 registers with example
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2023-02-27 13:20:48 -03:00 |
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2d7743a87d
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ALU with load from data bus
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2023-02-27 10:34:14 -03:00 |
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71ee53540b
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ALU working with all opcodes but load untested
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2023-02-27 10:09:03 -03:00 |
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b8e388e4eb
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Add ALU_P379.vhdl to project
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2023-02-27 09:11:40 -03:00 |
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23ff042ae6
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Add ALU_P379.vhdl to project
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2023-02-27 09:09:51 -03:00 |
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51c73cd883
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Remove sevseg example from main.vhdl
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2023-02-27 09:06:31 -03:00 |
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0ec5a4663b
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SevSeg with example
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2023-02-07 21:53:39 -03:00 |
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a2a7555f2b
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Template for XC3S400
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2023-02-07 20:34:08 -02:00 |
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bd5fe02aea
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Initial commit
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2023-02-07 18:59:37 -03:00 |
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