diff --git a/Code/STM32/.gitignore b/Code/STM32/.gitignore new file mode 100644 index 0000000..043d84f --- /dev/null +++ b/Code/STM32/.gitignore @@ -0,0 +1,2 @@ +Debug +Release \ No newline at end of file diff --git a/Code/STM32/Debug/Core/Src/Components/subdir.mk b/Code/STM32/Debug/Core/Src/Components/subdir.mk deleted file mode 100644 index 29aff21..0000000 --- a/Code/STM32/Debug/Core/Src/Components/subdir.mk +++ /dev/null @@ -1,39 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (10.3-2021.10) -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -CPP_SRCS += \ -../Core/Src/Components/BTS7960B.cpp \ -../Core/Src/Components/ESP8266.cpp \ -../Core/Src/Components/SerialDebug.cpp \ -../Core/Src/Components/Start.cpp \ -../Core/Src/Components/StaticFIFO.cpp - -OBJS += \ -./Core/Src/Components/BTS7960B.o \ -./Core/Src/Components/ESP8266.o \ -./Core/Src/Components/SerialDebug.o \ -./Core/Src/Components/Start.o \ -./Core/Src/Components/StaticFIFO.o - -CPP_DEPS += \ -./Core/Src/Components/BTS7960B.d \ -./Core/Src/Components/ESP8266.d \ -./Core/Src/Components/SerialDebug.d \ -./Core/Src/Components/Start.d \ -./Core/Src/Components/StaticFIFO.d - - -# Each subdirectory must supply rules for building sources it contributes -Core/Src/Components/%.o Core/Src/Components/%.su Core/Src/Components/%.cyclo: ../Core/Src/Components/%.cpp Core/Src/Components/subdir.mk - arm-none-eabi-g++ "$<" -mcpu=cortex-m3 -std=gnu++14 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xB -c -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-use-cxa-atexit -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=standard_c_nano_cpp.specs -mfloat-abi=soft -mthumb -o "$@" - -clean: clean-Core-2f-Src-2f-Components - -clean-Core-2f-Src-2f-Components: - -$(RM) ./Core/Src/Components/BTS7960B.cyclo ./Core/Src/Components/BTS7960B.d ./Core/Src/Components/BTS7960B.o ./Core/Src/Components/BTS7960B.su ./Core/Src/Components/ESP8266.cyclo ./Core/Src/Components/ESP8266.d ./Core/Src/Components/ESP8266.o ./Core/Src/Components/ESP8266.su ./Core/Src/Components/SerialDebug.cyclo ./Core/Src/Components/SerialDebug.d ./Core/Src/Components/SerialDebug.o ./Core/Src/Components/SerialDebug.su ./Core/Src/Components/Start.cyclo ./Core/Src/Components/Start.d ./Core/Src/Components/Start.o ./Core/Src/Components/Start.su ./Core/Src/Components/StaticFIFO.cyclo ./Core/Src/Components/StaticFIFO.d ./Core/Src/Components/StaticFIFO.o ./Core/Src/Components/StaticFIFO.su - -.PHONY: clean-Core-2f-Src-2f-Components - diff --git a/Code/STM32/Debug/Core/Src/subdir.mk b/Code/STM32/Debug/Core/Src/subdir.mk deleted file mode 100644 index 63c3c34..0000000 --- a/Code/STM32/Debug/Core/Src/subdir.mk +++ /dev/null @@ -1,42 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (10.3-2021.10) -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_SRCS += \ -../Core/Src/main.c \ -../Core/Src/stm32f1xx_hal_msp.c \ -../Core/Src/stm32f1xx_it.c \ -../Core/Src/syscalls.c \ -../Core/Src/sysmem.c \ -../Core/Src/system_stm32f1xx.c - -C_DEPS += \ -./Core/Src/main.d \ -./Core/Src/stm32f1xx_hal_msp.d \ -./Core/Src/stm32f1xx_it.d \ -./Core/Src/syscalls.d \ -./Core/Src/sysmem.d \ -./Core/Src/system_stm32f1xx.d - -OBJS += \ -./Core/Src/main.o \ -./Core/Src/stm32f1xx_hal_msp.o \ -./Core/Src/stm32f1xx_it.o \ -./Core/Src/syscalls.o \ -./Core/Src/sysmem.o \ -./Core/Src/system_stm32f1xx.o - - -# Each subdirectory must supply rules for building sources it contributes -Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk - arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xB -c -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=standard_c_nano_cpp.specs -mfloat-abi=soft -mthumb -o "$@" - -clean: clean-Core-2f-Src - -clean-Core-2f-Src: - -$(RM) ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/stm32f1xx_hal_msp.cyclo ./Core/Src/stm32f1xx_hal_msp.d ./Core/Src/stm32f1xx_hal_msp.o ./Core/Src/stm32f1xx_hal_msp.su ./Core/Src/stm32f1xx_it.cyclo ./Core/Src/stm32f1xx_it.d ./Core/Src/stm32f1xx_it.o ./Core/Src/stm32f1xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f1xx.cyclo ./Core/Src/system_stm32f1xx.d ./Core/Src/system_stm32f1xx.o ./Core/Src/system_stm32f1xx.su - -.PHONY: clean-Core-2f-Src - diff --git a/Code/STM32/Debug/Core/Startup/subdir.mk b/Code/STM32/Debug/Core/Startup/subdir.mk deleted file mode 100644 index 59e8746..0000000 --- a/Code/STM32/Debug/Core/Startup/subdir.mk +++ /dev/null @@ -1,27 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (10.3-2021.10) -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -S_SRCS += \ -../Core/Startup/startup_stm32f103c8tx.s - -S_DEPS += \ -./Core/Startup/startup_stm32f103c8tx.d - -OBJS += \ -./Core/Startup/startup_stm32f103c8tx.o - - -# Each subdirectory must supply rules for building sources it contributes -Core/Startup/%.o: ../Core/Startup/%.s Core/Startup/subdir.mk - arm-none-eabi-gcc -mcpu=cortex-m3 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=standard_c_nano_cpp.specs -mfloat-abi=soft -mthumb -o "$@" "$<" - -clean: clean-Core-2f-Startup - -clean-Core-2f-Startup: - -$(RM) ./Core/Startup/startup_stm32f103c8tx.d ./Core/Startup/startup_stm32f103c8tx.o - -.PHONY: clean-Core-2f-Startup - diff --git a/Code/STM32/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk b/Code/STM32/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk deleted file mode 100644 index 6ce14f6..0000000 --- a/Code/STM32/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk +++ /dev/null @@ -1,75 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (10.3-2021.10) -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_SRCS += \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c - -C_DEPS += \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.d - -OBJS += \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.o - - -# Each subdirectory must supply rules for building sources it contributes -Drivers/STM32F1xx_HAL_Driver/Src/%.o Drivers/STM32F1xx_HAL_Driver/Src/%.su Drivers/STM32F1xx_HAL_Driver/Src/%.cyclo: ../Drivers/STM32F1xx_HAL_Driver/Src/%.c Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk - arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xB -c -I../Core/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=standard_c_nano_cpp.specs -mfloat-abi=soft -mthumb -o "$@" - -clean: clean-Drivers-2f-STM32F1xx_HAL_Driver-2f-Src - -clean-Drivers-2f-STM32F1xx_HAL_Driver-2f-Src: - -$(RM) ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.su - -.PHONY: clean-Drivers-2f-STM32F1xx_HAL_Driver-2f-Src - diff --git a/Code/STM32/Debug/F103C8-PFC.list b/Code/STM32/Debug/F103C8-PFC.list deleted file mode 100644 index 13f1410..0000000 --- a/Code/STM32/Debug/F103C8-PFC.list +++ /dev/null @@ -1,23578 +0,0 @@ - -F103C8-PFC.elf: file format elf32-littlearm - -Sections: -Idx Name Size VMA LMA File off Algn - 0 .isr_vector 0000010c 08000000 08000000 00010000 2**0 - CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 0000adac 08000110 08000110 00010110 2**3 - CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 000005b4 0800aec0 0800aec0 0001aec0 2**3 - CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 0800b474 0800b474 000209c8 2**0 - CONTENTS - 4 .ARM 00000008 0800b474 0800b474 0001b474 2**2 - CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 0800b47c 0800b47c 000209c8 2**0 - CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 0000000c 0800b47c 0800b47c 0001b47c 2**2 - CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000008 0800b488 0800b488 0001b488 2**2 - CONTENTS, ALLOC, LOAD, DATA - 8 .data 000009c8 20000000 0800b490 00020000 2**3 - CONTENTS, ALLOC, LOAD, DATA - 9 .bss 000009b0 200009c8 0800be58 000209c8 2**3 - ALLOC - 10 ._user_heap_stack 00000600 20001378 0800be58 00021378 2**0 - ALLOC - 11 .ARM.attributes 00000029 00000000 00000000 000209c8 2**0 - CONTENTS, READONLY - 12 .debug_info 00014d4a 00000000 00000000 000209f1 2**0 - CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 0000352c 00000000 00000000 0003573b 2**0 - CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 000010e8 00000000 00000000 00038c68 2**3 - CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_ranges 00001010 00000000 00000000 00039d50 2**3 - CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 0001c559 00000000 00000000 0003ad60 2**0 - CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 00013315 00000000 00000000 000572b9 2**0 - CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 000917c3 00000000 00000000 0006a5ce 2**0 - CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000050 00000000 00000000 000fbd91 2**0 - CONTENTS, READONLY - 20 .debug_frame 00005c74 00000000 00000000 000fbde4 2**2 - CONTENTS, READONLY, DEBUGGING, OCTETS - -Disassembly of section .text: - -08000110 <__do_global_dtors_aux>: - 8000110: b510 push {r4, lr} - 8000112: 4c05 ldr r4, [pc, #20] ; (8000128 <__do_global_dtors_aux+0x18>) - 8000114: 7823 ldrb r3, [r4, #0] - 8000116: b933 cbnz r3, 8000126 <__do_global_dtors_aux+0x16> - 8000118: 4b04 ldr r3, [pc, #16] ; (800012c <__do_global_dtors_aux+0x1c>) - 800011a: b113 cbz r3, 8000122 <__do_global_dtors_aux+0x12> - 800011c: 4804 ldr r0, [pc, #16] ; (8000130 <__do_global_dtors_aux+0x20>) - 800011e: f3af 8000 nop.w - 8000122: 2301 movs r3, #1 - 8000124: 7023 strb r3, [r4, #0] - 8000126: bd10 pop {r4, pc} - 8000128: 200009c8 .word 0x200009c8 - 800012c: 00000000 .word 0x00000000 - 8000130: 0800aea4 .word 0x0800aea4 - -08000134 : - 8000134: b508 push {r3, lr} - 8000136: 4b03 ldr r3, [pc, #12] ; (8000144 ) - 8000138: b11b cbz r3, 8000142 - 800013a: 4903 ldr r1, [pc, #12] ; (8000148 ) - 800013c: 4803 ldr r0, [pc, #12] ; (800014c ) - 800013e: f3af 8000 nop.w - 8000142: bd08 pop {r3, pc} - 8000144: 00000000 .word 0x00000000 - 8000148: 200009cc .word 0x200009cc - 800014c: 0800aea4 .word 0x0800aea4 - -08000150 : - 8000150: f810 2b01 ldrb.w r2, [r0], #1 - 8000154: f811 3b01 ldrb.w r3, [r1], #1 - 8000158: 2a01 cmp r2, #1 - 800015a: bf28 it cs - 800015c: 429a cmpcs r2, r3 - 800015e: d0f7 beq.n 8000150 - 8000160: 1ad0 subs r0, r2, r3 - 8000162: 4770 bx lr - -08000164 : - 8000164: 4603 mov r3, r0 - 8000166: f813 2b01 ldrb.w r2, [r3], #1 - 800016a: 2a00 cmp r2, #0 - 800016c: d1fb bne.n 8000166 - 800016e: 1a18 subs r0, r3, r0 - 8000170: 3801 subs r0, #1 - 8000172: 4770 bx lr - -08000174 <__aeabi_drsub>: - 8000174: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 - 8000178: e002 b.n 8000180 <__adddf3> - 800017a: bf00 nop - -0800017c <__aeabi_dsub>: - 800017c: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000 - -08000180 <__adddf3>: - 8000180: b530 push {r4, r5, lr} - 8000182: ea4f 0441 mov.w r4, r1, lsl #1 - 8000186: ea4f 0543 mov.w r5, r3, lsl #1 - 800018a: ea94 0f05 teq r4, r5 - 800018e: bf08 it eq - 8000190: ea90 0f02 teqeq r0, r2 - 8000194: bf1f itttt ne - 8000196: ea54 0c00 orrsne.w ip, r4, r0 - 800019a: ea55 0c02 orrsne.w ip, r5, r2 - 800019e: ea7f 5c64 mvnsne.w ip, r4, asr #21 - 80001a2: ea7f 5c65 mvnsne.w ip, r5, asr #21 - 80001a6: f000 80e2 beq.w 800036e <__adddf3+0x1ee> - 80001aa: ea4f 5454 mov.w r4, r4, lsr #21 - 80001ae: ebd4 5555 rsbs r5, r4, r5, lsr #21 - 80001b2: bfb8 it lt - 80001b4: 426d neglt r5, r5 - 80001b6: dd0c ble.n 80001d2 <__adddf3+0x52> - 80001b8: 442c add r4, r5 - 80001ba: ea80 0202 eor.w r2, r0, r2 - 80001be: ea81 0303 eor.w r3, r1, r3 - 80001c2: ea82 0000 eor.w r0, r2, r0 - 80001c6: ea83 0101 eor.w r1, r3, r1 - 80001ca: ea80 0202 eor.w r2, r0, r2 - 80001ce: ea81 0303 eor.w r3, r1, r3 - 80001d2: 2d36 cmp r5, #54 ; 0x36 - 80001d4: bf88 it hi - 80001d6: bd30 pophi {r4, r5, pc} - 80001d8: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 - 80001dc: ea4f 3101 mov.w r1, r1, lsl #12 - 80001e0: f44f 1c80 mov.w ip, #1048576 ; 0x100000 - 80001e4: ea4c 3111 orr.w r1, ip, r1, lsr #12 - 80001e8: d002 beq.n 80001f0 <__adddf3+0x70> - 80001ea: 4240 negs r0, r0 - 80001ec: eb61 0141 sbc.w r1, r1, r1, lsl #1 - 80001f0: f013 4f00 tst.w r3, #2147483648 ; 0x80000000 - 80001f4: ea4f 3303 mov.w r3, r3, lsl #12 - 80001f8: ea4c 3313 orr.w r3, ip, r3, lsr #12 - 80001fc: d002 beq.n 8000204 <__adddf3+0x84> - 80001fe: 4252 negs r2, r2 - 8000200: eb63 0343 sbc.w r3, r3, r3, lsl #1 - 8000204: ea94 0f05 teq r4, r5 - 8000208: f000 80a7 beq.w 800035a <__adddf3+0x1da> - 800020c: f1a4 0401 sub.w r4, r4, #1 - 8000210: f1d5 0e20 rsbs lr, r5, #32 - 8000214: db0d blt.n 8000232 <__adddf3+0xb2> - 8000216: fa02 fc0e lsl.w ip, r2, lr - 800021a: fa22 f205 lsr.w r2, r2, r5 - 800021e: 1880 adds r0, r0, r2 - 8000220: f141 0100 adc.w r1, r1, #0 - 8000224: fa03 f20e lsl.w r2, r3, lr - 8000228: 1880 adds r0, r0, r2 - 800022a: fa43 f305 asr.w r3, r3, r5 - 800022e: 4159 adcs r1, r3 - 8000230: e00e b.n 8000250 <__adddf3+0xd0> - 8000232: f1a5 0520 sub.w r5, r5, #32 - 8000236: f10e 0e20 add.w lr, lr, #32 - 800023a: 2a01 cmp r2, #1 - 800023c: fa03 fc0e lsl.w ip, r3, lr - 8000240: bf28 it cs - 8000242: f04c 0c02 orrcs.w ip, ip, #2 - 8000246: fa43 f305 asr.w r3, r3, r5 - 800024a: 18c0 adds r0, r0, r3 - 800024c: eb51 71e3 adcs.w r1, r1, r3, asr #31 - 8000250: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 - 8000254: d507 bpl.n 8000266 <__adddf3+0xe6> - 8000256: f04f 0e00 mov.w lr, #0 - 800025a: f1dc 0c00 rsbs ip, ip, #0 - 800025e: eb7e 0000 sbcs.w r0, lr, r0 - 8000262: eb6e 0101 sbc.w r1, lr, r1 - 8000266: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000 - 800026a: d31b bcc.n 80002a4 <__adddf3+0x124> - 800026c: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000 - 8000270: d30c bcc.n 800028c <__adddf3+0x10c> - 8000272: 0849 lsrs r1, r1, #1 - 8000274: ea5f 0030 movs.w r0, r0, rrx - 8000278: ea4f 0c3c mov.w ip, ip, rrx - 800027c: f104 0401 add.w r4, r4, #1 - 8000280: ea4f 5244 mov.w r2, r4, lsl #21 - 8000284: f512 0f80 cmn.w r2, #4194304 ; 0x400000 - 8000288: f080 809a bcs.w 80003c0 <__adddf3+0x240> - 800028c: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 - 8000290: bf08 it eq - 8000292: ea5f 0c50 movseq.w ip, r0, lsr #1 - 8000296: f150 0000 adcs.w r0, r0, #0 - 800029a: eb41 5104 adc.w r1, r1, r4, lsl #20 - 800029e: ea41 0105 orr.w r1, r1, r5 - 80002a2: bd30 pop {r4, r5, pc} - 80002a4: ea5f 0c4c movs.w ip, ip, lsl #1 - 80002a8: 4140 adcs r0, r0 - 80002aa: eb41 0101 adc.w r1, r1, r1 - 80002ae: 3c01 subs r4, #1 - 80002b0: bf28 it cs - 80002b2: f5b1 1f80 cmpcs.w r1, #1048576 ; 0x100000 - 80002b6: d2e9 bcs.n 800028c <__adddf3+0x10c> - 80002b8: f091 0f00 teq r1, #0 - 80002bc: bf04 itt eq - 80002be: 4601 moveq r1, r0 - 80002c0: 2000 moveq r0, #0 - 80002c2: fab1 f381 clz r3, r1 - 80002c6: bf08 it eq - 80002c8: 3320 addeq r3, #32 - 80002ca: f1a3 030b sub.w r3, r3, #11 - 80002ce: f1b3 0220 subs.w r2, r3, #32 - 80002d2: da0c bge.n 80002ee <__adddf3+0x16e> - 80002d4: 320c adds r2, #12 - 80002d6: dd08 ble.n 80002ea <__adddf3+0x16a> - 80002d8: f102 0c14 add.w ip, r2, #20 - 80002dc: f1c2 020c rsb r2, r2, #12 - 80002e0: fa01 f00c lsl.w r0, r1, ip - 80002e4: fa21 f102 lsr.w r1, r1, r2 - 80002e8: e00c b.n 8000304 <__adddf3+0x184> - 80002ea: f102 0214 add.w r2, r2, #20 - 80002ee: bfd8 it le - 80002f0: f1c2 0c20 rsble ip, r2, #32 - 80002f4: fa01 f102 lsl.w r1, r1, r2 - 80002f8: fa20 fc0c lsr.w ip, r0, ip - 80002fc: bfdc itt le - 80002fe: ea41 010c orrle.w r1, r1, ip - 8000302: 4090 lslle r0, r2 - 8000304: 1ae4 subs r4, r4, r3 - 8000306: bfa2 ittt ge - 8000308: eb01 5104 addge.w r1, r1, r4, lsl #20 - 800030c: 4329 orrge r1, r5 - 800030e: bd30 popge {r4, r5, pc} - 8000310: ea6f 0404 mvn.w r4, r4 - 8000314: 3c1f subs r4, #31 - 8000316: da1c bge.n 8000352 <__adddf3+0x1d2> - 8000318: 340c adds r4, #12 - 800031a: dc0e bgt.n 800033a <__adddf3+0x1ba> - 800031c: f104 0414 add.w r4, r4, #20 - 8000320: f1c4 0220 rsb r2, r4, #32 - 8000324: fa20 f004 lsr.w r0, r0, r4 - 8000328: fa01 f302 lsl.w r3, r1, r2 - 800032c: ea40 0003 orr.w r0, r0, r3 - 8000330: fa21 f304 lsr.w r3, r1, r4 - 8000334: ea45 0103 orr.w r1, r5, r3 - 8000338: bd30 pop {r4, r5, pc} - 800033a: f1c4 040c rsb r4, r4, #12 - 800033e: f1c4 0220 rsb r2, r4, #32 - 8000342: fa20 f002 lsr.w r0, r0, r2 - 8000346: fa01 f304 lsl.w r3, r1, r4 - 800034a: ea40 0003 orr.w r0, r0, r3 - 800034e: 4629 mov r1, r5 - 8000350: bd30 pop {r4, r5, pc} - 8000352: fa21 f004 lsr.w r0, r1, r4 - 8000356: 4629 mov r1, r5 - 8000358: bd30 pop {r4, r5, pc} - 800035a: f094 0f00 teq r4, #0 - 800035e: f483 1380 eor.w r3, r3, #1048576 ; 0x100000 - 8000362: bf06 itte eq - 8000364: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000 - 8000368: 3401 addeq r4, #1 - 800036a: 3d01 subne r5, #1 - 800036c: e74e b.n 800020c <__adddf3+0x8c> - 800036e: ea7f 5c64 mvns.w ip, r4, asr #21 - 8000372: bf18 it ne - 8000374: ea7f 5c65 mvnsne.w ip, r5, asr #21 - 8000378: d029 beq.n 80003ce <__adddf3+0x24e> - 800037a: ea94 0f05 teq r4, r5 - 800037e: bf08 it eq - 8000380: ea90 0f02 teqeq r0, r2 - 8000384: d005 beq.n 8000392 <__adddf3+0x212> - 8000386: ea54 0c00 orrs.w ip, r4, r0 - 800038a: bf04 itt eq - 800038c: 4619 moveq r1, r3 - 800038e: 4610 moveq r0, r2 - 8000390: bd30 pop {r4, r5, pc} - 8000392: ea91 0f03 teq r1, r3 - 8000396: bf1e ittt ne - 8000398: 2100 movne r1, #0 - 800039a: 2000 movne r0, #0 - 800039c: bd30 popne {r4, r5, pc} - 800039e: ea5f 5c54 movs.w ip, r4, lsr #21 - 80003a2: d105 bne.n 80003b0 <__adddf3+0x230> - 80003a4: 0040 lsls r0, r0, #1 - 80003a6: 4149 adcs r1, r1 - 80003a8: bf28 it cs - 80003aa: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000 - 80003ae: bd30 pop {r4, r5, pc} - 80003b0: f514 0480 adds.w r4, r4, #4194304 ; 0x400000 - 80003b4: bf3c itt cc - 80003b6: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000 - 80003ba: bd30 popcc {r4, r5, pc} - 80003bc: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 - 80003c0: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000 - 80003c4: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 - 80003c8: f04f 0000 mov.w r0, #0 - 80003cc: bd30 pop {r4, r5, pc} - 80003ce: ea7f 5c64 mvns.w ip, r4, asr #21 - 80003d2: bf1a itte ne - 80003d4: 4619 movne r1, r3 - 80003d6: 4610 movne r0, r2 - 80003d8: ea7f 5c65 mvnseq.w ip, r5, asr #21 - 80003dc: bf1c itt ne - 80003de: 460b movne r3, r1 - 80003e0: 4602 movne r2, r0 - 80003e2: ea50 3401 orrs.w r4, r0, r1, lsl #12 - 80003e6: bf06 itte eq - 80003e8: ea52 3503 orrseq.w r5, r2, r3, lsl #12 - 80003ec: ea91 0f03 teqeq r1, r3 - 80003f0: f441 2100 orrne.w r1, r1, #524288 ; 0x80000 - 80003f4: bd30 pop {r4, r5, pc} - 80003f6: bf00 nop - -080003f8 <__aeabi_ui2d>: - 80003f8: f090 0f00 teq r0, #0 - 80003fc: bf04 itt eq - 80003fe: 2100 moveq r1, #0 - 8000400: 4770 bxeq lr - 8000402: b530 push {r4, r5, lr} - 8000404: f44f 6480 mov.w r4, #1024 ; 0x400 - 8000408: f104 0432 add.w r4, r4, #50 ; 0x32 - 800040c: f04f 0500 mov.w r5, #0 - 8000410: f04f 0100 mov.w r1, #0 - 8000414: e750 b.n 80002b8 <__adddf3+0x138> - 8000416: bf00 nop - -08000418 <__aeabi_i2d>: - 8000418: f090 0f00 teq r0, #0 - 800041c: bf04 itt eq - 800041e: 2100 moveq r1, #0 - 8000420: 4770 bxeq lr - 8000422: b530 push {r4, r5, lr} - 8000424: f44f 6480 mov.w r4, #1024 ; 0x400 - 8000428: f104 0432 add.w r4, r4, #50 ; 0x32 - 800042c: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000 - 8000430: bf48 it mi - 8000432: 4240 negmi r0, r0 - 8000434: f04f 0100 mov.w r1, #0 - 8000438: e73e b.n 80002b8 <__adddf3+0x138> - 800043a: bf00 nop - -0800043c <__aeabi_f2d>: - 800043c: 0042 lsls r2, r0, #1 - 800043e: ea4f 01e2 mov.w r1, r2, asr #3 - 8000442: ea4f 0131 mov.w r1, r1, rrx - 8000446: ea4f 7002 mov.w r0, r2, lsl #28 - 800044a: bf1f itttt ne - 800044c: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000 - 8000450: f093 4f7f teqne r3, #4278190080 ; 0xff000000 - 8000454: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000 - 8000458: 4770 bxne lr - 800045a: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000 - 800045e: bf08 it eq - 8000460: 4770 bxeq lr - 8000462: f093 4f7f teq r3, #4278190080 ; 0xff000000 - 8000466: bf04 itt eq - 8000468: f441 2100 orreq.w r1, r1, #524288 ; 0x80000 - 800046c: 4770 bxeq lr - 800046e: b530 push {r4, r5, lr} - 8000470: f44f 7460 mov.w r4, #896 ; 0x380 - 8000474: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 - 8000478: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 - 800047c: e71c b.n 80002b8 <__adddf3+0x138> - 800047e: bf00 nop - -08000480 <__aeabi_ul2d>: - 8000480: ea50 0201 orrs.w r2, r0, r1 - 8000484: bf08 it eq - 8000486: 4770 bxeq lr - 8000488: b530 push {r4, r5, lr} - 800048a: f04f 0500 mov.w r5, #0 - 800048e: e00a b.n 80004a6 <__aeabi_l2d+0x16> - -08000490 <__aeabi_l2d>: - 8000490: ea50 0201 orrs.w r2, r0, r1 - 8000494: bf08 it eq - 8000496: 4770 bxeq lr - 8000498: b530 push {r4, r5, lr} - 800049a: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000 - 800049e: d502 bpl.n 80004a6 <__aeabi_l2d+0x16> - 80004a0: 4240 negs r0, r0 - 80004a2: eb61 0141 sbc.w r1, r1, r1, lsl #1 - 80004a6: f44f 6480 mov.w r4, #1024 ; 0x400 - 80004aa: f104 0432 add.w r4, r4, #50 ; 0x32 - 80004ae: ea5f 5c91 movs.w ip, r1, lsr #22 - 80004b2: f43f aed8 beq.w 8000266 <__adddf3+0xe6> - 80004b6: f04f 0203 mov.w r2, #3 - 80004ba: ea5f 0cdc movs.w ip, ip, lsr #3 - 80004be: bf18 it ne - 80004c0: 3203 addne r2, #3 - 80004c2: ea5f 0cdc movs.w ip, ip, lsr #3 - 80004c6: bf18 it ne - 80004c8: 3203 addne r2, #3 - 80004ca: eb02 02dc add.w r2, r2, ip, lsr #3 - 80004ce: f1c2 0320 rsb r3, r2, #32 - 80004d2: fa00 fc03 lsl.w ip, r0, r3 - 80004d6: fa20 f002 lsr.w r0, r0, r2 - 80004da: fa01 fe03 lsl.w lr, r1, r3 - 80004de: ea40 000e orr.w r0, r0, lr - 80004e2: fa21 f102 lsr.w r1, r1, r2 - 80004e6: 4414 add r4, r2 - 80004e8: e6bd b.n 8000266 <__adddf3+0xe6> - 80004ea: bf00 nop - -080004ec <__aeabi_dmul>: - 80004ec: b570 push {r4, r5, r6, lr} - 80004ee: f04f 0cff mov.w ip, #255 ; 0xff - 80004f2: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 - 80004f6: ea1c 5411 ands.w r4, ip, r1, lsr #20 - 80004fa: bf1d ittte ne - 80004fc: ea1c 5513 andsne.w r5, ip, r3, lsr #20 - 8000500: ea94 0f0c teqne r4, ip - 8000504: ea95 0f0c teqne r5, ip - 8000508: f000 f8de bleq 80006c8 <__aeabi_dmul+0x1dc> - 800050c: 442c add r4, r5 - 800050e: ea81 0603 eor.w r6, r1, r3 - 8000512: ea21 514c bic.w r1, r1, ip, lsl #21 - 8000516: ea23 534c bic.w r3, r3, ip, lsl #21 - 800051a: ea50 3501 orrs.w r5, r0, r1, lsl #12 - 800051e: bf18 it ne - 8000520: ea52 3503 orrsne.w r5, r2, r3, lsl #12 - 8000524: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 - 8000528: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 - 800052c: d038 beq.n 80005a0 <__aeabi_dmul+0xb4> - 800052e: fba0 ce02 umull ip, lr, r0, r2 - 8000532: f04f 0500 mov.w r5, #0 - 8000536: fbe1 e502 umlal lr, r5, r1, r2 - 800053a: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000 - 800053e: fbe0 e503 umlal lr, r5, r0, r3 - 8000542: f04f 0600 mov.w r6, #0 - 8000546: fbe1 5603 umlal r5, r6, r1, r3 - 800054a: f09c 0f00 teq ip, #0 - 800054e: bf18 it ne - 8000550: f04e 0e01 orrne.w lr, lr, #1 - 8000554: f1a4 04ff sub.w r4, r4, #255 ; 0xff - 8000558: f5b6 7f00 cmp.w r6, #512 ; 0x200 - 800055c: f564 7440 sbc.w r4, r4, #768 ; 0x300 - 8000560: d204 bcs.n 800056c <__aeabi_dmul+0x80> - 8000562: ea5f 0e4e movs.w lr, lr, lsl #1 - 8000566: 416d adcs r5, r5 - 8000568: eb46 0606 adc.w r6, r6, r6 - 800056c: ea42 21c6 orr.w r1, r2, r6, lsl #11 - 8000570: ea41 5155 orr.w r1, r1, r5, lsr #21 - 8000574: ea4f 20c5 mov.w r0, r5, lsl #11 - 8000578: ea40 505e orr.w r0, r0, lr, lsr #21 - 800057c: ea4f 2ece mov.w lr, lr, lsl #11 - 8000580: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd - 8000584: bf88 it hi - 8000586: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 - 800058a: d81e bhi.n 80005ca <__aeabi_dmul+0xde> - 800058c: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000 - 8000590: bf08 it eq - 8000592: ea5f 0e50 movseq.w lr, r0, lsr #1 - 8000596: f150 0000 adcs.w r0, r0, #0 - 800059a: eb41 5104 adc.w r1, r1, r4, lsl #20 - 800059e: bd70 pop {r4, r5, r6, pc} - 80005a0: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000 - 80005a4: ea46 0101 orr.w r1, r6, r1 - 80005a8: ea40 0002 orr.w r0, r0, r2 - 80005ac: ea81 0103 eor.w r1, r1, r3 - 80005b0: ebb4 045c subs.w r4, r4, ip, lsr #1 - 80005b4: bfc2 ittt gt - 80005b6: ebd4 050c rsbsgt r5, r4, ip - 80005ba: ea41 5104 orrgt.w r1, r1, r4, lsl #20 - 80005be: bd70 popgt {r4, r5, r6, pc} - 80005c0: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 - 80005c4: f04f 0e00 mov.w lr, #0 - 80005c8: 3c01 subs r4, #1 - 80005ca: f300 80ab bgt.w 8000724 <__aeabi_dmul+0x238> - 80005ce: f114 0f36 cmn.w r4, #54 ; 0x36 - 80005d2: bfde ittt le - 80005d4: 2000 movle r0, #0 - 80005d6: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000 - 80005da: bd70 pople {r4, r5, r6, pc} - 80005dc: f1c4 0400 rsb r4, r4, #0 - 80005e0: 3c20 subs r4, #32 - 80005e2: da35 bge.n 8000650 <__aeabi_dmul+0x164> - 80005e4: 340c adds r4, #12 - 80005e6: dc1b bgt.n 8000620 <__aeabi_dmul+0x134> - 80005e8: f104 0414 add.w r4, r4, #20 - 80005ec: f1c4 0520 rsb r5, r4, #32 - 80005f0: fa00 f305 lsl.w r3, r0, r5 - 80005f4: fa20 f004 lsr.w r0, r0, r4 - 80005f8: fa01 f205 lsl.w r2, r1, r5 - 80005fc: ea40 0002 orr.w r0, r0, r2 - 8000600: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000 - 8000604: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 - 8000608: eb10 70d3 adds.w r0, r0, r3, lsr #31 - 800060c: fa21 f604 lsr.w r6, r1, r4 - 8000610: eb42 0106 adc.w r1, r2, r6 - 8000614: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 - 8000618: bf08 it eq - 800061a: ea20 70d3 biceq.w r0, r0, r3, lsr #31 - 800061e: bd70 pop {r4, r5, r6, pc} - 8000620: f1c4 040c rsb r4, r4, #12 - 8000624: f1c4 0520 rsb r5, r4, #32 - 8000628: fa00 f304 lsl.w r3, r0, r4 - 800062c: fa20 f005 lsr.w r0, r0, r5 - 8000630: fa01 f204 lsl.w r2, r1, r4 - 8000634: ea40 0002 orr.w r0, r0, r2 - 8000638: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 - 800063c: eb10 70d3 adds.w r0, r0, r3, lsr #31 - 8000640: f141 0100 adc.w r1, r1, #0 - 8000644: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 - 8000648: bf08 it eq - 800064a: ea20 70d3 biceq.w r0, r0, r3, lsr #31 - 800064e: bd70 pop {r4, r5, r6, pc} - 8000650: f1c4 0520 rsb r5, r4, #32 - 8000654: fa00 f205 lsl.w r2, r0, r5 - 8000658: ea4e 0e02 orr.w lr, lr, r2 - 800065c: fa20 f304 lsr.w r3, r0, r4 - 8000660: fa01 f205 lsl.w r2, r1, r5 - 8000664: ea43 0302 orr.w r3, r3, r2 - 8000668: fa21 f004 lsr.w r0, r1, r4 - 800066c: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 - 8000670: fa21 f204 lsr.w r2, r1, r4 - 8000674: ea20 0002 bic.w r0, r0, r2 - 8000678: eb00 70d3 add.w r0, r0, r3, lsr #31 - 800067c: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 - 8000680: bf08 it eq - 8000682: ea20 70d3 biceq.w r0, r0, r3, lsr #31 - 8000686: bd70 pop {r4, r5, r6, pc} - 8000688: f094 0f00 teq r4, #0 - 800068c: d10f bne.n 80006ae <__aeabi_dmul+0x1c2> - 800068e: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000 - 8000692: 0040 lsls r0, r0, #1 - 8000694: eb41 0101 adc.w r1, r1, r1 - 8000698: f411 1f80 tst.w r1, #1048576 ; 0x100000 - 800069c: bf08 it eq - 800069e: 3c01 subeq r4, #1 - 80006a0: d0f7 beq.n 8000692 <__aeabi_dmul+0x1a6> - 80006a2: ea41 0106 orr.w r1, r1, r6 - 80006a6: f095 0f00 teq r5, #0 - 80006aa: bf18 it ne - 80006ac: 4770 bxne lr - 80006ae: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000 - 80006b2: 0052 lsls r2, r2, #1 - 80006b4: eb43 0303 adc.w r3, r3, r3 - 80006b8: f413 1f80 tst.w r3, #1048576 ; 0x100000 - 80006bc: bf08 it eq - 80006be: 3d01 subeq r5, #1 - 80006c0: d0f7 beq.n 80006b2 <__aeabi_dmul+0x1c6> - 80006c2: ea43 0306 orr.w r3, r3, r6 - 80006c6: 4770 bx lr - 80006c8: ea94 0f0c teq r4, ip - 80006cc: ea0c 5513 and.w r5, ip, r3, lsr #20 - 80006d0: bf18 it ne - 80006d2: ea95 0f0c teqne r5, ip - 80006d6: d00c beq.n 80006f2 <__aeabi_dmul+0x206> - 80006d8: ea50 0641 orrs.w r6, r0, r1, lsl #1 - 80006dc: bf18 it ne - 80006de: ea52 0643 orrsne.w r6, r2, r3, lsl #1 - 80006e2: d1d1 bne.n 8000688 <__aeabi_dmul+0x19c> - 80006e4: ea81 0103 eor.w r1, r1, r3 - 80006e8: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 - 80006ec: f04f 0000 mov.w r0, #0 - 80006f0: bd70 pop {r4, r5, r6, pc} - 80006f2: ea50 0641 orrs.w r6, r0, r1, lsl #1 - 80006f6: bf06 itte eq - 80006f8: 4610 moveq r0, r2 - 80006fa: 4619 moveq r1, r3 - 80006fc: ea52 0643 orrsne.w r6, r2, r3, lsl #1 - 8000700: d019 beq.n 8000736 <__aeabi_dmul+0x24a> - 8000702: ea94 0f0c teq r4, ip - 8000706: d102 bne.n 800070e <__aeabi_dmul+0x222> - 8000708: ea50 3601 orrs.w r6, r0, r1, lsl #12 - 800070c: d113 bne.n 8000736 <__aeabi_dmul+0x24a> - 800070e: ea95 0f0c teq r5, ip - 8000712: d105 bne.n 8000720 <__aeabi_dmul+0x234> - 8000714: ea52 3603 orrs.w r6, r2, r3, lsl #12 - 8000718: bf1c itt ne - 800071a: 4610 movne r0, r2 - 800071c: 4619 movne r1, r3 - 800071e: d10a bne.n 8000736 <__aeabi_dmul+0x24a> - 8000720: ea81 0103 eor.w r1, r1, r3 - 8000724: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 - 8000728: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 - 800072c: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 - 8000730: f04f 0000 mov.w r0, #0 - 8000734: bd70 pop {r4, r5, r6, pc} - 8000736: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 - 800073a: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000 - 800073e: bd70 pop {r4, r5, r6, pc} - -08000740 <__aeabi_ddiv>: - 8000740: b570 push {r4, r5, r6, lr} - 8000742: f04f 0cff mov.w ip, #255 ; 0xff - 8000746: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 - 800074a: ea1c 5411 ands.w r4, ip, r1, lsr #20 - 800074e: bf1d ittte ne - 8000750: ea1c 5513 andsne.w r5, ip, r3, lsr #20 - 8000754: ea94 0f0c teqne r4, ip - 8000758: ea95 0f0c teqne r5, ip - 800075c: f000 f8a7 bleq 80008ae <__aeabi_ddiv+0x16e> - 8000760: eba4 0405 sub.w r4, r4, r5 - 8000764: ea81 0e03 eor.w lr, r1, r3 - 8000768: ea52 3503 orrs.w r5, r2, r3, lsl #12 - 800076c: ea4f 3101 mov.w r1, r1, lsl #12 - 8000770: f000 8088 beq.w 8000884 <__aeabi_ddiv+0x144> - 8000774: ea4f 3303 mov.w r3, r3, lsl #12 - 8000778: f04f 5580 mov.w r5, #268435456 ; 0x10000000 - 800077c: ea45 1313 orr.w r3, r5, r3, lsr #4 - 8000780: ea43 6312 orr.w r3, r3, r2, lsr #24 - 8000784: ea4f 2202 mov.w r2, r2, lsl #8 - 8000788: ea45 1511 orr.w r5, r5, r1, lsr #4 - 800078c: ea45 6510 orr.w r5, r5, r0, lsr #24 - 8000790: ea4f 2600 mov.w r6, r0, lsl #8 - 8000794: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000 - 8000798: 429d cmp r5, r3 - 800079a: bf08 it eq - 800079c: 4296 cmpeq r6, r2 - 800079e: f144 04fd adc.w r4, r4, #253 ; 0xfd - 80007a2: f504 7440 add.w r4, r4, #768 ; 0x300 - 80007a6: d202 bcs.n 80007ae <__aeabi_ddiv+0x6e> - 80007a8: 085b lsrs r3, r3, #1 - 80007aa: ea4f 0232 mov.w r2, r2, rrx - 80007ae: 1ab6 subs r6, r6, r2 - 80007b0: eb65 0503 sbc.w r5, r5, r3 - 80007b4: 085b lsrs r3, r3, #1 - 80007b6: ea4f 0232 mov.w r2, r2, rrx - 80007ba: f44f 1080 mov.w r0, #1048576 ; 0x100000 - 80007be: f44f 2c00 mov.w ip, #524288 ; 0x80000 - 80007c2: ebb6 0e02 subs.w lr, r6, r2 - 80007c6: eb75 0e03 sbcs.w lr, r5, r3 - 80007ca: bf22 ittt cs - 80007cc: 1ab6 subcs r6, r6, r2 - 80007ce: 4675 movcs r5, lr - 80007d0: ea40 000c orrcs.w r0, r0, ip - 80007d4: 085b lsrs r3, r3, #1 - 80007d6: ea4f 0232 mov.w r2, r2, rrx - 80007da: ebb6 0e02 subs.w lr, r6, r2 - 80007de: eb75 0e03 sbcs.w lr, r5, r3 - 80007e2: bf22 ittt cs - 80007e4: 1ab6 subcs r6, r6, r2 - 80007e6: 4675 movcs r5, lr - 80007e8: ea40 005c orrcs.w r0, r0, ip, lsr #1 - 80007ec: 085b lsrs r3, r3, #1 - 80007ee: ea4f 0232 mov.w r2, r2, rrx - 80007f2: ebb6 0e02 subs.w lr, r6, r2 - 80007f6: eb75 0e03 sbcs.w lr, r5, r3 - 80007fa: bf22 ittt cs - 80007fc: 1ab6 subcs r6, r6, r2 - 80007fe: 4675 movcs r5, lr - 8000800: ea40 009c orrcs.w r0, r0, ip, lsr #2 - 8000804: 085b lsrs r3, r3, #1 - 8000806: ea4f 0232 mov.w r2, r2, rrx - 800080a: ebb6 0e02 subs.w lr, r6, r2 - 800080e: eb75 0e03 sbcs.w lr, r5, r3 - 8000812: bf22 ittt cs - 8000814: 1ab6 subcs r6, r6, r2 - 8000816: 4675 movcs r5, lr - 8000818: ea40 00dc orrcs.w r0, r0, ip, lsr #3 - 800081c: ea55 0e06 orrs.w lr, r5, r6 - 8000820: d018 beq.n 8000854 <__aeabi_ddiv+0x114> - 8000822: ea4f 1505 mov.w r5, r5, lsl #4 - 8000826: ea45 7516 orr.w r5, r5, r6, lsr #28 - 800082a: ea4f 1606 mov.w r6, r6, lsl #4 - 800082e: ea4f 03c3 mov.w r3, r3, lsl #3 - 8000832: ea43 7352 orr.w r3, r3, r2, lsr #29 - 8000836: ea4f 02c2 mov.w r2, r2, lsl #3 - 800083a: ea5f 1c1c movs.w ip, ip, lsr #4 - 800083e: d1c0 bne.n 80007c2 <__aeabi_ddiv+0x82> - 8000840: f411 1f80 tst.w r1, #1048576 ; 0x100000 - 8000844: d10b bne.n 800085e <__aeabi_ddiv+0x11e> - 8000846: ea41 0100 orr.w r1, r1, r0 - 800084a: f04f 0000 mov.w r0, #0 - 800084e: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000 - 8000852: e7b6 b.n 80007c2 <__aeabi_ddiv+0x82> - 8000854: f411 1f80 tst.w r1, #1048576 ; 0x100000 - 8000858: bf04 itt eq - 800085a: 4301 orreq r1, r0 - 800085c: 2000 moveq r0, #0 - 800085e: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd - 8000862: bf88 it hi - 8000864: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 - 8000868: f63f aeaf bhi.w 80005ca <__aeabi_dmul+0xde> - 800086c: ebb5 0c03 subs.w ip, r5, r3 - 8000870: bf04 itt eq - 8000872: ebb6 0c02 subseq.w ip, r6, r2 - 8000876: ea5f 0c50 movseq.w ip, r0, lsr #1 - 800087a: f150 0000 adcs.w r0, r0, #0 - 800087e: eb41 5104 adc.w r1, r1, r4, lsl #20 - 8000882: bd70 pop {r4, r5, r6, pc} - 8000884: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000 - 8000888: ea4e 3111 orr.w r1, lr, r1, lsr #12 - 800088c: eb14 045c adds.w r4, r4, ip, lsr #1 - 8000890: bfc2 ittt gt - 8000892: ebd4 050c rsbsgt r5, r4, ip - 8000896: ea41 5104 orrgt.w r1, r1, r4, lsl #20 - 800089a: bd70 popgt {r4, r5, r6, pc} - 800089c: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 - 80008a0: f04f 0e00 mov.w lr, #0 - 80008a4: 3c01 subs r4, #1 - 80008a6: e690 b.n 80005ca <__aeabi_dmul+0xde> - 80008a8: ea45 0e06 orr.w lr, r5, r6 - 80008ac: e68d b.n 80005ca <__aeabi_dmul+0xde> - 80008ae: ea0c 5513 and.w r5, ip, r3, lsr #20 - 80008b2: ea94 0f0c teq r4, ip - 80008b6: bf08 it eq - 80008b8: ea95 0f0c teqeq r5, ip - 80008bc: f43f af3b beq.w 8000736 <__aeabi_dmul+0x24a> - 80008c0: ea94 0f0c teq r4, ip - 80008c4: d10a bne.n 80008dc <__aeabi_ddiv+0x19c> - 80008c6: ea50 3401 orrs.w r4, r0, r1, lsl #12 - 80008ca: f47f af34 bne.w 8000736 <__aeabi_dmul+0x24a> - 80008ce: ea95 0f0c teq r5, ip - 80008d2: f47f af25 bne.w 8000720 <__aeabi_dmul+0x234> - 80008d6: 4610 mov r0, r2 - 80008d8: 4619 mov r1, r3 - 80008da: e72c b.n 8000736 <__aeabi_dmul+0x24a> - 80008dc: ea95 0f0c teq r5, ip - 80008e0: d106 bne.n 80008f0 <__aeabi_ddiv+0x1b0> - 80008e2: ea52 3503 orrs.w r5, r2, r3, lsl #12 - 80008e6: f43f aefd beq.w 80006e4 <__aeabi_dmul+0x1f8> - 80008ea: 4610 mov r0, r2 - 80008ec: 4619 mov r1, r3 - 80008ee: e722 b.n 8000736 <__aeabi_dmul+0x24a> - 80008f0: ea50 0641 orrs.w r6, r0, r1, lsl #1 - 80008f4: bf18 it ne - 80008f6: ea52 0643 orrsne.w r6, r2, r3, lsl #1 - 80008fa: f47f aec5 bne.w 8000688 <__aeabi_dmul+0x19c> - 80008fe: ea50 0441 orrs.w r4, r0, r1, lsl #1 - 8000902: f47f af0d bne.w 8000720 <__aeabi_dmul+0x234> - 8000906: ea52 0543 orrs.w r5, r2, r3, lsl #1 - 800090a: f47f aeeb bne.w 80006e4 <__aeabi_dmul+0x1f8> - 800090e: e712 b.n 8000736 <__aeabi_dmul+0x24a> - -08000910 <__gedf2>: - 8000910: f04f 3cff mov.w ip, #4294967295 - 8000914: e006 b.n 8000924 <__cmpdf2+0x4> - 8000916: bf00 nop - -08000918 <__ledf2>: - 8000918: f04f 0c01 mov.w ip, #1 - 800091c: e002 b.n 8000924 <__cmpdf2+0x4> - 800091e: bf00 nop - -08000920 <__cmpdf2>: - 8000920: f04f 0c01 mov.w ip, #1 - 8000924: f84d cd04 str.w ip, [sp, #-4]! - 8000928: ea4f 0c41 mov.w ip, r1, lsl #1 - 800092c: ea7f 5c6c mvns.w ip, ip, asr #21 - 8000930: ea4f 0c43 mov.w ip, r3, lsl #1 - 8000934: bf18 it ne - 8000936: ea7f 5c6c mvnsne.w ip, ip, asr #21 - 800093a: d01b beq.n 8000974 <__cmpdf2+0x54> - 800093c: b001 add sp, #4 - 800093e: ea50 0c41 orrs.w ip, r0, r1, lsl #1 - 8000942: bf0c ite eq - 8000944: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 - 8000948: ea91 0f03 teqne r1, r3 - 800094c: bf02 ittt eq - 800094e: ea90 0f02 teqeq r0, r2 - 8000952: 2000 moveq r0, #0 - 8000954: 4770 bxeq lr - 8000956: f110 0f00 cmn.w r0, #0 - 800095a: ea91 0f03 teq r1, r3 - 800095e: bf58 it pl - 8000960: 4299 cmppl r1, r3 - 8000962: bf08 it eq - 8000964: 4290 cmpeq r0, r2 - 8000966: bf2c ite cs - 8000968: 17d8 asrcs r0, r3, #31 - 800096a: ea6f 70e3 mvncc.w r0, r3, asr #31 - 800096e: f040 0001 orr.w r0, r0, #1 - 8000972: 4770 bx lr - 8000974: ea4f 0c41 mov.w ip, r1, lsl #1 - 8000978: ea7f 5c6c mvns.w ip, ip, asr #21 - 800097c: d102 bne.n 8000984 <__cmpdf2+0x64> - 800097e: ea50 3c01 orrs.w ip, r0, r1, lsl #12 - 8000982: d107 bne.n 8000994 <__cmpdf2+0x74> - 8000984: ea4f 0c43 mov.w ip, r3, lsl #1 - 8000988: ea7f 5c6c mvns.w ip, ip, asr #21 - 800098c: d1d6 bne.n 800093c <__cmpdf2+0x1c> - 800098e: ea52 3c03 orrs.w ip, r2, r3, lsl #12 - 8000992: d0d3 beq.n 800093c <__cmpdf2+0x1c> - 8000994: f85d 0b04 ldr.w r0, [sp], #4 - 8000998: 4770 bx lr - 800099a: bf00 nop - -0800099c <__aeabi_cdrcmple>: - 800099c: 4684 mov ip, r0 - 800099e: 4610 mov r0, r2 - 80009a0: 4662 mov r2, ip - 80009a2: 468c mov ip, r1 - 80009a4: 4619 mov r1, r3 - 80009a6: 4663 mov r3, ip - 80009a8: e000 b.n 80009ac <__aeabi_cdcmpeq> - 80009aa: bf00 nop - -080009ac <__aeabi_cdcmpeq>: - 80009ac: b501 push {r0, lr} - 80009ae: f7ff ffb7 bl 8000920 <__cmpdf2> - 80009b2: 2800 cmp r0, #0 - 80009b4: bf48 it mi - 80009b6: f110 0f00 cmnmi.w r0, #0 - 80009ba: bd01 pop {r0, pc} - -080009bc <__aeabi_dcmpeq>: - 80009bc: f84d ed08 str.w lr, [sp, #-8]! - 80009c0: f7ff fff4 bl 80009ac <__aeabi_cdcmpeq> - 80009c4: bf0c ite eq - 80009c6: 2001 moveq r0, #1 - 80009c8: 2000 movne r0, #0 - 80009ca: f85d fb08 ldr.w pc, [sp], #8 - 80009ce: bf00 nop - -080009d0 <__aeabi_dcmplt>: - 80009d0: f84d ed08 str.w lr, [sp, #-8]! - 80009d4: f7ff ffea bl 80009ac <__aeabi_cdcmpeq> - 80009d8: bf34 ite cc - 80009da: 2001 movcc r0, #1 - 80009dc: 2000 movcs r0, #0 - 80009de: f85d fb08 ldr.w pc, [sp], #8 - 80009e2: bf00 nop - -080009e4 <__aeabi_dcmple>: - 80009e4: f84d ed08 str.w lr, [sp, #-8]! - 80009e8: f7ff ffe0 bl 80009ac <__aeabi_cdcmpeq> - 80009ec: bf94 ite ls - 80009ee: 2001 movls r0, #1 - 80009f0: 2000 movhi r0, #0 - 80009f2: f85d fb08 ldr.w pc, [sp], #8 - 80009f6: bf00 nop - -080009f8 <__aeabi_dcmpge>: - 80009f8: f84d ed08 str.w lr, [sp, #-8]! - 80009fc: f7ff ffce bl 800099c <__aeabi_cdrcmple> - 8000a00: bf94 ite ls - 8000a02: 2001 movls r0, #1 - 8000a04: 2000 movhi r0, #0 - 8000a06: f85d fb08 ldr.w pc, [sp], #8 - 8000a0a: bf00 nop - -08000a0c <__aeabi_dcmpgt>: - 8000a0c: f84d ed08 str.w lr, [sp, #-8]! - 8000a10: f7ff ffc4 bl 800099c <__aeabi_cdrcmple> - 8000a14: bf34 ite cc - 8000a16: 2001 movcc r0, #1 - 8000a18: 2000 movcs r0, #0 - 8000a1a: f85d fb08 ldr.w pc, [sp], #8 - 8000a1e: bf00 nop - -08000a20 <__aeabi_dcmpun>: - 8000a20: ea4f 0c41 mov.w ip, r1, lsl #1 - 8000a24: ea7f 5c6c mvns.w ip, ip, asr #21 - 8000a28: d102 bne.n 8000a30 <__aeabi_dcmpun+0x10> - 8000a2a: ea50 3c01 orrs.w ip, r0, r1, lsl #12 - 8000a2e: d10a bne.n 8000a46 <__aeabi_dcmpun+0x26> - 8000a30: ea4f 0c43 mov.w ip, r3, lsl #1 - 8000a34: ea7f 5c6c mvns.w ip, ip, asr #21 - 8000a38: d102 bne.n 8000a40 <__aeabi_dcmpun+0x20> - 8000a3a: ea52 3c03 orrs.w ip, r2, r3, lsl #12 - 8000a3e: d102 bne.n 8000a46 <__aeabi_dcmpun+0x26> - 8000a40: f04f 0000 mov.w r0, #0 - 8000a44: 4770 bx lr - 8000a46: f04f 0001 mov.w r0, #1 - 8000a4a: 4770 bx lr - -08000a4c <__aeabi_d2iz>: - 8000a4c: ea4f 0241 mov.w r2, r1, lsl #1 - 8000a50: f512 1200 adds.w r2, r2, #2097152 ; 0x200000 - 8000a54: d215 bcs.n 8000a82 <__aeabi_d2iz+0x36> - 8000a56: d511 bpl.n 8000a7c <__aeabi_d2iz+0x30> - 8000a58: f46f 7378 mvn.w r3, #992 ; 0x3e0 - 8000a5c: ebb3 5262 subs.w r2, r3, r2, asr #21 - 8000a60: d912 bls.n 8000a88 <__aeabi_d2iz+0x3c> - 8000a62: ea4f 23c1 mov.w r3, r1, lsl #11 - 8000a66: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 - 8000a6a: ea43 5350 orr.w r3, r3, r0, lsr #21 - 8000a6e: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 - 8000a72: fa23 f002 lsr.w r0, r3, r2 - 8000a76: bf18 it ne - 8000a78: 4240 negne r0, r0 - 8000a7a: 4770 bx lr - 8000a7c: f04f 0000 mov.w r0, #0 - 8000a80: 4770 bx lr - 8000a82: ea50 3001 orrs.w r0, r0, r1, lsl #12 - 8000a86: d105 bne.n 8000a94 <__aeabi_d2iz+0x48> - 8000a88: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000 - 8000a8c: bf08 it eq - 8000a8e: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000 - 8000a92: 4770 bx lr - 8000a94: f04f 0000 mov.w r0, #0 - 8000a98: 4770 bx lr - 8000a9a: bf00 nop - -08000a9c <__aeabi_frsub>: - 8000a9c: f080 4000 eor.w r0, r0, #2147483648 ; 0x80000000 - 8000aa0: e002 b.n 8000aa8 <__addsf3> - 8000aa2: bf00 nop - -08000aa4 <__aeabi_fsub>: - 8000aa4: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 - -08000aa8 <__addsf3>: - 8000aa8: 0042 lsls r2, r0, #1 - 8000aaa: bf1f itttt ne - 8000aac: ea5f 0341 movsne.w r3, r1, lsl #1 - 8000ab0: ea92 0f03 teqne r2, r3 - 8000ab4: ea7f 6c22 mvnsne.w ip, r2, asr #24 - 8000ab8: ea7f 6c23 mvnsne.w ip, r3, asr #24 - 8000abc: d06a beq.n 8000b94 <__addsf3+0xec> - 8000abe: ea4f 6212 mov.w r2, r2, lsr #24 - 8000ac2: ebd2 6313 rsbs r3, r2, r3, lsr #24 - 8000ac6: bfc1 itttt gt - 8000ac8: 18d2 addgt r2, r2, r3 - 8000aca: 4041 eorgt r1, r0 - 8000acc: 4048 eorgt r0, r1 - 8000ace: 4041 eorgt r1, r0 - 8000ad0: bfb8 it lt - 8000ad2: 425b neglt r3, r3 - 8000ad4: 2b19 cmp r3, #25 - 8000ad6: bf88 it hi - 8000ad8: 4770 bxhi lr - 8000ada: f010 4f00 tst.w r0, #2147483648 ; 0x80000000 - 8000ade: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 - 8000ae2: f020 407f bic.w r0, r0, #4278190080 ; 0xff000000 - 8000ae6: bf18 it ne - 8000ae8: 4240 negne r0, r0 - 8000aea: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 - 8000aee: f441 0100 orr.w r1, r1, #8388608 ; 0x800000 - 8000af2: f021 417f bic.w r1, r1, #4278190080 ; 0xff000000 - 8000af6: bf18 it ne - 8000af8: 4249 negne r1, r1 - 8000afa: ea92 0f03 teq r2, r3 - 8000afe: d03f beq.n 8000b80 <__addsf3+0xd8> - 8000b00: f1a2 0201 sub.w r2, r2, #1 - 8000b04: fa41 fc03 asr.w ip, r1, r3 - 8000b08: eb10 000c adds.w r0, r0, ip - 8000b0c: f1c3 0320 rsb r3, r3, #32 - 8000b10: fa01 f103 lsl.w r1, r1, r3 - 8000b14: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000 - 8000b18: d502 bpl.n 8000b20 <__addsf3+0x78> - 8000b1a: 4249 negs r1, r1 - 8000b1c: eb60 0040 sbc.w r0, r0, r0, lsl #1 - 8000b20: f5b0 0f00 cmp.w r0, #8388608 ; 0x800000 - 8000b24: d313 bcc.n 8000b4e <__addsf3+0xa6> - 8000b26: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 - 8000b2a: d306 bcc.n 8000b3a <__addsf3+0x92> - 8000b2c: 0840 lsrs r0, r0, #1 - 8000b2e: ea4f 0131 mov.w r1, r1, rrx - 8000b32: f102 0201 add.w r2, r2, #1 - 8000b36: 2afe cmp r2, #254 ; 0xfe - 8000b38: d251 bcs.n 8000bde <__addsf3+0x136> - 8000b3a: f1b1 4f00 cmp.w r1, #2147483648 ; 0x80000000 - 8000b3e: eb40 50c2 adc.w r0, r0, r2, lsl #23 - 8000b42: bf08 it eq - 8000b44: f020 0001 biceq.w r0, r0, #1 - 8000b48: ea40 0003 orr.w r0, r0, r3 - 8000b4c: 4770 bx lr - 8000b4e: 0049 lsls r1, r1, #1 - 8000b50: eb40 0000 adc.w r0, r0, r0 - 8000b54: 3a01 subs r2, #1 - 8000b56: bf28 it cs - 8000b58: f5b0 0f00 cmpcs.w r0, #8388608 ; 0x800000 - 8000b5c: d2ed bcs.n 8000b3a <__addsf3+0x92> - 8000b5e: fab0 fc80 clz ip, r0 - 8000b62: f1ac 0c08 sub.w ip, ip, #8 - 8000b66: ebb2 020c subs.w r2, r2, ip - 8000b6a: fa00 f00c lsl.w r0, r0, ip - 8000b6e: bfaa itet ge - 8000b70: eb00 50c2 addge.w r0, r0, r2, lsl #23 - 8000b74: 4252 neglt r2, r2 - 8000b76: 4318 orrge r0, r3 - 8000b78: bfbc itt lt - 8000b7a: 40d0 lsrlt r0, r2 - 8000b7c: 4318 orrlt r0, r3 - 8000b7e: 4770 bx lr - 8000b80: f092 0f00 teq r2, #0 - 8000b84: f481 0100 eor.w r1, r1, #8388608 ; 0x800000 - 8000b88: bf06 itte eq - 8000b8a: f480 0000 eoreq.w r0, r0, #8388608 ; 0x800000 - 8000b8e: 3201 addeq r2, #1 - 8000b90: 3b01 subne r3, #1 - 8000b92: e7b5 b.n 8000b00 <__addsf3+0x58> - 8000b94: ea4f 0341 mov.w r3, r1, lsl #1 - 8000b98: ea7f 6c22 mvns.w ip, r2, asr #24 - 8000b9c: bf18 it ne - 8000b9e: ea7f 6c23 mvnsne.w ip, r3, asr #24 - 8000ba2: d021 beq.n 8000be8 <__addsf3+0x140> - 8000ba4: ea92 0f03 teq r2, r3 - 8000ba8: d004 beq.n 8000bb4 <__addsf3+0x10c> - 8000baa: f092 0f00 teq r2, #0 - 8000bae: bf08 it eq - 8000bb0: 4608 moveq r0, r1 - 8000bb2: 4770 bx lr - 8000bb4: ea90 0f01 teq r0, r1 - 8000bb8: bf1c itt ne - 8000bba: 2000 movne r0, #0 - 8000bbc: 4770 bxne lr - 8000bbe: f012 4f7f tst.w r2, #4278190080 ; 0xff000000 - 8000bc2: d104 bne.n 8000bce <__addsf3+0x126> - 8000bc4: 0040 lsls r0, r0, #1 - 8000bc6: bf28 it cs - 8000bc8: f040 4000 orrcs.w r0, r0, #2147483648 ; 0x80000000 - 8000bcc: 4770 bx lr - 8000bce: f112 7200 adds.w r2, r2, #33554432 ; 0x2000000 - 8000bd2: bf3c itt cc - 8000bd4: f500 0000 addcc.w r0, r0, #8388608 ; 0x800000 - 8000bd8: 4770 bxcc lr - 8000bda: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000 - 8000bde: f043 40fe orr.w r0, r3, #2130706432 ; 0x7f000000 - 8000be2: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 - 8000be6: 4770 bx lr - 8000be8: ea7f 6222 mvns.w r2, r2, asr #24 - 8000bec: bf16 itet ne - 8000bee: 4608 movne r0, r1 - 8000bf0: ea7f 6323 mvnseq.w r3, r3, asr #24 - 8000bf4: 4601 movne r1, r0 - 8000bf6: 0242 lsls r2, r0, #9 - 8000bf8: bf06 itte eq - 8000bfa: ea5f 2341 movseq.w r3, r1, lsl #9 - 8000bfe: ea90 0f01 teqeq r0, r1 - 8000c02: f440 0080 orrne.w r0, r0, #4194304 ; 0x400000 - 8000c06: 4770 bx lr - -08000c08 <__aeabi_ui2f>: - 8000c08: f04f 0300 mov.w r3, #0 - 8000c0c: e004 b.n 8000c18 <__aeabi_i2f+0x8> - 8000c0e: bf00 nop - -08000c10 <__aeabi_i2f>: - 8000c10: f010 4300 ands.w r3, r0, #2147483648 ; 0x80000000 - 8000c14: bf48 it mi - 8000c16: 4240 negmi r0, r0 - 8000c18: ea5f 0c00 movs.w ip, r0 - 8000c1c: bf08 it eq - 8000c1e: 4770 bxeq lr - 8000c20: f043 4396 orr.w r3, r3, #1258291200 ; 0x4b000000 - 8000c24: 4601 mov r1, r0 - 8000c26: f04f 0000 mov.w r0, #0 - 8000c2a: e01c b.n 8000c66 <__aeabi_l2f+0x2a> - -08000c2c <__aeabi_ul2f>: - 8000c2c: ea50 0201 orrs.w r2, r0, r1 - 8000c30: bf08 it eq - 8000c32: 4770 bxeq lr - 8000c34: f04f 0300 mov.w r3, #0 - 8000c38: e00a b.n 8000c50 <__aeabi_l2f+0x14> - 8000c3a: bf00 nop - -08000c3c <__aeabi_l2f>: - 8000c3c: ea50 0201 orrs.w r2, r0, r1 - 8000c40: bf08 it eq - 8000c42: 4770 bxeq lr - 8000c44: f011 4300 ands.w r3, r1, #2147483648 ; 0x80000000 - 8000c48: d502 bpl.n 8000c50 <__aeabi_l2f+0x14> - 8000c4a: 4240 negs r0, r0 - 8000c4c: eb61 0141 sbc.w r1, r1, r1, lsl #1 - 8000c50: ea5f 0c01 movs.w ip, r1 - 8000c54: bf02 ittt eq - 8000c56: 4684 moveq ip, r0 - 8000c58: 4601 moveq r1, r0 - 8000c5a: 2000 moveq r0, #0 - 8000c5c: f043 43b6 orr.w r3, r3, #1526726656 ; 0x5b000000 - 8000c60: bf08 it eq - 8000c62: f1a3 5380 subeq.w r3, r3, #268435456 ; 0x10000000 - 8000c66: f5a3 0300 sub.w r3, r3, #8388608 ; 0x800000 - 8000c6a: fabc f28c clz r2, ip - 8000c6e: 3a08 subs r2, #8 - 8000c70: eba3 53c2 sub.w r3, r3, r2, lsl #23 - 8000c74: db10 blt.n 8000c98 <__aeabi_l2f+0x5c> - 8000c76: fa01 fc02 lsl.w ip, r1, r2 - 8000c7a: 4463 add r3, ip - 8000c7c: fa00 fc02 lsl.w ip, r0, r2 - 8000c80: f1c2 0220 rsb r2, r2, #32 - 8000c84: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 - 8000c88: fa20 f202 lsr.w r2, r0, r2 - 8000c8c: eb43 0002 adc.w r0, r3, r2 - 8000c90: bf08 it eq - 8000c92: f020 0001 biceq.w r0, r0, #1 - 8000c96: 4770 bx lr - 8000c98: f102 0220 add.w r2, r2, #32 - 8000c9c: fa01 fc02 lsl.w ip, r1, r2 - 8000ca0: f1c2 0220 rsb r2, r2, #32 - 8000ca4: ea50 004c orrs.w r0, r0, ip, lsl #1 - 8000ca8: fa21 f202 lsr.w r2, r1, r2 - 8000cac: eb43 0002 adc.w r0, r3, r2 - 8000cb0: bf08 it eq - 8000cb2: ea20 70dc biceq.w r0, r0, ip, lsr #31 - 8000cb6: 4770 bx lr - -08000cb8 <__aeabi_fmul>: - 8000cb8: f04f 0cff mov.w ip, #255 ; 0xff - 8000cbc: ea1c 52d0 ands.w r2, ip, r0, lsr #23 - 8000cc0: bf1e ittt ne - 8000cc2: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 - 8000cc6: ea92 0f0c teqne r2, ip - 8000cca: ea93 0f0c teqne r3, ip - 8000cce: d06f beq.n 8000db0 <__aeabi_fmul+0xf8> - 8000cd0: 441a add r2, r3 - 8000cd2: ea80 0c01 eor.w ip, r0, r1 - 8000cd6: 0240 lsls r0, r0, #9 - 8000cd8: bf18 it ne - 8000cda: ea5f 2141 movsne.w r1, r1, lsl #9 - 8000cde: d01e beq.n 8000d1e <__aeabi_fmul+0x66> - 8000ce0: f04f 6300 mov.w r3, #134217728 ; 0x8000000 - 8000ce4: ea43 1050 orr.w r0, r3, r0, lsr #5 - 8000ce8: ea43 1151 orr.w r1, r3, r1, lsr #5 - 8000cec: fba0 3101 umull r3, r1, r0, r1 - 8000cf0: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000 - 8000cf4: f5b1 0f00 cmp.w r1, #8388608 ; 0x800000 - 8000cf8: bf3e ittt cc - 8000cfa: 0049 lslcc r1, r1, #1 - 8000cfc: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 - 8000d00: 005b lslcc r3, r3, #1 - 8000d02: ea40 0001 orr.w r0, r0, r1 - 8000d06: f162 027f sbc.w r2, r2, #127 ; 0x7f - 8000d0a: 2afd cmp r2, #253 ; 0xfd - 8000d0c: d81d bhi.n 8000d4a <__aeabi_fmul+0x92> - 8000d0e: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 8000d12: eb40 50c2 adc.w r0, r0, r2, lsl #23 - 8000d16: bf08 it eq - 8000d18: f020 0001 biceq.w r0, r0, #1 - 8000d1c: 4770 bx lr - 8000d1e: f090 0f00 teq r0, #0 - 8000d22: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000 - 8000d26: bf08 it eq - 8000d28: 0249 lsleq r1, r1, #9 - 8000d2a: ea4c 2050 orr.w r0, ip, r0, lsr #9 - 8000d2e: ea40 2051 orr.w r0, r0, r1, lsr #9 - 8000d32: 3a7f subs r2, #127 ; 0x7f - 8000d34: bfc2 ittt gt - 8000d36: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff - 8000d3a: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 - 8000d3e: 4770 bxgt lr - 8000d40: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 - 8000d44: f04f 0300 mov.w r3, #0 - 8000d48: 3a01 subs r2, #1 - 8000d4a: dc5d bgt.n 8000e08 <__aeabi_fmul+0x150> - 8000d4c: f112 0f19 cmn.w r2, #25 - 8000d50: bfdc itt le - 8000d52: f000 4000 andle.w r0, r0, #2147483648 ; 0x80000000 - 8000d56: 4770 bxle lr - 8000d58: f1c2 0200 rsb r2, r2, #0 - 8000d5c: 0041 lsls r1, r0, #1 - 8000d5e: fa21 f102 lsr.w r1, r1, r2 - 8000d62: f1c2 0220 rsb r2, r2, #32 - 8000d66: fa00 fc02 lsl.w ip, r0, r2 - 8000d6a: ea5f 0031 movs.w r0, r1, rrx - 8000d6e: f140 0000 adc.w r0, r0, #0 - 8000d72: ea53 034c orrs.w r3, r3, ip, lsl #1 - 8000d76: bf08 it eq - 8000d78: ea20 70dc biceq.w r0, r0, ip, lsr #31 - 8000d7c: 4770 bx lr - 8000d7e: f092 0f00 teq r2, #0 - 8000d82: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000 - 8000d86: bf02 ittt eq - 8000d88: 0040 lsleq r0, r0, #1 - 8000d8a: f410 0f00 tsteq.w r0, #8388608 ; 0x800000 - 8000d8e: 3a01 subeq r2, #1 - 8000d90: d0f9 beq.n 8000d86 <__aeabi_fmul+0xce> - 8000d92: ea40 000c orr.w r0, r0, ip - 8000d96: f093 0f00 teq r3, #0 - 8000d9a: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 - 8000d9e: bf02 ittt eq - 8000da0: 0049 lsleq r1, r1, #1 - 8000da2: f411 0f00 tsteq.w r1, #8388608 ; 0x800000 - 8000da6: 3b01 subeq r3, #1 - 8000da8: d0f9 beq.n 8000d9e <__aeabi_fmul+0xe6> - 8000daa: ea41 010c orr.w r1, r1, ip - 8000dae: e78f b.n 8000cd0 <__aeabi_fmul+0x18> - 8000db0: ea0c 53d1 and.w r3, ip, r1, lsr #23 - 8000db4: ea92 0f0c teq r2, ip - 8000db8: bf18 it ne - 8000dba: ea93 0f0c teqne r3, ip - 8000dbe: d00a beq.n 8000dd6 <__aeabi_fmul+0x11e> - 8000dc0: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000 - 8000dc4: bf18 it ne - 8000dc6: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000 - 8000dca: d1d8 bne.n 8000d7e <__aeabi_fmul+0xc6> - 8000dcc: ea80 0001 eor.w r0, r0, r1 - 8000dd0: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 - 8000dd4: 4770 bx lr - 8000dd6: f090 0f00 teq r0, #0 - 8000dda: bf17 itett ne - 8000ddc: f090 4f00 teqne r0, #2147483648 ; 0x80000000 - 8000de0: 4608 moveq r0, r1 - 8000de2: f091 0f00 teqne r1, #0 - 8000de6: f091 4f00 teqne r1, #2147483648 ; 0x80000000 - 8000dea: d014 beq.n 8000e16 <__aeabi_fmul+0x15e> - 8000dec: ea92 0f0c teq r2, ip - 8000df0: d101 bne.n 8000df6 <__aeabi_fmul+0x13e> - 8000df2: 0242 lsls r2, r0, #9 - 8000df4: d10f bne.n 8000e16 <__aeabi_fmul+0x15e> - 8000df6: ea93 0f0c teq r3, ip - 8000dfa: d103 bne.n 8000e04 <__aeabi_fmul+0x14c> - 8000dfc: 024b lsls r3, r1, #9 - 8000dfe: bf18 it ne - 8000e00: 4608 movne r0, r1 - 8000e02: d108 bne.n 8000e16 <__aeabi_fmul+0x15e> - 8000e04: ea80 0001 eor.w r0, r0, r1 - 8000e08: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 - 8000e0c: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 - 8000e10: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 - 8000e14: 4770 bx lr - 8000e16: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 - 8000e1a: f440 0040 orr.w r0, r0, #12582912 ; 0xc00000 - 8000e1e: 4770 bx lr - -08000e20 <__aeabi_fdiv>: - 8000e20: f04f 0cff mov.w ip, #255 ; 0xff - 8000e24: ea1c 52d0 ands.w r2, ip, r0, lsr #23 - 8000e28: bf1e ittt ne - 8000e2a: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 - 8000e2e: ea92 0f0c teqne r2, ip - 8000e32: ea93 0f0c teqne r3, ip - 8000e36: d069 beq.n 8000f0c <__aeabi_fdiv+0xec> - 8000e38: eba2 0203 sub.w r2, r2, r3 - 8000e3c: ea80 0c01 eor.w ip, r0, r1 - 8000e40: 0249 lsls r1, r1, #9 - 8000e42: ea4f 2040 mov.w r0, r0, lsl #9 - 8000e46: d037 beq.n 8000eb8 <__aeabi_fdiv+0x98> - 8000e48: f04f 5380 mov.w r3, #268435456 ; 0x10000000 - 8000e4c: ea43 1111 orr.w r1, r3, r1, lsr #4 - 8000e50: ea43 1310 orr.w r3, r3, r0, lsr #4 - 8000e54: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000 - 8000e58: 428b cmp r3, r1 - 8000e5a: bf38 it cc - 8000e5c: 005b lslcc r3, r3, #1 - 8000e5e: f142 027d adc.w r2, r2, #125 ; 0x7d - 8000e62: f44f 0c00 mov.w ip, #8388608 ; 0x800000 - 8000e66: 428b cmp r3, r1 - 8000e68: bf24 itt cs - 8000e6a: 1a5b subcs r3, r3, r1 - 8000e6c: ea40 000c orrcs.w r0, r0, ip - 8000e70: ebb3 0f51 cmp.w r3, r1, lsr #1 - 8000e74: bf24 itt cs - 8000e76: eba3 0351 subcs.w r3, r3, r1, lsr #1 - 8000e7a: ea40 005c orrcs.w r0, r0, ip, lsr #1 - 8000e7e: ebb3 0f91 cmp.w r3, r1, lsr #2 - 8000e82: bf24 itt cs - 8000e84: eba3 0391 subcs.w r3, r3, r1, lsr #2 - 8000e88: ea40 009c orrcs.w r0, r0, ip, lsr #2 - 8000e8c: ebb3 0fd1 cmp.w r3, r1, lsr #3 - 8000e90: bf24 itt cs - 8000e92: eba3 03d1 subcs.w r3, r3, r1, lsr #3 - 8000e96: ea40 00dc orrcs.w r0, r0, ip, lsr #3 - 8000e9a: 011b lsls r3, r3, #4 - 8000e9c: bf18 it ne - 8000e9e: ea5f 1c1c movsne.w ip, ip, lsr #4 - 8000ea2: d1e0 bne.n 8000e66 <__aeabi_fdiv+0x46> - 8000ea4: 2afd cmp r2, #253 ; 0xfd - 8000ea6: f63f af50 bhi.w 8000d4a <__aeabi_fmul+0x92> - 8000eaa: 428b cmp r3, r1 - 8000eac: eb40 50c2 adc.w r0, r0, r2, lsl #23 - 8000eb0: bf08 it eq - 8000eb2: f020 0001 biceq.w r0, r0, #1 - 8000eb6: 4770 bx lr - 8000eb8: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000 - 8000ebc: ea4c 2050 orr.w r0, ip, r0, lsr #9 - 8000ec0: 327f adds r2, #127 ; 0x7f - 8000ec2: bfc2 ittt gt - 8000ec4: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff - 8000ec8: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 - 8000ecc: 4770 bxgt lr - 8000ece: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 - 8000ed2: f04f 0300 mov.w r3, #0 - 8000ed6: 3a01 subs r2, #1 - 8000ed8: e737 b.n 8000d4a <__aeabi_fmul+0x92> - 8000eda: f092 0f00 teq r2, #0 - 8000ede: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000 - 8000ee2: bf02 ittt eq - 8000ee4: 0040 lsleq r0, r0, #1 - 8000ee6: f410 0f00 tsteq.w r0, #8388608 ; 0x800000 - 8000eea: 3a01 subeq r2, #1 - 8000eec: d0f9 beq.n 8000ee2 <__aeabi_fdiv+0xc2> - 8000eee: ea40 000c orr.w r0, r0, ip - 8000ef2: f093 0f00 teq r3, #0 - 8000ef6: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 - 8000efa: bf02 ittt eq - 8000efc: 0049 lsleq r1, r1, #1 - 8000efe: f411 0f00 tsteq.w r1, #8388608 ; 0x800000 - 8000f02: 3b01 subeq r3, #1 - 8000f04: d0f9 beq.n 8000efa <__aeabi_fdiv+0xda> - 8000f06: ea41 010c orr.w r1, r1, ip - 8000f0a: e795 b.n 8000e38 <__aeabi_fdiv+0x18> - 8000f0c: ea0c 53d1 and.w r3, ip, r1, lsr #23 - 8000f10: ea92 0f0c teq r2, ip - 8000f14: d108 bne.n 8000f28 <__aeabi_fdiv+0x108> - 8000f16: 0242 lsls r2, r0, #9 - 8000f18: f47f af7d bne.w 8000e16 <__aeabi_fmul+0x15e> - 8000f1c: ea93 0f0c teq r3, ip - 8000f20: f47f af70 bne.w 8000e04 <__aeabi_fmul+0x14c> - 8000f24: 4608 mov r0, r1 - 8000f26: e776 b.n 8000e16 <__aeabi_fmul+0x15e> - 8000f28: ea93 0f0c teq r3, ip - 8000f2c: d104 bne.n 8000f38 <__aeabi_fdiv+0x118> - 8000f2e: 024b lsls r3, r1, #9 - 8000f30: f43f af4c beq.w 8000dcc <__aeabi_fmul+0x114> - 8000f34: 4608 mov r0, r1 - 8000f36: e76e b.n 8000e16 <__aeabi_fmul+0x15e> - 8000f38: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000 - 8000f3c: bf18 it ne - 8000f3e: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000 - 8000f42: d1ca bne.n 8000eda <__aeabi_fdiv+0xba> - 8000f44: f030 4200 bics.w r2, r0, #2147483648 ; 0x80000000 - 8000f48: f47f af5c bne.w 8000e04 <__aeabi_fmul+0x14c> - 8000f4c: f031 4300 bics.w r3, r1, #2147483648 ; 0x80000000 - 8000f50: f47f af3c bne.w 8000dcc <__aeabi_fmul+0x114> - 8000f54: e75f b.n 8000e16 <__aeabi_fmul+0x15e> - 8000f56: bf00 nop - -08000f58 <__gesf2>: - 8000f58: f04f 3cff mov.w ip, #4294967295 - 8000f5c: e006 b.n 8000f6c <__cmpsf2+0x4> - 8000f5e: bf00 nop - -08000f60 <__lesf2>: - 8000f60: f04f 0c01 mov.w ip, #1 - 8000f64: e002 b.n 8000f6c <__cmpsf2+0x4> - 8000f66: bf00 nop - -08000f68 <__cmpsf2>: - 8000f68: f04f 0c01 mov.w ip, #1 - 8000f6c: f84d cd04 str.w ip, [sp, #-4]! - 8000f70: ea4f 0240 mov.w r2, r0, lsl #1 - 8000f74: ea4f 0341 mov.w r3, r1, lsl #1 - 8000f78: ea7f 6c22 mvns.w ip, r2, asr #24 - 8000f7c: bf18 it ne - 8000f7e: ea7f 6c23 mvnsne.w ip, r3, asr #24 - 8000f82: d011 beq.n 8000fa8 <__cmpsf2+0x40> - 8000f84: b001 add sp, #4 - 8000f86: ea52 0c53 orrs.w ip, r2, r3, lsr #1 - 8000f8a: bf18 it ne - 8000f8c: ea90 0f01 teqne r0, r1 - 8000f90: bf58 it pl - 8000f92: ebb2 0003 subspl.w r0, r2, r3 - 8000f96: bf88 it hi - 8000f98: 17c8 asrhi r0, r1, #31 - 8000f9a: bf38 it cc - 8000f9c: ea6f 70e1 mvncc.w r0, r1, asr #31 - 8000fa0: bf18 it ne - 8000fa2: f040 0001 orrne.w r0, r0, #1 - 8000fa6: 4770 bx lr - 8000fa8: ea7f 6c22 mvns.w ip, r2, asr #24 - 8000fac: d102 bne.n 8000fb4 <__cmpsf2+0x4c> - 8000fae: ea5f 2c40 movs.w ip, r0, lsl #9 - 8000fb2: d105 bne.n 8000fc0 <__cmpsf2+0x58> - 8000fb4: ea7f 6c23 mvns.w ip, r3, asr #24 - 8000fb8: d1e4 bne.n 8000f84 <__cmpsf2+0x1c> - 8000fba: ea5f 2c41 movs.w ip, r1, lsl #9 - 8000fbe: d0e1 beq.n 8000f84 <__cmpsf2+0x1c> - 8000fc0: f85d 0b04 ldr.w r0, [sp], #4 - 8000fc4: 4770 bx lr - 8000fc6: bf00 nop - -08000fc8 <__aeabi_cfrcmple>: - 8000fc8: 4684 mov ip, r0 - 8000fca: 4608 mov r0, r1 - 8000fcc: 4661 mov r1, ip - 8000fce: e7ff b.n 8000fd0 <__aeabi_cfcmpeq> - -08000fd0 <__aeabi_cfcmpeq>: - 8000fd0: b50f push {r0, r1, r2, r3, lr} - 8000fd2: f7ff ffc9 bl 8000f68 <__cmpsf2> - 8000fd6: 2800 cmp r0, #0 - 8000fd8: bf48 it mi - 8000fda: f110 0f00 cmnmi.w r0, #0 - 8000fde: bd0f pop {r0, r1, r2, r3, pc} - -08000fe0 <__aeabi_fcmpeq>: - 8000fe0: f84d ed08 str.w lr, [sp, #-8]! - 8000fe4: f7ff fff4 bl 8000fd0 <__aeabi_cfcmpeq> - 8000fe8: bf0c ite eq - 8000fea: 2001 moveq r0, #1 - 8000fec: 2000 movne r0, #0 - 8000fee: f85d fb08 ldr.w pc, [sp], #8 - 8000ff2: bf00 nop - -08000ff4 <__aeabi_fcmplt>: - 8000ff4: f84d ed08 str.w lr, [sp, #-8]! - 8000ff8: f7ff ffea bl 8000fd0 <__aeabi_cfcmpeq> - 8000ffc: bf34 ite cc - 8000ffe: 2001 movcc r0, #1 - 8001000: 2000 movcs r0, #0 - 8001002: f85d fb08 ldr.w pc, [sp], #8 - 8001006: bf00 nop - -08001008 <__aeabi_fcmple>: - 8001008: f84d ed08 str.w lr, [sp, #-8]! - 800100c: f7ff ffe0 bl 8000fd0 <__aeabi_cfcmpeq> - 8001010: bf94 ite ls - 8001012: 2001 movls r0, #1 - 8001014: 2000 movhi r0, #0 - 8001016: f85d fb08 ldr.w pc, [sp], #8 - 800101a: bf00 nop - -0800101c <__aeabi_fcmpge>: - 800101c: f84d ed08 str.w lr, [sp, #-8]! - 8001020: f7ff ffd2 bl 8000fc8 <__aeabi_cfrcmple> - 8001024: bf94 ite ls - 8001026: 2001 movls r0, #1 - 8001028: 2000 movhi r0, #0 - 800102a: f85d fb08 ldr.w pc, [sp], #8 - 800102e: bf00 nop - -08001030 <__aeabi_fcmpgt>: - 8001030: f84d ed08 str.w lr, [sp, #-8]! - 8001034: f7ff ffc8 bl 8000fc8 <__aeabi_cfrcmple> - 8001038: bf34 ite cc - 800103a: 2001 movcc r0, #1 - 800103c: 2000 movcs r0, #0 - 800103e: f85d fb08 ldr.w pc, [sp], #8 - 8001042: bf00 nop - -08001044 <__aeabi_f2iz>: - 8001044: ea4f 0240 mov.w r2, r0, lsl #1 - 8001048: f1b2 4ffe cmp.w r2, #2130706432 ; 0x7f000000 - 800104c: d30f bcc.n 800106e <__aeabi_f2iz+0x2a> - 800104e: f04f 039e mov.w r3, #158 ; 0x9e - 8001052: ebb3 6212 subs.w r2, r3, r2, lsr #24 - 8001056: d90d bls.n 8001074 <__aeabi_f2iz+0x30> - 8001058: ea4f 2300 mov.w r3, r0, lsl #8 - 800105c: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 - 8001060: f010 4f00 tst.w r0, #2147483648 ; 0x80000000 - 8001064: fa23 f002 lsr.w r0, r3, r2 - 8001068: bf18 it ne - 800106a: 4240 negne r0, r0 - 800106c: 4770 bx lr - 800106e: f04f 0000 mov.w r0, #0 - 8001072: 4770 bx lr - 8001074: f112 0f61 cmn.w r2, #97 ; 0x61 - 8001078: d101 bne.n 800107e <__aeabi_f2iz+0x3a> - 800107a: 0242 lsls r2, r0, #9 - 800107c: d105 bne.n 800108a <__aeabi_f2iz+0x46> - 800107e: f010 4000 ands.w r0, r0, #2147483648 ; 0x80000000 - 8001082: bf08 it eq - 8001084: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000 - 8001088: 4770 bx lr - 800108a: f04f 0000 mov.w r0, #0 - 800108e: 4770 bx lr - -08001090 <__aeabi_uldivmod>: - 8001090: b953 cbnz r3, 80010a8 <__aeabi_uldivmod+0x18> - 8001092: b94a cbnz r2, 80010a8 <__aeabi_uldivmod+0x18> - 8001094: 2900 cmp r1, #0 - 8001096: bf08 it eq - 8001098: 2800 cmpeq r0, #0 - 800109a: bf1c itt ne - 800109c: f04f 31ff movne.w r1, #4294967295 - 80010a0: f04f 30ff movne.w r0, #4294967295 - 80010a4: f000 b976 b.w 8001394 <__aeabi_idiv0> - 80010a8: f1ad 0c08 sub.w ip, sp, #8 - 80010ac: e96d ce04 strd ip, lr, [sp, #-16]! - 80010b0: f000 f806 bl 80010c0 <__udivmoddi4> - 80010b4: f8dd e004 ldr.w lr, [sp, #4] - 80010b8: e9dd 2302 ldrd r2, r3, [sp, #8] - 80010bc: b004 add sp, #16 - 80010be: 4770 bx lr - -080010c0 <__udivmoddi4>: - 80010c0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} - 80010c4: 9e08 ldr r6, [sp, #32] - 80010c6: 460d mov r5, r1 - 80010c8: 4604 mov r4, r0 - 80010ca: 4688 mov r8, r1 - 80010cc: 2b00 cmp r3, #0 - 80010ce: d14d bne.n 800116c <__udivmoddi4+0xac> - 80010d0: 428a cmp r2, r1 - 80010d2: 4694 mov ip, r2 - 80010d4: d968 bls.n 80011a8 <__udivmoddi4+0xe8> - 80010d6: fab2 f282 clz r2, r2 - 80010da: b152 cbz r2, 80010f2 <__udivmoddi4+0x32> - 80010dc: fa01 f302 lsl.w r3, r1, r2 - 80010e0: f1c2 0120 rsb r1, r2, #32 - 80010e4: fa20 f101 lsr.w r1, r0, r1 - 80010e8: fa0c fc02 lsl.w ip, ip, r2 - 80010ec: ea41 0803 orr.w r8, r1, r3 - 80010f0: 4094 lsls r4, r2 - 80010f2: ea4f 411c mov.w r1, ip, lsr #16 - 80010f6: fbb8 f7f1 udiv r7, r8, r1 - 80010fa: fa1f fe8c uxth.w lr, ip - 80010fe: fb01 8817 mls r8, r1, r7, r8 - 8001102: fb07 f00e mul.w r0, r7, lr - 8001106: 0c23 lsrs r3, r4, #16 - 8001108: ea43 4308 orr.w r3, r3, r8, lsl #16 - 800110c: 4298 cmp r0, r3 - 800110e: d90a bls.n 8001126 <__udivmoddi4+0x66> - 8001110: eb1c 0303 adds.w r3, ip, r3 - 8001114: f107 35ff add.w r5, r7, #4294967295 - 8001118: f080 811e bcs.w 8001358 <__udivmoddi4+0x298> - 800111c: 4298 cmp r0, r3 - 800111e: f240 811b bls.w 8001358 <__udivmoddi4+0x298> - 8001122: 3f02 subs r7, #2 - 8001124: 4463 add r3, ip - 8001126: 1a1b subs r3, r3, r0 - 8001128: fbb3 f0f1 udiv r0, r3, r1 - 800112c: fb01 3310 mls r3, r1, r0, r3 - 8001130: fb00 fe0e mul.w lr, r0, lr - 8001134: b2a4 uxth r4, r4 - 8001136: ea44 4403 orr.w r4, r4, r3, lsl #16 - 800113a: 45a6 cmp lr, r4 - 800113c: d90a bls.n 8001154 <__udivmoddi4+0x94> - 800113e: eb1c 0404 adds.w r4, ip, r4 - 8001142: f100 33ff add.w r3, r0, #4294967295 - 8001146: f080 8109 bcs.w 800135c <__udivmoddi4+0x29c> - 800114a: 45a6 cmp lr, r4 - 800114c: f240 8106 bls.w 800135c <__udivmoddi4+0x29c> - 8001150: 4464 add r4, ip - 8001152: 3802 subs r0, #2 - 8001154: 2100 movs r1, #0 - 8001156: eba4 040e sub.w r4, r4, lr - 800115a: ea40 4007 orr.w r0, r0, r7, lsl #16 - 800115e: b11e cbz r6, 8001168 <__udivmoddi4+0xa8> - 8001160: 2300 movs r3, #0 - 8001162: 40d4 lsrs r4, r2 - 8001164: e9c6 4300 strd r4, r3, [r6] - 8001168: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 800116c: 428b cmp r3, r1 - 800116e: d908 bls.n 8001182 <__udivmoddi4+0xc2> - 8001170: 2e00 cmp r6, #0 - 8001172: f000 80ee beq.w 8001352 <__udivmoddi4+0x292> - 8001176: 2100 movs r1, #0 - 8001178: e9c6 0500 strd r0, r5, [r6] - 800117c: 4608 mov r0, r1 - 800117e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 8001182: fab3 f183 clz r1, r3 - 8001186: 2900 cmp r1, #0 - 8001188: d14a bne.n 8001220 <__udivmoddi4+0x160> - 800118a: 42ab cmp r3, r5 - 800118c: d302 bcc.n 8001194 <__udivmoddi4+0xd4> - 800118e: 4282 cmp r2, r0 - 8001190: f200 80fc bhi.w 800138c <__udivmoddi4+0x2cc> - 8001194: 1a84 subs r4, r0, r2 - 8001196: eb65 0303 sbc.w r3, r5, r3 - 800119a: 2001 movs r0, #1 - 800119c: 4698 mov r8, r3 - 800119e: 2e00 cmp r6, #0 - 80011a0: d0e2 beq.n 8001168 <__udivmoddi4+0xa8> - 80011a2: e9c6 4800 strd r4, r8, [r6] - 80011a6: e7df b.n 8001168 <__udivmoddi4+0xa8> - 80011a8: b902 cbnz r2, 80011ac <__udivmoddi4+0xec> - 80011aa: deff udf #255 ; 0xff - 80011ac: fab2 f282 clz r2, r2 - 80011b0: 2a00 cmp r2, #0 - 80011b2: f040 8091 bne.w 80012d8 <__udivmoddi4+0x218> - 80011b6: eba1 000c sub.w r0, r1, ip - 80011ba: 2101 movs r1, #1 - 80011bc: ea4f 471c mov.w r7, ip, lsr #16 - 80011c0: fa1f fe8c uxth.w lr, ip - 80011c4: fbb0 f3f7 udiv r3, r0, r7 - 80011c8: fb07 0013 mls r0, r7, r3, r0 - 80011cc: 0c25 lsrs r5, r4, #16 - 80011ce: ea45 4500 orr.w r5, r5, r0, lsl #16 - 80011d2: fb0e f003 mul.w r0, lr, r3 - 80011d6: 42a8 cmp r0, r5 - 80011d8: d908 bls.n 80011ec <__udivmoddi4+0x12c> - 80011da: eb1c 0505 adds.w r5, ip, r5 - 80011de: f103 38ff add.w r8, r3, #4294967295 - 80011e2: d202 bcs.n 80011ea <__udivmoddi4+0x12a> - 80011e4: 42a8 cmp r0, r5 - 80011e6: f200 80ce bhi.w 8001386 <__udivmoddi4+0x2c6> - 80011ea: 4643 mov r3, r8 - 80011ec: 1a2d subs r5, r5, r0 - 80011ee: fbb5 f0f7 udiv r0, r5, r7 - 80011f2: fb07 5510 mls r5, r7, r0, r5 - 80011f6: fb0e fe00 mul.w lr, lr, r0 - 80011fa: b2a4 uxth r4, r4 - 80011fc: ea44 4405 orr.w r4, r4, r5, lsl #16 - 8001200: 45a6 cmp lr, r4 - 8001202: d908 bls.n 8001216 <__udivmoddi4+0x156> - 8001204: eb1c 0404 adds.w r4, ip, r4 - 8001208: f100 35ff add.w r5, r0, #4294967295 - 800120c: d202 bcs.n 8001214 <__udivmoddi4+0x154> - 800120e: 45a6 cmp lr, r4 - 8001210: f200 80b6 bhi.w 8001380 <__udivmoddi4+0x2c0> - 8001214: 4628 mov r0, r5 - 8001216: eba4 040e sub.w r4, r4, lr - 800121a: ea40 4003 orr.w r0, r0, r3, lsl #16 - 800121e: e79e b.n 800115e <__udivmoddi4+0x9e> - 8001220: f1c1 0720 rsb r7, r1, #32 - 8001224: 408b lsls r3, r1 - 8001226: fa22 fc07 lsr.w ip, r2, r7 - 800122a: ea4c 0c03 orr.w ip, ip, r3 - 800122e: fa25 fa07 lsr.w sl, r5, r7 - 8001232: ea4f 491c mov.w r9, ip, lsr #16 - 8001236: fbba f8f9 udiv r8, sl, r9 - 800123a: fa20 f307 lsr.w r3, r0, r7 - 800123e: fb09 aa18 mls sl, r9, r8, sl - 8001242: 408d lsls r5, r1 - 8001244: fa1f fe8c uxth.w lr, ip - 8001248: 431d orrs r5, r3 - 800124a: fa00 f301 lsl.w r3, r0, r1 - 800124e: fb08 f00e mul.w r0, r8, lr - 8001252: 0c2c lsrs r4, r5, #16 - 8001254: ea44 440a orr.w r4, r4, sl, lsl #16 - 8001258: 42a0 cmp r0, r4 - 800125a: fa02 f201 lsl.w r2, r2, r1 - 800125e: d90b bls.n 8001278 <__udivmoddi4+0x1b8> - 8001260: eb1c 0404 adds.w r4, ip, r4 - 8001264: f108 3aff add.w sl, r8, #4294967295 - 8001268: f080 8088 bcs.w 800137c <__udivmoddi4+0x2bc> - 800126c: 42a0 cmp r0, r4 - 800126e: f240 8085 bls.w 800137c <__udivmoddi4+0x2bc> - 8001272: f1a8 0802 sub.w r8, r8, #2 - 8001276: 4464 add r4, ip - 8001278: 1a24 subs r4, r4, r0 - 800127a: fbb4 f0f9 udiv r0, r4, r9 - 800127e: fb09 4410 mls r4, r9, r0, r4 - 8001282: fb00 fe0e mul.w lr, r0, lr - 8001286: b2ad uxth r5, r5 - 8001288: ea45 4404 orr.w r4, r5, r4, lsl #16 - 800128c: 45a6 cmp lr, r4 - 800128e: d908 bls.n 80012a2 <__udivmoddi4+0x1e2> - 8001290: eb1c 0404 adds.w r4, ip, r4 - 8001294: f100 35ff add.w r5, r0, #4294967295 - 8001298: d26c bcs.n 8001374 <__udivmoddi4+0x2b4> - 800129a: 45a6 cmp lr, r4 - 800129c: d96a bls.n 8001374 <__udivmoddi4+0x2b4> - 800129e: 3802 subs r0, #2 - 80012a0: 4464 add r4, ip - 80012a2: ea40 4008 orr.w r0, r0, r8, lsl #16 - 80012a6: fba0 9502 umull r9, r5, r0, r2 - 80012aa: eba4 040e sub.w r4, r4, lr - 80012ae: 42ac cmp r4, r5 - 80012b0: 46c8 mov r8, r9 - 80012b2: 46ae mov lr, r5 - 80012b4: d356 bcc.n 8001364 <__udivmoddi4+0x2a4> - 80012b6: d053 beq.n 8001360 <__udivmoddi4+0x2a0> - 80012b8: 2e00 cmp r6, #0 - 80012ba: d069 beq.n 8001390 <__udivmoddi4+0x2d0> - 80012bc: ebb3 0208 subs.w r2, r3, r8 - 80012c0: eb64 040e sbc.w r4, r4, lr - 80012c4: fa22 f301 lsr.w r3, r2, r1 - 80012c8: fa04 f707 lsl.w r7, r4, r7 - 80012cc: 431f orrs r7, r3 - 80012ce: 40cc lsrs r4, r1 - 80012d0: e9c6 7400 strd r7, r4, [r6] - 80012d4: 2100 movs r1, #0 - 80012d6: e747 b.n 8001168 <__udivmoddi4+0xa8> - 80012d8: fa0c fc02 lsl.w ip, ip, r2 - 80012dc: f1c2 0120 rsb r1, r2, #32 - 80012e0: fa25 f301 lsr.w r3, r5, r1 - 80012e4: ea4f 471c mov.w r7, ip, lsr #16 - 80012e8: fa20 f101 lsr.w r1, r0, r1 - 80012ec: 4095 lsls r5, r2 - 80012ee: 430d orrs r5, r1 - 80012f0: fbb3 f1f7 udiv r1, r3, r7 - 80012f4: fb07 3311 mls r3, r7, r1, r3 - 80012f8: fa1f fe8c uxth.w lr, ip - 80012fc: 0c28 lsrs r0, r5, #16 - 80012fe: ea40 4003 orr.w r0, r0, r3, lsl #16 - 8001302: fb01 f30e mul.w r3, r1, lr - 8001306: 4283 cmp r3, r0 - 8001308: fa04 f402 lsl.w r4, r4, r2 - 800130c: d908 bls.n 8001320 <__udivmoddi4+0x260> - 800130e: eb1c 0000 adds.w r0, ip, r0 - 8001312: f101 38ff add.w r8, r1, #4294967295 - 8001316: d22f bcs.n 8001378 <__udivmoddi4+0x2b8> - 8001318: 4283 cmp r3, r0 - 800131a: d92d bls.n 8001378 <__udivmoddi4+0x2b8> - 800131c: 3902 subs r1, #2 - 800131e: 4460 add r0, ip - 8001320: 1ac0 subs r0, r0, r3 - 8001322: fbb0 f3f7 udiv r3, r0, r7 - 8001326: fb07 0013 mls r0, r7, r3, r0 - 800132a: b2ad uxth r5, r5 - 800132c: ea45 4500 orr.w r5, r5, r0, lsl #16 - 8001330: fb03 f00e mul.w r0, r3, lr - 8001334: 42a8 cmp r0, r5 - 8001336: d908 bls.n 800134a <__udivmoddi4+0x28a> - 8001338: eb1c 0505 adds.w r5, ip, r5 - 800133c: f103 38ff add.w r8, r3, #4294967295 - 8001340: d216 bcs.n 8001370 <__udivmoddi4+0x2b0> - 8001342: 42a8 cmp r0, r5 - 8001344: d914 bls.n 8001370 <__udivmoddi4+0x2b0> - 8001346: 3b02 subs r3, #2 - 8001348: 4465 add r5, ip - 800134a: 1a28 subs r0, r5, r0 - 800134c: ea43 4101 orr.w r1, r3, r1, lsl #16 - 8001350: e738 b.n 80011c4 <__udivmoddi4+0x104> - 8001352: 4631 mov r1, r6 - 8001354: 4630 mov r0, r6 - 8001356: e707 b.n 8001168 <__udivmoddi4+0xa8> - 8001358: 462f mov r7, r5 - 800135a: e6e4 b.n 8001126 <__udivmoddi4+0x66> - 800135c: 4618 mov r0, r3 - 800135e: e6f9 b.n 8001154 <__udivmoddi4+0x94> - 8001360: 454b cmp r3, r9 - 8001362: d2a9 bcs.n 80012b8 <__udivmoddi4+0x1f8> - 8001364: ebb9 0802 subs.w r8, r9, r2 - 8001368: eb65 0e0c sbc.w lr, r5, ip - 800136c: 3801 subs r0, #1 - 800136e: e7a3 b.n 80012b8 <__udivmoddi4+0x1f8> - 8001370: 4643 mov r3, r8 - 8001372: e7ea b.n 800134a <__udivmoddi4+0x28a> - 8001374: 4628 mov r0, r5 - 8001376: e794 b.n 80012a2 <__udivmoddi4+0x1e2> - 8001378: 4641 mov r1, r8 - 800137a: e7d1 b.n 8001320 <__udivmoddi4+0x260> - 800137c: 46d0 mov r8, sl - 800137e: e77b b.n 8001278 <__udivmoddi4+0x1b8> - 8001380: 4464 add r4, ip - 8001382: 3802 subs r0, #2 - 8001384: e747 b.n 8001216 <__udivmoddi4+0x156> - 8001386: 3b02 subs r3, #2 - 8001388: 4465 add r5, ip - 800138a: e72f b.n 80011ec <__udivmoddi4+0x12c> - 800138c: 4608 mov r0, r1 - 800138e: e706 b.n 800119e <__udivmoddi4+0xde> - 8001390: 4631 mov r1, r6 - 8001392: e6e9 b.n 8001168 <__udivmoddi4+0xa8> - -08001394 <__aeabi_idiv0>: - 8001394: 4770 bx lr - 8001396: bf00 nop - -08001398 <_ZN8BTS7960BC1EPVmS1_P12GPIO_TypeDeftS3_t>: - * Author: Gabriel - */ - -#include "BTS7960B.hpp" - -BTS7960B::BTS7960B(__IO uint32_t* ina_ccr, __IO uint32_t* inb_ccr, GPIO_TypeDef* inha_gpio_port, uint16_t inha_gpio_pin, GPIO_TypeDef* inhb_gpio_port, uint16_t inhb_gpio_pin) - 8001398: b480 push {r7} - 800139a: b085 sub sp, #20 - 800139c: af00 add r7, sp, #0 - 800139e: 60f8 str r0, [r7, #12] - 80013a0: 60b9 str r1, [r7, #8] - 80013a2: 607a str r2, [r7, #4] - 80013a4: 603b str r3, [r7, #0] - : ina(ina_ccr), inb(inb_ccr), inha_port(inha_gpio_port), inha_pin(inha_gpio_pin), inhb_port(inhb_gpio_port), inhb_pin(inhb_gpio_pin){ - 80013a6: 68fb ldr r3, [r7, #12] - 80013a8: 68ba ldr r2, [r7, #8] - 80013aa: 601a str r2, [r3, #0] - 80013ac: 68fb ldr r3, [r7, #12] - 80013ae: 687a ldr r2, [r7, #4] - 80013b0: 605a str r2, [r3, #4] - 80013b2: 68fb ldr r3, [r7, #12] - 80013b4: 683a ldr r2, [r7, #0] - 80013b6: 609a str r2, [r3, #8] - 80013b8: 68fb ldr r3, [r7, #12] - 80013ba: 8b3a ldrh r2, [r7, #24] - 80013bc: 819a strh r2, [r3, #12] - 80013be: 68fb ldr r3, [r7, #12] - 80013c0: 69fa ldr r2, [r7, #28] - 80013c2: 611a str r2, [r3, #16] - 80013c4: 68fb ldr r3, [r7, #12] - 80013c6: 8c3a ldrh r2, [r7, #32] - 80013c8: 829a strh r2, [r3, #20] - -} - 80013ca: 68fb ldr r3, [r7, #12] - 80013cc: 4618 mov r0, r3 - 80013ce: 3714 adds r7, #20 - 80013d0: 46bd mov sp, r7 - 80013d2: bc80 pop {r7} - 80013d4: 4770 bx lr - -080013d6 <_ZN8BTS7960B8setSpeedEl>: - -void BTS7960B::setSpeed(int32_t speed){ - 80013d6: b580 push {r7, lr} - 80013d8: b082 sub sp, #8 - 80013da: af00 add r7, sp, #0 - 80013dc: 6078 str r0, [r7, #4] - 80013de: 6039 str r1, [r7, #0] - - if(speed > 0){ - 80013e0: 683b ldr r3, [r7, #0] - 80013e2: 2b00 cmp r3, #0 - 80013e4: dd18 ble.n 8001418 <_ZN8BTS7960B8setSpeedEl+0x42> - HAL_GPIO_WritePin(inha_port, inha_pin, GPIO_PIN_SET); - 80013e6: 687b ldr r3, [r7, #4] - 80013e8: 6898 ldr r0, [r3, #8] - 80013ea: 687b ldr r3, [r7, #4] - 80013ec: 899b ldrh r3, [r3, #12] - 80013ee: 2201 movs r2, #1 - 80013f0: 4619 mov r1, r3 - 80013f2: f002 fabf bl 8003974 - HAL_GPIO_WritePin(inhb_port, inhb_pin, GPIO_PIN_SET); - 80013f6: 687b ldr r3, [r7, #4] - 80013f8: 6918 ldr r0, [r3, #16] - 80013fa: 687b ldr r3, [r7, #4] - 80013fc: 8a9b ldrh r3, [r3, #20] - 80013fe: 2201 movs r2, #1 - 8001400: 4619 mov r1, r3 - 8001402: f002 fab7 bl 8003974 - *ina = speed; - 8001406: 687b ldr r3, [r7, #4] - 8001408: 681b ldr r3, [r3, #0] - 800140a: 683a ldr r2, [r7, #0] - 800140c: 601a str r2, [r3, #0] - *inb = 0; - 800140e: 687b ldr r3, [r7, #4] - 8001410: 685b ldr r3, [r3, #4] - 8001412: 2200 movs r2, #0 - 8001414: 601a str r2, [r3, #0] - *inb = -speed; - }else{ - HAL_GPIO_WritePin(inha_port, inha_pin, GPIO_PIN_RESET); - HAL_GPIO_WritePin(inhb_port, inhb_pin, GPIO_PIN_RESET); - } -} - 8001416: e02c b.n 8001472 <_ZN8BTS7960B8setSpeedEl+0x9c> - }else if(speed < 0){ - 8001418: 683b ldr r3, [r7, #0] - 800141a: 2b00 cmp r3, #0 - 800141c: da19 bge.n 8001452 <_ZN8BTS7960B8setSpeedEl+0x7c> - HAL_GPIO_WritePin(inha_port, inha_pin, GPIO_PIN_SET); - 800141e: 687b ldr r3, [r7, #4] - 8001420: 6898 ldr r0, [r3, #8] - 8001422: 687b ldr r3, [r7, #4] - 8001424: 899b ldrh r3, [r3, #12] - 8001426: 2201 movs r2, #1 - 8001428: 4619 mov r1, r3 - 800142a: f002 faa3 bl 8003974 - HAL_GPIO_WritePin(inhb_port, inhb_pin, GPIO_PIN_SET); - 800142e: 687b ldr r3, [r7, #4] - 8001430: 6918 ldr r0, [r3, #16] - 8001432: 687b ldr r3, [r7, #4] - 8001434: 8a9b ldrh r3, [r3, #20] - 8001436: 2201 movs r2, #1 - 8001438: 4619 mov r1, r3 - 800143a: f002 fa9b bl 8003974 - *ina = 0; - 800143e: 687b ldr r3, [r7, #4] - 8001440: 681b ldr r3, [r3, #0] - 8001442: 2200 movs r2, #0 - 8001444: 601a str r2, [r3, #0] - *inb = -speed; - 8001446: 683b ldr r3, [r7, #0] - 8001448: 425a negs r2, r3 - 800144a: 687b ldr r3, [r7, #4] - 800144c: 685b ldr r3, [r3, #4] - 800144e: 601a str r2, [r3, #0] -} - 8001450: e00f b.n 8001472 <_ZN8BTS7960B8setSpeedEl+0x9c> - HAL_GPIO_WritePin(inha_port, inha_pin, GPIO_PIN_RESET); - 8001452: 687b ldr r3, [r7, #4] - 8001454: 6898 ldr r0, [r3, #8] - 8001456: 687b ldr r3, [r7, #4] - 8001458: 899b ldrh r3, [r3, #12] - 800145a: 2200 movs r2, #0 - 800145c: 4619 mov r1, r3 - 800145e: f002 fa89 bl 8003974 - HAL_GPIO_WritePin(inhb_port, inhb_pin, GPIO_PIN_RESET); - 8001462: 687b ldr r3, [r7, #4] - 8001464: 6918 ldr r0, [r3, #16] - 8001466: 687b ldr r3, [r7, #4] - 8001468: 8a9b ldrh r3, [r3, #20] - 800146a: 2200 movs r2, #0 - 800146c: 4619 mov r1, r3 - 800146e: f002 fa81 bl 8003974 -} - 8001472: bf00 nop - 8001474: 3708 adds r7, #8 - 8001476: 46bd mov sp, r7 - 8001478: bd80 pop {r7, pc} - ... - -0800147c <_ZN7ESP8266C1EP20__UART_HandleTypeDef>: - -#include "ESP8266.hpp" -#include -#include - -ESP8266::ESP8266(UART_HandleTypeDef* huart) : huart(huart){ - 800147c: b480 push {r7} - 800147e: b083 sub sp, #12 - 8001480: af00 add r7, sp, #0 - 8001482: 6078 str r0, [r7, #4] - 8001484: 6039 str r1, [r7, #0] - 8001486: 4a06 ldr r2, [pc, #24] ; (80014a0 <_ZN7ESP8266C1EP20__UART_HandleTypeDef+0x24>) - 8001488: 687b ldr r3, [r7, #4] - 800148a: 601a str r2, [r3, #0] - 800148c: 687b ldr r3, [r7, #4] - 800148e: 683a ldr r2, [r7, #0] - 8001490: f8c3 2110 str.w r2, [r3, #272] ; 0x110 - // TODO Auto-generated constructor stub - -} - 8001494: 687b ldr r3, [r7, #4] - 8001496: 4618 mov r0, r3 - 8001498: 370c adds r7, #12 - 800149a: 46bd mov sp, r7 - 800149c: bc80 pop {r7} - 800149e: 4770 bx lr - 80014a0: 0800b0ac .word 0x0800b0ac - -080014a4 <_ZN7ESP8266D1Ev>: - -ESP8266::~ESP8266() { - 80014a4: b480 push {r7} - 80014a6: b083 sub sp, #12 - 80014a8: af00 add r7, sp, #0 - 80014aa: 6078 str r0, [r7, #4] - 80014ac: 4a04 ldr r2, [pc, #16] ; (80014c0 <_ZN7ESP8266D1Ev+0x1c>) - 80014ae: 687b ldr r3, [r7, #4] - 80014b0: 601a str r2, [r3, #0] - // TODO Auto-generated destructor stub -} - 80014b2: 687b ldr r3, [r7, #4] - 80014b4: 4618 mov r0, r3 - 80014b6: 370c adds r7, #12 - 80014b8: 46bd mov sp, r7 - 80014ba: bc80 pop {r7} - 80014bc: 4770 bx lr - 80014be: bf00 nop - 80014c0: 0800b0ac .word 0x0800b0ac - -080014c4 <_ZN7ESP8266D0Ev>: -ESP8266::~ESP8266() { - 80014c4: b580 push {r7, lr} - 80014c6: b082 sub sp, #8 - 80014c8: af00 add r7, sp, #0 - 80014ca: 6078 str r0, [r7, #4] -} - 80014cc: 6878 ldr r0, [r7, #4] - 80014ce: f7ff ffe9 bl 80014a4 <_ZN7ESP8266D1Ev> - 80014d2: f44f 7148 mov.w r1, #800 ; 0x320 - 80014d6: 6878 ldr r0, [r7, #4] - 80014d8: f004 ff00 bl 80062dc <_ZdlPvj> - 80014dc: 687b ldr r3, [r7, #4] - 80014de: 4618 mov r0, r3 - 80014e0: 3708 adds r7, #8 - 80014e2: 46bd mov sp, r7 - 80014e4: bd80 pop {r7, pc} - ... - -080014e8 <_ZN7ESP82664initEv>: - -void ESP8266::init(){ - 80014e8: b580 push {r7, lr} - 80014ea: b082 sub sp, #8 - 80014ec: af00 add r7, sp, #0 - 80014ee: 6078 str r0, [r7, #4] - command("AT+CWMODE=1,1\r\n"); - 80014f0: 490b ldr r1, [pc, #44] ; (8001520 <_ZN7ESP82664initEv+0x38>) - 80014f2: 6878 ldr r0, [r7, #4] - 80014f4: f000 f81e bl 8001534 <_ZN7ESP82667commandEPKc> - command("AT+CWJAP=\"RoboIME-HRR\",\"roboimehrr\"\r\n"); - 80014f8: 490a ldr r1, [pc, #40] ; (8001524 <_ZN7ESP82664initEv+0x3c>) - 80014fa: 6878 ldr r0, [r7, #4] - 80014fc: f000 f81a bl 8001534 <_ZN7ESP82667commandEPKc> - //command("AT+CWLAP\r\n"); - command("AT+CIPMUX=1\r\n"); - 8001500: 4909 ldr r1, [pc, #36] ; (8001528 <_ZN7ESP82664initEv+0x40>) - 8001502: 6878 ldr r0, [r7, #4] - 8001504: f000 f816 bl 8001534 <_ZN7ESP82667commandEPKc> - command("AT+CIPRECVMODE=1\r\n"); - 8001508: 4908 ldr r1, [pc, #32] ; (800152c <_ZN7ESP82664initEv+0x44>) - 800150a: 6878 ldr r0, [r7, #4] - 800150c: f000 f812 bl 8001534 <_ZN7ESP82667commandEPKc> - command("AT+CIPSTART=0,\"UDP\",\"239.0.0.1\",10001,11001,0\r\n"); - 8001510: 4907 ldr r1, [pc, #28] ; (8001530 <_ZN7ESP82664initEv+0x48>) - 8001512: 6878 ldr r0, [r7, #4] - 8001514: f000 f80e bl 8001534 <_ZN7ESP82667commandEPKc> -} - 8001518: bf00 nop - 800151a: 3708 adds r7, #8 - 800151c: 46bd mov sp, r7 - 800151e: bd80 pop {r7, pc} - 8001520: 0800aec0 .word 0x0800aec0 - 8001524: 0800aed0 .word 0x0800aed0 - 8001528: 0800aef8 .word 0x0800aef8 - 800152c: 0800af08 .word 0x0800af08 - 8001530: 0800af1c .word 0x0800af1c - -08001534 <_ZN7ESP82667commandEPKc>: - -ESP8266::statusTypeDef ESP8266::command(const char* command) { - 8001534: b590 push {r4, r7, lr} - 8001536: b083 sub sp, #12 - 8001538: af00 add r7, sp, #0 - 800153a: 6078 str r0, [r7, #4] - 800153c: 6039 str r1, [r7, #0] - HAL_UART_Transmit(huart, (uint8_t*)command, strlen(command), 100); - 800153e: 687b ldr r3, [r7, #4] - 8001540: f8d3 4110 ldr.w r4, [r3, #272] ; 0x110 - 8001544: 6838 ldr r0, [r7, #0] - 8001546: f7fe fe0d bl 8000164 - 800154a: 4603 mov r3, r0 - 800154c: b29a uxth r2, r3 - 800154e: 2364 movs r3, #100 ; 0x64 - 8001550: 6839 ldr r1, [r7, #0] - 8001552: 4620 mov r0, r4 - 8001554: f004 f8d5 bl 8005702 - return wait_until_ok(); - 8001558: 6878 ldr r0, [r7, #4] - 800155a: f000 f98a bl 8001872 <_ZN7ESP826613wait_until_okEv> - 800155e: 4603 mov r3, r0 -} - 8001560: 4618 mov r0, r3 - 8001562: 370c adds r7, #12 - 8001564: 46bd mov sp, r7 - 8001566: bd90 pop {r4, r7, pc} - -08001568 <_ZN7ESP82664sendEPKc>: - -ESP8266::statusTypeDef ESP8266::send(const char* data) { - 8001568: b590 push {r4, r7, lr} - 800156a: b083 sub sp, #12 - 800156c: af00 add r7, sp, #0 - 800156e: 6078 str r0, [r7, #4] - 8001570: 6039 str r1, [r7, #0] - HAL_UART_Transmit(huart, (uint8_t*)data, strlen(data), 100); - 8001572: 687b ldr r3, [r7, #4] - 8001574: f8d3 4110 ldr.w r4, [r3, #272] ; 0x110 - 8001578: 6838 ldr r0, [r7, #0] - 800157a: f7fe fdf3 bl 8000164 - 800157e: 4603 mov r3, r0 - 8001580: b29a uxth r2, r3 - 8001582: 2364 movs r3, #100 ; 0x64 - 8001584: 6839 ldr r1, [r7, #0] - 8001586: 4620 mov r0, r4 - 8001588: f004 f8bb bl 8005702 - return wait_until_send_ok(); - 800158c: 6878 ldr r0, [r7, #4] - 800158e: f000 f9b5 bl 80018fc <_ZN7ESP826618wait_until_send_okEv> - 8001592: 4603 mov r3, r0 -} - 8001594: 4618 mov r0, r3 - 8001596: 370c adds r7, #12 - 8001598: 46bd mov sp, r7 - 800159a: bd90 pop {r4, r7, pc} - -0800159c <_ZN7ESP826611send_uint32EPKcm>: - -void ESP8266::send_uint32(const char* name, uint32_t value){ - 800159c: b580 push {r7, lr} - 800159e: f5ad 7d04 sub.w sp, sp, #528 ; 0x210 - 80015a2: af00 add r7, sp, #0 - 80015a4: f507 7304 add.w r3, r7, #528 ; 0x210 - 80015a8: f5a3 7301 sub.w r3, r3, #516 ; 0x204 - 80015ac: 6018 str r0, [r3, #0] - 80015ae: f507 7304 add.w r3, r7, #528 ; 0x210 - 80015b2: f5a3 7302 sub.w r3, r3, #520 ; 0x208 - 80015b6: 6019 str r1, [r3, #0] - 80015b8: f507 7304 add.w r3, r7, #528 ; 0x210 - 80015bc: f5a3 7303 sub.w r3, r3, #524 ; 0x20c - 80015c0: 601a str r2, [r3, #0] - char commandBuffer[256]; - char payloadBuffer[256]; - sprintf(payloadBuffer, ">%s:%lu\r\n", name, value); - 80015c2: f507 7304 add.w r3, r7, #528 ; 0x210 - 80015c6: f5a3 7303 sub.w r3, r3, #524 ; 0x20c - 80015ca: f507 7204 add.w r2, r7, #528 ; 0x210 - 80015ce: f5a2 7202 sub.w r2, r2, #520 ; 0x208 - 80015d2: f107 0010 add.w r0, r7, #16 - 80015d6: 681b ldr r3, [r3, #0] - 80015d8: 6812 ldr r2, [r2, #0] - 80015da: 4914 ldr r1, [pc, #80] ; (800162c <_ZN7ESP826611send_uint32EPKcm+0x90>) - 80015dc: f005 f994 bl 8006908 - sprintf(commandBuffer, "AT+CIPSEND=0,%u\r\n", strlen(payloadBuffer)); - 80015e0: f107 0310 add.w r3, r7, #16 - 80015e4: 4618 mov r0, r3 - 80015e6: f7fe fdbd bl 8000164 - 80015ea: 4602 mov r2, r0 - 80015ec: f507 7388 add.w r3, r7, #272 ; 0x110 - 80015f0: 490f ldr r1, [pc, #60] ; (8001630 <_ZN7ESP826611send_uint32EPKcm+0x94>) - 80015f2: 4618 mov r0, r3 - 80015f4: f005 f988 bl 8006908 - command(commandBuffer); - 80015f8: f507 7288 add.w r2, r7, #272 ; 0x110 - 80015fc: f507 7304 add.w r3, r7, #528 ; 0x210 - 8001600: f5a3 7301 sub.w r3, r3, #516 ; 0x204 - 8001604: 4611 mov r1, r2 - 8001606: 6818 ldr r0, [r3, #0] - 8001608: f7ff ff94 bl 8001534 <_ZN7ESP82667commandEPKc> - send(payloadBuffer); - 800160c: f107 0210 add.w r2, r7, #16 - 8001610: f507 7304 add.w r3, r7, #528 ; 0x210 - 8001614: f5a3 7301 sub.w r3, r3, #516 ; 0x204 - 8001618: 4611 mov r1, r2 - 800161a: 6818 ldr r0, [r3, #0] - 800161c: f7ff ffa4 bl 8001568 <_ZN7ESP82664sendEPKc> -} - 8001620: bf00 nop - 8001622: f507 7704 add.w r7, r7, #528 ; 0x210 - 8001626: 46bd mov sp, r7 - 8001628: bd80 pop {r7, pc} - 800162a: bf00 nop - 800162c: 0800af4c .word 0x0800af4c - 8001630: 0800af58 .word 0x0800af58 - -08001634 <_ZN7ESP826614receive_uint64Ev>: - -uint64_t ESP8266::receive_uint64() { - 8001634: b580 push {r7, lr} - 8001636: b0c2 sub sp, #264 ; 0x108 - 8001638: af00 add r7, sp, #0 - 800163a: f507 7384 add.w r3, r7, #264 ; 0x108 - 800163e: f5a3 7382 sub.w r3, r3, #260 ; 0x104 - 8001642: 6018 str r0, [r3, #0] - char commandBuffer[256]; - sprintf(commandBuffer, "AT+CIPRECVDATA=0,256\r\n"); - 8001644: f107 0308 add.w r3, r7, #8 - 8001648: 490d ldr r1, [pc, #52] ; (8001680 <_ZN7ESP826614receive_uint64Ev+0x4c>) - 800164a: 4618 mov r0, r3 - 800164c: f005 f95c bl 8006908 - command(commandBuffer); - 8001650: f107 0208 add.w r2, r7, #8 - 8001654: f507 7384 add.w r3, r7, #264 ; 0x108 - 8001658: f5a3 7382 sub.w r3, r3, #260 ; 0x104 - 800165c: 4611 mov r1, r2 - 800165e: 6818 ldr r0, [r3, #0] - 8001660: f7ff ff68 bl 8001534 <_ZN7ESP82667commandEPKc> - return recvValue64; - 8001664: f507 7384 add.w r3, r7, #264 ; 0x108 - 8001668: f5a3 7382 sub.w r3, r3, #260 ; 0x104 - 800166c: 681b ldr r3, [r3, #0] - 800166e: e9d3 23c6 ldrd r2, r3, [r3, #792] ; 0x318 -} - 8001672: 4610 mov r0, r2 - 8001674: 4619 mov r1, r3 - 8001676: f507 7784 add.w r7, r7, #264 ; 0x108 - 800167a: 46bd mov sp, r7 - 800167c: bd80 pop {r7, pc} - 800167e: bf00 nop - 8001680: 0800af6c .word 0x0800af6c - -08001684 <_ZN7ESP826626wait_on_flag_until_timeoutEm10FlagStatusmm>: - -HAL_StatusTypeDef ESP8266::wait_on_flag_until_timeout(uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 8001684: b580 push {r7, lr} - 8001686: b084 sub sp, #16 - 8001688: af00 add r7, sp, #0 - 800168a: 60f8 str r0, [r7, #12] - 800168c: 60b9 str r1, [r7, #8] - 800168e: 603b str r3, [r7, #0] - 8001690: 4613 mov r3, r2 - 8001692: 71fb strb r3, [r7, #7] - /* Wait until flag is set */ - while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) { - 8001694: 68fb ldr r3, [r7, #12] - 8001696: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 800169a: 681b ldr r3, [r3, #0] - 800169c: 681a ldr r2, [r3, #0] - 800169e: 68bb ldr r3, [r7, #8] - 80016a0: 4013 ands r3, r2 - 80016a2: 68ba ldr r2, [r7, #8] - 80016a4: 429a cmp r2, r3 - 80016a6: d101 bne.n 80016ac <_ZN7ESP826626wait_on_flag_until_timeoutEm10FlagStatusmm+0x28> - 80016a8: 2201 movs r2, #1 - 80016aa: e000 b.n 80016ae <_ZN7ESP826626wait_on_flag_until_timeoutEm10FlagStatusmm+0x2a> - 80016ac: 2200 movs r2, #0 - 80016ae: 79fb ldrb r3, [r7, #7] - 80016b0: 429a cmp r2, r3 - 80016b2: bf0c ite eq - 80016b4: 2301 moveq r3, #1 - 80016b6: 2300 movne r3, #0 - 80016b8: b2db uxtb r3, r3 - 80016ba: 2b00 cmp r3, #0 - 80016bc: d03f beq.n 800173e <_ZN7ESP826626wait_on_flag_until_timeoutEm10FlagStatusmm+0xba> - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) { - 80016be: 69bb ldr r3, [r7, #24] - 80016c0: f1b3 3fff cmp.w r3, #4294967295 - 80016c4: d0e6 beq.n 8001694 <_ZN7ESP826626wait_on_flag_until_timeoutEm10FlagStatusmm+0x10> - if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) { - 80016c6: 69bb ldr r3, [r7, #24] - 80016c8: 2b00 cmp r3, #0 - 80016ca: d007 beq.n 80016dc <_ZN7ESP826626wait_on_flag_until_timeoutEm10FlagStatusmm+0x58> - 80016cc: f001 fbf4 bl 8002eb8 - 80016d0: 4602 mov r2, r0 - 80016d2: 683b ldr r3, [r7, #0] - 80016d4: 1ad3 subs r3, r2, r3 - 80016d6: 69ba ldr r2, [r7, #24] - 80016d8: 429a cmp r2, r3 - 80016da: d201 bcs.n 80016e0 <_ZN7ESP826626wait_on_flag_until_timeoutEm10FlagStatusmm+0x5c> - 80016dc: 2301 movs r3, #1 - 80016de: e000 b.n 80016e2 <_ZN7ESP826626wait_on_flag_until_timeoutEm10FlagStatusmm+0x5e> - 80016e0: 2300 movs r3, #0 - 80016e2: 2b00 cmp r3, #0 - 80016e4: d0d6 beq.n 8001694 <_ZN7ESP826626wait_on_flag_until_timeoutEm10FlagStatusmm+0x10> - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); - 80016e6: 68fb ldr r3, [r7, #12] - 80016e8: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 80016ec: 681b ldr r3, [r3, #0] - 80016ee: 68da ldr r2, [r3, #12] - 80016f0: 68fb ldr r3, [r7, #12] - 80016f2: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 80016f6: 681b ldr r3, [r3, #0] - 80016f8: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 - 80016fc: 60da str r2, [r3, #12] - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80016fe: 68fb ldr r3, [r7, #12] - 8001700: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 8001704: 681b ldr r3, [r3, #0] - 8001706: 695a ldr r2, [r3, #20] - 8001708: 68fb ldr r3, [r7, #12] - 800170a: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 800170e: 681b ldr r3, [r3, #0] - 8001710: f022 0201 bic.w r2, r2, #1 - 8001714: 615a str r2, [r3, #20] - - huart->gState = HAL_UART_STATE_READY; - 8001716: 68fb ldr r3, [r7, #12] - 8001718: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 800171c: 2220 movs r2, #32 - 800171e: f883 203d strb.w r2, [r3, #61] ; 0x3d - huart->RxState = HAL_UART_STATE_READY; - 8001722: 68fb ldr r3, [r7, #12] - 8001724: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 8001728: 2220 movs r2, #32 - 800172a: f883 203e strb.w r2, [r3, #62] ; 0x3e - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - 800172e: 68fb ldr r3, [r7, #12] - 8001730: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 8001734: 2200 movs r2, #0 - 8001736: f883 203c strb.w r2, [r3, #60] ; 0x3c - - return HAL_TIMEOUT; - 800173a: 2303 movs r3, #3 - 800173c: e000 b.n 8001740 <_ZN7ESP826626wait_on_flag_until_timeoutEm10FlagStatusmm+0xbc> - } - } - } - return HAL_OK; - 800173e: 2300 movs r3, #0 -} - 8001740: 4618 mov r0, r3 - 8001742: 3710 adds r7, #16 - 8001744: 46bd mov sp, r7 - 8001746: bd80 pop {r7, pc} - -08001748 <_ZN7ESP826635uart_receive_until_termination_byteEPhthm>: - -HAL_StatusTypeDef ESP8266::uart_receive_until_termination_byte(uint8_t *pData, uint16_t Size, uint8_t terminationByte, uint32_t Timeout) { - 8001748: b580 push {r7, lr} - 800174a: b088 sub sp, #32 - 800174c: af02 add r7, sp, #8 - 800174e: 60f8 str r0, [r7, #12] - 8001750: 60b9 str r1, [r7, #8] - 8001752: 4611 mov r1, r2 - 8001754: 461a mov r2, r3 - 8001756: 460b mov r3, r1 - 8001758: 80fb strh r3, [r7, #6] - 800175a: 4613 mov r3, r2 - 800175c: 717b strb r3, [r7, #5] - uint32_t tickstart = 0U; - 800175e: 2300 movs r3, #0 - 8001760: 617b str r3, [r7, #20] - - /* Check that a Rx process is not already ongoing */ - if (huart->RxState == HAL_UART_STATE_READY) { - 8001762: 68fb ldr r3, [r7, #12] - 8001764: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 8001768: f893 303e ldrb.w r3, [r3, #62] ; 0x3e - 800176c: b2db uxtb r3, r3 - 800176e: 2b20 cmp r3, #32 - 8001770: bf0c ite eq - 8001772: 2301 moveq r3, #1 - 8001774: 2300 movne r3, #0 - 8001776: b2db uxtb r3, r3 - 8001778: 2b00 cmp r3, #0 - 800177a: d075 beq.n 8001868 <_ZN7ESP826635uart_receive_until_termination_byteEPhthm+0x120> - - /* Process Locked */ - __HAL_LOCK(huart); - 800177c: 68fb ldr r3, [r7, #12] - 800177e: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 8001782: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8001786: 2b01 cmp r3, #1 - 8001788: d101 bne.n 800178e <_ZN7ESP826635uart_receive_until_termination_byteEPhthm+0x46> - 800178a: 2302 movs r3, #2 - 800178c: e06d b.n 800186a <_ZN7ESP826635uart_receive_until_termination_byteEPhthm+0x122> - 800178e: 68fb ldr r3, [r7, #12] - 8001790: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 8001794: 2201 movs r2, #1 - 8001796: f883 203c strb.w r2, [r3, #60] ; 0x3c - - huart->ErrorCode = HAL_UART_ERROR_NONE; - 800179a: 68fb ldr r3, [r7, #12] - 800179c: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 80017a0: 2200 movs r2, #0 - 80017a2: 641a str r2, [r3, #64] ; 0x40 - huart->RxState = HAL_UART_STATE_BUSY_RX; - 80017a4: 68fb ldr r3, [r7, #12] - 80017a6: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 80017aa: 2222 movs r2, #34 ; 0x22 - 80017ac: f883 203e strb.w r2, [r3, #62] ; 0x3e - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 80017b0: 68fb ldr r3, [r7, #12] - 80017b2: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 80017b6: 2200 movs r2, #0 - 80017b8: 631a str r2, [r3, #48] ; 0x30 - - /* Init tickstart for timeout management */ - tickstart = HAL_GetTick(); - 80017ba: f001 fb7d bl 8002eb8 - 80017be: 6178 str r0, [r7, #20] - - huart->RxXferSize = Size; - 80017c0: 68fb ldr r3, [r7, #12] - 80017c2: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 80017c6: 88fa ldrh r2, [r7, #6] - 80017c8: 859a strh r2, [r3, #44] ; 0x2c - huart->RxXferCount = Size; - 80017ca: 68fb ldr r3, [r7, #12] - 80017cc: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 80017d0: 88fa ldrh r2, [r7, #6] - 80017d2: 85da strh r2, [r3, #46] ; 0x2e - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - 80017d4: 68fb ldr r3, [r7, #12] - 80017d6: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 80017da: 2200 movs r2, #0 - 80017dc: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Check the remain data to be received */ - while (huart->RxXferCount > 0U) { - 80017e0: 68fb ldr r3, [r7, #12] - 80017e2: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 80017e6: 8ddb ldrh r3, [r3, #46] ; 0x2e - 80017e8: b29b uxth r3, r3 - 80017ea: 2b00 cmp r3, #0 - 80017ec: bf14 ite ne - 80017ee: 2301 movne r3, #1 - 80017f0: 2300 moveq r3, #0 - 80017f2: b2db uxtb r3, r3 - 80017f4: 2b00 cmp r3, #0 - 80017f6: d02f beq.n 8001858 <_ZN7ESP826635uart_receive_until_termination_byteEPhthm+0x110> - if (wait_on_flag_until_timeout(UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) { - 80017f8: 6a3b ldr r3, [r7, #32] - 80017fa: 9300 str r3, [sp, #0] - 80017fc: 697b ldr r3, [r7, #20] - 80017fe: 2200 movs r2, #0 - 8001800: 2120 movs r1, #32 - 8001802: 68f8 ldr r0, [r7, #12] - 8001804: f7ff ff3e bl 8001684 <_ZN7ESP826626wait_on_flag_until_timeoutEm10FlagStatusmm> - 8001808: 4603 mov r3, r0 - 800180a: 2b00 cmp r3, #0 - 800180c: bf14 ite ne - 800180e: 2301 movne r3, #1 - 8001810: 2300 moveq r3, #0 - 8001812: b2db uxtb r3, r3 - 8001814: 2b00 cmp r3, #0 - 8001816: d001 beq.n 800181c <_ZN7ESP826635uart_receive_until_termination_byteEPhthm+0xd4> - return HAL_TIMEOUT; - 8001818: 2303 movs r3, #3 - 800181a: e026 b.n 800186a <_ZN7ESP826635uart_receive_until_termination_byteEPhthm+0x122> - } - *pData = (uint8_t) (huart->Instance->DR & (uint8_t) 0x00FF); - 800181c: 68fb ldr r3, [r7, #12] - 800181e: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 8001822: 681b ldr r3, [r3, #0] - 8001824: 685b ldr r3, [r3, #4] - 8001826: b2da uxtb r2, r3 - 8001828: 68bb ldr r3, [r7, #8] - 800182a: 701a strb r2, [r3, #0] - huart->RxXferCount--; - 800182c: 68fb ldr r3, [r7, #12] - 800182e: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 8001832: 8dda ldrh r2, [r3, #46] ; 0x2e - 8001834: b292 uxth r2, r2 - 8001836: 3a01 subs r2, #1 - 8001838: b292 uxth r2, r2 - 800183a: 85da strh r2, [r3, #46] ; 0x2e - if (*pData == terminationByte) { - 800183c: 68bb ldr r3, [r7, #8] - 800183e: 781b ldrb r3, [r3, #0] - 8001840: 797a ldrb r2, [r7, #5] - 8001842: 429a cmp r2, r3 - 8001844: d104 bne.n 8001850 <_ZN7ESP826635uart_receive_until_termination_byteEPhthm+0x108> - pData[1] = 0; //Coloca o zero no final da string - 8001846: 68bb ldr r3, [r7, #8] - 8001848: 3301 adds r3, #1 - 800184a: 2200 movs r2, #0 - 800184c: 701a strb r2, [r3, #0] - break; - 800184e: e003 b.n 8001858 <_ZN7ESP826635uart_receive_until_termination_byteEPhthm+0x110> - } - pData++; - 8001850: 68bb ldr r3, [r7, #8] - 8001852: 3301 adds r3, #1 - 8001854: 60bb str r3, [r7, #8] - while (huart->RxXferCount > 0U) { - 8001856: e7c3 b.n 80017e0 <_ZN7ESP826635uart_receive_until_termination_byteEPhthm+0x98> - } - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - 8001858: 68fb ldr r3, [r7, #12] - 800185a: f8d3 3110 ldr.w r3, [r3, #272] ; 0x110 - 800185e: 2220 movs r2, #32 - 8001860: f883 203e strb.w r2, [r3, #62] ; 0x3e - - return HAL_OK; - 8001864: 2300 movs r3, #0 - 8001866: e000 b.n 800186a <_ZN7ESP826635uart_receive_until_termination_byteEPhthm+0x122> - } else { - return HAL_BUSY; - 8001868: 2302 movs r3, #2 - } -} - 800186a: 4618 mov r0, r3 - 800186c: 3718 adds r7, #24 - 800186e: 46bd mov sp, r7 - 8001870: bd80 pop {r7, pc} - -08001872 <_ZN7ESP826613wait_until_okEv>: - -ESP8266::statusTypeDef ESP8266::wait_until_ok() { - 8001872: b580 push {r7, lr} - 8001874: b084 sub sp, #16 - 8001876: af02 add r7, sp, #8 - 8001878: 6078 str r0, [r7, #4] - while(uart_receive_until_termination_byte(buffer, MAX_BUFFER_SIZE, '\n', OK_TIMEOUT) != HAL_TIMEOUT){ - 800187a: 687b ldr r3, [r7, #4] - 800187c: f503 718a add.w r1, r3, #276 ; 0x114 - 8001880: f241 3388 movw r3, #5000 ; 0x1388 - 8001884: 9300 str r3, [sp, #0] - 8001886: 230a movs r3, #10 - 8001888: f44f 7280 mov.w r2, #256 ; 0x100 - 800188c: 6878 ldr r0, [r7, #4] - 800188e: f7ff ff5b bl 8001748 <_ZN7ESP826635uart_receive_until_termination_byteEPhthm> - 8001892: 4603 mov r3, r0 - 8001894: 2b03 cmp r3, #3 - 8001896: bf14 ite ne - 8001898: 2301 movne r3, #1 - 800189a: 2300 moveq r3, #0 - 800189c: b2db uxtb r3, r3 - 800189e: 2b00 cmp r3, #0 - 80018a0: d026 beq.n 80018f0 <_ZN7ESP826613wait_until_okEv+0x7e> - if(buffer[1] == 'C'){ - 80018a2: 687b ldr r3, [r7, #4] - 80018a4: f893 3115 ldrb.w r3, [r3, #277] ; 0x115 - 80018a8: 2b43 cmp r3, #67 ; 0x43 - 80018aa: d113 bne.n 80018d4 <_ZN7ESP826613wait_until_okEv+0x62> - //sscanf((const char*)(buffer+16), "%lX", &recvValue); - buffer[34] = 0; - 80018ac: 687b ldr r3, [r7, #4] - 80018ae: 2200 movs r2, #0 - 80018b0: f883 2136 strb.w r2, [r3, #310] ; 0x136 - recvValue64 = strtoull((const char*)(buffer+18), NULL, 16); - 80018b4: 687b ldr r3, [r7, #4] - 80018b6: f503 738a add.w r3, r3, #276 ; 0x114 - 80018ba: 3312 adds r3, #18 - 80018bc: 2210 movs r2, #16 - 80018be: 2100 movs r1, #0 - 80018c0: 4618 mov r0, r3 - 80018c2: f005 f8d9 bl 8006a78 - 80018c6: 4602 mov r2, r0 - 80018c8: 460b mov r3, r1 - 80018ca: 6879 ldr r1, [r7, #4] - 80018cc: e9c1 23c6 strd r2, r3, [r1, #792] ; 0x318 - //continue; - return STATUS_OK; - 80018d0: 2300 movs r3, #0 - 80018d2: e00e b.n 80018f2 <_ZN7ESP826613wait_until_okEv+0x80> - } - //if(!strcmp((char*) buffer, "OK\r\n")){ - if(buffer[0] == 'O'){ - 80018d4: 687b ldr r3, [r7, #4] - 80018d6: f893 3114 ldrb.w r3, [r3, #276] ; 0x114 - 80018da: 2b4f cmp r3, #79 ; 0x4f - 80018dc: d101 bne.n 80018e2 <_ZN7ESP826613wait_until_okEv+0x70> - return STATUS_OK; - 80018de: 2300 movs r3, #0 - 80018e0: e007 b.n 80018f2 <_ZN7ESP826613wait_until_okEv+0x80> - } - //if(!strcmp((char*) buffer, "ERROR\r\n")){ - if(buffer[0] == 'E'){ - 80018e2: 687b ldr r3, [r7, #4] - 80018e4: f893 3114 ldrb.w r3, [r3, #276] ; 0x114 - 80018e8: 2b45 cmp r3, #69 ; 0x45 - 80018ea: d1c6 bne.n 800187a <_ZN7ESP826613wait_until_okEv+0x8> - return STATUS_ERROR; - 80018ec: 2301 movs r3, #1 - 80018ee: e000 b.n 80018f2 <_ZN7ESP826613wait_until_okEv+0x80> - } - } - return STATUS_TIMEOUT; - 80018f0: 2302 movs r3, #2 -} - 80018f2: 4618 mov r0, r3 - 80018f4: 3708 adds r7, #8 - 80018f6: 46bd mov sp, r7 - 80018f8: bd80 pop {r7, pc} - ... - -080018fc <_ZN7ESP826618wait_until_send_okEv>: - -ESP8266::statusTypeDef ESP8266::wait_until_send_ok() { - 80018fc: b580 push {r7, lr} - 80018fe: b084 sub sp, #16 - 8001900: af02 add r7, sp, #8 - 8001902: 6078 str r0, [r7, #4] - while(uart_receive_until_termination_byte(buffer, MAX_BUFFER_SIZE, '\n', OK_TIMEOUT) != HAL_TIMEOUT){ - 8001904: 687b ldr r3, [r7, #4] - 8001906: f503 718a add.w r1, r3, #276 ; 0x114 - 800190a: f241 3388 movw r3, #5000 ; 0x1388 - 800190e: 9300 str r3, [sp, #0] - 8001910: 230a movs r3, #10 - 8001912: f44f 7280 mov.w r2, #256 ; 0x100 - 8001916: 6878 ldr r0, [r7, #4] - 8001918: f7ff ff16 bl 8001748 <_ZN7ESP826635uart_receive_until_termination_byteEPhthm> - 800191c: 4603 mov r3, r0 - 800191e: 2b03 cmp r3, #3 - 8001920: bf14 ite ne - 8001922: 2301 movne r3, #1 - 8001924: 2300 moveq r3, #0 - 8001926: b2db uxtb r3, r3 - 8001928: 2b00 cmp r3, #0 - 800192a: d02c beq.n 8001986 <_ZN7ESP826618wait_until_send_okEv+0x8a> - if(buffer[1] == 'C'){ - 800192c: 687b ldr r3, [r7, #4] - 800192e: f893 3115 ldrb.w r3, [r3, #277] ; 0x115 - 8001932: 2b43 cmp r3, #67 ; 0x43 - 8001934: d10e bne.n 8001954 <_ZN7ESP826618wait_until_send_okEv+0x58> - //sscanf((const char*)(buffer+16), "%lX", &recvValue); - recvValue64 = strtoull((const char*)(buffer+18), NULL, 16); - 8001936: 687b ldr r3, [r7, #4] - 8001938: f503 738a add.w r3, r3, #276 ; 0x114 - 800193c: 3312 adds r3, #18 - 800193e: 2210 movs r2, #16 - 8001940: 2100 movs r1, #0 - 8001942: 4618 mov r0, r3 - 8001944: f005 f898 bl 8006a78 - 8001948: 4602 mov r2, r0 - 800194a: 460b mov r3, r1 - 800194c: 6879 ldr r1, [r7, #4] - 800194e: e9c1 23c6 strd r2, r3, [r1, #792] ; 0x318 - continue; - 8001952: e017 b.n 8001984 <_ZN7ESP826618wait_until_send_okEv+0x88> - } - if(!strcmp((char*) buffer, "SEND OK\r\n")){ - 8001954: 687b ldr r3, [r7, #4] - 8001956: f503 738a add.w r3, r3, #276 ; 0x114 - 800195a: 490d ldr r1, [pc, #52] ; (8001990 <_ZN7ESP826618wait_until_send_okEv+0x94>) - 800195c: 4618 mov r0, r3 - 800195e: f7fe fbf7 bl 8000150 - 8001962: 4603 mov r3, r0 - 8001964: 2b00 cmp r3, #0 - 8001966: d101 bne.n 800196c <_ZN7ESP826618wait_until_send_okEv+0x70> - return STATUS_OK; - 8001968: 2300 movs r3, #0 - 800196a: e00d b.n 8001988 <_ZN7ESP826618wait_until_send_okEv+0x8c> - } - if(!strcmp((char*) buffer, "SEND ERROR\r\n")){ - 800196c: 687b ldr r3, [r7, #4] - 800196e: f503 738a add.w r3, r3, #276 ; 0x114 - 8001972: 4908 ldr r1, [pc, #32] ; (8001994 <_ZN7ESP826618wait_until_send_okEv+0x98>) - 8001974: 4618 mov r0, r3 - 8001976: f7fe fbeb bl 8000150 - 800197a: 4603 mov r3, r0 - 800197c: 2b00 cmp r3, #0 - 800197e: d1c1 bne.n 8001904 <_ZN7ESP826618wait_until_send_okEv+0x8> - return STATUS_ERROR; - 8001980: 2301 movs r3, #1 - 8001982: e001 b.n 8001988 <_ZN7ESP826618wait_until_send_okEv+0x8c> - while(uart_receive_until_termination_byte(buffer, MAX_BUFFER_SIZE, '\n', OK_TIMEOUT) != HAL_TIMEOUT){ - 8001984: e7be b.n 8001904 <_ZN7ESP826618wait_until_send_okEv+0x8> - } - } - return STATUS_TIMEOUT; - 8001986: 2302 movs r3, #2 -} - 8001988: 4618 mov r0, r3 - 800198a: 3708 adds r7, #8 - 800198c: 46bd mov sp, r7 - 800198e: bd80 pop {r7, pc} - 8001990: 0800af84 .word 0x0800af84 - 8001994: 0800af90 .word 0x0800af90 - -08001998 <_ZN11SerialDebugC1EP20__UART_HandleTypeDefm>: - */ - -#include "SerialDebug.hpp" -#include - -SerialDebug::SerialDebug(UART_HandleTypeDef* huartptr, uint32_t fifoSize) - 8001998: b590 push {r4, r7, lr} - 800199a: b085 sub sp, #20 - 800199c: af00 add r7, sp, #0 - 800199e: 60f8 str r0, [r7, #12] - 80019a0: 60b9 str r1, [r7, #8] - 80019a2: 607a str r2, [r7, #4] -: huartptr(huartptr) - 80019a4: 68fb ldr r3, [r7, #12] - 80019a6: 2200 movs r2, #0 - 80019a8: 711a strb r2, [r3, #4] - 80019aa: 68fb ldr r3, [r7, #12] - 80019ac: 68ba ldr r2, [r7, #8] - 80019ae: 609a str r2, [r3, #8] - 80019b0: 68fb ldr r3, [r7, #12] - 80019b2: 2203 movs r2, #3 - 80019b4: f883 210c strb.w r2, [r3, #268] ; 0x10c -{ - fifo = new StaticFIFO(fifoSize); - 80019b8: 2014 movs r0, #20 - 80019ba: f004 fc91 bl 80062e0 <_Znwj> - 80019be: 4603 mov r3, r0 - 80019c0: 461c mov r4, r3 - 80019c2: 6879 ldr r1, [r7, #4] - 80019c4: 4620 mov r0, r4 - 80019c6: f000 fa93 bl 8001ef0 <_ZN10StaticFIFOC1Em> - 80019ca: 68fb ldr r3, [r7, #12] - 80019cc: 601c str r4, [r3, #0] -} - 80019ce: 68fb ldr r3, [r7, #12] - 80019d0: 4618 mov r0, r3 - 80019d2: 3714 adds r7, #20 - 80019d4: 46bd mov sp, r7 - 80019d6: bd90 pop {r4, r7, pc} - -080019d8 <_ZN11SerialDebug8setLevelENS_10DebugLevelE>: - -void SerialDebug::setLevel(DebugLevel level) -{ - 80019d8: b480 push {r7} - 80019da: b083 sub sp, #12 - 80019dc: af00 add r7, sp, #0 - 80019de: 6078 str r0, [r7, #4] - 80019e0: 460b mov r3, r1 - 80019e2: 70fb strb r3, [r7, #3] - debugLevel = level; - 80019e4: 687b ldr r3, [r7, #4] - 80019e6: 78fa ldrb r2, [r7, #3] - 80019e8: f883 210c strb.w r2, [r3, #268] ; 0x10c -} - 80019ec: bf00 nop - 80019ee: 370c adds r7, #12 - 80019f0: 46bd mov sp, r7 - 80019f2: bc80 pop {r7} - 80019f4: 4770 bx lr - -080019f6 <_ZN11SerialDebug20serialTxCpltCallbackEv>: - -void SerialDebug::serialTxCpltCallback(){ - 80019f6: b580 push {r7, lr} - 80019f8: b084 sub sp, #16 - 80019fa: af00 add r7, sp, #0 - 80019fc: 6078 str r0, [r7, #4] - uint32_t numChars; - uint8_t* pointer; - if (fifo->pop(&pointer, &numChars, bufSize) >= 0){ - 80019fe: 687b ldr r3, [r7, #4] - 8001a00: 6818 ldr r0, [r3, #0] - 8001a02: f107 020c add.w r2, r7, #12 - 8001a06: f107 0108 add.w r1, r7, #8 - 8001a0a: 2380 movs r3, #128 ; 0x80 - 8001a0c: f000 fb2d bl 800206a <_ZN10StaticFIFO3popEPPhPmm> - 8001a10: 4603 mov r3, r0 - 8001a12: 43db mvns r3, r3 - 8001a14: 0fdb lsrs r3, r3, #31 - 8001a16: b2db uxtb r3, r3 - 8001a18: 2b00 cmp r3, #0 - 8001a1a: d00f beq.n 8001a3c <_ZN11SerialDebug20serialTxCpltCallbackEv+0x46> - memcpy(uartBuf, pointer, numChars); - 8001a1c: 687b ldr r3, [r7, #4] - 8001a1e: 338c adds r3, #140 ; 0x8c - 8001a20: 68b9 ldr r1, [r7, #8] - 8001a22: 68fa ldr r2, [r7, #12] - 8001a24: 4618 mov r0, r3 - 8001a26: f004 fef7 bl 8006818 - HAL_UART_Transmit_DMA(huartptr, pointer, (uint16_t)numChars); - 8001a2a: 687b ldr r3, [r7, #4] - 8001a2c: 689b ldr r3, [r3, #8] - 8001a2e: 68b9 ldr r1, [r7, #8] - 8001a30: 68fa ldr r2, [r7, #12] - 8001a32: b292 uxth r2, r2 - 8001a34: 4618 mov r0, r3 - 8001a36: f003 fef7 bl 8005828 - }else{ - transmitting = false; - } -} - 8001a3a: e002 b.n 8001a42 <_ZN11SerialDebug20serialTxCpltCallbackEv+0x4c> - transmitting = false; - 8001a3c: 687b ldr r3, [r7, #4] - 8001a3e: 2200 movs r2, #0 - 8001a40: 711a strb r2, [r3, #4] -} - 8001a42: bf00 nop - 8001a44: 3710 adds r7, #16 - 8001a46: 46bd mov sp, r7 - 8001a48: bd80 pop {r7, pc} - ... - -08001a4c <_ZN11SerialDebug5debugEPKc>: - -void SerialDebug::debug(const char* data){ - 8001a4c: b590 push {r4, r7, lr} - 8001a4e: b085 sub sp, #20 - 8001a50: af00 add r7, sp, #0 - 8001a52: 6078 str r0, [r7, #4] - 8001a54: 6039 str r1, [r7, #0] - if (debugLevel <= DEBUG_LEVEL_DEBUG){ - 8001a56: 687b ldr r3, [r7, #4] - 8001a58: f893 310c ldrb.w r3, [r3, #268] ; 0x10c - 8001a5c: 2b00 cmp r3, #0 - 8001a5e: d130 bne.n 8001ac2 <_ZN11SerialDebug5debugEPKc+0x76> - int numChars = sprintf(charBuf, "[%13lu] DBG: %.105s\r\n", HAL_GetTick(), data); - 8001a60: 687b ldr r3, [r7, #4] - 8001a62: f103 040c add.w r4, r3, #12 - 8001a66: f001 fa27 bl 8002eb8 - 8001a6a: 4602 mov r2, r0 - 8001a6c: 683b ldr r3, [r7, #0] - 8001a6e: 4917 ldr r1, [pc, #92] ; (8001acc <_ZN11SerialDebug5debugEPKc+0x80>) - 8001a70: 4620 mov r0, r4 - 8001a72: f004 ff49 bl 8006908 - 8001a76: 60f8 str r0, [r7, #12] - if(numChars > 0){ - 8001a78: 68fb ldr r3, [r7, #12] - 8001a7a: 2b00 cmp r3, #0 - 8001a7c: dd21 ble.n 8001ac2 <_ZN11SerialDebug5debugEPKc+0x76> - if(transmitting){ - 8001a7e: 687b ldr r3, [r7, #4] - 8001a80: 791b ldrb r3, [r3, #4] - 8001a82: 2b00 cmp r3, #0 - 8001a84: d008 beq.n 8001a98 <_ZN11SerialDebug5debugEPKc+0x4c> - fifo->push(charBuf, numChars); - 8001a86: 687b ldr r3, [r7, #4] - 8001a88: 6818 ldr r0, [r3, #0] - 8001a8a: 687b ldr r3, [r7, #4] - 8001a8c: 330c adds r3, #12 - 8001a8e: 68fa ldr r2, [r7, #12] - 8001a90: 4619 mov r1, r3 - 8001a92: f000 fa7f bl 8001f94 <_ZN10StaticFIFO4pushEPcm> - memcpy(uartBuf, (uint8_t*)charBuf, numChars); - HAL_UART_Transmit_DMA(huartptr, uartBuf, (uint16_t)numChars); - } - } - } -} - 8001a96: e014 b.n 8001ac2 <_ZN11SerialDebug5debugEPKc+0x76> - transmitting = true; - 8001a98: 687b ldr r3, [r7, #4] - 8001a9a: 2201 movs r2, #1 - 8001a9c: 711a strb r2, [r3, #4] - memcpy(uartBuf, (uint8_t*)charBuf, numChars); - 8001a9e: 687b ldr r3, [r7, #4] - 8001aa0: f103 008c add.w r0, r3, #140 ; 0x8c - 8001aa4: 687b ldr r3, [r7, #4] - 8001aa6: 330c adds r3, #12 - 8001aa8: 68fa ldr r2, [r7, #12] - 8001aaa: 4619 mov r1, r3 - 8001aac: f004 feb4 bl 8006818 - HAL_UART_Transmit_DMA(huartptr, uartBuf, (uint16_t)numChars); - 8001ab0: 687b ldr r3, [r7, #4] - 8001ab2: 6898 ldr r0, [r3, #8] - 8001ab4: 687b ldr r3, [r7, #4] - 8001ab6: 338c adds r3, #140 ; 0x8c - 8001ab8: 68fa ldr r2, [r7, #12] - 8001aba: b292 uxth r2, r2 - 8001abc: 4619 mov r1, r3 - 8001abe: f003 feb3 bl 8005828 -} - 8001ac2: bf00 nop - 8001ac4: 3714 adds r7, #20 - 8001ac6: 46bd mov sp, r7 - 8001ac8: bd90 pop {r4, r7, pc} - 8001aca: bf00 nop - 8001acc: 0800afa0 .word 0x0800afa0 - -08001ad0 <_ZN11SerialDebug4infoEPKc>: - -void SerialDebug::info(const char* data){ - 8001ad0: b590 push {r4, r7, lr} - 8001ad2: b085 sub sp, #20 - 8001ad4: af00 add r7, sp, #0 - 8001ad6: 6078 str r0, [r7, #4] - 8001ad8: 6039 str r1, [r7, #0] - if (debugLevel <= DEBUG_LEVEL_INFO){ - 8001ada: 687b ldr r3, [r7, #4] - 8001adc: f893 310c ldrb.w r3, [r3, #268] ; 0x10c - 8001ae0: 2b01 cmp r3, #1 - 8001ae2: d830 bhi.n 8001b46 <_ZN11SerialDebug4infoEPKc+0x76> - int numChars = sprintf(charBuf, "[%13lu] INF: %.105s\r\n", HAL_GetTick(), data); - 8001ae4: 687b ldr r3, [r7, #4] - 8001ae6: f103 040c add.w r4, r3, #12 - 8001aea: f001 f9e5 bl 8002eb8 - 8001aee: 4602 mov r2, r0 - 8001af0: 683b ldr r3, [r7, #0] - 8001af2: 4917 ldr r1, [pc, #92] ; (8001b50 <_ZN11SerialDebug4infoEPKc+0x80>) - 8001af4: 4620 mov r0, r4 - 8001af6: f004 ff07 bl 8006908 - 8001afa: 60f8 str r0, [r7, #12] - if(numChars > 0){ - 8001afc: 68fb ldr r3, [r7, #12] - 8001afe: 2b00 cmp r3, #0 - 8001b00: dd21 ble.n 8001b46 <_ZN11SerialDebug4infoEPKc+0x76> - if(transmitting){ - 8001b02: 687b ldr r3, [r7, #4] - 8001b04: 791b ldrb r3, [r3, #4] - 8001b06: 2b00 cmp r3, #0 - 8001b08: d008 beq.n 8001b1c <_ZN11SerialDebug4infoEPKc+0x4c> - fifo->push(charBuf, numChars); - 8001b0a: 687b ldr r3, [r7, #4] - 8001b0c: 6818 ldr r0, [r3, #0] - 8001b0e: 687b ldr r3, [r7, #4] - 8001b10: 330c adds r3, #12 - 8001b12: 68fa ldr r2, [r7, #12] - 8001b14: 4619 mov r1, r3 - 8001b16: f000 fa3d bl 8001f94 <_ZN10StaticFIFO4pushEPcm> - memcpy(uartBuf, (uint8_t*)charBuf, numChars); - HAL_UART_Transmit_DMA(huartptr, uartBuf, (uint16_t)numChars); - } - } - } -} - 8001b1a: e014 b.n 8001b46 <_ZN11SerialDebug4infoEPKc+0x76> - transmitting = true; - 8001b1c: 687b ldr r3, [r7, #4] - 8001b1e: 2201 movs r2, #1 - 8001b20: 711a strb r2, [r3, #4] - memcpy(uartBuf, (uint8_t*)charBuf, numChars); - 8001b22: 687b ldr r3, [r7, #4] - 8001b24: f103 008c add.w r0, r3, #140 ; 0x8c - 8001b28: 687b ldr r3, [r7, #4] - 8001b2a: 330c adds r3, #12 - 8001b2c: 68fa ldr r2, [r7, #12] - 8001b2e: 4619 mov r1, r3 - 8001b30: f004 fe72 bl 8006818 - HAL_UART_Transmit_DMA(huartptr, uartBuf, (uint16_t)numChars); - 8001b34: 687b ldr r3, [r7, #4] - 8001b36: 6898 ldr r0, [r3, #8] - 8001b38: 687b ldr r3, [r7, #4] - 8001b3a: 338c adds r3, #140 ; 0x8c - 8001b3c: 68fa ldr r2, [r7, #12] - 8001b3e: b292 uxth r2, r2 - 8001b40: 4619 mov r1, r3 - 8001b42: f003 fe71 bl 8005828 -} - 8001b46: bf00 nop - 8001b48: 3714 adds r7, #20 - 8001b4a: 46bd mov sp, r7 - 8001b4c: bd90 pop {r4, r7, pc} - 8001b4e: bf00 nop - 8001b50: 0800afb8 .word 0x0800afb8 - -08001b54 : -float kp = 16.0715; -float ki = 0.028822; -float kd = 1750.3479; -//Temporary Variables end - -void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim){ - 8001b54: b480 push {r7} - 8001b56: b083 sub sp, #12 - 8001b58: af00 add r7, sp, #0 - 8001b5a: 6078 str r0, [r7, #4] - if(htim==&htim4){ - - } -} - 8001b5c: bf00 nop - 8001b5e: 370c adds r7, #12 - 8001b60: 46bd mov sp, r7 - 8001b62: bc80 pop {r7} - 8001b64: 4770 bx lr - ... - -08001b68 : - -void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { - 8001b68: b580 push {r7, lr} - 8001b6a: b082 sub sp, #8 - 8001b6c: af00 add r7, sp, #0 - 8001b6e: 6078 str r0, [r7, #4] - if(huart == &huart2){ - 8001b70: 687b ldr r3, [r7, #4] - 8001b72: 4a05 ldr r2, [pc, #20] ; (8001b88 ) - 8001b74: 4293 cmp r3, r2 - 8001b76: d102 bne.n 8001b7e - debug.serialTxCpltCallback(); - 8001b78: 4804 ldr r0, [pc, #16] ; (8001b8c ) - 8001b7a: f7ff ff3c bl 80019f6 <_ZN11SerialDebug20serialTxCpltCallbackEv> - } -} - 8001b7e: bf00 nop - 8001b80: 3708 adds r7, #8 - 8001b82: 46bd mov sp, r7 - 8001b84: bd80 pop {r7, pc} - 8001b86: bf00 nop - 8001b88: 20000fbc .word 0x20000fbc - 8001b8c: 200009e4 .word 0x200009e4 - -08001b90 <_Z3pidl>: - -void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { - -} - -void pid(int32_t input){ - 8001b90: b590 push {r4, r7, lr} - 8001b92: b085 sub sp, #20 - 8001b94: af00 add r7, sp, #0 - 8001b96: 6078 str r0, [r7, #4] - lastError = error; - 8001b98: 4b4c ldr r3, [pc, #304] ; (8001ccc <_Z3pidl+0x13c>) - 8001b9a: 681b ldr r3, [r3, #0] - 8001b9c: 4a4c ldr r2, [pc, #304] ; (8001cd0 <_Z3pidl+0x140>) - 8001b9e: 6013 str r3, [r2, #0] - error = input - (int32_t)TIM3->CNT; - 8001ba0: 4b4c ldr r3, [pc, #304] ; (8001cd4 <_Z3pidl+0x144>) - 8001ba2: 6a5b ldr r3, [r3, #36] ; 0x24 - 8001ba4: 461a mov r2, r3 - 8001ba6: 687b ldr r3, [r7, #4] - 8001ba8: 1a9b subs r3, r3, r2 - 8001baa: 4618 mov r0, r3 - 8001bac: f7ff f830 bl 8000c10 <__aeabi_i2f> - 8001bb0: 4603 mov r3, r0 - 8001bb2: 4a46 ldr r2, [pc, #280] ; (8001ccc <_Z3pidl+0x13c>) - 8001bb4: 6013 str r3, [r2, #0] - derror = error - lastError; - 8001bb6: 4b45 ldr r3, [pc, #276] ; (8001ccc <_Z3pidl+0x13c>) - 8001bb8: 681b ldr r3, [r3, #0] - 8001bba: 4a45 ldr r2, [pc, #276] ; (8001cd0 <_Z3pidl+0x140>) - 8001bbc: 6812 ldr r2, [r2, #0] - 8001bbe: 4611 mov r1, r2 - 8001bc0: 4618 mov r0, r3 - 8001bc2: f7fe ff6f bl 8000aa4 <__aeabi_fsub> - 8001bc6: 4603 mov r3, r0 - 8001bc8: 461a mov r2, r3 - 8001bca: 4b43 ldr r3, [pc, #268] ; (8001cd8 <_Z3pidl+0x148>) - 8001bcc: 601a str r2, [r3, #0] - ierror += error; - 8001bce: 4b43 ldr r3, [pc, #268] ; (8001cdc <_Z3pidl+0x14c>) - 8001bd0: 681b ldr r3, [r3, #0] - 8001bd2: 4a3e ldr r2, [pc, #248] ; (8001ccc <_Z3pidl+0x13c>) - 8001bd4: 6812 ldr r2, [r2, #0] - 8001bd6: 4611 mov r1, r2 - 8001bd8: 4618 mov r0, r3 - 8001bda: f7fe ff65 bl 8000aa8 <__addsf3> - 8001bde: 4603 mov r3, r0 - 8001be0: 461a mov r2, r3 - 8001be2: 4b3e ldr r3, [pc, #248] ; (8001cdc <_Z3pidl+0x14c>) - 8001be4: 601a str r2, [r3, #0] - if(ierror > 2047){ - 8001be6: 4b3d ldr r3, [pc, #244] ; (8001cdc <_Z3pidl+0x14c>) - 8001be8: 681b ldr r3, [r3, #0] - 8001bea: 493d ldr r1, [pc, #244] ; (8001ce0 <_Z3pidl+0x150>) - 8001bec: 4618 mov r0, r3 - 8001bee: f7ff fa1f bl 8001030 <__aeabi_fcmpgt> - 8001bf2: 4603 mov r3, r0 - 8001bf4: 2b00 cmp r3, #0 - 8001bf6: d003 beq.n 8001c00 <_Z3pidl+0x70> - ierror = 2047; - 8001bf8: 4b38 ldr r3, [pc, #224] ; (8001cdc <_Z3pidl+0x14c>) - 8001bfa: 4a39 ldr r2, [pc, #228] ; (8001ce0 <_Z3pidl+0x150>) - 8001bfc: 601a str r2, [r3, #0] - 8001bfe: e00d b.n 8001c1c <_Z3pidl+0x8c> - }else if(ierror < -2048){ - 8001c00: 4b36 ldr r3, [pc, #216] ; (8001cdc <_Z3pidl+0x14c>) - 8001c02: 681b ldr r3, [r3, #0] - 8001c04: f04f 4145 mov.w r1, #3305111552 ; 0xc5000000 - 8001c08: 4618 mov r0, r3 - 8001c0a: f7ff f9f3 bl 8000ff4 <__aeabi_fcmplt> - 8001c0e: 4603 mov r3, r0 - 8001c10: 2b00 cmp r3, #0 - 8001c12: d003 beq.n 8001c1c <_Z3pidl+0x8c> - ierror = -2048; - 8001c14: 4b31 ldr r3, [pc, #196] ; (8001cdc <_Z3pidl+0x14c>) - 8001c16: f04f 4245 mov.w r2, #3305111552 ; 0xc5000000 - 8001c1a: 601a str r2, [r3, #0] - } - float pid = kp*error + ki*ierror*deltaT + kd*derror/deltaT; - 8001c1c: 4b31 ldr r3, [pc, #196] ; (8001ce4 <_Z3pidl+0x154>) - 8001c1e: 681b ldr r3, [r3, #0] - 8001c20: 4a2a ldr r2, [pc, #168] ; (8001ccc <_Z3pidl+0x13c>) - 8001c22: 6812 ldr r2, [r2, #0] - 8001c24: 4611 mov r1, r2 - 8001c26: 4618 mov r0, r3 - 8001c28: f7ff f846 bl 8000cb8 <__aeabi_fmul> - 8001c2c: 4603 mov r3, r0 - 8001c2e: 461c mov r4, r3 - 8001c30: 4b2d ldr r3, [pc, #180] ; (8001ce8 <_Z3pidl+0x158>) - 8001c32: 681b ldr r3, [r3, #0] - 8001c34: 4a29 ldr r2, [pc, #164] ; (8001cdc <_Z3pidl+0x14c>) - 8001c36: 6812 ldr r2, [r2, #0] - 8001c38: 4611 mov r1, r2 - 8001c3a: 4618 mov r0, r3 - 8001c3c: f7ff f83c bl 8000cb8 <__aeabi_fmul> - 8001c40: 4603 mov r3, r0 - 8001c42: 461a mov r2, r3 - 8001c44: 4b29 ldr r3, [pc, #164] ; (8001cec <_Z3pidl+0x15c>) - 8001c46: 681b ldr r3, [r3, #0] - 8001c48: 4619 mov r1, r3 - 8001c4a: 4610 mov r0, r2 - 8001c4c: f7ff f834 bl 8000cb8 <__aeabi_fmul> - 8001c50: 4603 mov r3, r0 - 8001c52: 4619 mov r1, r3 - 8001c54: 4620 mov r0, r4 - 8001c56: f7fe ff27 bl 8000aa8 <__addsf3> - 8001c5a: 4603 mov r3, r0 - 8001c5c: 461c mov r4, r3 - 8001c5e: 4b24 ldr r3, [pc, #144] ; (8001cf0 <_Z3pidl+0x160>) - 8001c60: 681b ldr r3, [r3, #0] - 8001c62: 4a1d ldr r2, [pc, #116] ; (8001cd8 <_Z3pidl+0x148>) - 8001c64: 6812 ldr r2, [r2, #0] - 8001c66: 4611 mov r1, r2 - 8001c68: 4618 mov r0, r3 - 8001c6a: f7ff f825 bl 8000cb8 <__aeabi_fmul> - 8001c6e: 4603 mov r3, r0 - 8001c70: 461a mov r2, r3 - 8001c72: 4b1e ldr r3, [pc, #120] ; (8001cec <_Z3pidl+0x15c>) - 8001c74: 681b ldr r3, [r3, #0] - 8001c76: 4619 mov r1, r3 - 8001c78: 4610 mov r0, r2 - 8001c7a: f7ff f8d1 bl 8000e20 <__aeabi_fdiv> - 8001c7e: 4603 mov r3, r0 - 8001c80: 4619 mov r1, r3 - 8001c82: 4620 mov r0, r4 - 8001c84: f7fe ff10 bl 8000aa8 <__addsf3> - 8001c88: 4603 mov r3, r0 - 8001c8a: 60fb str r3, [r7, #12] - if(pid > 2047){ - 8001c8c: 4914 ldr r1, [pc, #80] ; (8001ce0 <_Z3pidl+0x150>) - 8001c8e: 68f8 ldr r0, [r7, #12] - 8001c90: f7ff f9ce bl 8001030 <__aeabi_fcmpgt> - 8001c94: 4603 mov r3, r0 - 8001c96: 2b00 cmp r3, #0 - 8001c98: d002 beq.n 8001ca0 <_Z3pidl+0x110> - pid = 2047; - 8001c9a: 4b11 ldr r3, [pc, #68] ; (8001ce0 <_Z3pidl+0x150>) - 8001c9c: 60fb str r3, [r7, #12] - 8001c9e: e008 b.n 8001cb2 <_Z3pidl+0x122> - }else if(pid<-2047){ - 8001ca0: 4914 ldr r1, [pc, #80] ; (8001cf4 <_Z3pidl+0x164>) - 8001ca2: 68f8 ldr r0, [r7, #12] - 8001ca4: f7ff f9a6 bl 8000ff4 <__aeabi_fcmplt> - 8001ca8: 4603 mov r3, r0 - 8001caa: 2b00 cmp r3, #0 - 8001cac: d001 beq.n 8001cb2 <_Z3pidl+0x122> - pid = -2047; - 8001cae: 4b11 ldr r3, [pc, #68] ; (8001cf4 <_Z3pidl+0x164>) - 8001cb0: 60fb str r3, [r7, #12] - } - motor1.setSpeed((int32_t)pid); - 8001cb2: 68f8 ldr r0, [r7, #12] - 8001cb4: f7ff f9c6 bl 8001044 <__aeabi_f2iz> - 8001cb8: 4603 mov r3, r0 - 8001cba: 4619 mov r1, r3 - 8001cbc: 480e ldr r0, [pc, #56] ; (8001cf8 <_Z3pidl+0x168>) - 8001cbe: f7ff fb8a bl 80013d6 <_ZN8BTS7960B8setSpeedEl> -} - 8001cc2: bf00 nop - 8001cc4: 3714 adds r7, #20 - 8001cc6: 46bd mov sp, r7 - 8001cc8: bd90 pop {r4, r7, pc} - 8001cca: bf00 nop - 8001ccc: 20000e48 .word 0x20000e48 - 8001cd0: 20000e4c .word 0x20000e4c - 8001cd4: 40000400 .word 0x40000400 - 8001cd8: 20000e50 .word 0x20000e50 - 8001cdc: 20000e54 .word 0x20000e54 - 8001ce0: 44ffe000 .word 0x44ffe000 - 8001ce4: 20000004 .word 0x20000004 - 8001ce8: 20000008 .word 0x20000008 - 8001cec: 20000000 .word 0x20000000 - 8001cf0: 2000000c .word 0x2000000c - 8001cf4: c4ffe000 .word 0xc4ffe000 - 8001cf8: 20000e30 .word 0x20000e30 - -08001cfc : - -void start(){ - 8001cfc: b580 push {r7, lr} - 8001cfe: b082 sub sp, #8 - 8001d00: af00 add r7, sp, #0 - debug.setLevel(SerialDebug::DEBUG_LEVEL_INFO); - 8001d02: 2101 movs r1, #1 - 8001d04: 4837 ldr r0, [pc, #220] ; (8001de4 ) - 8001d06: f7ff fe67 bl 80019d8 <_ZN11SerialDebug8setLevelENS_10DebugLevelE> - debug.info("-----Init-----"); - 8001d0a: 4937 ldr r1, [pc, #220] ; (8001de8 ) - 8001d0c: 4835 ldr r0, [pc, #212] ; (8001de4 ) - 8001d0e: f7ff fedf bl 8001ad0 <_ZN11SerialDebug4infoEPKc> - debug.info("Init timers begin"); - 8001d12: 4936 ldr r1, [pc, #216] ; (8001dec ) - 8001d14: 4833 ldr r0, [pc, #204] ; (8001de4 ) - 8001d16: f7ff fedb bl 8001ad0 <_ZN11SerialDebug4infoEPKc> - //HAL_TIM_Encoder_Start(&htim1, TIM_CHANNEL_1); - HAL_TIM_Encoder_Start(&htim1, TIM_CHANNEL_ALL); - 8001d1a: 213c movs r1, #60 ; 0x3c - 8001d1c: 4834 ldr r0, [pc, #208] ; (8001df0 ) - 8001d1e: f002 fe53 bl 80049c8 - //HAL_TIM_Encoder_Start(&htim3, TIM_CHANNEL_1); - HAL_TIM_Encoder_Start(&htim3, TIM_CHANNEL_ALL); - 8001d22: 213c movs r1, #60 ; 0x3c - 8001d24: 4833 ldr r0, [pc, #204] ; (8001df4 ) - 8001d26: f002 fe4f bl 80049c8 - HAL_TIM_Base_Start(&htim2); - 8001d2a: 4833 ldr r0, [pc, #204] ; (8001df8 ) - 8001d2c: f002 fc66 bl 80045fc - HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1); - 8001d30: 2100 movs r1, #0 - 8001d32: 4831 ldr r0, [pc, #196] ; (8001df8 ) - 8001d34: f002 fd04 bl 8004740 - HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2); - 8001d38: 2104 movs r1, #4 - 8001d3a: 482f ldr r0, [pc, #188] ; (8001df8 ) - 8001d3c: f002 fd00 bl 8004740 - HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_3); - 8001d40: 2108 movs r1, #8 - 8001d42: 482d ldr r0, [pc, #180] ; (8001df8 ) - 8001d44: f002 fcfc bl 8004740 - HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_4); - 8001d48: 210c movs r1, #12 - 8001d4a: 482b ldr r0, [pc, #172] ; (8001df8 ) - 8001d4c: f002 fcf8 bl 8004740 - HAL_TIM_Base_Start(&htim4); - 8001d50: 482a ldr r0, [pc, #168] ; (8001dfc ) - 8001d52: f002 fc53 bl 80045fc - debug.info("Init timers end"); - 8001d56: 492a ldr r1, [pc, #168] ; (8001e00 ) - 8001d58: 4822 ldr r0, [pc, #136] ; (8001de4 ) - 8001d5a: f7ff feb9 bl 8001ad0 <_ZN11SerialDebug4infoEPKc> - debug.info("Init ESP8266 begin"); - 8001d5e: 4929 ldr r1, [pc, #164] ; (8001e04 ) - 8001d60: 4820 ldr r0, [pc, #128] ; (8001de4 ) - 8001d62: f7ff feb5 bl 8001ad0 <_ZN11SerialDebug4infoEPKc> - HAL_Delay(1000); - 8001d66: f44f 707a mov.w r0, #1000 ; 0x3e8 - 8001d6a: f001 f8af bl 8002ecc - switch(esp0.command("ATE0\r\n")){ - 8001d6e: 4926 ldr r1, [pc, #152] ; (8001e08 ) - 8001d70: 4826 ldr r0, [pc, #152] ; (8001e0c ) - 8001d72: f7ff fbdf bl 8001534 <_ZN7ESP82667commandEPKc> - 8001d76: 4603 mov r3, r0 - 8001d78: 2b02 cmp r3, #2 - 8001d7a: d010 beq.n 8001d9e - 8001d7c: 2b02 cmp r3, #2 - 8001d7e: dc13 bgt.n 8001da8 - 8001d80: 2b00 cmp r3, #0 - 8001d82: d002 beq.n 8001d8a - 8001d84: 2b01 cmp r3, #1 - 8001d86: d005 beq.n 8001d94 - 8001d88: e00e b.n 8001da8 - case ESP8266::STATUS_OK: - debug.debug("ATE0 OK"); - 8001d8a: 4921 ldr r1, [pc, #132] ; (8001e10 ) - 8001d8c: 4815 ldr r0, [pc, #84] ; (8001de4 ) - 8001d8e: f7ff fe5d bl 8001a4c <_ZN11SerialDebug5debugEPKc> - break; - 8001d92: e009 b.n 8001da8 - case ESP8266::STATUS_ERROR: - debug.debug("ATE0 ERROR"); - 8001d94: 491f ldr r1, [pc, #124] ; (8001e14 ) - 8001d96: 4813 ldr r0, [pc, #76] ; (8001de4 ) - 8001d98: f7ff fe58 bl 8001a4c <_ZN11SerialDebug5debugEPKc> - break; - 8001d9c: e004 b.n 8001da8 - case ESP8266::STATUS_TIMEOUT: - debug.debug("ATE0 TIMEOUT"); - 8001d9e: 491e ldr r1, [pc, #120] ; (8001e18 ) - 8001da0: 4810 ldr r0, [pc, #64] ; (8001de4 ) - 8001da2: f7ff fe53 bl 8001a4c <_ZN11SerialDebug5debugEPKc> - break; - 8001da6: bf00 nop - } - esp0.init(); - 8001da8: 4818 ldr r0, [pc, #96] ; (8001e0c ) - 8001daa: f7ff fb9d bl 80014e8 <_ZN7ESP82664initEv> - //+IPD,0,14:Hello World 01\r\n - debug.info("Init ESP8266 end"); - 8001dae: 491b ldr r1, [pc, #108] ; (8001e1c ) - 8001db0: 480c ldr r0, [pc, #48] ; (8001de4 ) - 8001db2: f7ff fe8d bl 8001ad0 <_ZN11SerialDebug4infoEPKc> - while(true){ - esp0.send_uint32("TIM3->CNT", TIM3->CNT); - 8001db6: 4b1a ldr r3, [pc, #104] ; (8001e20 ) - 8001db8: 6a5b ldr r3, [r3, #36] ; 0x24 - 8001dba: 461a mov r2, r3 - 8001dbc: 4919 ldr r1, [pc, #100] ; (8001e24 ) - 8001dbe: 4813 ldr r0, [pc, #76] ; (8001e0c ) - 8001dc0: f7ff fbec bl 800159c <_ZN7ESP826611send_uint32EPKcm> - HAL_Delay(10); - 8001dc4: 200a movs r0, #10 - 8001dc6: f001 f881 bl 8002ecc - uint64_t recv = esp0.receive_uint64(); - 8001dca: 4810 ldr r0, [pc, #64] ; (8001e0c ) - 8001dcc: f7ff fc32 bl 8001634 <_ZN7ESP826614receive_uint64Ev> - 8001dd0: e9c7 0100 strd r0, r1, [r7] - //sprintf(buf, "recv: %llX", recv); - //debug.debug(buf); - //motor0.setSpeed(recv>>32); - //motor1.setSpeed(recv & 0x00000000FFFFFFFF); - pid(recv & 0x00000000FFFFFFFF); - 8001dd4: 683b ldr r3, [r7, #0] - 8001dd6: 4618 mov r0, r3 - 8001dd8: f7ff feda bl 8001b90 <_Z3pidl> - HAL_Delay(10); - 8001ddc: 200a movs r0, #10 - 8001dde: f001 f875 bl 8002ecc - } - 8001de2: e7e8 b.n 8001db6 - 8001de4: 200009e4 .word 0x200009e4 - 8001de8: 0800b000 .word 0x0800b000 - 8001dec: 0800b010 .word 0x0800b010 - 8001df0: 20000e58 .word 0x20000e58 - 8001df4: 20000ee8 .word 0x20000ee8 - 8001df8: 20000ea0 .word 0x20000ea0 - 8001dfc: 20000f30 .word 0x20000f30 - 8001e00: 0800b024 .word 0x0800b024 - 8001e04: 0800b034 .word 0x0800b034 - 8001e08: 0800b048 .word 0x0800b048 - 8001e0c: 20000af8 .word 0x20000af8 - 8001e10: 0800b050 .word 0x0800b050 - 8001e14: 0800b058 .word 0x0800b058 - 8001e18: 0800b064 .word 0x0800b064 - 8001e1c: 0800b074 .word 0x0800b074 - 8001e20: 40000400 .word 0x40000400 - 8001e24: 0800b088 .word 0x0800b088 - -08001e28 <_Z41__static_initialization_and_destruction_0ii>: -} - 8001e28: b580 push {r7, lr} - 8001e2a: b086 sub sp, #24 - 8001e2c: af04 add r7, sp, #16 - 8001e2e: 6078 str r0, [r7, #4] - 8001e30: 6039 str r1, [r7, #0] - 8001e32: 687b ldr r3, [r7, #4] - 8001e34: 2b01 cmp r3, #1 - 8001e36: d125 bne.n 8001e84 <_Z41__static_initialization_and_destruction_0ii+0x5c> - 8001e38: 683b ldr r3, [r7, #0] - 8001e3a: f64f 72ff movw r2, #65535 ; 0xffff - 8001e3e: 4293 cmp r3, r2 - 8001e40: d120 bne.n 8001e84 <_Z41__static_initialization_and_destruction_0ii+0x5c> -SerialDebug debug(&huart2, 32); - 8001e42: 2220 movs r2, #32 - 8001e44: 4917 ldr r1, [pc, #92] ; (8001ea4 <_Z41__static_initialization_and_destruction_0ii+0x7c>) - 8001e46: 4818 ldr r0, [pc, #96] ; (8001ea8 <_Z41__static_initialization_and_destruction_0ii+0x80>) - 8001e48: f7ff fda6 bl 8001998 <_ZN11SerialDebugC1EP20__UART_HandleTypeDefm> -ESP8266 esp0(&huart1); - 8001e4c: 4917 ldr r1, [pc, #92] ; (8001eac <_Z41__static_initialization_and_destruction_0ii+0x84>) - 8001e4e: 4818 ldr r0, [pc, #96] ; (8001eb0 <_Z41__static_initialization_and_destruction_0ii+0x88>) - 8001e50: f7ff fb14 bl 800147c <_ZN7ESP8266C1EP20__UART_HandleTypeDef> -BTS7960B motor0(&(TIM2->CCR1), &(TIM2->CCR2), GPIOB, GPIO_PIN_4, GPIOB, GPIO_PIN_5); - 8001e54: 2320 movs r3, #32 - 8001e56: 9302 str r3, [sp, #8] - 8001e58: 4b16 ldr r3, [pc, #88] ; (8001eb4 <_Z41__static_initialization_and_destruction_0ii+0x8c>) - 8001e5a: 9301 str r3, [sp, #4] - 8001e5c: 2310 movs r3, #16 - 8001e5e: 9300 str r3, [sp, #0] - 8001e60: 4b14 ldr r3, [pc, #80] ; (8001eb4 <_Z41__static_initialization_and_destruction_0ii+0x8c>) - 8001e62: 4a15 ldr r2, [pc, #84] ; (8001eb8 <_Z41__static_initialization_and_destruction_0ii+0x90>) - 8001e64: 4915 ldr r1, [pc, #84] ; (8001ebc <_Z41__static_initialization_and_destruction_0ii+0x94>) - 8001e66: 4816 ldr r0, [pc, #88] ; (8001ec0 <_Z41__static_initialization_and_destruction_0ii+0x98>) - 8001e68: f7ff fa96 bl 8001398 <_ZN8BTS7960BC1EPVmS1_P12GPIO_TypeDeftS3_t> -BTS7960B motor1(&(TIM2->CCR3), &(TIM2->CCR4), GPIOB, GPIO_PIN_0, GPIOB, GPIO_PIN_1); - 8001e6c: 2302 movs r3, #2 - 8001e6e: 9302 str r3, [sp, #8] - 8001e70: 4b10 ldr r3, [pc, #64] ; (8001eb4 <_Z41__static_initialization_and_destruction_0ii+0x8c>) - 8001e72: 9301 str r3, [sp, #4] - 8001e74: 2301 movs r3, #1 - 8001e76: 9300 str r3, [sp, #0] - 8001e78: 4b0e ldr r3, [pc, #56] ; (8001eb4 <_Z41__static_initialization_and_destruction_0ii+0x8c>) - 8001e7a: 4a12 ldr r2, [pc, #72] ; (8001ec4 <_Z41__static_initialization_and_destruction_0ii+0x9c>) - 8001e7c: 4912 ldr r1, [pc, #72] ; (8001ec8 <_Z41__static_initialization_and_destruction_0ii+0xa0>) - 8001e7e: 4813 ldr r0, [pc, #76] ; (8001ecc <_Z41__static_initialization_and_destruction_0ii+0xa4>) - 8001e80: f7ff fa8a bl 8001398 <_ZN8BTS7960BC1EPVmS1_P12GPIO_TypeDeftS3_t> - 8001e84: 687b ldr r3, [r7, #4] - 8001e86: 2b00 cmp r3, #0 - 8001e88: d107 bne.n 8001e9a <_Z41__static_initialization_and_destruction_0ii+0x72> - 8001e8a: 683b ldr r3, [r7, #0] - 8001e8c: f64f 72ff movw r2, #65535 ; 0xffff - 8001e90: 4293 cmp r3, r2 - 8001e92: d102 bne.n 8001e9a <_Z41__static_initialization_and_destruction_0ii+0x72> -ESP8266 esp0(&huart1); - 8001e94: 4806 ldr r0, [pc, #24] ; (8001eb0 <_Z41__static_initialization_and_destruction_0ii+0x88>) - 8001e96: f7ff fb05 bl 80014a4 <_ZN7ESP8266D1Ev> -} - 8001e9a: bf00 nop - 8001e9c: 3708 adds r7, #8 - 8001e9e: 46bd mov sp, r7 - 8001ea0: bd80 pop {r7, pc} - 8001ea2: bf00 nop - 8001ea4: 20000fbc .word 0x20000fbc - 8001ea8: 200009e4 .word 0x200009e4 - 8001eac: 20000f78 .word 0x20000f78 - 8001eb0: 20000af8 .word 0x20000af8 - 8001eb4: 40010c00 .word 0x40010c00 - 8001eb8: 40000038 .word 0x40000038 - 8001ebc: 40000034 .word 0x40000034 - 8001ec0: 20000e18 .word 0x20000e18 - 8001ec4: 40000040 .word 0x40000040 - 8001ec8: 4000003c .word 0x4000003c - 8001ecc: 20000e30 .word 0x20000e30 - -08001ed0 <_GLOBAL__sub_I_debug>: - 8001ed0: b580 push {r7, lr} - 8001ed2: af00 add r7, sp, #0 - 8001ed4: f64f 71ff movw r1, #65535 ; 0xffff - 8001ed8: 2001 movs r0, #1 - 8001eda: f7ff ffa5 bl 8001e28 <_Z41__static_initialization_and_destruction_0ii> - 8001ede: bd80 pop {r7, pc} - -08001ee0 <_GLOBAL__sub_D_debug>: - 8001ee0: b580 push {r7, lr} - 8001ee2: af00 add r7, sp, #0 - 8001ee4: f64f 71ff movw r1, #65535 ; 0xffff - 8001ee8: 2000 movs r0, #0 - 8001eea: f7ff ff9d bl 8001e28 <_Z41__static_initialization_and_destruction_0ii> - 8001eee: bd80 pop {r7, pc} - -08001ef0 <_ZN10StaticFIFOC1Em>: - -#include "StaticFIFO.hpp" - -#include - -StaticFIFO::StaticFIFO(uint32_t fifoSize) : fifoSize(fifoSize){ - 8001ef0: b580 push {r7, lr} - 8001ef2: b082 sub sp, #8 - 8001ef4: af00 add r7, sp, #0 - 8001ef6: 6078 str r0, [r7, #4] - 8001ef8: 6039 str r1, [r7, #0] - 8001efa: 4a11 ldr r2, [pc, #68] ; (8001f40 <_ZN10StaticFIFOC1Em+0x50>) - 8001efc: 687b ldr r3, [r7, #4] - 8001efe: 601a str r2, [r3, #0] - 8001f00: 687b ldr r3, [r7, #4] - 8001f02: 683a ldr r2, [r7, #0] - 8001f04: 605a str r2, [r3, #4] - 8001f06: 687b ldr r3, [r7, #4] - 8001f08: 2200 movs r2, #0 - 8001f0a: 60da str r2, [r3, #12] - 8001f0c: 687b ldr r3, [r7, #4] - 8001f0e: 2200 movs r2, #0 - 8001f10: 611a str r2, [r3, #16] - fifo = new StringContainer[fifoSize]; - 8001f12: 683a ldr r2, [r7, #0] - 8001f14: 4b0b ldr r3, [pc, #44] ; (8001f44 <_ZN10StaticFIFOC1Em+0x54>) - 8001f16: 429a cmp r2, r3 - 8001f18: d804 bhi.n 8001f24 <_ZN10StaticFIFOC1Em+0x34> - 8001f1a: 4613 mov r3, r2 - 8001f1c: 015b lsls r3, r3, #5 - 8001f1e: 4413 add r3, r2 - 8001f20: 009b lsls r3, r3, #2 - 8001f22: e001 b.n 8001f28 <_ZN10StaticFIFOC1Em+0x38> - 8001f24: f04f 33ff mov.w r3, #4294967295 - 8001f28: 4618 mov r0, r3 - 8001f2a: f004 f9ea bl 8006302 <_Znaj> - 8001f2e: 4603 mov r3, r0 - 8001f30: 461a mov r2, r3 - 8001f32: 687b ldr r3, [r7, #4] - 8001f34: 609a str r2, [r3, #8] -} - 8001f36: 687b ldr r3, [r7, #4] - 8001f38: 4618 mov r0, r3 - 8001f3a: 3708 adds r7, #8 - 8001f3c: 46bd mov sp, r7 - 8001f3e: bd80 pop {r7, pc} - 8001f40: 0800b0bc .word 0x0800b0bc - 8001f44: 00f83e0f .word 0x00f83e0f - -08001f48 <_ZN10StaticFIFOD1Ev>: - -StaticFIFO::~StaticFIFO() { - 8001f48: b580 push {r7, lr} - 8001f4a: b082 sub sp, #8 - 8001f4c: af00 add r7, sp, #0 - 8001f4e: 6078 str r0, [r7, #4] - 8001f50: 4a07 ldr r2, [pc, #28] ; (8001f70 <_ZN10StaticFIFOD1Ev+0x28>) - 8001f52: 687b ldr r3, [r7, #4] - 8001f54: 601a str r2, [r3, #0] - delete fifo; - 8001f56: 687b ldr r3, [r7, #4] - 8001f58: 689b ldr r3, [r3, #8] - 8001f5a: 2b00 cmp r3, #0 - 8001f5c: d003 beq.n 8001f66 <_ZN10StaticFIFOD1Ev+0x1e> - 8001f5e: 2184 movs r1, #132 ; 0x84 - 8001f60: 4618 mov r0, r3 - 8001f62: f004 f9bb bl 80062dc <_ZdlPvj> -} - 8001f66: 687b ldr r3, [r7, #4] - 8001f68: 4618 mov r0, r3 - 8001f6a: 3708 adds r7, #8 - 8001f6c: 46bd mov sp, r7 - 8001f6e: bd80 pop {r7, pc} - 8001f70: 0800b0bc .word 0x0800b0bc - -08001f74 <_ZN10StaticFIFOD0Ev>: -StaticFIFO::~StaticFIFO() { - 8001f74: b580 push {r7, lr} - 8001f76: b082 sub sp, #8 - 8001f78: af00 add r7, sp, #0 - 8001f7a: 6078 str r0, [r7, #4] -} - 8001f7c: 6878 ldr r0, [r7, #4] - 8001f7e: f7ff ffe3 bl 8001f48 <_ZN10StaticFIFOD1Ev> - 8001f82: 2114 movs r1, #20 - 8001f84: 6878 ldr r0, [r7, #4] - 8001f86: f004 f9a9 bl 80062dc <_ZdlPvj> - 8001f8a: 687b ldr r3, [r7, #4] - 8001f8c: 4618 mov r0, r3 - 8001f8e: 3708 adds r7, #8 - 8001f90: 46bd mov sp, r7 - 8001f92: bd80 pop {r7, pc} - -08001f94 <_ZN10StaticFIFO4pushEPcm>: - fifo[lastIdx] = stringContainer; - lastIdx = (lastIdx + 1) % fifoSize; - return (((fifoSize + lastIdx) - firstIdx) % fifoSize); -} - -int32_t StaticFIFO::push(char* stringPointer, uint32_t stringLength){ - 8001f94: b580 push {r7, lr} - 8001f96: b0a6 sub sp, #152 ; 0x98 - 8001f98: af00 add r7, sp, #0 - 8001f9a: 60f8 str r0, [r7, #12] - 8001f9c: 60b9 str r1, [r7, #8] - 8001f9e: 607a str r2, [r7, #4] - if (((fifoSize + firstIdx) - lastIdx) % fifoSize == 1) { - 8001fa0: 68fb ldr r3, [r7, #12] - 8001fa2: 685a ldr r2, [r3, #4] - 8001fa4: 68fb ldr r3, [r7, #12] - 8001fa6: 68db ldr r3, [r3, #12] - 8001fa8: 441a add r2, r3 - 8001faa: 68fb ldr r3, [r7, #12] - 8001fac: 691b ldr r3, [r3, #16] - 8001fae: 1ad3 subs r3, r2, r3 - 8001fb0: 68fa ldr r2, [r7, #12] - 8001fb2: 6852 ldr r2, [r2, #4] - 8001fb4: fbb3 f1f2 udiv r1, r3, r2 - 8001fb8: fb01 f202 mul.w r2, r1, r2 - 8001fbc: 1a9b subs r3, r3, r2 - 8001fbe: 2b01 cmp r3, #1 - 8001fc0: d101 bne.n 8001fc6 <_ZN10StaticFIFO4pushEPcm+0x32> - return 0; //overflow - 8001fc2: 2300 movs r3, #0 - 8001fc4: e04d b.n 8002062 <_ZN10StaticFIFO4pushEPcm+0xce> - }else if(stringLength > bufSize){ - 8001fc6: 687b ldr r3, [r7, #4] - 8001fc8: 2b80 cmp r3, #128 ; 0x80 - 8001fca: d902 bls.n 8001fd2 <_ZN10StaticFIFO4pushEPcm+0x3e> - return -2; //length limit - 8001fcc: f06f 0301 mvn.w r3, #1 - 8001fd0: e047 b.n 8002062 <_ZN10StaticFIFO4pushEPcm+0xce> - } - StringContainer stringContainer; - for(uint32_t i=0; i < (stringLength); i++){ - 8001fd2: 2300 movs r3, #0 - 8001fd4: f8c7 3094 str.w r3, [r7, #148] ; 0x94 - 8001fd8: f8d7 2094 ldr.w r2, [r7, #148] ; 0x94 - 8001fdc: 687b ldr r3, [r7, #4] - 8001fde: 429a cmp r2, r3 - 8001fe0: d211 bcs.n 8002006 <_ZN10StaticFIFO4pushEPcm+0x72> - stringContainer.buffer[i] = stringPointer[i]; - 8001fe2: 68ba ldr r2, [r7, #8] - 8001fe4: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8001fe8: 4413 add r3, r2 - 8001fea: 7819 ldrb r1, [r3, #0] - 8001fec: f107 0210 add.w r2, r7, #16 - 8001ff0: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8001ff4: 4413 add r3, r2 - 8001ff6: 460a mov r2, r1 - 8001ff8: 701a strb r2, [r3, #0] - for(uint32_t i=0; i < (stringLength); i++){ - 8001ffa: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8001ffe: 3301 adds r3, #1 - 8002000: f8c7 3094 str.w r3, [r7, #148] ; 0x94 - 8002004: e7e8 b.n 8001fd8 <_ZN10StaticFIFO4pushEPcm+0x44> - } - stringContainer.length = stringLength; - 8002006: 687b ldr r3, [r7, #4] - 8002008: f8c7 3090 str.w r3, [r7, #144] ; 0x90 - fifo[lastIdx] = stringContainer; - 800200c: 68fb ldr r3, [r7, #12] - 800200e: 6899 ldr r1, [r3, #8] - 8002010: 68fb ldr r3, [r7, #12] - 8002012: 691a ldr r2, [r3, #16] - 8002014: 4613 mov r3, r2 - 8002016: 015b lsls r3, r3, #5 - 8002018: 4413 add r3, r2 - 800201a: 009b lsls r3, r3, #2 - 800201c: 440b add r3, r1 - 800201e: 4618 mov r0, r3 - 8002020: f107 0310 add.w r3, r7, #16 - 8002024: 2284 movs r2, #132 ; 0x84 - 8002026: 4619 mov r1, r3 - 8002028: f004 fbf6 bl 8006818 - lastIdx = (lastIdx + 1) % fifoSize; - 800202c: 68fb ldr r3, [r7, #12] - 800202e: 691b ldr r3, [r3, #16] - 8002030: 3301 adds r3, #1 - 8002032: 68fa ldr r2, [r7, #12] - 8002034: 6852 ldr r2, [r2, #4] - 8002036: fbb3 f1f2 udiv r1, r3, r2 - 800203a: fb01 f202 mul.w r2, r1, r2 - 800203e: 1a9a subs r2, r3, r2 - 8002040: 68fb ldr r3, [r7, #12] - 8002042: 611a str r2, [r3, #16] - return (((fifoSize + lastIdx) - firstIdx) % fifoSize); - 8002044: 68fb ldr r3, [r7, #12] - 8002046: 685a ldr r2, [r3, #4] - 8002048: 68fb ldr r3, [r7, #12] - 800204a: 691b ldr r3, [r3, #16] - 800204c: 441a add r2, r3 - 800204e: 68fb ldr r3, [r7, #12] - 8002050: 68db ldr r3, [r3, #12] - 8002052: 1ad3 subs r3, r2, r3 - 8002054: 68fa ldr r2, [r7, #12] - 8002056: 6852 ldr r2, [r2, #4] - 8002058: fbb3 f1f2 udiv r1, r3, r2 - 800205c: fb01 f202 mul.w r2, r1, r2 - 8002060: 1a9b subs r3, r3, r2 -} - 8002062: 4618 mov r0, r3 - 8002064: 3798 adds r7, #152 ; 0x98 - 8002066: 46bd mov sp, r7 - 8002068: bd80 pop {r7, pc} - -0800206a <_ZN10StaticFIFO3popEPPhPmm>: - -int32_t StaticFIFO::pop(uint8_t** pointer, uint32_t* length, uint32_t max_length){ - 800206a: b480 push {r7} - 800206c: b085 sub sp, #20 - 800206e: af00 add r7, sp, #0 - 8002070: 60f8 str r0, [r7, #12] - 8002072: 60b9 str r1, [r7, #8] - 8002074: 607a str r2, [r7, #4] - 8002076: 603b str r3, [r7, #0] - if (lastIdx == firstIdx){ - 8002078: 68fb ldr r3, [r7, #12] - 800207a: 691a ldr r2, [r3, #16] - 800207c: 68fb ldr r3, [r7, #12] - 800207e: 68db ldr r3, [r3, #12] - 8002080: 429a cmp r2, r3 - 8002082: d102 bne.n 800208a <_ZN10StaticFIFO3popEPPhPmm+0x20> - return -1; //underrun - 8002084: f04f 33ff mov.w r3, #4294967295 - 8002088: e044 b.n 8002114 <_ZN10StaticFIFO3popEPPhPmm+0xaa> - }else if(fifo[firstIdx].length > max_length){ - 800208a: 68fb ldr r3, [r7, #12] - 800208c: 6899 ldr r1, [r3, #8] - 800208e: 68fb ldr r3, [r7, #12] - 8002090: 68da ldr r2, [r3, #12] - 8002092: 4613 mov r3, r2 - 8002094: 015b lsls r3, r3, #5 - 8002096: 4413 add r3, r2 - 8002098: 009b lsls r3, r3, #2 - 800209a: 440b add r3, r1 - 800209c: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 - 80020a0: 683a ldr r2, [r7, #0] - 80020a2: 429a cmp r2, r3 - 80020a4: d202 bcs.n 80020ac <_ZN10StaticFIFO3popEPPhPmm+0x42> - return -2; //length limit - 80020a6: f06f 0301 mvn.w r3, #1 - 80020aa: e033 b.n 8002114 <_ZN10StaticFIFO3popEPPhPmm+0xaa> - } - *pointer = fifo[firstIdx].buffer; - 80020ac: 68fb ldr r3, [r7, #12] - 80020ae: 6899 ldr r1, [r3, #8] - 80020b0: 68fb ldr r3, [r7, #12] - 80020b2: 68da ldr r2, [r3, #12] - 80020b4: 4613 mov r3, r2 - 80020b6: 015b lsls r3, r3, #5 - 80020b8: 4413 add r3, r2 - 80020ba: 009b lsls r3, r3, #2 - 80020bc: 440b add r3, r1 - 80020be: 461a mov r2, r3 - 80020c0: 68bb ldr r3, [r7, #8] - 80020c2: 601a str r2, [r3, #0] - *length = fifo[firstIdx].length; - 80020c4: 68fb ldr r3, [r7, #12] - 80020c6: 6899 ldr r1, [r3, #8] - 80020c8: 68fb ldr r3, [r7, #12] - 80020ca: 68da ldr r2, [r3, #12] - 80020cc: 4613 mov r3, r2 - 80020ce: 015b lsls r3, r3, #5 - 80020d0: 4413 add r3, r2 - 80020d2: 009b lsls r3, r3, #2 - 80020d4: 440b add r3, r1 - 80020d6: f8d3 2080 ldr.w r2, [r3, #128] ; 0x80 - 80020da: 687b ldr r3, [r7, #4] - 80020dc: 601a str r2, [r3, #0] - firstIdx = (firstIdx + 1) % fifoSize; - 80020de: 68fb ldr r3, [r7, #12] - 80020e0: 68db ldr r3, [r3, #12] - 80020e2: 3301 adds r3, #1 - 80020e4: 68fa ldr r2, [r7, #12] - 80020e6: 6852 ldr r2, [r2, #4] - 80020e8: fbb3 f1f2 udiv r1, r3, r2 - 80020ec: fb01 f202 mul.w r2, r1, r2 - 80020f0: 1a9a subs r2, r3, r2 - 80020f2: 68fb ldr r3, [r7, #12] - 80020f4: 60da str r2, [r3, #12] - return (((fifoSize + lastIdx) - firstIdx) % fifoSize); - 80020f6: 68fb ldr r3, [r7, #12] - 80020f8: 685a ldr r2, [r3, #4] - 80020fa: 68fb ldr r3, [r7, #12] - 80020fc: 691b ldr r3, [r3, #16] - 80020fe: 441a add r2, r3 - 8002100: 68fb ldr r3, [r7, #12] - 8002102: 68db ldr r3, [r3, #12] - 8002104: 1ad3 subs r3, r2, r3 - 8002106: 68fa ldr r2, [r7, #12] - 8002108: 6852 ldr r2, [r2, #4] - 800210a: fbb3 f1f2 udiv r1, r3, r2 - 800210e: fb01 f202 mul.w r2, r1, r2 - 8002112: 1a9b subs r3, r3, r2 -} - 8002114: 4618 mov r0, r3 - 8002116: 3714 adds r7, #20 - 8002118: 46bd mov sp, r7 - 800211a: bc80 pop {r7} - 800211c: 4770 bx lr - -0800211e
: -/** - * @brief The application entry point. - * @retval int - */ -int main(void) -{ - 800211e: b580 push {r7, lr} - 8002120: af00 add r7, sp, #0 - /* USER CODE END 1 */ - - /* MCU Configuration--------------------------------------------------------*/ - - /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - HAL_Init(); - 8002122: f000 fe71 bl 8002e08 - /* USER CODE BEGIN Init */ - - /* USER CODE END Init */ - - /* Configure the system clock */ - SystemClock_Config(); - 8002126: f000 f815 bl 8002154 - /* USER CODE BEGIN SysInit */ - - /* USER CODE END SysInit */ - - /* Initialize all configured peripherals */ - MX_GPIO_Init(); - 800212a: f000 fa91 bl 8002650 - MX_DMA_Init(); - 800212e: f000 fa71 bl 8002614 - MX_USART1_UART_Init(); - 8002132: f000 f9f9 bl 8002528 - MX_TIM4_Init(); - 8002136: f000 f9a9 bl 800248c - MX_TIM2_Init(); - 800213a: f000 f8bd bl 80022b8 - MX_USB_PCD_Init(); - 800213e: f000 fa47 bl 80025d0 - MX_TIM1_Init(); - 8002142: f000 f861 bl 8002208 - MX_TIM3_Init(); - 8002146: f000 f94d bl 80023e4 - MX_USART2_UART_Init(); - 800214a: f000 fa17 bl 800257c - /* USER CODE BEGIN 2 */ - start(); - 800214e: f7ff fdd5 bl 8001cfc - /* USER CODE END 2 */ - - /* Infinite loop */ - /* USER CODE BEGIN WHILE */ - while (1) - 8002152: e7fe b.n 8002152 - -08002154 : -/** - * @brief System Clock Configuration - * @retval None - */ -void SystemClock_Config(void) -{ - 8002154: b580 push {r7, lr} - 8002156: b094 sub sp, #80 ; 0x50 - 8002158: af00 add r7, sp, #0 - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 800215a: f107 0328 add.w r3, r7, #40 ; 0x28 - 800215e: 2228 movs r2, #40 ; 0x28 - 8002160: 2100 movs r1, #0 - 8002162: 4618 mov r0, r3 - 8002164: f004 fb66 bl 8006834 - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8002168: f107 0314 add.w r3, r7, #20 - 800216c: 2200 movs r2, #0 - 800216e: 601a str r2, [r3, #0] - 8002170: 605a str r2, [r3, #4] - 8002172: 609a str r2, [r3, #8] - 8002174: 60da str r2, [r3, #12] - 8002176: 611a str r2, [r3, #16] - RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - 8002178: 1d3b adds r3, r7, #4 - 800217a: 2200 movs r2, #0 - 800217c: 601a str r2, [r3, #0] - 800217e: 605a str r2, [r3, #4] - 8002180: 609a str r2, [r3, #8] - 8002182: 60da str r2, [r3, #12] - - /** Initializes the RCC Oscillators according to the specified parameters - * in the RCC_OscInitTypeDef structure. - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 8002184: 2301 movs r3, #1 - 8002186: 62bb str r3, [r7, #40] ; 0x28 - RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 8002188: f44f 3380 mov.w r3, #65536 ; 0x10000 - 800218c: 62fb str r3, [r7, #44] ; 0x2c - RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; - 800218e: 2300 movs r3, #0 - 8002190: 633b str r3, [r7, #48] ; 0x30 - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 8002192: 2301 movs r3, #1 - 8002194: 63bb str r3, [r7, #56] ; 0x38 - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 8002196: 2302 movs r3, #2 - 8002198: 647b str r3, [r7, #68] ; 0x44 - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 800219a: f44f 3380 mov.w r3, #65536 ; 0x10000 - 800219e: 64bb str r3, [r7, #72] ; 0x48 - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; - 80021a0: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000 - 80021a4: 64fb str r3, [r7, #76] ; 0x4c - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 80021a6: f107 0328 add.w r3, r7, #40 ; 0x28 - 80021aa: 4618 mov r0, r3 - 80021ac: f001 fd06 bl 8003bbc - 80021b0: 4603 mov r3, r0 - 80021b2: 2b00 cmp r3, #0 - 80021b4: d001 beq.n 80021ba - { - Error_Handler(); - 80021b6: f000 fac3 bl 8002740 - } - - /** Initializes the CPU, AHB and APB buses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 80021ba: 230f movs r3, #15 - 80021bc: 617b str r3, [r7, #20] - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 80021be: 2302 movs r3, #2 - 80021c0: 61bb str r3, [r7, #24] - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 80021c2: 2300 movs r3, #0 - 80021c4: 61fb str r3, [r7, #28] - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; - 80021c6: f44f 6380 mov.w r3, #1024 ; 0x400 - 80021ca: 623b str r3, [r7, #32] - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 80021cc: 2300 movs r3, #0 - 80021ce: 627b str r3, [r7, #36] ; 0x24 - - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) - 80021d0: f107 0314 add.w r3, r7, #20 - 80021d4: 2102 movs r1, #2 - 80021d6: 4618 mov r0, r3 - 80021d8: f001 ff72 bl 80040c0 - 80021dc: 4603 mov r3, r0 - 80021de: 2b00 cmp r3, #0 - 80021e0: d001 beq.n 80021e6 - { - Error_Handler(); - 80021e2: f000 faad bl 8002740 - } - PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; - 80021e6: 2310 movs r3, #16 - 80021e8: 607b str r3, [r7, #4] - PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; - 80021ea: 2300 movs r3, #0 - 80021ec: 613b str r3, [r7, #16] - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 80021ee: 1d3b adds r3, r7, #4 - 80021f0: 4618 mov r0, r3 - 80021f2: f002 f8fd bl 80043f0 - 80021f6: 4603 mov r3, r0 - 80021f8: 2b00 cmp r3, #0 - 80021fa: d001 beq.n 8002200 - { - Error_Handler(); - 80021fc: f000 faa0 bl 8002740 - } -} - 8002200: bf00 nop - 8002202: 3750 adds r7, #80 ; 0x50 - 8002204: 46bd mov sp, r7 - 8002206: bd80 pop {r7, pc} - -08002208 : - * @brief TIM1 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM1_Init(void) -{ - 8002208: b580 push {r7, lr} - 800220a: b08c sub sp, #48 ; 0x30 - 800220c: af00 add r7, sp, #0 - - /* USER CODE BEGIN TIM1_Init 0 */ - - /* USER CODE END TIM1_Init 0 */ - - TIM_Encoder_InitTypeDef sConfig = {0}; - 800220e: f107 030c add.w r3, r7, #12 - 8002212: 2224 movs r2, #36 ; 0x24 - 8002214: 2100 movs r1, #0 - 8002216: 4618 mov r0, r3 - 8002218: f004 fb0c bl 8006834 - TIM_MasterConfigTypeDef sMasterConfig = {0}; - 800221c: 1d3b adds r3, r7, #4 - 800221e: 2200 movs r2, #0 - 8002220: 601a str r2, [r3, #0] - 8002222: 605a str r2, [r3, #4] - - /* USER CODE BEGIN TIM1_Init 1 */ - - /* USER CODE END TIM1_Init 1 */ - htim1.Instance = TIM1; - 8002224: 4b22 ldr r3, [pc, #136] ; (80022b0 ) - 8002226: 4a23 ldr r2, [pc, #140] ; (80022b4 ) - 8002228: 601a str r2, [r3, #0] - htim1.Init.Prescaler = 0; - 800222a: 4b21 ldr r3, [pc, #132] ; (80022b0 ) - 800222c: 2200 movs r2, #0 - 800222e: 605a str r2, [r3, #4] - htim1.Init.CounterMode = TIM_COUNTERMODE_UP; - 8002230: 4b1f ldr r3, [pc, #124] ; (80022b0 ) - 8002232: 2200 movs r2, #0 - 8002234: 609a str r2, [r3, #8] - htim1.Init.Period = 65535; - 8002236: 4b1e ldr r3, [pc, #120] ; (80022b0 ) - 8002238: f64f 72ff movw r2, #65535 ; 0xffff - 800223c: 60da str r2, [r3, #12] - htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 800223e: 4b1c ldr r3, [pc, #112] ; (80022b0 ) - 8002240: 2200 movs r2, #0 - 8002242: 611a str r2, [r3, #16] - htim1.Init.RepetitionCounter = 0; - 8002244: 4b1a ldr r3, [pc, #104] ; (80022b0 ) - 8002246: 2200 movs r2, #0 - 8002248: 615a str r2, [r3, #20] - htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 800224a: 4b19 ldr r3, [pc, #100] ; (80022b0 ) - 800224c: 2200 movs r2, #0 - 800224e: 619a str r2, [r3, #24] - sConfig.EncoderMode = TIM_ENCODERMODE_TI1; - 8002250: 2301 movs r3, #1 - 8002252: 60fb str r3, [r7, #12] - sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; - 8002254: 2300 movs r3, #0 - 8002256: 613b str r3, [r7, #16] - sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; - 8002258: 2301 movs r3, #1 - 800225a: 617b str r3, [r7, #20] - sConfig.IC1Prescaler = TIM_ICPSC_DIV1; - 800225c: 2300 movs r3, #0 - 800225e: 61bb str r3, [r7, #24] - sConfig.IC1Filter = 0; - 8002260: 2300 movs r3, #0 - 8002262: 61fb str r3, [r7, #28] - sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; - 8002264: 2300 movs r3, #0 - 8002266: 623b str r3, [r7, #32] - sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; - 8002268: 2301 movs r3, #1 - 800226a: 627b str r3, [r7, #36] ; 0x24 - sConfig.IC2Prescaler = TIM_ICPSC_DIV1; - 800226c: 2300 movs r3, #0 - 800226e: 62bb str r3, [r7, #40] ; 0x28 - sConfig.IC2Filter = 0; - 8002270: 2300 movs r3, #0 - 8002272: 62fb str r3, [r7, #44] ; 0x2c - if (HAL_TIM_Encoder_Init(&htim1, &sConfig) != HAL_OK) - 8002274: f107 030c add.w r3, r7, #12 - 8002278: 4619 mov r1, r3 - 800227a: 480d ldr r0, [pc, #52] ; (80022b0 ) - 800227c: f002 fb02 bl 8004884 - 8002280: 4603 mov r3, r0 - 8002282: 2b00 cmp r3, #0 - 8002284: d001 beq.n 800228a - { - Error_Handler(); - 8002286: f000 fa5b bl 8002740 - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 800228a: 2300 movs r3, #0 - 800228c: 607b str r3, [r7, #4] - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 800228e: 2300 movs r3, #0 - 8002290: 60bb str r3, [r7, #8] - if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) - 8002292: 1d3b adds r3, r7, #4 - 8002294: 4619 mov r1, r3 - 8002296: 4806 ldr r0, [pc, #24] ; (80022b0 ) - 8002298: f003 f976 bl 8005588 - 800229c: 4603 mov r3, r0 - 800229e: 2b00 cmp r3, #0 - 80022a0: d001 beq.n 80022a6 - { - Error_Handler(); - 80022a2: f000 fa4d bl 8002740 - } - /* USER CODE BEGIN TIM1_Init 2 */ - - /* USER CODE END TIM1_Init 2 */ - -} - 80022a6: bf00 nop - 80022a8: 3730 adds r7, #48 ; 0x30 - 80022aa: 46bd mov sp, r7 - 80022ac: bd80 pop {r7, pc} - 80022ae: bf00 nop - 80022b0: 20000e58 .word 0x20000e58 - 80022b4: 40012c00 .word 0x40012c00 - -080022b8 : - * @brief TIM2 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM2_Init(void) -{ - 80022b8: b580 push {r7, lr} - 80022ba: b08e sub sp, #56 ; 0x38 - 80022bc: af00 add r7, sp, #0 - - /* USER CODE BEGIN TIM2_Init 0 */ - - /* USER CODE END TIM2_Init 0 */ - - TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 80022be: f107 0328 add.w r3, r7, #40 ; 0x28 - 80022c2: 2200 movs r2, #0 - 80022c4: 601a str r2, [r3, #0] - 80022c6: 605a str r2, [r3, #4] - 80022c8: 609a str r2, [r3, #8] - 80022ca: 60da str r2, [r3, #12] - TIM_MasterConfigTypeDef sMasterConfig = {0}; - 80022cc: f107 0320 add.w r3, r7, #32 - 80022d0: 2200 movs r2, #0 - 80022d2: 601a str r2, [r3, #0] - 80022d4: 605a str r2, [r3, #4] - TIM_OC_InitTypeDef sConfigOC = {0}; - 80022d6: 1d3b adds r3, r7, #4 - 80022d8: 2200 movs r2, #0 - 80022da: 601a str r2, [r3, #0] - 80022dc: 605a str r2, [r3, #4] - 80022de: 609a str r2, [r3, #8] - 80022e0: 60da str r2, [r3, #12] - 80022e2: 611a str r2, [r3, #16] - 80022e4: 615a str r2, [r3, #20] - 80022e6: 619a str r2, [r3, #24] - - /* USER CODE BEGIN TIM2_Init 1 */ - - /* USER CODE END TIM2_Init 1 */ - htim2.Instance = TIM2; - 80022e8: 4b3d ldr r3, [pc, #244] ; (80023e0 ) - 80022ea: f04f 4280 mov.w r2, #1073741824 ; 0x40000000 - 80022ee: 601a str r2, [r3, #0] - htim2.Init.Prescaler = 63; - 80022f0: 4b3b ldr r3, [pc, #236] ; (80023e0 ) - 80022f2: 223f movs r2, #63 ; 0x3f - 80022f4: 605a str r2, [r3, #4] - htim2.Init.CounterMode = TIM_COUNTERMODE_UP; - 80022f6: 4b3a ldr r3, [pc, #232] ; (80023e0 ) - 80022f8: 2200 movs r2, #0 - 80022fa: 609a str r2, [r3, #8] - htim2.Init.Period = 2047; - 80022fc: 4b38 ldr r3, [pc, #224] ; (80023e0 ) - 80022fe: f240 72ff movw r2, #2047 ; 0x7ff - 8002302: 60da str r2, [r3, #12] - htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8002304: 4b36 ldr r3, [pc, #216] ; (80023e0 ) - 8002306: 2200 movs r2, #0 - 8002308: 611a str r2, [r3, #16] - htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 800230a: 4b35 ldr r3, [pc, #212] ; (80023e0 ) - 800230c: 2280 movs r2, #128 ; 0x80 - 800230e: 619a str r2, [r3, #24] - if (HAL_TIM_Base_Init(&htim2) != HAL_OK) - 8002310: 4833 ldr r0, [pc, #204] ; (80023e0 ) - 8002312: f002 f923 bl 800455c - 8002316: 4603 mov r3, r0 - 8002318: 2b00 cmp r3, #0 - 800231a: d001 beq.n 8002320 - { - Error_Handler(); - 800231c: f000 fa10 bl 8002740 - } - sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 8002320: f44f 5380 mov.w r3, #4096 ; 0x1000 - 8002324: 62bb str r3, [r7, #40] ; 0x28 - if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) - 8002326: f107 0328 add.w r3, r7, #40 ; 0x28 - 800232a: 4619 mov r1, r3 - 800232c: 482c ldr r0, [pc, #176] ; (80023e0 ) - 800232e: f002 fd9f bl 8004e70 - 8002332: 4603 mov r3, r0 - 8002334: 2b00 cmp r3, #0 - 8002336: d001 beq.n 800233c - { - Error_Handler(); - 8002338: f000 fa02 bl 8002740 - } - if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) - 800233c: 4828 ldr r0, [pc, #160] ; (80023e0 ) - 800233e: f002 f9a7 bl 8004690 - 8002342: 4603 mov r3, r0 - 8002344: 2b00 cmp r3, #0 - 8002346: d001 beq.n 800234c - { - Error_Handler(); - 8002348: f000 f9fa bl 8002740 - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 800234c: 2300 movs r3, #0 - 800234e: 623b str r3, [r7, #32] - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8002350: 2300 movs r3, #0 - 8002352: 627b str r3, [r7, #36] ; 0x24 - if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) - 8002354: f107 0320 add.w r3, r7, #32 - 8002358: 4619 mov r1, r3 - 800235a: 4821 ldr r0, [pc, #132] ; (80023e0 ) - 800235c: f003 f914 bl 8005588 - 8002360: 4603 mov r3, r0 - 8002362: 2b00 cmp r3, #0 - 8002364: d001 beq.n 800236a - { - Error_Handler(); - 8002366: f000 f9eb bl 8002740 - } - sConfigOC.OCMode = TIM_OCMODE_PWM1; - 800236a: 2360 movs r3, #96 ; 0x60 - 800236c: 607b str r3, [r7, #4] - sConfigOC.Pulse = 0; - 800236e: 2300 movs r3, #0 - 8002370: 60bb str r3, [r7, #8] - sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 8002372: 2300 movs r3, #0 - 8002374: 60fb str r3, [r7, #12] - sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 8002376: 2300 movs r3, #0 - 8002378: 617b str r3, [r7, #20] - if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 800237a: 1d3b adds r3, r7, #4 - 800237c: 2200 movs r2, #0 - 800237e: 4619 mov r1, r3 - 8002380: 4817 ldr r0, [pc, #92] ; (80023e0 ) - 8002382: f002 fcb7 bl 8004cf4 - 8002386: 4603 mov r3, r0 - 8002388: 2b00 cmp r3, #0 - 800238a: d001 beq.n 8002390 - { - Error_Handler(); - 800238c: f000 f9d8 bl 8002740 - } - if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) - 8002390: 1d3b adds r3, r7, #4 - 8002392: 2204 movs r2, #4 - 8002394: 4619 mov r1, r3 - 8002396: 4812 ldr r0, [pc, #72] ; (80023e0 ) - 8002398: f002 fcac bl 8004cf4 - 800239c: 4603 mov r3, r0 - 800239e: 2b00 cmp r3, #0 - 80023a0: d001 beq.n 80023a6 - { - Error_Handler(); - 80023a2: f000 f9cd bl 8002740 - } - if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - 80023a6: 1d3b adds r3, r7, #4 - 80023a8: 2208 movs r2, #8 - 80023aa: 4619 mov r1, r3 - 80023ac: 480c ldr r0, [pc, #48] ; (80023e0 ) - 80023ae: f002 fca1 bl 8004cf4 - 80023b2: 4603 mov r3, r0 - 80023b4: 2b00 cmp r3, #0 - 80023b6: d001 beq.n 80023bc - { - Error_Handler(); - 80023b8: f000 f9c2 bl 8002740 - } - if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) - 80023bc: 1d3b adds r3, r7, #4 - 80023be: 220c movs r2, #12 - 80023c0: 4619 mov r1, r3 - 80023c2: 4807 ldr r0, [pc, #28] ; (80023e0 ) - 80023c4: f002 fc96 bl 8004cf4 - 80023c8: 4603 mov r3, r0 - 80023ca: 2b00 cmp r3, #0 - 80023cc: d001 beq.n 80023d2 - { - Error_Handler(); - 80023ce: f000 f9b7 bl 8002740 - } - /* USER CODE BEGIN TIM2_Init 2 */ - - /* USER CODE END TIM2_Init 2 */ - HAL_TIM_MspPostInit(&htim2); - 80023d2: 4803 ldr r0, [pc, #12] ; (80023e0 ) - 80023d4: f000 fa90 bl 80028f8 - -} - 80023d8: bf00 nop - 80023da: 3738 adds r7, #56 ; 0x38 - 80023dc: 46bd mov sp, r7 - 80023de: bd80 pop {r7, pc} - 80023e0: 20000ea0 .word 0x20000ea0 - -080023e4 : - * @brief TIM3 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM3_Init(void) -{ - 80023e4: b580 push {r7, lr} - 80023e6: b08c sub sp, #48 ; 0x30 - 80023e8: af00 add r7, sp, #0 - - /* USER CODE BEGIN TIM3_Init 0 */ - - /* USER CODE END TIM3_Init 0 */ - - TIM_Encoder_InitTypeDef sConfig = {0}; - 80023ea: f107 030c add.w r3, r7, #12 - 80023ee: 2224 movs r2, #36 ; 0x24 - 80023f0: 2100 movs r1, #0 - 80023f2: 4618 mov r0, r3 - 80023f4: f004 fa1e bl 8006834 - TIM_MasterConfigTypeDef sMasterConfig = {0}; - 80023f8: 1d3b adds r3, r7, #4 - 80023fa: 2200 movs r2, #0 - 80023fc: 601a str r2, [r3, #0] - 80023fe: 605a str r2, [r3, #4] - - /* USER CODE BEGIN TIM3_Init 1 */ - - /* USER CODE END TIM3_Init 1 */ - htim3.Instance = TIM3; - 8002400: 4b20 ldr r3, [pc, #128] ; (8002484 ) - 8002402: 4a21 ldr r2, [pc, #132] ; (8002488 ) - 8002404: 601a str r2, [r3, #0] - htim3.Init.Prescaler = 0; - 8002406: 4b1f ldr r3, [pc, #124] ; (8002484 ) - 8002408: 2200 movs r2, #0 - 800240a: 605a str r2, [r3, #4] - htim3.Init.CounterMode = TIM_COUNTERMODE_UP; - 800240c: 4b1d ldr r3, [pc, #116] ; (8002484 ) - 800240e: 2200 movs r2, #0 - 8002410: 609a str r2, [r3, #8] - htim3.Init.Period = 65535; - 8002412: 4b1c ldr r3, [pc, #112] ; (8002484 ) - 8002414: f64f 72ff movw r2, #65535 ; 0xffff - 8002418: 60da str r2, [r3, #12] - htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 800241a: 4b1a ldr r3, [pc, #104] ; (8002484 ) - 800241c: 2200 movs r2, #0 - 800241e: 611a str r2, [r3, #16] - htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8002420: 4b18 ldr r3, [pc, #96] ; (8002484 ) - 8002422: 2200 movs r2, #0 - 8002424: 619a str r2, [r3, #24] - sConfig.EncoderMode = TIM_ENCODERMODE_TI1; - 8002426: 2301 movs r3, #1 - 8002428: 60fb str r3, [r7, #12] - sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; - 800242a: 2300 movs r3, #0 - 800242c: 613b str r3, [r7, #16] - sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; - 800242e: 2301 movs r3, #1 - 8002430: 617b str r3, [r7, #20] - sConfig.IC1Prescaler = TIM_ICPSC_DIV1; - 8002432: 2300 movs r3, #0 - 8002434: 61bb str r3, [r7, #24] - sConfig.IC1Filter = 0; - 8002436: 2300 movs r3, #0 - 8002438: 61fb str r3, [r7, #28] - sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; - 800243a: 2300 movs r3, #0 - 800243c: 623b str r3, [r7, #32] - sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; - 800243e: 2301 movs r3, #1 - 8002440: 627b str r3, [r7, #36] ; 0x24 - sConfig.IC2Prescaler = TIM_ICPSC_DIV1; - 8002442: 2300 movs r3, #0 - 8002444: 62bb str r3, [r7, #40] ; 0x28 - sConfig.IC2Filter = 0; - 8002446: 2300 movs r3, #0 - 8002448: 62fb str r3, [r7, #44] ; 0x2c - if (HAL_TIM_Encoder_Init(&htim3, &sConfig) != HAL_OK) - 800244a: f107 030c add.w r3, r7, #12 - 800244e: 4619 mov r1, r3 - 8002450: 480c ldr r0, [pc, #48] ; (8002484 ) - 8002452: f002 fa17 bl 8004884 - 8002456: 4603 mov r3, r0 - 8002458: 2b00 cmp r3, #0 - 800245a: d001 beq.n 8002460 - { - Error_Handler(); - 800245c: f000 f970 bl 8002740 - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8002460: 2300 movs r3, #0 - 8002462: 607b str r3, [r7, #4] - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8002464: 2300 movs r3, #0 - 8002466: 60bb str r3, [r7, #8] - if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) - 8002468: 1d3b adds r3, r7, #4 - 800246a: 4619 mov r1, r3 - 800246c: 4805 ldr r0, [pc, #20] ; (8002484 ) - 800246e: f003 f88b bl 8005588 - 8002472: 4603 mov r3, r0 - 8002474: 2b00 cmp r3, #0 - 8002476: d001 beq.n 800247c - { - Error_Handler(); - 8002478: f000 f962 bl 8002740 - } - /* USER CODE BEGIN TIM3_Init 2 */ - - /* USER CODE END TIM3_Init 2 */ - -} - 800247c: bf00 nop - 800247e: 3730 adds r7, #48 ; 0x30 - 8002480: 46bd mov sp, r7 - 8002482: bd80 pop {r7, pc} - 8002484: 20000ee8 .word 0x20000ee8 - 8002488: 40000400 .word 0x40000400 - -0800248c : - * @brief TIM4 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM4_Init(void) -{ - 800248c: b580 push {r7, lr} - 800248e: b086 sub sp, #24 - 8002490: af00 add r7, sp, #0 - - /* USER CODE BEGIN TIM4_Init 0 */ - - /* USER CODE END TIM4_Init 0 */ - - TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 8002492: f107 0308 add.w r3, r7, #8 - 8002496: 2200 movs r2, #0 - 8002498: 601a str r2, [r3, #0] - 800249a: 605a str r2, [r3, #4] - 800249c: 609a str r2, [r3, #8] - 800249e: 60da str r2, [r3, #12] - TIM_MasterConfigTypeDef sMasterConfig = {0}; - 80024a0: 463b mov r3, r7 - 80024a2: 2200 movs r2, #0 - 80024a4: 601a str r2, [r3, #0] - 80024a6: 605a str r2, [r3, #4] - - /* USER CODE BEGIN TIM4_Init 1 */ - - /* USER CODE END TIM4_Init 1 */ - htim4.Instance = TIM4; - 80024a8: 4b1d ldr r3, [pc, #116] ; (8002520 ) - 80024aa: 4a1e ldr r2, [pc, #120] ; (8002524 ) - 80024ac: 601a str r2, [r3, #0] - htim4.Init.Prescaler = 71; - 80024ae: 4b1c ldr r3, [pc, #112] ; (8002520 ) - 80024b0: 2247 movs r2, #71 ; 0x47 - 80024b2: 605a str r2, [r3, #4] - htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - 80024b4: 4b1a ldr r3, [pc, #104] ; (8002520 ) - 80024b6: 2200 movs r2, #0 - 80024b8: 609a str r2, [r3, #8] - htim4.Init.Period = 9999; - 80024ba: 4b19 ldr r3, [pc, #100] ; (8002520 ) - 80024bc: f242 720f movw r2, #9999 ; 0x270f - 80024c0: 60da str r2, [r3, #12] - htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 80024c2: 4b17 ldr r3, [pc, #92] ; (8002520 ) - 80024c4: 2200 movs r2, #0 - 80024c6: 611a str r2, [r3, #16] - htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 80024c8: 4b15 ldr r3, [pc, #84] ; (8002520 ) - 80024ca: 2200 movs r2, #0 - 80024cc: 619a str r2, [r3, #24] - if (HAL_TIM_Base_Init(&htim4) != HAL_OK) - 80024ce: 4814 ldr r0, [pc, #80] ; (8002520 ) - 80024d0: f002 f844 bl 800455c - 80024d4: 4603 mov r3, r0 - 80024d6: 2b00 cmp r3, #0 - 80024d8: d001 beq.n 80024de - { - Error_Handler(); - 80024da: f000 f931 bl 8002740 - } - sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 80024de: f44f 5380 mov.w r3, #4096 ; 0x1000 - 80024e2: 60bb str r3, [r7, #8] - if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) - 80024e4: f107 0308 add.w r3, r7, #8 - 80024e8: 4619 mov r1, r3 - 80024ea: 480d ldr r0, [pc, #52] ; (8002520 ) - 80024ec: f002 fcc0 bl 8004e70 - 80024f0: 4603 mov r3, r0 - 80024f2: 2b00 cmp r3, #0 - 80024f4: d001 beq.n 80024fa - { - Error_Handler(); - 80024f6: f000 f923 bl 8002740 - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 80024fa: 2300 movs r3, #0 - 80024fc: 603b str r3, [r7, #0] - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 80024fe: 2300 movs r3, #0 - 8002500: 607b str r3, [r7, #4] - if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) - 8002502: 463b mov r3, r7 - 8002504: 4619 mov r1, r3 - 8002506: 4806 ldr r0, [pc, #24] ; (8002520 ) - 8002508: f003 f83e bl 8005588 - 800250c: 4603 mov r3, r0 - 800250e: 2b00 cmp r3, #0 - 8002510: d001 beq.n 8002516 - { - Error_Handler(); - 8002512: f000 f915 bl 8002740 - } - /* USER CODE BEGIN TIM4_Init 2 */ - - /* USER CODE END TIM4_Init 2 */ - -} - 8002516: bf00 nop - 8002518: 3718 adds r7, #24 - 800251a: 46bd mov sp, r7 - 800251c: bd80 pop {r7, pc} - 800251e: bf00 nop - 8002520: 20000f30 .word 0x20000f30 - 8002524: 40000800 .word 0x40000800 - -08002528 : - * @brief USART1 Initialization Function - * @param None - * @retval None - */ -static void MX_USART1_UART_Init(void) -{ - 8002528: b580 push {r7, lr} - 800252a: af00 add r7, sp, #0 - /* USER CODE END USART1_Init 0 */ - - /* USER CODE BEGIN USART1_Init 1 */ - - /* USER CODE END USART1_Init 1 */ - huart1.Instance = USART1; - 800252c: 4b10 ldr r3, [pc, #64] ; (8002570 ) - 800252e: 4a11 ldr r2, [pc, #68] ; (8002574 ) - 8002530: 601a str r2, [r3, #0] - huart1.Init.BaudRate = 2250000; - 8002532: 4b0f ldr r3, [pc, #60] ; (8002570 ) - 8002534: 4a10 ldr r2, [pc, #64] ; (8002578 ) - 8002536: 605a str r2, [r3, #4] - huart1.Init.WordLength = UART_WORDLENGTH_8B; - 8002538: 4b0d ldr r3, [pc, #52] ; (8002570 ) - 800253a: 2200 movs r2, #0 - 800253c: 609a str r2, [r3, #8] - huart1.Init.StopBits = UART_STOPBITS_1; - 800253e: 4b0c ldr r3, [pc, #48] ; (8002570 ) - 8002540: 2200 movs r2, #0 - 8002542: 60da str r2, [r3, #12] - huart1.Init.Parity = UART_PARITY_NONE; - 8002544: 4b0a ldr r3, [pc, #40] ; (8002570 ) - 8002546: 2200 movs r2, #0 - 8002548: 611a str r2, [r3, #16] - huart1.Init.Mode = UART_MODE_TX_RX; - 800254a: 4b09 ldr r3, [pc, #36] ; (8002570 ) - 800254c: 220c movs r2, #12 - 800254e: 615a str r2, [r3, #20] - huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8002550: 4b07 ldr r3, [pc, #28] ; (8002570 ) - 8002552: 2200 movs r2, #0 - 8002554: 619a str r2, [r3, #24] - huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 8002556: 4b06 ldr r3, [pc, #24] ; (8002570 ) - 8002558: 2200 movs r2, #0 - 800255a: 61da str r2, [r3, #28] - if (HAL_UART_Init(&huart1) != HAL_OK) - 800255c: 4804 ldr r0, [pc, #16] ; (8002570 ) - 800255e: f003 f883 bl 8005668 - 8002562: 4603 mov r3, r0 - 8002564: 2b00 cmp r3, #0 - 8002566: d001 beq.n 800256c - { - Error_Handler(); - 8002568: f000 f8ea bl 8002740 - } - /* USER CODE BEGIN USART1_Init 2 */ - - /* USER CODE END USART1_Init 2 */ - -} - 800256c: bf00 nop - 800256e: bd80 pop {r7, pc} - 8002570: 20000f78 .word 0x20000f78 - 8002574: 40013800 .word 0x40013800 - 8002578: 00225510 .word 0x00225510 - -0800257c : - * @brief USART2 Initialization Function - * @param None - * @retval None - */ -static void MX_USART2_UART_Init(void) -{ - 800257c: b580 push {r7, lr} - 800257e: af00 add r7, sp, #0 - /* USER CODE END USART2_Init 0 */ - - /* USER CODE BEGIN USART2_Init 1 */ - - /* USER CODE END USART2_Init 1 */ - huart2.Instance = USART2; - 8002580: 4b10 ldr r3, [pc, #64] ; (80025c4 ) - 8002582: 4a11 ldr r2, [pc, #68] ; (80025c8 ) - 8002584: 601a str r2, [r3, #0] - huart2.Init.BaudRate = 2250000; - 8002586: 4b0f ldr r3, [pc, #60] ; (80025c4 ) - 8002588: 4a10 ldr r2, [pc, #64] ; (80025cc ) - 800258a: 605a str r2, [r3, #4] - huart2.Init.WordLength = UART_WORDLENGTH_8B; - 800258c: 4b0d ldr r3, [pc, #52] ; (80025c4 ) - 800258e: 2200 movs r2, #0 - 8002590: 609a str r2, [r3, #8] - huart2.Init.StopBits = UART_STOPBITS_1; - 8002592: 4b0c ldr r3, [pc, #48] ; (80025c4 ) - 8002594: 2200 movs r2, #0 - 8002596: 60da str r2, [r3, #12] - huart2.Init.Parity = UART_PARITY_NONE; - 8002598: 4b0a ldr r3, [pc, #40] ; (80025c4 ) - 800259a: 2200 movs r2, #0 - 800259c: 611a str r2, [r3, #16] - huart2.Init.Mode = UART_MODE_TX_RX; - 800259e: 4b09 ldr r3, [pc, #36] ; (80025c4 ) - 80025a0: 220c movs r2, #12 - 80025a2: 615a str r2, [r3, #20] - huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 80025a4: 4b07 ldr r3, [pc, #28] ; (80025c4 ) - 80025a6: 2200 movs r2, #0 - 80025a8: 619a str r2, [r3, #24] - huart2.Init.OverSampling = UART_OVERSAMPLING_16; - 80025aa: 4b06 ldr r3, [pc, #24] ; (80025c4 ) - 80025ac: 2200 movs r2, #0 - 80025ae: 61da str r2, [r3, #28] - if (HAL_UART_Init(&huart2) != HAL_OK) - 80025b0: 4804 ldr r0, [pc, #16] ; (80025c4 ) - 80025b2: f003 f859 bl 8005668 - 80025b6: 4603 mov r3, r0 - 80025b8: 2b00 cmp r3, #0 - 80025ba: d001 beq.n 80025c0 - { - Error_Handler(); - 80025bc: f000 f8c0 bl 8002740 - } - /* USER CODE BEGIN USART2_Init 2 */ - - /* USER CODE END USART2_Init 2 */ - -} - 80025c0: bf00 nop - 80025c2: bd80 pop {r7, pc} - 80025c4: 20000fbc .word 0x20000fbc - 80025c8: 40004400 .word 0x40004400 - 80025cc: 00225510 .word 0x00225510 - -080025d0 : - * @brief USB Initialization Function - * @param None - * @retval None - */ -static void MX_USB_PCD_Init(void) -{ - 80025d0: b580 push {r7, lr} - 80025d2: af00 add r7, sp, #0 - /* USER CODE END USB_Init 0 */ - - /* USER CODE BEGIN USB_Init 1 */ - - /* USER CODE END USB_Init 1 */ - hpcd_USB_FS.Instance = USB; - 80025d4: 4b0d ldr r3, [pc, #52] ; (800260c ) - 80025d6: 4a0e ldr r2, [pc, #56] ; (8002610 ) - 80025d8: 601a str r2, [r3, #0] - hpcd_USB_FS.Init.dev_endpoints = 8; - 80025da: 4b0c ldr r3, [pc, #48] ; (800260c ) - 80025dc: 2208 movs r2, #8 - 80025de: 605a str r2, [r3, #4] - hpcd_USB_FS.Init.speed = PCD_SPEED_FULL; - 80025e0: 4b0a ldr r3, [pc, #40] ; (800260c ) - 80025e2: 2202 movs r2, #2 - 80025e4: 609a str r2, [r3, #8] - hpcd_USB_FS.Init.low_power_enable = DISABLE; - 80025e6: 4b09 ldr r3, [pc, #36] ; (800260c ) - 80025e8: 2200 movs r2, #0 - 80025ea: 619a str r2, [r3, #24] - hpcd_USB_FS.Init.lpm_enable = DISABLE; - 80025ec: 4b07 ldr r3, [pc, #28] ; (800260c ) - 80025ee: 2200 movs r2, #0 - 80025f0: 61da str r2, [r3, #28] - hpcd_USB_FS.Init.battery_charging_enable = DISABLE; - 80025f2: 4b06 ldr r3, [pc, #24] ; (800260c ) - 80025f4: 2200 movs r2, #0 - 80025f6: 621a str r2, [r3, #32] - if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK) - 80025f8: 4804 ldr r0, [pc, #16] ; (800260c ) - 80025fa: f001 f9d3 bl 80039a4 - 80025fe: 4603 mov r3, r0 - 8002600: 2b00 cmp r3, #0 - 8002602: d001 beq.n 8002608 - { - Error_Handler(); - 8002604: f000 f89c bl 8002740 - } - /* USER CODE BEGIN USB_Init 2 */ - - /* USER CODE END USB_Init 2 */ - -} - 8002608: bf00 nop - 800260a: bd80 pop {r7, pc} - 800260c: 20001044 .word 0x20001044 - 8002610: 40005c00 .word 0x40005c00 - -08002614 : - -/** - * Enable DMA controller clock - */ -static void MX_DMA_Init(void) -{ - 8002614: b580 push {r7, lr} - 8002616: b082 sub sp, #8 - 8002618: af00 add r7, sp, #0 - - /* DMA controller clock enable */ - __HAL_RCC_DMA1_CLK_ENABLE(); - 800261a: 4b0c ldr r3, [pc, #48] ; (800264c ) - 800261c: 695b ldr r3, [r3, #20] - 800261e: 4a0b ldr r2, [pc, #44] ; (800264c ) - 8002620: f043 0301 orr.w r3, r3, #1 - 8002624: 6153 str r3, [r2, #20] - 8002626: 4b09 ldr r3, [pc, #36] ; (800264c ) - 8002628: 695b ldr r3, [r3, #20] - 800262a: f003 0301 and.w r3, r3, #1 - 800262e: 607b str r3, [r7, #4] - 8002630: 687b ldr r3, [r7, #4] - - /* DMA interrupt init */ - /* DMA1_Channel7_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0); - 8002632: 2200 movs r2, #0 - 8002634: 2100 movs r1, #0 - 8002636: 2011 movs r0, #17 - 8002638: f000 fd43 bl 80030c2 - HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn); - 800263c: 2011 movs r0, #17 - 800263e: f000 fd5c bl 80030fa - -} - 8002642: bf00 nop - 8002644: 3708 adds r7, #8 - 8002646: 46bd mov sp, r7 - 8002648: bd80 pop {r7, pc} - 800264a: bf00 nop - 800264c: 40021000 .word 0x40021000 - -08002650 : - * @brief GPIO Initialization Function - * @param None - * @retval None - */ -static void MX_GPIO_Init(void) -{ - 8002650: b580 push {r7, lr} - 8002652: b088 sub sp, #32 - 8002654: af00 add r7, sp, #0 - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8002656: f107 0310 add.w r3, r7, #16 - 800265a: 2200 movs r2, #0 - 800265c: 601a str r2, [r3, #0] - 800265e: 605a str r2, [r3, #4] - 8002660: 609a str r2, [r3, #8] - 8002662: 60da str r2, [r3, #12] - - /* GPIO Ports Clock Enable */ - __HAL_RCC_GPIOC_CLK_ENABLE(); - 8002664: 4b33 ldr r3, [pc, #204] ; (8002734 ) - 8002666: 699b ldr r3, [r3, #24] - 8002668: 4a32 ldr r2, [pc, #200] ; (8002734 ) - 800266a: f043 0310 orr.w r3, r3, #16 - 800266e: 6193 str r3, [r2, #24] - 8002670: 4b30 ldr r3, [pc, #192] ; (8002734 ) - 8002672: 699b ldr r3, [r3, #24] - 8002674: f003 0310 and.w r3, r3, #16 - 8002678: 60fb str r3, [r7, #12] - 800267a: 68fb ldr r3, [r7, #12] - __HAL_RCC_GPIOD_CLK_ENABLE(); - 800267c: 4b2d ldr r3, [pc, #180] ; (8002734 ) - 800267e: 699b ldr r3, [r3, #24] - 8002680: 4a2c ldr r2, [pc, #176] ; (8002734 ) - 8002682: f043 0320 orr.w r3, r3, #32 - 8002686: 6193 str r3, [r2, #24] - 8002688: 4b2a ldr r3, [pc, #168] ; (8002734 ) - 800268a: 699b ldr r3, [r3, #24] - 800268c: f003 0320 and.w r3, r3, #32 - 8002690: 60bb str r3, [r7, #8] - 8002692: 68bb ldr r3, [r7, #8] - __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002694: 4b27 ldr r3, [pc, #156] ; (8002734 ) - 8002696: 699b ldr r3, [r3, #24] - 8002698: 4a26 ldr r2, [pc, #152] ; (8002734 ) - 800269a: f043 0304 orr.w r3, r3, #4 - 800269e: 6193 str r3, [r2, #24] - 80026a0: 4b24 ldr r3, [pc, #144] ; (8002734 ) - 80026a2: 699b ldr r3, [r3, #24] - 80026a4: f003 0304 and.w r3, r3, #4 - 80026a8: 607b str r3, [r7, #4] - 80026aa: 687b ldr r3, [r7, #4] - __HAL_RCC_GPIOB_CLK_ENABLE(); - 80026ac: 4b21 ldr r3, [pc, #132] ; (8002734 ) - 80026ae: 699b ldr r3, [r3, #24] - 80026b0: 4a20 ldr r2, [pc, #128] ; (8002734 ) - 80026b2: f043 0308 orr.w r3, r3, #8 - 80026b6: 6193 str r3, [r2, #24] - 80026b8: 4b1e ldr r3, [pc, #120] ; (8002734 ) - 80026ba: 699b ldr r3, [r3, #24] - 80026bc: f003 0308 and.w r3, r3, #8 - 80026c0: 603b str r3, [r7, #0] - 80026c2: 683b ldr r3, [r7, #0] - - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(LED_BUILTIN_GPIO_Port, LED_BUILTIN_Pin, GPIO_PIN_SET); - 80026c4: 2201 movs r2, #1 - 80026c6: f44f 5100 mov.w r1, #8192 ; 0x2000 - 80026ca: 481b ldr r0, [pc, #108] ; (8002738 ) - 80026cc: f001 f952 bl 8003974 - - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_RESET); - 80026d0: 2200 movs r2, #0 - 80026d2: 2133 movs r1, #51 ; 0x33 - 80026d4: 4819 ldr r0, [pc, #100] ; (800273c ) - 80026d6: f001 f94d bl 8003974 - - /*Configure GPIO pin : LED_BUILTIN_Pin */ - GPIO_InitStruct.Pin = LED_BUILTIN_Pin; - 80026da: f44f 5300 mov.w r3, #8192 ; 0x2000 - 80026de: 613b str r3, [r7, #16] - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 80026e0: 2301 movs r3, #1 - 80026e2: 617b str r3, [r7, #20] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 80026e4: 2300 movs r3, #0 - 80026e6: 61bb str r3, [r7, #24] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80026e8: 2302 movs r3, #2 - 80026ea: 61fb str r3, [r7, #28] - HAL_GPIO_Init(LED_BUILTIN_GPIO_Port, &GPIO_InitStruct); - 80026ec: f107 0310 add.w r3, r7, #16 - 80026f0: 4619 mov r1, r3 - 80026f2: 4811 ldr r0, [pc, #68] ; (8002738 ) - 80026f4: f000 ffba bl 800366c - - /*Configure GPIO pins : PB0 PB1 PB4 PB5 */ - GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5; - 80026f8: 2333 movs r3, #51 ; 0x33 - 80026fa: 613b str r3, [r7, #16] - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 80026fc: 2301 movs r3, #1 - 80026fe: 617b str r3, [r7, #20] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002700: 2300 movs r3, #0 - 8002702: 61bb str r3, [r7, #24] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8002704: 2302 movs r3, #2 - 8002706: 61fb str r3, [r7, #28] - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002708: f107 0310 add.w r3, r7, #16 - 800270c: 4619 mov r1, r3 - 800270e: 480b ldr r0, [pc, #44] ; (800273c ) - 8002710: f000 ffac bl 800366c - - /*Configure GPIO pin : BOOT1_Pin */ - GPIO_InitStruct.Pin = BOOT1_Pin; - 8002714: 2304 movs r3, #4 - 8002716: 613b str r3, [r7, #16] - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8002718: 2300 movs r3, #0 - 800271a: 617b str r3, [r7, #20] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 800271c: 2300 movs r3, #0 - 800271e: 61bb str r3, [r7, #24] - HAL_GPIO_Init(BOOT1_GPIO_Port, &GPIO_InitStruct); - 8002720: f107 0310 add.w r3, r7, #16 - 8002724: 4619 mov r1, r3 - 8002726: 4805 ldr r0, [pc, #20] ; (800273c ) - 8002728: f000 ffa0 bl 800366c - -} - 800272c: bf00 nop - 800272e: 3720 adds r7, #32 - 8002730: 46bd mov sp, r7 - 8002732: bd80 pop {r7, pc} - 8002734: 40021000 .word 0x40021000 - 8002738: 40011000 .word 0x40011000 - 800273c: 40010c00 .word 0x40010c00 - -08002740 : -/** - * @brief This function is executed in case of error occurrence. - * @retval None - */ -void Error_Handler(void) -{ - 8002740: b480 push {r7} - 8002742: af00 add r7, sp, #0 - \details Disables IRQ interrupts by setting the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __disable_irq(void) -{ - __ASM volatile ("cpsid i" : : : "memory"); - 8002744: b672 cpsid i -} - 8002746: bf00 nop - /* USER CODE BEGIN Error_Handler_Debug */ - /* User can add his own implementation to report the HAL error return state */ - __disable_irq(); - while (1) - 8002748: e7fe b.n 8002748 - ... - -0800274c : -void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); - /** - * Initializes the Global MSP. - */ -void HAL_MspInit(void) -{ - 800274c: b480 push {r7} - 800274e: b085 sub sp, #20 - 8002750: af00 add r7, sp, #0 - /* USER CODE BEGIN MspInit 0 */ - - /* USER CODE END MspInit 0 */ - - __HAL_RCC_AFIO_CLK_ENABLE(); - 8002752: 4b15 ldr r3, [pc, #84] ; (80027a8 ) - 8002754: 699b ldr r3, [r3, #24] - 8002756: 4a14 ldr r2, [pc, #80] ; (80027a8 ) - 8002758: f043 0301 orr.w r3, r3, #1 - 800275c: 6193 str r3, [r2, #24] - 800275e: 4b12 ldr r3, [pc, #72] ; (80027a8 ) - 8002760: 699b ldr r3, [r3, #24] - 8002762: f003 0301 and.w r3, r3, #1 - 8002766: 60bb str r3, [r7, #8] - 8002768: 68bb ldr r3, [r7, #8] - __HAL_RCC_PWR_CLK_ENABLE(); - 800276a: 4b0f ldr r3, [pc, #60] ; (80027a8 ) - 800276c: 69db ldr r3, [r3, #28] - 800276e: 4a0e ldr r2, [pc, #56] ; (80027a8 ) - 8002770: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8002774: 61d3 str r3, [r2, #28] - 8002776: 4b0c ldr r3, [pc, #48] ; (80027a8 ) - 8002778: 69db ldr r3, [r3, #28] - 800277a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 800277e: 607b str r3, [r7, #4] - 8002780: 687b ldr r3, [r7, #4] - - /* System interrupt init*/ - - /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled - */ - __HAL_AFIO_REMAP_SWJ_NOJTAG(); - 8002782: 4b0a ldr r3, [pc, #40] ; (80027ac ) - 8002784: 685b ldr r3, [r3, #4] - 8002786: 60fb str r3, [r7, #12] - 8002788: 68fb ldr r3, [r7, #12] - 800278a: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 - 800278e: 60fb str r3, [r7, #12] - 8002790: 68fb ldr r3, [r7, #12] - 8002792: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 - 8002796: 60fb str r3, [r7, #12] - 8002798: 4a04 ldr r2, [pc, #16] ; (80027ac ) - 800279a: 68fb ldr r3, [r7, #12] - 800279c: 6053 str r3, [r2, #4] - - /* USER CODE BEGIN MspInit 1 */ - - /* USER CODE END MspInit 1 */ -} - 800279e: bf00 nop - 80027a0: 3714 adds r7, #20 - 80027a2: 46bd mov sp, r7 - 80027a4: bc80 pop {r7} - 80027a6: 4770 bx lr - 80027a8: 40021000 .word 0x40021000 - 80027ac: 40010000 .word 0x40010000 - -080027b0 : -* This function configures the hardware resources used in this example -* @param htim_encoder: TIM_Encoder handle pointer -* @retval None -*/ -void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder) -{ - 80027b0: b580 push {r7, lr} - 80027b2: b08a sub sp, #40 ; 0x28 - 80027b4: af00 add r7, sp, #0 - 80027b6: 6078 str r0, [r7, #4] - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80027b8: f107 0318 add.w r3, r7, #24 - 80027bc: 2200 movs r2, #0 - 80027be: 601a str r2, [r3, #0] - 80027c0: 605a str r2, [r3, #4] - 80027c2: 609a str r2, [r3, #8] - 80027c4: 60da str r2, [r3, #12] - if(htim_encoder->Instance==TIM1) - 80027c6: 687b ldr r3, [r7, #4] - 80027c8: 681b ldr r3, [r3, #0] - 80027ca: 4a2b ldr r2, [pc, #172] ; (8002878 ) - 80027cc: 4293 cmp r3, r2 - 80027ce: d125 bne.n 800281c - { - /* USER CODE BEGIN TIM1_MspInit 0 */ - - /* USER CODE END TIM1_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_TIM1_CLK_ENABLE(); - 80027d0: 4b2a ldr r3, [pc, #168] ; (800287c ) - 80027d2: 699b ldr r3, [r3, #24] - 80027d4: 4a29 ldr r2, [pc, #164] ; (800287c ) - 80027d6: f443 6300 orr.w r3, r3, #2048 ; 0x800 - 80027da: 6193 str r3, [r2, #24] - 80027dc: 4b27 ldr r3, [pc, #156] ; (800287c ) - 80027de: 699b ldr r3, [r3, #24] - 80027e0: f403 6300 and.w r3, r3, #2048 ; 0x800 - 80027e4: 617b str r3, [r7, #20] - 80027e6: 697b ldr r3, [r7, #20] - - __HAL_RCC_GPIOA_CLK_ENABLE(); - 80027e8: 4b24 ldr r3, [pc, #144] ; (800287c ) - 80027ea: 699b ldr r3, [r3, #24] - 80027ec: 4a23 ldr r2, [pc, #140] ; (800287c ) - 80027ee: f043 0304 orr.w r3, r3, #4 - 80027f2: 6193 str r3, [r2, #24] - 80027f4: 4b21 ldr r3, [pc, #132] ; (800287c ) - 80027f6: 699b ldr r3, [r3, #24] - 80027f8: f003 0304 and.w r3, r3, #4 - 80027fc: 613b str r3, [r7, #16] - 80027fe: 693b ldr r3, [r7, #16] - /**TIM1 GPIO Configuration - PA8 ------> TIM1_CH1 - PA9 ------> TIM1_CH2 - */ - GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; - 8002800: f44f 7340 mov.w r3, #768 ; 0x300 - 8002804: 61bb str r3, [r7, #24] - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8002806: 2300 movs r3, #0 - 8002808: 61fb str r3, [r7, #28] - GPIO_InitStruct.Pull = GPIO_PULLUP; - 800280a: 2301 movs r3, #1 - 800280c: 623b str r3, [r7, #32] - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 800280e: f107 0318 add.w r3, r7, #24 - 8002812: 4619 mov r1, r3 - 8002814: 481a ldr r0, [pc, #104] ; (8002880 ) - 8002816: f000 ff29 bl 800366c - /* USER CODE BEGIN TIM3_MspInit 1 */ - - /* USER CODE END TIM3_MspInit 1 */ - } - -} - 800281a: e028 b.n 800286e - else if(htim_encoder->Instance==TIM3) - 800281c: 687b ldr r3, [r7, #4] - 800281e: 681b ldr r3, [r3, #0] - 8002820: 4a18 ldr r2, [pc, #96] ; (8002884 ) - 8002822: 4293 cmp r3, r2 - 8002824: d123 bne.n 800286e - __HAL_RCC_TIM3_CLK_ENABLE(); - 8002826: 4b15 ldr r3, [pc, #84] ; (800287c ) - 8002828: 69db ldr r3, [r3, #28] - 800282a: 4a14 ldr r2, [pc, #80] ; (800287c ) - 800282c: f043 0302 orr.w r3, r3, #2 - 8002830: 61d3 str r3, [r2, #28] - 8002832: 4b12 ldr r3, [pc, #72] ; (800287c ) - 8002834: 69db ldr r3, [r3, #28] - 8002836: f003 0302 and.w r3, r3, #2 - 800283a: 60fb str r3, [r7, #12] - 800283c: 68fb ldr r3, [r7, #12] - __HAL_RCC_GPIOA_CLK_ENABLE(); - 800283e: 4b0f ldr r3, [pc, #60] ; (800287c ) - 8002840: 699b ldr r3, [r3, #24] - 8002842: 4a0e ldr r2, [pc, #56] ; (800287c ) - 8002844: f043 0304 orr.w r3, r3, #4 - 8002848: 6193 str r3, [r2, #24] - 800284a: 4b0c ldr r3, [pc, #48] ; (800287c ) - 800284c: 699b ldr r3, [r3, #24] - 800284e: f003 0304 and.w r3, r3, #4 - 8002852: 60bb str r3, [r7, #8] - 8002854: 68bb ldr r3, [r7, #8] - GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; - 8002856: 23c0 movs r3, #192 ; 0xc0 - 8002858: 61bb str r3, [r7, #24] - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 800285a: 2300 movs r3, #0 - 800285c: 61fb str r3, [r7, #28] - GPIO_InitStruct.Pull = GPIO_PULLUP; - 800285e: 2301 movs r3, #1 - 8002860: 623b str r3, [r7, #32] - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002862: f107 0318 add.w r3, r7, #24 - 8002866: 4619 mov r1, r3 - 8002868: 4805 ldr r0, [pc, #20] ; (8002880 ) - 800286a: f000 feff bl 800366c -} - 800286e: bf00 nop - 8002870: 3728 adds r7, #40 ; 0x28 - 8002872: 46bd mov sp, r7 - 8002874: bd80 pop {r7, pc} - 8002876: bf00 nop - 8002878: 40012c00 .word 0x40012c00 - 800287c: 40021000 .word 0x40021000 - 8002880: 40010800 .word 0x40010800 - 8002884: 40000400 .word 0x40000400 - -08002888 : -* This function configures the hardware resources used in this example -* @param htim_base: TIM_Base handle pointer -* @retval None -*/ -void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) -{ - 8002888: b580 push {r7, lr} - 800288a: b084 sub sp, #16 - 800288c: af00 add r7, sp, #0 - 800288e: 6078 str r0, [r7, #4] - if(htim_base->Instance==TIM2) - 8002890: 687b ldr r3, [r7, #4] - 8002892: 681b ldr r3, [r3, #0] - 8002894: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8002898: d10c bne.n 80028b4 - { - /* USER CODE BEGIN TIM2_MspInit 0 */ - - /* USER CODE END TIM2_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_TIM2_CLK_ENABLE(); - 800289a: 4b15 ldr r3, [pc, #84] ; (80028f0 ) - 800289c: 69db ldr r3, [r3, #28] - 800289e: 4a14 ldr r2, [pc, #80] ; (80028f0 ) - 80028a0: f043 0301 orr.w r3, r3, #1 - 80028a4: 61d3 str r3, [r2, #28] - 80028a6: 4b12 ldr r3, [pc, #72] ; (80028f0 ) - 80028a8: 69db ldr r3, [r3, #28] - 80028aa: f003 0301 and.w r3, r3, #1 - 80028ae: 60fb str r3, [r7, #12] - 80028b0: 68fb ldr r3, [r7, #12] - /* USER CODE BEGIN TIM4_MspInit 1 */ - - /* USER CODE END TIM4_MspInit 1 */ - } - -} - 80028b2: e018 b.n 80028e6 - else if(htim_base->Instance==TIM4) - 80028b4: 687b ldr r3, [r7, #4] - 80028b6: 681b ldr r3, [r3, #0] - 80028b8: 4a0e ldr r2, [pc, #56] ; (80028f4 ) - 80028ba: 4293 cmp r3, r2 - 80028bc: d113 bne.n 80028e6 - __HAL_RCC_TIM4_CLK_ENABLE(); - 80028be: 4b0c ldr r3, [pc, #48] ; (80028f0 ) - 80028c0: 69db ldr r3, [r3, #28] - 80028c2: 4a0b ldr r2, [pc, #44] ; (80028f0 ) - 80028c4: f043 0304 orr.w r3, r3, #4 - 80028c8: 61d3 str r3, [r2, #28] - 80028ca: 4b09 ldr r3, [pc, #36] ; (80028f0 ) - 80028cc: 69db ldr r3, [r3, #28] - 80028ce: f003 0304 and.w r3, r3, #4 - 80028d2: 60bb str r3, [r7, #8] - 80028d4: 68bb ldr r3, [r7, #8] - HAL_NVIC_SetPriority(TIM4_IRQn, 15, 0); - 80028d6: 2200 movs r2, #0 - 80028d8: 210f movs r1, #15 - 80028da: 201e movs r0, #30 - 80028dc: f000 fbf1 bl 80030c2 - HAL_NVIC_EnableIRQ(TIM4_IRQn); - 80028e0: 201e movs r0, #30 - 80028e2: f000 fc0a bl 80030fa -} - 80028e6: bf00 nop - 80028e8: 3710 adds r7, #16 - 80028ea: 46bd mov sp, r7 - 80028ec: bd80 pop {r7, pc} - 80028ee: bf00 nop - 80028f0: 40021000 .word 0x40021000 - 80028f4: 40000800 .word 0x40000800 - -080028f8 : - -void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) -{ - 80028f8: b580 push {r7, lr} - 80028fa: b08a sub sp, #40 ; 0x28 - 80028fc: af00 add r7, sp, #0 - 80028fe: 6078 str r0, [r7, #4] - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8002900: f107 0314 add.w r3, r7, #20 - 8002904: 2200 movs r2, #0 - 8002906: 601a str r2, [r3, #0] - 8002908: 605a str r2, [r3, #4] - 800290a: 609a str r2, [r3, #8] - 800290c: 60da str r2, [r3, #12] - if(htim->Instance==TIM2) - 800290e: 687b ldr r3, [r7, #4] - 8002910: 681b ldr r3, [r3, #0] - 8002912: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8002916: d143 bne.n 80029a0 - { - /* USER CODE BEGIN TIM2_MspPostInit 0 */ - - /* USER CODE END TIM2_MspPostInit 0 */ - - __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002918: 4b23 ldr r3, [pc, #140] ; (80029a8 ) - 800291a: 699b ldr r3, [r3, #24] - 800291c: 4a22 ldr r2, [pc, #136] ; (80029a8 ) - 800291e: f043 0308 orr.w r3, r3, #8 - 8002922: 6193 str r3, [r2, #24] - 8002924: 4b20 ldr r3, [pc, #128] ; (80029a8 ) - 8002926: 699b ldr r3, [r3, #24] - 8002928: f003 0308 and.w r3, r3, #8 - 800292c: 613b str r3, [r7, #16] - 800292e: 693b ldr r3, [r7, #16] - __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002930: 4b1d ldr r3, [pc, #116] ; (80029a8 ) - 8002932: 699b ldr r3, [r3, #24] - 8002934: 4a1c ldr r2, [pc, #112] ; (80029a8 ) - 8002936: f043 0304 orr.w r3, r3, #4 - 800293a: 6193 str r3, [r2, #24] - 800293c: 4b1a ldr r3, [pc, #104] ; (80029a8 ) - 800293e: 699b ldr r3, [r3, #24] - 8002940: f003 0304 and.w r3, r3, #4 - 8002944: 60fb str r3, [r7, #12] - 8002946: 68fb ldr r3, [r7, #12] - PB10 ------> TIM2_CH3 - PB11 ------> TIM2_CH4 - PA15 ------> TIM2_CH1 - PB3 ------> TIM2_CH2 - */ - GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_3; - 8002948: f640 4308 movw r3, #3080 ; 0xc08 - 800294c: 617b str r3, [r7, #20] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 800294e: 2302 movs r3, #2 - 8002950: 61bb str r3, [r7, #24] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8002952: 2302 movs r3, #2 - 8002954: 623b str r3, [r7, #32] - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002956: f107 0314 add.w r3, r7, #20 - 800295a: 4619 mov r1, r3 - 800295c: 4813 ldr r0, [pc, #76] ; (80029ac ) - 800295e: f000 fe85 bl 800366c - - GPIO_InitStruct.Pin = GPIO_PIN_15; - 8002962: f44f 4300 mov.w r3, #32768 ; 0x8000 - 8002966: 617b str r3, [r7, #20] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8002968: 2302 movs r3, #2 - 800296a: 61bb str r3, [r7, #24] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 800296c: 2302 movs r3, #2 - 800296e: 623b str r3, [r7, #32] - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002970: f107 0314 add.w r3, r7, #20 - 8002974: 4619 mov r1, r3 - 8002976: 480e ldr r0, [pc, #56] ; (80029b0 ) - 8002978: f000 fe78 bl 800366c - - __HAL_AFIO_REMAP_TIM2_ENABLE(); - 800297c: 4b0d ldr r3, [pc, #52] ; (80029b4 ) - 800297e: 685b ldr r3, [r3, #4] - 8002980: 627b str r3, [r7, #36] ; 0x24 - 8002982: 6a7b ldr r3, [r7, #36] ; 0x24 - 8002984: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8002988: 627b str r3, [r7, #36] ; 0x24 - 800298a: 6a7b ldr r3, [r7, #36] ; 0x24 - 800298c: f043 63e0 orr.w r3, r3, #117440512 ; 0x7000000 - 8002990: 627b str r3, [r7, #36] ; 0x24 - 8002992: 6a7b ldr r3, [r7, #36] ; 0x24 - 8002994: f443 7340 orr.w r3, r3, #768 ; 0x300 - 8002998: 627b str r3, [r7, #36] ; 0x24 - 800299a: 4a06 ldr r2, [pc, #24] ; (80029b4 ) - 800299c: 6a7b ldr r3, [r7, #36] ; 0x24 - 800299e: 6053 str r3, [r2, #4] - /* USER CODE BEGIN TIM2_MspPostInit 1 */ - - /* USER CODE END TIM2_MspPostInit 1 */ - } - -} - 80029a0: bf00 nop - 80029a2: 3728 adds r7, #40 ; 0x28 - 80029a4: 46bd mov sp, r7 - 80029a6: bd80 pop {r7, pc} - 80029a8: 40021000 .word 0x40021000 - 80029ac: 40010c00 .word 0x40010c00 - 80029b0: 40010800 .word 0x40010800 - 80029b4: 40010000 .word 0x40010000 - -080029b8 : -* This function configures the hardware resources used in this example -* @param huart: UART handle pointer -* @retval None -*/ -void HAL_UART_MspInit(UART_HandleTypeDef* huart) -{ - 80029b8: b580 push {r7, lr} - 80029ba: b08c sub sp, #48 ; 0x30 - 80029bc: af00 add r7, sp, #0 - 80029be: 6078 str r0, [r7, #4] - GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80029c0: f107 031c add.w r3, r7, #28 - 80029c4: 2200 movs r2, #0 - 80029c6: 601a str r2, [r3, #0] - 80029c8: 605a str r2, [r3, #4] - 80029ca: 609a str r2, [r3, #8] - 80029cc: 60da str r2, [r3, #12] - if(huart->Instance==USART1) - 80029ce: 687b ldr r3, [r7, #4] - 80029d0: 681b ldr r3, [r3, #0] - 80029d2: 4a58 ldr r2, [pc, #352] ; (8002b34 ) - 80029d4: 4293 cmp r3, r2 - 80029d6: d146 bne.n 8002a66 - { - /* USER CODE BEGIN USART1_MspInit 0 */ - - /* USER CODE END USART1_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_USART1_CLK_ENABLE(); - 80029d8: 4b57 ldr r3, [pc, #348] ; (8002b38 ) - 80029da: 699b ldr r3, [r3, #24] - 80029dc: 4a56 ldr r2, [pc, #344] ; (8002b38 ) - 80029de: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 80029e2: 6193 str r3, [r2, #24] - 80029e4: 4b54 ldr r3, [pc, #336] ; (8002b38 ) - 80029e6: 699b ldr r3, [r3, #24] - 80029e8: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 80029ec: 61bb str r3, [r7, #24] - 80029ee: 69bb ldr r3, [r7, #24] - - __HAL_RCC_GPIOB_CLK_ENABLE(); - 80029f0: 4b51 ldr r3, [pc, #324] ; (8002b38 ) - 80029f2: 699b ldr r3, [r3, #24] - 80029f4: 4a50 ldr r2, [pc, #320] ; (8002b38 ) - 80029f6: f043 0308 orr.w r3, r3, #8 - 80029fa: 6193 str r3, [r2, #24] - 80029fc: 4b4e ldr r3, [pc, #312] ; (8002b38 ) - 80029fe: 699b ldr r3, [r3, #24] - 8002a00: f003 0308 and.w r3, r3, #8 - 8002a04: 617b str r3, [r7, #20] - 8002a06: 697b ldr r3, [r7, #20] - /**USART1 GPIO Configuration - PB6 ------> USART1_TX - PB7 ------> USART1_RX - */ - GPIO_InitStruct.Pin = GPIO_PIN_6; - 8002a08: 2340 movs r3, #64 ; 0x40 - 8002a0a: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8002a0c: 2302 movs r3, #2 - 8002a0e: 623b str r3, [r7, #32] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - 8002a10: 2303 movs r3, #3 - 8002a12: 62bb str r3, [r7, #40] ; 0x28 - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002a14: f107 031c add.w r3, r7, #28 - 8002a18: 4619 mov r1, r3 - 8002a1a: 4848 ldr r0, [pc, #288] ; (8002b3c ) - 8002a1c: f000 fe26 bl 800366c - - GPIO_InitStruct.Pin = GPIO_PIN_7; - 8002a20: 2380 movs r3, #128 ; 0x80 - 8002a22: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8002a24: 2300 movs r3, #0 - 8002a26: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002a28: 2300 movs r3, #0 - 8002a2a: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002a2c: f107 031c add.w r3, r7, #28 - 8002a30: 4619 mov r1, r3 - 8002a32: 4842 ldr r0, [pc, #264] ; (8002b3c ) - 8002a34: f000 fe1a bl 800366c - - __HAL_AFIO_REMAP_USART1_ENABLE(); - 8002a38: 4b41 ldr r3, [pc, #260] ; (8002b40 ) - 8002a3a: 685b ldr r3, [r3, #4] - 8002a3c: 62fb str r3, [r7, #44] ; 0x2c - 8002a3e: 6afb ldr r3, [r7, #44] ; 0x2c - 8002a40: f043 63e0 orr.w r3, r3, #117440512 ; 0x7000000 - 8002a44: 62fb str r3, [r7, #44] ; 0x2c - 8002a46: 6afb ldr r3, [r7, #44] ; 0x2c - 8002a48: f043 0304 orr.w r3, r3, #4 - 8002a4c: 62fb str r3, [r7, #44] ; 0x2c - 8002a4e: 4a3c ldr r2, [pc, #240] ; (8002b40 ) - 8002a50: 6afb ldr r3, [r7, #44] ; 0x2c - 8002a52: 6053 str r3, [r2, #4] - - /* USART1 interrupt Init */ - HAL_NVIC_SetPriority(USART1_IRQn, 7, 0); - 8002a54: 2200 movs r2, #0 - 8002a56: 2107 movs r1, #7 - 8002a58: 2025 movs r0, #37 ; 0x25 - 8002a5a: f000 fb32 bl 80030c2 - HAL_NVIC_EnableIRQ(USART1_IRQn); - 8002a5e: 2025 movs r0, #37 ; 0x25 - 8002a60: f000 fb4b bl 80030fa - /* USER CODE BEGIN USART2_MspInit 1 */ - - /* USER CODE END USART2_MspInit 1 */ - } - -} - 8002a64: e062 b.n 8002b2c - else if(huart->Instance==USART2) - 8002a66: 687b ldr r3, [r7, #4] - 8002a68: 681b ldr r3, [r3, #0] - 8002a6a: 4a36 ldr r2, [pc, #216] ; (8002b44 ) - 8002a6c: 4293 cmp r3, r2 - 8002a6e: d15d bne.n 8002b2c - __HAL_RCC_USART2_CLK_ENABLE(); - 8002a70: 4b31 ldr r3, [pc, #196] ; (8002b38 ) - 8002a72: 69db ldr r3, [r3, #28] - 8002a74: 4a30 ldr r2, [pc, #192] ; (8002b38 ) - 8002a76: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8002a7a: 61d3 str r3, [r2, #28] - 8002a7c: 4b2e ldr r3, [pc, #184] ; (8002b38 ) - 8002a7e: 69db ldr r3, [r3, #28] - 8002a80: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8002a84: 613b str r3, [r7, #16] - 8002a86: 693b ldr r3, [r7, #16] - __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002a88: 4b2b ldr r3, [pc, #172] ; (8002b38 ) - 8002a8a: 699b ldr r3, [r3, #24] - 8002a8c: 4a2a ldr r2, [pc, #168] ; (8002b38 ) - 8002a8e: f043 0304 orr.w r3, r3, #4 - 8002a92: 6193 str r3, [r2, #24] - 8002a94: 4b28 ldr r3, [pc, #160] ; (8002b38 ) - 8002a96: 699b ldr r3, [r3, #24] - 8002a98: f003 0304 and.w r3, r3, #4 - 8002a9c: 60fb str r3, [r7, #12] - 8002a9e: 68fb ldr r3, [r7, #12] - GPIO_InitStruct.Pin = GPIO_PIN_2; - 8002aa0: 2304 movs r3, #4 - 8002aa2: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8002aa4: 2302 movs r3, #2 - 8002aa6: 623b str r3, [r7, #32] - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - 8002aa8: 2303 movs r3, #3 - 8002aaa: 62bb str r3, [r7, #40] ; 0x28 - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002aac: f107 031c add.w r3, r7, #28 - 8002ab0: 4619 mov r1, r3 - 8002ab2: 4825 ldr r0, [pc, #148] ; (8002b48 ) - 8002ab4: f000 fdda bl 800366c - GPIO_InitStruct.Pin = GPIO_PIN_3; - 8002ab8: 2308 movs r3, #8 - 8002aba: 61fb str r3, [r7, #28] - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8002abc: 2300 movs r3, #0 - 8002abe: 623b str r3, [r7, #32] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002ac0: 2300 movs r3, #0 - 8002ac2: 627b str r3, [r7, #36] ; 0x24 - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002ac4: f107 031c add.w r3, r7, #28 - 8002ac8: 4619 mov r1, r3 - 8002aca: 481f ldr r0, [pc, #124] ; (8002b48 ) - 8002acc: f000 fdce bl 800366c - hdma_usart2_tx.Instance = DMA1_Channel7; - 8002ad0: 4b1e ldr r3, [pc, #120] ; (8002b4c ) - 8002ad2: 4a1f ldr r2, [pc, #124] ; (8002b50 ) - 8002ad4: 601a str r2, [r3, #0] - hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 8002ad6: 4b1d ldr r3, [pc, #116] ; (8002b4c ) - 8002ad8: 2210 movs r2, #16 - 8002ada: 605a str r2, [r3, #4] - hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 8002adc: 4b1b ldr r3, [pc, #108] ; (8002b4c ) - 8002ade: 2200 movs r2, #0 - 8002ae0: 609a str r2, [r3, #8] - hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE; - 8002ae2: 4b1a ldr r3, [pc, #104] ; (8002b4c ) - 8002ae4: 2280 movs r2, #128 ; 0x80 - 8002ae6: 60da str r2, [r3, #12] - hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 8002ae8: 4b18 ldr r3, [pc, #96] ; (8002b4c ) - 8002aea: 2200 movs r2, #0 - 8002aec: 611a str r2, [r3, #16] - hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8002aee: 4b17 ldr r3, [pc, #92] ; (8002b4c ) - 8002af0: 2200 movs r2, #0 - 8002af2: 615a str r2, [r3, #20] - hdma_usart2_tx.Init.Mode = DMA_NORMAL; - 8002af4: 4b15 ldr r3, [pc, #84] ; (8002b4c ) - 8002af6: 2200 movs r2, #0 - 8002af8: 619a str r2, [r3, #24] - hdma_usart2_tx.Init.Priority = DMA_PRIORITY_LOW; - 8002afa: 4b14 ldr r3, [pc, #80] ; (8002b4c ) - 8002afc: 2200 movs r2, #0 - 8002afe: 61da str r2, [r3, #28] - if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK) - 8002b00: 4812 ldr r0, [pc, #72] ; (8002b4c ) - 8002b02: f000 fb15 bl 8003130 - 8002b06: 4603 mov r3, r0 - 8002b08: 2b00 cmp r3, #0 - 8002b0a: d001 beq.n 8002b10 - Error_Handler(); - 8002b0c: f7ff fe18 bl 8002740 - __HAL_LINKDMA(huart,hdmatx,hdma_usart2_tx); - 8002b10: 687b ldr r3, [r7, #4] - 8002b12: 4a0e ldr r2, [pc, #56] ; (8002b4c ) - 8002b14: 635a str r2, [r3, #52] ; 0x34 - 8002b16: 4a0d ldr r2, [pc, #52] ; (8002b4c ) - 8002b18: 687b ldr r3, [r7, #4] - 8002b1a: 6253 str r3, [r2, #36] ; 0x24 - HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); - 8002b1c: 2200 movs r2, #0 - 8002b1e: 2100 movs r1, #0 - 8002b20: 2026 movs r0, #38 ; 0x26 - 8002b22: f000 face bl 80030c2 - HAL_NVIC_EnableIRQ(USART2_IRQn); - 8002b26: 2026 movs r0, #38 ; 0x26 - 8002b28: f000 fae7 bl 80030fa -} - 8002b2c: bf00 nop - 8002b2e: 3730 adds r7, #48 ; 0x30 - 8002b30: 46bd mov sp, r7 - 8002b32: bd80 pop {r7, pc} - 8002b34: 40013800 .word 0x40013800 - 8002b38: 40021000 .word 0x40021000 - 8002b3c: 40010c00 .word 0x40010c00 - 8002b40: 40010000 .word 0x40010000 - 8002b44: 40004400 .word 0x40004400 - 8002b48: 40010800 .word 0x40010800 - 8002b4c: 20001000 .word 0x20001000 - 8002b50: 40020080 .word 0x40020080 - -08002b54 : -* This function configures the hardware resources used in this example -* @param hpcd: PCD handle pointer -* @retval None -*/ -void HAL_PCD_MspInit(PCD_HandleTypeDef* hpcd) -{ - 8002b54: b480 push {r7} - 8002b56: b085 sub sp, #20 - 8002b58: af00 add r7, sp, #0 - 8002b5a: 6078 str r0, [r7, #4] - if(hpcd->Instance==USB) - 8002b5c: 687b ldr r3, [r7, #4] - 8002b5e: 681b ldr r3, [r3, #0] - 8002b60: 4a09 ldr r2, [pc, #36] ; (8002b88 ) - 8002b62: 4293 cmp r3, r2 - 8002b64: d10b bne.n 8002b7e - { - /* USER CODE BEGIN USB_MspInit 0 */ - - /* USER CODE END USB_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_USB_CLK_ENABLE(); - 8002b66: 4b09 ldr r3, [pc, #36] ; (8002b8c ) - 8002b68: 69db ldr r3, [r3, #28] - 8002b6a: 4a08 ldr r2, [pc, #32] ; (8002b8c ) - 8002b6c: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 - 8002b70: 61d3 str r3, [r2, #28] - 8002b72: 4b06 ldr r3, [pc, #24] ; (8002b8c ) - 8002b74: 69db ldr r3, [r3, #28] - 8002b76: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 8002b7a: 60fb str r3, [r7, #12] - 8002b7c: 68fb ldr r3, [r7, #12] - /* USER CODE BEGIN USB_MspInit 1 */ - - /* USER CODE END USB_MspInit 1 */ - } - -} - 8002b7e: bf00 nop - 8002b80: 3714 adds r7, #20 - 8002b82: 46bd mov sp, r7 - 8002b84: bc80 pop {r7} - 8002b86: 4770 bx lr - 8002b88: 40005c00 .word 0x40005c00 - 8002b8c: 40021000 .word 0x40021000 - -08002b90 : -/******************************************************************************/ -/** - * @brief This function handles Non maskable interrupt. - */ -void NMI_Handler(void) -{ - 8002b90: b480 push {r7} - 8002b92: af00 add r7, sp, #0 - /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ - - /* USER CODE END NonMaskableInt_IRQn 0 */ - /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ - while (1) - 8002b94: e7fe b.n 8002b94 - -08002b96 : - -/** - * @brief This function handles Hard fault interrupt. - */ -void HardFault_Handler(void) -{ - 8002b96: b480 push {r7} - 8002b98: af00 add r7, sp, #0 - /* USER CODE BEGIN HardFault_IRQn 0 */ - - /* USER CODE END HardFault_IRQn 0 */ - while (1) - 8002b9a: e7fe b.n 8002b9a - -08002b9c : - -/** - * @brief This function handles Memory management fault. - */ -void MemManage_Handler(void) -{ - 8002b9c: b480 push {r7} - 8002b9e: af00 add r7, sp, #0 - /* USER CODE BEGIN MemoryManagement_IRQn 0 */ - - /* USER CODE END MemoryManagement_IRQn 0 */ - while (1) - 8002ba0: e7fe b.n 8002ba0 - -08002ba2 : - -/** - * @brief This function handles Prefetch fault, memory access fault. - */ -void BusFault_Handler(void) -{ - 8002ba2: b480 push {r7} - 8002ba4: af00 add r7, sp, #0 - /* USER CODE BEGIN BusFault_IRQn 0 */ - - /* USER CODE END BusFault_IRQn 0 */ - while (1) - 8002ba6: e7fe b.n 8002ba6 - -08002ba8 : - -/** - * @brief This function handles Undefined instruction or illegal state. - */ -void UsageFault_Handler(void) -{ - 8002ba8: b480 push {r7} - 8002baa: af00 add r7, sp, #0 - /* USER CODE BEGIN UsageFault_IRQn 0 */ - - /* USER CODE END UsageFault_IRQn 0 */ - while (1) - 8002bac: e7fe b.n 8002bac - -08002bae : - -/** - * @brief This function handles System service call via SWI instruction. - */ -void SVC_Handler(void) -{ - 8002bae: b480 push {r7} - 8002bb0: af00 add r7, sp, #0 - - /* USER CODE END SVCall_IRQn 0 */ - /* USER CODE BEGIN SVCall_IRQn 1 */ - - /* USER CODE END SVCall_IRQn 1 */ -} - 8002bb2: bf00 nop - 8002bb4: 46bd mov sp, r7 - 8002bb6: bc80 pop {r7} - 8002bb8: 4770 bx lr - -08002bba : - -/** - * @brief This function handles Debug monitor. - */ -void DebugMon_Handler(void) -{ - 8002bba: b480 push {r7} - 8002bbc: af00 add r7, sp, #0 - - /* USER CODE END DebugMonitor_IRQn 0 */ - /* USER CODE BEGIN DebugMonitor_IRQn 1 */ - - /* USER CODE END DebugMonitor_IRQn 1 */ -} - 8002bbe: bf00 nop - 8002bc0: 46bd mov sp, r7 - 8002bc2: bc80 pop {r7} - 8002bc4: 4770 bx lr - -08002bc6 : - -/** - * @brief This function handles Pendable request for system service. - */ -void PendSV_Handler(void) -{ - 8002bc6: b480 push {r7} - 8002bc8: af00 add r7, sp, #0 - - /* USER CODE END PendSV_IRQn 0 */ - /* USER CODE BEGIN PendSV_IRQn 1 */ - - /* USER CODE END PendSV_IRQn 1 */ -} - 8002bca: bf00 nop - 8002bcc: 46bd mov sp, r7 - 8002bce: bc80 pop {r7} - 8002bd0: 4770 bx lr - -08002bd2 : - -/** - * @brief This function handles System tick timer. - */ -void SysTick_Handler(void) -{ - 8002bd2: b580 push {r7, lr} - 8002bd4: af00 add r7, sp, #0 - /* USER CODE BEGIN SysTick_IRQn 0 */ - - /* USER CODE END SysTick_IRQn 0 */ - HAL_IncTick(); - 8002bd6: f000 f95d bl 8002e94 - /* USER CODE BEGIN SysTick_IRQn 1 */ - - /* USER CODE END SysTick_IRQn 1 */ -} - 8002bda: bf00 nop - 8002bdc: bd80 pop {r7, pc} - ... - -08002be0 : - -/** - * @brief This function handles DMA1 channel7 global interrupt. - */ -void DMA1_Channel7_IRQHandler(void) -{ - 8002be0: b580 push {r7, lr} - 8002be2: af00 add r7, sp, #0 - /* USER CODE BEGIN DMA1_Channel7_IRQn 0 */ - - /* USER CODE END DMA1_Channel7_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart2_tx); - 8002be4: 4802 ldr r0, [pc, #8] ; (8002bf0 ) - 8002be6: f000 fc0d bl 8003404 - /* USER CODE BEGIN DMA1_Channel7_IRQn 1 */ - - /* USER CODE END DMA1_Channel7_IRQn 1 */ -} - 8002bea: bf00 nop - 8002bec: bd80 pop {r7, pc} - 8002bee: bf00 nop - 8002bf0: 20001000 .word 0x20001000 - -08002bf4 : - -/** - * @brief This function handles TIM4 global interrupt. - */ -void TIM4_IRQHandler(void) -{ - 8002bf4: b580 push {r7, lr} - 8002bf6: af00 add r7, sp, #0 - /* USER CODE BEGIN TIM4_IRQn 0 */ - - /* USER CODE END TIM4_IRQn 0 */ - HAL_TIM_IRQHandler(&htim4); - 8002bf8: 4802 ldr r0, [pc, #8] ; (8002c04 ) - 8002bfa: f001 ff73 bl 8004ae4 - /* USER CODE BEGIN TIM4_IRQn 1 */ - - /* USER CODE END TIM4_IRQn 1 */ -} - 8002bfe: bf00 nop - 8002c00: bd80 pop {r7, pc} - 8002c02: bf00 nop - 8002c04: 20000f30 .word 0x20000f30 - -08002c08 : - -/** - * @brief This function handles USART1 global interrupt. - */ -void USART1_IRQHandler(void) -{ - 8002c08: b580 push {r7, lr} - 8002c0a: af00 add r7, sp, #0 - /* USER CODE BEGIN USART1_IRQn 0 */ - - /* USER CODE END USART1_IRQn 0 */ - HAL_UART_IRQHandler(&huart1); - 8002c0c: 4802 ldr r0, [pc, #8] ; (8002c18 ) - 8002c0e: f002 fe77 bl 8005900 - /* USER CODE BEGIN USART1_IRQn 1 */ - - /* USER CODE END USART1_IRQn 1 */ -} - 8002c12: bf00 nop - 8002c14: bd80 pop {r7, pc} - 8002c16: bf00 nop - 8002c18: 20000f78 .word 0x20000f78 - -08002c1c : - -/** - * @brief This function handles USART2 global interrupt. - */ -void USART2_IRQHandler(void) -{ - 8002c1c: b580 push {r7, lr} - 8002c1e: af00 add r7, sp, #0 - /* USER CODE BEGIN USART2_IRQn 0 */ - - /* USER CODE END USART2_IRQn 0 */ - HAL_UART_IRQHandler(&huart2); - 8002c20: 4802 ldr r0, [pc, #8] ; (8002c2c ) - 8002c22: f002 fe6d bl 8005900 - /* USER CODE BEGIN USART2_IRQn 1 */ - - /* USER CODE END USART2_IRQn 1 */ -} - 8002c26: bf00 nop - 8002c28: bd80 pop {r7, pc} - 8002c2a: bf00 nop - 8002c2c: 20000fbc .word 0x20000fbc - -08002c30 <_getpid>: -void initialise_monitor_handles() -{ -} - -int _getpid(void) -{ - 8002c30: b480 push {r7} - 8002c32: af00 add r7, sp, #0 - return 1; - 8002c34: 2301 movs r3, #1 -} - 8002c36: 4618 mov r0, r3 - 8002c38: 46bd mov sp, r7 - 8002c3a: bc80 pop {r7} - 8002c3c: 4770 bx lr - -08002c3e <_kill>: - -int _kill(int pid, int sig) -{ - 8002c3e: b580 push {r7, lr} - 8002c40: b082 sub sp, #8 - 8002c42: af00 add r7, sp, #0 - 8002c44: 6078 str r0, [r7, #4] - 8002c46: 6039 str r1, [r7, #0] - (void)pid; - (void)sig; - errno = EINVAL; - 8002c48: f003 fb70 bl 800632c <__errno> - 8002c4c: 4603 mov r3, r0 - 8002c4e: 2216 movs r2, #22 - 8002c50: 601a str r2, [r3, #0] - return -1; - 8002c52: f04f 33ff mov.w r3, #4294967295 -} - 8002c56: 4618 mov r0, r3 - 8002c58: 3708 adds r7, #8 - 8002c5a: 46bd mov sp, r7 - 8002c5c: bd80 pop {r7, pc} - -08002c5e <_exit>: - -void _exit (int status) -{ - 8002c5e: b580 push {r7, lr} - 8002c60: b082 sub sp, #8 - 8002c62: af00 add r7, sp, #0 - 8002c64: 6078 str r0, [r7, #4] - _kill(status, -1); - 8002c66: f04f 31ff mov.w r1, #4294967295 - 8002c6a: 6878 ldr r0, [r7, #4] - 8002c6c: f7ff ffe7 bl 8002c3e <_kill> - while (1) {} /* Make sure we hang here */ - 8002c70: e7fe b.n 8002c70 <_exit+0x12> - -08002c72 <_read>: -} - -__attribute__((weak)) int _read(int file, char *ptr, int len) -{ - 8002c72: b580 push {r7, lr} - 8002c74: b086 sub sp, #24 - 8002c76: af00 add r7, sp, #0 - 8002c78: 60f8 str r0, [r7, #12] - 8002c7a: 60b9 str r1, [r7, #8] - 8002c7c: 607a str r2, [r7, #4] - (void)file; - int DataIdx; - - for (DataIdx = 0; DataIdx < len; DataIdx++) - 8002c7e: 2300 movs r3, #0 - 8002c80: 617b str r3, [r7, #20] - 8002c82: e00a b.n 8002c9a <_read+0x28> - { - *ptr++ = __io_getchar(); - 8002c84: f3af 8000 nop.w - 8002c88: 4601 mov r1, r0 - 8002c8a: 68bb ldr r3, [r7, #8] - 8002c8c: 1c5a adds r2, r3, #1 - 8002c8e: 60ba str r2, [r7, #8] - 8002c90: b2ca uxtb r2, r1 - 8002c92: 701a strb r2, [r3, #0] - for (DataIdx = 0; DataIdx < len; DataIdx++) - 8002c94: 697b ldr r3, [r7, #20] - 8002c96: 3301 adds r3, #1 - 8002c98: 617b str r3, [r7, #20] - 8002c9a: 697a ldr r2, [r7, #20] - 8002c9c: 687b ldr r3, [r7, #4] - 8002c9e: 429a cmp r2, r3 - 8002ca0: dbf0 blt.n 8002c84 <_read+0x12> - } - - return len; - 8002ca2: 687b ldr r3, [r7, #4] -} - 8002ca4: 4618 mov r0, r3 - 8002ca6: 3718 adds r7, #24 - 8002ca8: 46bd mov sp, r7 - 8002caa: bd80 pop {r7, pc} - -08002cac <_write>: - -__attribute__((weak)) int _write(int file, char *ptr, int len) -{ - 8002cac: b580 push {r7, lr} - 8002cae: b086 sub sp, #24 - 8002cb0: af00 add r7, sp, #0 - 8002cb2: 60f8 str r0, [r7, #12] - 8002cb4: 60b9 str r1, [r7, #8] - 8002cb6: 607a str r2, [r7, #4] - (void)file; - int DataIdx; - - for (DataIdx = 0; DataIdx < len; DataIdx++) - 8002cb8: 2300 movs r3, #0 - 8002cba: 617b str r3, [r7, #20] - 8002cbc: e009 b.n 8002cd2 <_write+0x26> - { - __io_putchar(*ptr++); - 8002cbe: 68bb ldr r3, [r7, #8] - 8002cc0: 1c5a adds r2, r3, #1 - 8002cc2: 60ba str r2, [r7, #8] - 8002cc4: 781b ldrb r3, [r3, #0] - 8002cc6: 4618 mov r0, r3 - 8002cc8: f3af 8000 nop.w - for (DataIdx = 0; DataIdx < len; DataIdx++) - 8002ccc: 697b ldr r3, [r7, #20] - 8002cce: 3301 adds r3, #1 - 8002cd0: 617b str r3, [r7, #20] - 8002cd2: 697a ldr r2, [r7, #20] - 8002cd4: 687b ldr r3, [r7, #4] - 8002cd6: 429a cmp r2, r3 - 8002cd8: dbf1 blt.n 8002cbe <_write+0x12> - } - return len; - 8002cda: 687b ldr r3, [r7, #4] -} - 8002cdc: 4618 mov r0, r3 - 8002cde: 3718 adds r7, #24 - 8002ce0: 46bd mov sp, r7 - 8002ce2: bd80 pop {r7, pc} - -08002ce4 <_close>: - -int _close(int file) -{ - 8002ce4: b480 push {r7} - 8002ce6: b083 sub sp, #12 - 8002ce8: af00 add r7, sp, #0 - 8002cea: 6078 str r0, [r7, #4] - (void)file; - return -1; - 8002cec: f04f 33ff mov.w r3, #4294967295 -} - 8002cf0: 4618 mov r0, r3 - 8002cf2: 370c adds r7, #12 - 8002cf4: 46bd mov sp, r7 - 8002cf6: bc80 pop {r7} - 8002cf8: 4770 bx lr - -08002cfa <_fstat>: - - -int _fstat(int file, struct stat *st) -{ - 8002cfa: b480 push {r7} - 8002cfc: b083 sub sp, #12 - 8002cfe: af00 add r7, sp, #0 - 8002d00: 6078 str r0, [r7, #4] - 8002d02: 6039 str r1, [r7, #0] - (void)file; - st->st_mode = S_IFCHR; - 8002d04: 683b ldr r3, [r7, #0] - 8002d06: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8002d0a: 605a str r2, [r3, #4] - return 0; - 8002d0c: 2300 movs r3, #0 -} - 8002d0e: 4618 mov r0, r3 - 8002d10: 370c adds r7, #12 - 8002d12: 46bd mov sp, r7 - 8002d14: bc80 pop {r7} - 8002d16: 4770 bx lr - -08002d18 <_isatty>: - -int _isatty(int file) -{ - 8002d18: b480 push {r7} - 8002d1a: b083 sub sp, #12 - 8002d1c: af00 add r7, sp, #0 - 8002d1e: 6078 str r0, [r7, #4] - (void)file; - return 1; - 8002d20: 2301 movs r3, #1 -} - 8002d22: 4618 mov r0, r3 - 8002d24: 370c adds r7, #12 - 8002d26: 46bd mov sp, r7 - 8002d28: bc80 pop {r7} - 8002d2a: 4770 bx lr - -08002d2c <_lseek>: - -int _lseek(int file, int ptr, int dir) -{ - 8002d2c: b480 push {r7} - 8002d2e: b085 sub sp, #20 - 8002d30: af00 add r7, sp, #0 - 8002d32: 60f8 str r0, [r7, #12] - 8002d34: 60b9 str r1, [r7, #8] - 8002d36: 607a str r2, [r7, #4] - (void)file; - (void)ptr; - (void)dir; - return 0; - 8002d38: 2300 movs r3, #0 -} - 8002d3a: 4618 mov r0, r3 - 8002d3c: 3714 adds r7, #20 - 8002d3e: 46bd mov sp, r7 - 8002d40: bc80 pop {r7} - 8002d42: 4770 bx lr - -08002d44 <_sbrk>: - * - * @param incr Memory size - * @return Pointer to allocated memory - */ -void *_sbrk(ptrdiff_t incr) -{ - 8002d44: b580 push {r7, lr} - 8002d46: b086 sub sp, #24 - 8002d48: af00 add r7, sp, #0 - 8002d4a: 6078 str r0, [r7, #4] - extern uint8_t _end; /* Symbol defined in the linker script */ - extern uint8_t _estack; /* Symbol defined in the linker script */ - extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ - const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; - 8002d4c: 4a14 ldr r2, [pc, #80] ; (8002da0 <_sbrk+0x5c>) - 8002d4e: 4b15 ldr r3, [pc, #84] ; (8002da4 <_sbrk+0x60>) - 8002d50: 1ad3 subs r3, r2, r3 - 8002d52: 617b str r3, [r7, #20] - const uint8_t *max_heap = (uint8_t *)stack_limit; - 8002d54: 697b ldr r3, [r7, #20] - 8002d56: 613b str r3, [r7, #16] - uint8_t *prev_heap_end; - - /* Initialize heap end at first call */ - if (NULL == __sbrk_heap_end) - 8002d58: 4b13 ldr r3, [pc, #76] ; (8002da8 <_sbrk+0x64>) - 8002d5a: 681b ldr r3, [r3, #0] - 8002d5c: 2b00 cmp r3, #0 - 8002d5e: d102 bne.n 8002d66 <_sbrk+0x22> - { - __sbrk_heap_end = &_end; - 8002d60: 4b11 ldr r3, [pc, #68] ; (8002da8 <_sbrk+0x64>) - 8002d62: 4a12 ldr r2, [pc, #72] ; (8002dac <_sbrk+0x68>) - 8002d64: 601a str r2, [r3, #0] - } - - /* Protect heap from growing into the reserved MSP stack */ - if (__sbrk_heap_end + incr > max_heap) - 8002d66: 4b10 ldr r3, [pc, #64] ; (8002da8 <_sbrk+0x64>) - 8002d68: 681a ldr r2, [r3, #0] - 8002d6a: 687b ldr r3, [r7, #4] - 8002d6c: 4413 add r3, r2 - 8002d6e: 693a ldr r2, [r7, #16] - 8002d70: 429a cmp r2, r3 - 8002d72: d207 bcs.n 8002d84 <_sbrk+0x40> - { - errno = ENOMEM; - 8002d74: f003 fada bl 800632c <__errno> - 8002d78: 4603 mov r3, r0 - 8002d7a: 220c movs r2, #12 - 8002d7c: 601a str r2, [r3, #0] - return (void *)-1; - 8002d7e: f04f 33ff mov.w r3, #4294967295 - 8002d82: e009 b.n 8002d98 <_sbrk+0x54> - } - - prev_heap_end = __sbrk_heap_end; - 8002d84: 4b08 ldr r3, [pc, #32] ; (8002da8 <_sbrk+0x64>) - 8002d86: 681b ldr r3, [r3, #0] - 8002d88: 60fb str r3, [r7, #12] - __sbrk_heap_end += incr; - 8002d8a: 4b07 ldr r3, [pc, #28] ; (8002da8 <_sbrk+0x64>) - 8002d8c: 681a ldr r2, [r3, #0] - 8002d8e: 687b ldr r3, [r7, #4] - 8002d90: 4413 add r3, r2 - 8002d92: 4a05 ldr r2, [pc, #20] ; (8002da8 <_sbrk+0x64>) - 8002d94: 6013 str r3, [r2, #0] - - return (void *)prev_heap_end; - 8002d96: 68fb ldr r3, [r7, #12] -} - 8002d98: 4618 mov r0, r3 - 8002d9a: 3718 adds r7, #24 - 8002d9c: 46bd mov sp, r7 - 8002d9e: bd80 pop {r7, pc} - 8002da0: 20005000 .word 0x20005000 - 8002da4: 00000400 .word 0x00000400 - 8002da8: 20001330 .word 0x20001330 - 8002dac: 20001378 .word 0x20001378 - -08002db0 : - * @note This function should be used only after reset. - * @param None - * @retval None - */ -void SystemInit (void) -{ - 8002db0: b480 push {r7} - 8002db2: af00 add r7, sp, #0 - - /* Configure the Vector Table location -------------------------------------*/ -#if defined(USER_VECT_TAB_ADDRESS) - SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ -#endif /* USER_VECT_TAB_ADDRESS */ -} - 8002db4: bf00 nop - 8002db6: 46bd mov sp, r7 - 8002db8: bc80 pop {r7} - 8002dba: 4770 bx lr - -08002dbc : - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - ldr r0, =_sdata - 8002dbc: 480c ldr r0, [pc, #48] ; (8002df0 ) - ldr r1, =_edata - 8002dbe: 490d ldr r1, [pc, #52] ; (8002df4 ) - ldr r2, =_sidata - 8002dc0: 4a0d ldr r2, [pc, #52] ; (8002df8 ) - movs r3, #0 - 8002dc2: 2300 movs r3, #0 - b LoopCopyDataInit - 8002dc4: e002 b.n 8002dcc - -08002dc6 : - -CopyDataInit: - ldr r4, [r2, r3] - 8002dc6: 58d4 ldr r4, [r2, r3] - str r4, [r0, r3] - 8002dc8: 50c4 str r4, [r0, r3] - adds r3, r3, #4 - 8002dca: 3304 adds r3, #4 - -08002dcc : - -LoopCopyDataInit: - adds r4, r0, r3 - 8002dcc: 18c4 adds r4, r0, r3 - cmp r4, r1 - 8002dce: 428c cmp r4, r1 - bcc CopyDataInit - 8002dd0: d3f9 bcc.n 8002dc6 - -/* Zero fill the bss segment. */ - ldr r2, =_sbss - 8002dd2: 4a0a ldr r2, [pc, #40] ; (8002dfc ) - ldr r4, =_ebss - 8002dd4: 4c0a ldr r4, [pc, #40] ; (8002e00 ) - movs r3, #0 - 8002dd6: 2300 movs r3, #0 - b LoopFillZerobss - 8002dd8: e001 b.n 8002dde - -08002dda : - -FillZerobss: - str r3, [r2] - 8002dda: 6013 str r3, [r2, #0] - adds r2, r2, #4 - 8002ddc: 3204 adds r2, #4 - -08002dde : - -LoopFillZerobss: - cmp r2, r4 - 8002dde: 42a2 cmp r2, r4 - bcc FillZerobss - 8002de0: d3fb bcc.n 8002dda - -/* Call the clock system intitialization function.*/ - bl SystemInit - 8002de2: f7ff ffe5 bl 8002db0 -/* Call static constructors */ - bl __libc_init_array - 8002de6: f003 faa7 bl 8006338 <__libc_init_array> -/* Call the application's entry point.*/ - bl main - 8002dea: f7ff f998 bl 800211e
- bx lr - 8002dee: 4770 bx lr - ldr r0, =_sdata - 8002df0: 20000000 .word 0x20000000 - ldr r1, =_edata - 8002df4: 200009c8 .word 0x200009c8 - ldr r2, =_sidata - 8002df8: 0800b490 .word 0x0800b490 - ldr r2, =_sbss - 8002dfc: 200009c8 .word 0x200009c8 - ldr r4, =_ebss - 8002e00: 20001378 .word 0x20001378 - -08002e04 : - * @retval : None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - 8002e04: e7fe b.n 8002e04 - ... - -08002e08 : - * need to ensure that the SysTick time base is always set to 1 millisecond - * to have correct HAL operation. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_Init(void) -{ - 8002e08: b580 push {r7, lr} - 8002e0a: af00 add r7, sp, #0 - defined(STM32F102x6) || defined(STM32F102xB) || \ - defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ - defined(STM32F105xC) || defined(STM32F107xC) - - /* Prefetch buffer is not available on value line devices */ - __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 8002e0c: 4b08 ldr r3, [pc, #32] ; (8002e30 ) - 8002e0e: 681b ldr r3, [r3, #0] - 8002e10: 4a07 ldr r2, [pc, #28] ; (8002e30 ) - 8002e12: f043 0310 orr.w r3, r3, #16 - 8002e16: 6013 str r3, [r2, #0] -#endif -#endif /* PREFETCH_ENABLE */ - - /* Set Interrupt Group Priority */ - HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 8002e18: 2003 movs r0, #3 - 8002e1a: f000 f947 bl 80030ac - - /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ - HAL_InitTick(TICK_INT_PRIORITY); - 8002e1e: 2000 movs r0, #0 - 8002e20: f000 f808 bl 8002e34 - - /* Init the low level hardware */ - HAL_MspInit(); - 8002e24: f7ff fc92 bl 800274c - - /* Return function status */ - return HAL_OK; - 8002e28: 2300 movs r3, #0 -} - 8002e2a: 4618 mov r0, r3 - 8002e2c: bd80 pop {r7, pc} - 8002e2e: bf00 nop - 8002e30: 40022000 .word 0x40022000 - -08002e34 : - * implementation in user file. - * @param TickPriority Tick interrupt priority. - * @retval HAL status - */ -__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) -{ - 8002e34: b580 push {r7, lr} - 8002e36: b082 sub sp, #8 - 8002e38: af00 add r7, sp, #0 - 8002e3a: 6078 str r0, [r7, #4] - /* Configure the SysTick to have interrupt in 1ms time basis*/ - if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 8002e3c: 4b12 ldr r3, [pc, #72] ; (8002e88 ) - 8002e3e: 681a ldr r2, [r3, #0] - 8002e40: 4b12 ldr r3, [pc, #72] ; (8002e8c ) - 8002e42: 781b ldrb r3, [r3, #0] - 8002e44: 4619 mov r1, r3 - 8002e46: f44f 737a mov.w r3, #1000 ; 0x3e8 - 8002e4a: fbb3 f3f1 udiv r3, r3, r1 - 8002e4e: fbb2 f3f3 udiv r3, r2, r3 - 8002e52: 4618 mov r0, r3 - 8002e54: f000 f95f bl 8003116 - 8002e58: 4603 mov r3, r0 - 8002e5a: 2b00 cmp r3, #0 - 8002e5c: d001 beq.n 8002e62 - { - return HAL_ERROR; - 8002e5e: 2301 movs r3, #1 - 8002e60: e00e b.n 8002e80 - } - - /* Configure the SysTick IRQ priority */ - if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 8002e62: 687b ldr r3, [r7, #4] - 8002e64: 2b0f cmp r3, #15 - 8002e66: d80a bhi.n 8002e7e - { - HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8002e68: 2200 movs r2, #0 - 8002e6a: 6879 ldr r1, [r7, #4] - 8002e6c: f04f 30ff mov.w r0, #4294967295 - 8002e70: f000 f927 bl 80030c2 - uwTickPrio = TickPriority; - 8002e74: 4a06 ldr r2, [pc, #24] ; (8002e90 ) - 8002e76: 687b ldr r3, [r7, #4] - 8002e78: 6013 str r3, [r2, #0] - { - return HAL_ERROR; - } - - /* Return function status */ - return HAL_OK; - 8002e7a: 2300 movs r3, #0 - 8002e7c: e000 b.n 8002e80 - return HAL_ERROR; - 8002e7e: 2301 movs r3, #1 -} - 8002e80: 4618 mov r0, r3 - 8002e82: 3708 adds r7, #8 - 8002e84: 46bd mov sp, r7 - 8002e86: bd80 pop {r7, pc} - 8002e88: 20000010 .word 0x20000010 - 8002e8c: 20000018 .word 0x20000018 - 8002e90: 20000014 .word 0x20000014 - -08002e94 : - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @retval None - */ -__weak void HAL_IncTick(void) -{ - 8002e94: b480 push {r7} - 8002e96: af00 add r7, sp, #0 - uwTick += uwTickFreq; - 8002e98: 4b05 ldr r3, [pc, #20] ; (8002eb0 ) - 8002e9a: 781b ldrb r3, [r3, #0] - 8002e9c: 461a mov r2, r3 - 8002e9e: 4b05 ldr r3, [pc, #20] ; (8002eb4 ) - 8002ea0: 681b ldr r3, [r3, #0] - 8002ea2: 4413 add r3, r2 - 8002ea4: 4a03 ldr r2, [pc, #12] ; (8002eb4 ) - 8002ea6: 6013 str r3, [r2, #0] -} - 8002ea8: bf00 nop - 8002eaa: 46bd mov sp, r7 - 8002eac: bc80 pop {r7} - 8002eae: 4770 bx lr - 8002eb0: 20000018 .word 0x20000018 - 8002eb4: 20001334 .word 0x20001334 - -08002eb8 : - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @retval tick value - */ -__weak uint32_t HAL_GetTick(void) -{ - 8002eb8: b480 push {r7} - 8002eba: af00 add r7, sp, #0 - return uwTick; - 8002ebc: 4b02 ldr r3, [pc, #8] ; (8002ec8 ) - 8002ebe: 681b ldr r3, [r3, #0] -} - 8002ec0: 4618 mov r0, r3 - 8002ec2: 46bd mov sp, r7 - 8002ec4: bc80 pop {r7} - 8002ec6: 4770 bx lr - 8002ec8: 20001334 .word 0x20001334 - -08002ecc : - * implementations in user file. - * @param Delay specifies the delay time length, in milliseconds. - * @retval None - */ -__weak void HAL_Delay(uint32_t Delay) -{ - 8002ecc: b580 push {r7, lr} - 8002ece: b084 sub sp, #16 - 8002ed0: af00 add r7, sp, #0 - 8002ed2: 6078 str r0, [r7, #4] - uint32_t tickstart = HAL_GetTick(); - 8002ed4: f7ff fff0 bl 8002eb8 - 8002ed8: 60b8 str r0, [r7, #8] - uint32_t wait = Delay; - 8002eda: 687b ldr r3, [r7, #4] - 8002edc: 60fb str r3, [r7, #12] - - /* Add a freq to guarantee minimum wait */ - if (wait < HAL_MAX_DELAY) - 8002ede: 68fb ldr r3, [r7, #12] - 8002ee0: f1b3 3fff cmp.w r3, #4294967295 - 8002ee4: d005 beq.n 8002ef2 - { - wait += (uint32_t)(uwTickFreq); - 8002ee6: 4b0a ldr r3, [pc, #40] ; (8002f10 ) - 8002ee8: 781b ldrb r3, [r3, #0] - 8002eea: 461a mov r2, r3 - 8002eec: 68fb ldr r3, [r7, #12] - 8002eee: 4413 add r3, r2 - 8002ef0: 60fb str r3, [r7, #12] - } - - while ((HAL_GetTick() - tickstart) < wait) - 8002ef2: bf00 nop - 8002ef4: f7ff ffe0 bl 8002eb8 - 8002ef8: 4602 mov r2, r0 - 8002efa: 68bb ldr r3, [r7, #8] - 8002efc: 1ad3 subs r3, r2, r3 - 8002efe: 68fa ldr r2, [r7, #12] - 8002f00: 429a cmp r2, r3 - 8002f02: d8f7 bhi.n 8002ef4 - { - } -} - 8002f04: bf00 nop - 8002f06: bf00 nop - 8002f08: 3710 adds r7, #16 - 8002f0a: 46bd mov sp, r7 - 8002f0c: bd80 pop {r7, pc} - 8002f0e: bf00 nop - 8002f10: 20000018 .word 0x20000018 - -08002f14 <__NVIC_SetPriorityGrouping>: - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - 8002f14: b480 push {r7} - 8002f16: b085 sub sp, #20 - 8002f18: af00 add r7, sp, #0 - 8002f1a: 6078 str r0, [r7, #4] - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8002f1c: 687b ldr r3, [r7, #4] - 8002f1e: f003 0307 and.w r3, r3, #7 - 8002f22: 60fb str r3, [r7, #12] - - reg_value = SCB->AIRCR; /* read old register configuration */ - 8002f24: 4b0c ldr r3, [pc, #48] ; (8002f58 <__NVIC_SetPriorityGrouping+0x44>) - 8002f26: 68db ldr r3, [r3, #12] - 8002f28: 60bb str r3, [r7, #8] - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 8002f2a: 68ba ldr r2, [r7, #8] - 8002f2c: f64f 03ff movw r3, #63743 ; 0xf8ff - 8002f30: 4013 ands r3, r2 - 8002f32: 60bb str r3, [r7, #8] - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 8002f34: 68fb ldr r3, [r7, #12] - 8002f36: 021a lsls r2, r3, #8 - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 8002f38: 68bb ldr r3, [r7, #8] - 8002f3a: 4313 orrs r3, r2 - reg_value = (reg_value | - 8002f3c: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 - 8002f40: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8002f44: 60bb str r3, [r7, #8] - SCB->AIRCR = reg_value; - 8002f46: 4a04 ldr r2, [pc, #16] ; (8002f58 <__NVIC_SetPriorityGrouping+0x44>) - 8002f48: 68bb ldr r3, [r7, #8] - 8002f4a: 60d3 str r3, [r2, #12] -} - 8002f4c: bf00 nop - 8002f4e: 3714 adds r7, #20 - 8002f50: 46bd mov sp, r7 - 8002f52: bc80 pop {r7} - 8002f54: 4770 bx lr - 8002f56: bf00 nop - 8002f58: e000ed00 .word 0xe000ed00 - -08002f5c <__NVIC_GetPriorityGrouping>: - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - 8002f5c: b480 push {r7} - 8002f5e: af00 add r7, sp, #0 - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8002f60: 4b04 ldr r3, [pc, #16] ; (8002f74 <__NVIC_GetPriorityGrouping+0x18>) - 8002f62: 68db ldr r3, [r3, #12] - 8002f64: 0a1b lsrs r3, r3, #8 - 8002f66: f003 0307 and.w r3, r3, #7 -} - 8002f6a: 4618 mov r0, r3 - 8002f6c: 46bd mov sp, r7 - 8002f6e: bc80 pop {r7} - 8002f70: 4770 bx lr - 8002f72: bf00 nop - 8002f74: e000ed00 .word 0xe000ed00 - -08002f78 <__NVIC_EnableIRQ>: - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - 8002f78: b480 push {r7} - 8002f7a: b083 sub sp, #12 - 8002f7c: af00 add r7, sp, #0 - 8002f7e: 4603 mov r3, r0 - 8002f80: 71fb strb r3, [r7, #7] - if ((int32_t)(IRQn) >= 0) - 8002f82: f997 3007 ldrsb.w r3, [r7, #7] - 8002f86: 2b00 cmp r3, #0 - 8002f88: db0b blt.n 8002fa2 <__NVIC_EnableIRQ+0x2a> - { - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8002f8a: 79fb ldrb r3, [r7, #7] - 8002f8c: f003 021f and.w r2, r3, #31 - 8002f90: 4906 ldr r1, [pc, #24] ; (8002fac <__NVIC_EnableIRQ+0x34>) - 8002f92: f997 3007 ldrsb.w r3, [r7, #7] - 8002f96: 095b lsrs r3, r3, #5 - 8002f98: 2001 movs r0, #1 - 8002f9a: fa00 f202 lsl.w r2, r0, r2 - 8002f9e: f841 2023 str.w r2, [r1, r3, lsl #2] - } -} - 8002fa2: bf00 nop - 8002fa4: 370c adds r7, #12 - 8002fa6: 46bd mov sp, r7 - 8002fa8: bc80 pop {r7} - 8002faa: 4770 bx lr - 8002fac: e000e100 .word 0xe000e100 - -08002fb0 <__NVIC_SetPriority>: - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - 8002fb0: b480 push {r7} - 8002fb2: b083 sub sp, #12 - 8002fb4: af00 add r7, sp, #0 - 8002fb6: 4603 mov r3, r0 - 8002fb8: 6039 str r1, [r7, #0] - 8002fba: 71fb strb r3, [r7, #7] - if ((int32_t)(IRQn) >= 0) - 8002fbc: f997 3007 ldrsb.w r3, [r7, #7] - 8002fc0: 2b00 cmp r3, #0 - 8002fc2: db0a blt.n 8002fda <__NVIC_SetPriority+0x2a> - { - NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8002fc4: 683b ldr r3, [r7, #0] - 8002fc6: b2da uxtb r2, r3 - 8002fc8: 490c ldr r1, [pc, #48] ; (8002ffc <__NVIC_SetPriority+0x4c>) - 8002fca: f997 3007 ldrsb.w r3, [r7, #7] - 8002fce: 0112 lsls r2, r2, #4 - 8002fd0: b2d2 uxtb r2, r2 - 8002fd2: 440b add r3, r1 - 8002fd4: f883 2300 strb.w r2, [r3, #768] ; 0x300 - } - else - { - SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - 8002fd8: e00a b.n 8002ff0 <__NVIC_SetPriority+0x40> - SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8002fda: 683b ldr r3, [r7, #0] - 8002fdc: b2da uxtb r2, r3 - 8002fde: 4908 ldr r1, [pc, #32] ; (8003000 <__NVIC_SetPriority+0x50>) - 8002fe0: 79fb ldrb r3, [r7, #7] - 8002fe2: f003 030f and.w r3, r3, #15 - 8002fe6: 3b04 subs r3, #4 - 8002fe8: 0112 lsls r2, r2, #4 - 8002fea: b2d2 uxtb r2, r2 - 8002fec: 440b add r3, r1 - 8002fee: 761a strb r2, [r3, #24] -} - 8002ff0: bf00 nop - 8002ff2: 370c adds r7, #12 - 8002ff4: 46bd mov sp, r7 - 8002ff6: bc80 pop {r7} - 8002ff8: 4770 bx lr - 8002ffa: bf00 nop - 8002ffc: e000e100 .word 0xe000e100 - 8003000: e000ed00 .word 0xe000ed00 - -08003004 : - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - 8003004: b480 push {r7} - 8003006: b089 sub sp, #36 ; 0x24 - 8003008: af00 add r7, sp, #0 - 800300a: 60f8 str r0, [r7, #12] - 800300c: 60b9 str r1, [r7, #8] - 800300e: 607a str r2, [r7, #4] - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8003010: 68fb ldr r3, [r7, #12] - 8003012: f003 0307 and.w r3, r3, #7 - 8003016: 61fb str r3, [r7, #28] - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 8003018: 69fb ldr r3, [r7, #28] - 800301a: f1c3 0307 rsb r3, r3, #7 - 800301e: 2b04 cmp r3, #4 - 8003020: bf28 it cs - 8003022: 2304 movcs r3, #4 - 8003024: 61bb str r3, [r7, #24] - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 8003026: 69fb ldr r3, [r7, #28] - 8003028: 3304 adds r3, #4 - 800302a: 2b06 cmp r3, #6 - 800302c: d902 bls.n 8003034 - 800302e: 69fb ldr r3, [r7, #28] - 8003030: 3b03 subs r3, #3 - 8003032: e000 b.n 8003036 - 8003034: 2300 movs r3, #0 - 8003036: 617b str r3, [r7, #20] - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8003038: f04f 32ff mov.w r2, #4294967295 - 800303c: 69bb ldr r3, [r7, #24] - 800303e: fa02 f303 lsl.w r3, r2, r3 - 8003042: 43da mvns r2, r3 - 8003044: 68bb ldr r3, [r7, #8] - 8003046: 401a ands r2, r3 - 8003048: 697b ldr r3, [r7, #20] - 800304a: 409a lsls r2, r3 - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 800304c: f04f 31ff mov.w r1, #4294967295 - 8003050: 697b ldr r3, [r7, #20] - 8003052: fa01 f303 lsl.w r3, r1, r3 - 8003056: 43d9 mvns r1, r3 - 8003058: 687b ldr r3, [r7, #4] - 800305a: 400b ands r3, r1 - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 800305c: 4313 orrs r3, r2 - ); -} - 800305e: 4618 mov r0, r3 - 8003060: 3724 adds r7, #36 ; 0x24 - 8003062: 46bd mov sp, r7 - 8003064: bc80 pop {r7} - 8003066: 4770 bx lr - -08003068 : - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - 8003068: b580 push {r7, lr} - 800306a: b082 sub sp, #8 - 800306c: af00 add r7, sp, #0 - 800306e: 6078 str r0, [r7, #4] - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8003070: 687b ldr r3, [r7, #4] - 8003072: 3b01 subs r3, #1 - 8003074: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 8003078: d301 bcc.n 800307e - { - return (1UL); /* Reload value impossible */ - 800307a: 2301 movs r3, #1 - 800307c: e00f b.n 800309e - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 800307e: 4a0a ldr r2, [pc, #40] ; (80030a8 ) - 8003080: 687b ldr r3, [r7, #4] - 8003082: 3b01 subs r3, #1 - 8003084: 6053 str r3, [r2, #4] - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 8003086: 210f movs r1, #15 - 8003088: f04f 30ff mov.w r0, #4294967295 - 800308c: f7ff ff90 bl 8002fb0 <__NVIC_SetPriority> - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8003090: 4b05 ldr r3, [pc, #20] ; (80030a8 ) - 8003092: 2200 movs r2, #0 - 8003094: 609a str r2, [r3, #8] - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8003096: 4b04 ldr r3, [pc, #16] ; (80030a8 ) - 8003098: 2207 movs r2, #7 - 800309a: 601a str r2, [r3, #0] - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ - 800309c: 2300 movs r3, #0 -} - 800309e: 4618 mov r0, r3 - 80030a0: 3708 adds r7, #8 - 80030a2: 46bd mov sp, r7 - 80030a4: bd80 pop {r7, pc} - 80030a6: bf00 nop - 80030a8: e000e010 .word 0xe000e010 - -080030ac : - * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. - * The pending IRQ priority will be managed only by the subpriority. - * @retval None - */ -void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - 80030ac: b580 push {r7, lr} - 80030ae: b082 sub sp, #8 - 80030b0: af00 add r7, sp, #0 - 80030b2: 6078 str r0, [r7, #4] - /* Check the parameters */ - assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); - - /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ - NVIC_SetPriorityGrouping(PriorityGroup); - 80030b4: 6878 ldr r0, [r7, #4] - 80030b6: f7ff ff2d bl 8002f14 <__NVIC_SetPriorityGrouping> -} - 80030ba: bf00 nop - 80030bc: 3708 adds r7, #8 - 80030be: 46bd mov sp, r7 - 80030c0: bd80 pop {r7, pc} - -080030c2 : - * This parameter can be a value between 0 and 15 - * A lower priority value indicates a higher priority. - * @retval None - */ -void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) -{ - 80030c2: b580 push {r7, lr} - 80030c4: b086 sub sp, #24 - 80030c6: af00 add r7, sp, #0 - 80030c8: 4603 mov r3, r0 - 80030ca: 60b9 str r1, [r7, #8] - 80030cc: 607a str r2, [r7, #4] - 80030ce: 73fb strb r3, [r7, #15] - uint32_t prioritygroup = 0x00U; - 80030d0: 2300 movs r3, #0 - 80030d2: 617b str r3, [r7, #20] - - /* Check the parameters */ - assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); - assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); - - prioritygroup = NVIC_GetPriorityGrouping(); - 80030d4: f7ff ff42 bl 8002f5c <__NVIC_GetPriorityGrouping> - 80030d8: 6178 str r0, [r7, #20] - - NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 80030da: 687a ldr r2, [r7, #4] - 80030dc: 68b9 ldr r1, [r7, #8] - 80030de: 6978 ldr r0, [r7, #20] - 80030e0: f7ff ff90 bl 8003004 - 80030e4: 4602 mov r2, r0 - 80030e6: f997 300f ldrsb.w r3, [r7, #15] - 80030ea: 4611 mov r1, r2 - 80030ec: 4618 mov r0, r3 - 80030ee: f7ff ff5f bl 8002fb0 <__NVIC_SetPriority> -} - 80030f2: bf00 nop - 80030f4: 3718 adds r7, #24 - 80030f6: 46bd mov sp, r7 - 80030f8: bd80 pop {r7, pc} - -080030fa : - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) - * @retval None - */ -void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) -{ - 80030fa: b580 push {r7, lr} - 80030fc: b082 sub sp, #8 - 80030fe: af00 add r7, sp, #0 - 8003100: 4603 mov r3, r0 - 8003102: 71fb strb r3, [r7, #7] - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Enable interrupt */ - NVIC_EnableIRQ(IRQn); - 8003104: f997 3007 ldrsb.w r3, [r7, #7] - 8003108: 4618 mov r0, r3 - 800310a: f7ff ff35 bl 8002f78 <__NVIC_EnableIRQ> -} - 800310e: bf00 nop - 8003110: 3708 adds r7, #8 - 8003112: 46bd mov sp, r7 - 8003114: bd80 pop {r7, pc} - -08003116 : - * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. - * @retval status: - 0 Function succeeded. - * - 1 Function failed. - */ -uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) -{ - 8003116: b580 push {r7, lr} - 8003118: b082 sub sp, #8 - 800311a: af00 add r7, sp, #0 - 800311c: 6078 str r0, [r7, #4] - return SysTick_Config(TicksNumb); - 800311e: 6878 ldr r0, [r7, #4] - 8003120: f7ff ffa2 bl 8003068 - 8003124: 4603 mov r3, r0 -} - 8003126: 4618 mov r0, r3 - 8003128: 3708 adds r7, #8 - 800312a: 46bd mov sp, r7 - 800312c: bd80 pop {r7, pc} - ... - -08003130 : - * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) -{ - 8003130: b480 push {r7} - 8003132: b085 sub sp, #20 - 8003134: af00 add r7, sp, #0 - 8003136: 6078 str r0, [r7, #4] - uint32_t tmp = 0U; - 8003138: 2300 movs r3, #0 - 800313a: 60fb str r3, [r7, #12] - - /* Check the DMA handle allocation */ - if(hdma == NULL) - 800313c: 687b ldr r3, [r7, #4] - 800313e: 2b00 cmp r3, #0 - 8003140: d101 bne.n 8003146 - { - return HAL_ERROR; - 8003142: 2301 movs r3, #1 - 8003144: e043 b.n 80031ce - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; - hdma->DmaBaseAddress = DMA2; - } -#else - /* DMA1 */ - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; - 8003146: 687b ldr r3, [r7, #4] - 8003148: 681b ldr r3, [r3, #0] - 800314a: 461a mov r2, r3 - 800314c: 4b22 ldr r3, [pc, #136] ; (80031d8 ) - 800314e: 4413 add r3, r2 - 8003150: 4a22 ldr r2, [pc, #136] ; (80031dc ) - 8003152: fba2 2303 umull r2, r3, r2, r3 - 8003156: 091b lsrs r3, r3, #4 - 8003158: 009a lsls r2, r3, #2 - 800315a: 687b ldr r3, [r7, #4] - 800315c: 641a str r2, [r3, #64] ; 0x40 - hdma->DmaBaseAddress = DMA1; - 800315e: 687b ldr r3, [r7, #4] - 8003160: 4a1f ldr r2, [pc, #124] ; (80031e0 ) - 8003162: 63da str r2, [r3, #60] ; 0x3c -#endif /* DMA2 */ - - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - 8003164: 687b ldr r3, [r7, #4] - 8003166: 2202 movs r2, #2 - 8003168: f883 2021 strb.w r2, [r3, #33] ; 0x21 - - /* Get the CR register value */ - tmp = hdma->Instance->CCR; - 800316c: 687b ldr r3, [r7, #4] - 800316e: 681b ldr r3, [r3, #0] - 8003170: 681b ldr r3, [r3, #0] - 8003172: 60fb str r3, [r7, #12] - - /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */ - tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ - 8003174: 68fb ldr r3, [r7, #12] - 8003176: f423 537f bic.w r3, r3, #16320 ; 0x3fc0 - 800317a: f023 0330 bic.w r3, r3, #48 ; 0x30 - 800317e: 60fb str r3, [r7, #12] - DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ - DMA_CCR_DIR)); - - /* Prepare the DMA Channel configuration */ - tmp |= hdma->Init.Direction | - 8003180: 687b ldr r3, [r7, #4] - 8003182: 685a ldr r2, [r3, #4] - hdma->Init.PeriphInc | hdma->Init.MemInc | - 8003184: 687b ldr r3, [r7, #4] - 8003186: 689b ldr r3, [r3, #8] - tmp |= hdma->Init.Direction | - 8003188: 431a orrs r2, r3 - hdma->Init.PeriphInc | hdma->Init.MemInc | - 800318a: 687b ldr r3, [r7, #4] - 800318c: 68db ldr r3, [r3, #12] - 800318e: 431a orrs r2, r3 - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8003190: 687b ldr r3, [r7, #4] - 8003192: 691b ldr r3, [r3, #16] - hdma->Init.PeriphInc | hdma->Init.MemInc | - 8003194: 431a orrs r2, r3 - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8003196: 687b ldr r3, [r7, #4] - 8003198: 695b ldr r3, [r3, #20] - 800319a: 431a orrs r2, r3 - hdma->Init.Mode | hdma->Init.Priority; - 800319c: 687b ldr r3, [r7, #4] - 800319e: 699b ldr r3, [r3, #24] - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 80031a0: 431a orrs r2, r3 - hdma->Init.Mode | hdma->Init.Priority; - 80031a2: 687b ldr r3, [r7, #4] - 80031a4: 69db ldr r3, [r3, #28] - 80031a6: 4313 orrs r3, r2 - tmp |= hdma->Init.Direction | - 80031a8: 68fa ldr r2, [r7, #12] - 80031aa: 4313 orrs r3, r2 - 80031ac: 60fb str r3, [r7, #12] - - /* Write to DMA Channel CR register */ - hdma->Instance->CCR = tmp; - 80031ae: 687b ldr r3, [r7, #4] - 80031b0: 681b ldr r3, [r3, #0] - 80031b2: 68fa ldr r2, [r7, #12] - 80031b4: 601a str r2, [r3, #0] - - /* Initialise the error code */ - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 80031b6: 687b ldr r3, [r7, #4] - 80031b8: 2200 movs r2, #0 - 80031ba: 639a str r2, [r3, #56] ; 0x38 - - /* Initialize the DMA state*/ - hdma->State = HAL_DMA_STATE_READY; - 80031bc: 687b ldr r3, [r7, #4] - 80031be: 2201 movs r2, #1 - 80031c0: f883 2021 strb.w r2, [r3, #33] ; 0x21 - /* Allocate lock resource and initialize it */ - hdma->Lock = HAL_UNLOCKED; - 80031c4: 687b ldr r3, [r7, #4] - 80031c6: 2200 movs r2, #0 - 80031c8: f883 2020 strb.w r2, [r3, #32] - - return HAL_OK; - 80031cc: 2300 movs r3, #0 -} - 80031ce: 4618 mov r0, r3 - 80031d0: 3714 adds r7, #20 - 80031d2: 46bd mov sp, r7 - 80031d4: bc80 pop {r7} - 80031d6: 4770 bx lr - 80031d8: bffdfff8 .word 0xbffdfff8 - 80031dc: cccccccd .word 0xcccccccd - 80031e0: 40020000 .word 0x40020000 - -080031e4 : - * @param DstAddress: The destination memory Buffer address - * @param DataLength: The length of data to be transferred from source to destination - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) -{ - 80031e4: b580 push {r7, lr} - 80031e6: b086 sub sp, #24 - 80031e8: af00 add r7, sp, #0 - 80031ea: 60f8 str r0, [r7, #12] - 80031ec: 60b9 str r1, [r7, #8] - 80031ee: 607a str r2, [r7, #4] - 80031f0: 603b str r3, [r7, #0] - HAL_StatusTypeDef status = HAL_OK; - 80031f2: 2300 movs r3, #0 - 80031f4: 75fb strb r3, [r7, #23] - - /* Check the parameters */ - assert_param(IS_DMA_BUFFER_SIZE(DataLength)); - - /* Process locked */ - __HAL_LOCK(hdma); - 80031f6: 68fb ldr r3, [r7, #12] - 80031f8: f893 3020 ldrb.w r3, [r3, #32] - 80031fc: 2b01 cmp r3, #1 - 80031fe: d101 bne.n 8003204 - 8003200: 2302 movs r3, #2 - 8003202: e04a b.n 800329a - 8003204: 68fb ldr r3, [r7, #12] - 8003206: 2201 movs r2, #1 - 8003208: f883 2020 strb.w r2, [r3, #32] - - if(HAL_DMA_STATE_READY == hdma->State) - 800320c: 68fb ldr r3, [r7, #12] - 800320e: f893 3021 ldrb.w r3, [r3, #33] ; 0x21 - 8003212: 2b01 cmp r3, #1 - 8003214: d13a bne.n 800328c - { - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - 8003216: 68fb ldr r3, [r7, #12] - 8003218: 2202 movs r2, #2 - 800321a: f883 2021 strb.w r2, [r3, #33] ; 0x21 - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 800321e: 68fb ldr r3, [r7, #12] - 8003220: 2200 movs r2, #0 - 8003222: 639a str r2, [r3, #56] ; 0x38 - - /* Disable the peripheral */ - __HAL_DMA_DISABLE(hdma); - 8003224: 68fb ldr r3, [r7, #12] - 8003226: 681b ldr r3, [r3, #0] - 8003228: 681a ldr r2, [r3, #0] - 800322a: 68fb ldr r3, [r7, #12] - 800322c: 681b ldr r3, [r3, #0] - 800322e: f022 0201 bic.w r2, r2, #1 - 8003232: 601a str r2, [r3, #0] - - /* Configure the source, destination address and the data length & clear flags*/ - DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); - 8003234: 683b ldr r3, [r7, #0] - 8003236: 687a ldr r2, [r7, #4] - 8003238: 68b9 ldr r1, [r7, #8] - 800323a: 68f8 ldr r0, [r7, #12] - 800323c: f000 f9e8 bl 8003610 - - /* Enable the transfer complete interrupt */ - /* Enable the transfer Error interrupt */ - if(NULL != hdma->XferHalfCpltCallback) - 8003240: 68fb ldr r3, [r7, #12] - 8003242: 6adb ldr r3, [r3, #44] ; 0x2c - 8003244: 2b00 cmp r3, #0 - 8003246: d008 beq.n 800325a - { - /* Enable the Half transfer complete interrupt as well */ - __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8003248: 68fb ldr r3, [r7, #12] - 800324a: 681b ldr r3, [r3, #0] - 800324c: 681a ldr r2, [r3, #0] - 800324e: 68fb ldr r3, [r7, #12] - 8003250: 681b ldr r3, [r3, #0] - 8003252: f042 020e orr.w r2, r2, #14 - 8003256: 601a str r2, [r3, #0] - 8003258: e00f b.n 800327a - } - else - { - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - 800325a: 68fb ldr r3, [r7, #12] - 800325c: 681b ldr r3, [r3, #0] - 800325e: 681a ldr r2, [r3, #0] - 8003260: 68fb ldr r3, [r7, #12] - 8003262: 681b ldr r3, [r3, #0] - 8003264: f022 0204 bic.w r2, r2, #4 - 8003268: 601a str r2, [r3, #0] - __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); - 800326a: 68fb ldr r3, [r7, #12] - 800326c: 681b ldr r3, [r3, #0] - 800326e: 681a ldr r2, [r3, #0] - 8003270: 68fb ldr r3, [r7, #12] - 8003272: 681b ldr r3, [r3, #0] - 8003274: f042 020a orr.w r2, r2, #10 - 8003278: 601a str r2, [r3, #0] - } - /* Enable the Peripheral */ - __HAL_DMA_ENABLE(hdma); - 800327a: 68fb ldr r3, [r7, #12] - 800327c: 681b ldr r3, [r3, #0] - 800327e: 681a ldr r2, [r3, #0] - 8003280: 68fb ldr r3, [r7, #12] - 8003282: 681b ldr r3, [r3, #0] - 8003284: f042 0201 orr.w r2, r2, #1 - 8003288: 601a str r2, [r3, #0] - 800328a: e005 b.n 8003298 - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 800328c: 68fb ldr r3, [r7, #12] - 800328e: 2200 movs r2, #0 - 8003290: f883 2020 strb.w r2, [r3, #32] - - /* Remain BUSY */ - status = HAL_BUSY; - 8003294: 2302 movs r3, #2 - 8003296: 75fb strb r3, [r7, #23] - } - return status; - 8003298: 7dfb ldrb r3, [r7, #23] -} - 800329a: 4618 mov r0, r3 - 800329c: 3718 adds r7, #24 - 800329e: 46bd mov sp, r7 - 80032a0: bd80 pop {r7, pc} - -080032a2 : - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) -{ - 80032a2: b480 push {r7} - 80032a4: b085 sub sp, #20 - 80032a6: af00 add r7, sp, #0 - 80032a8: 6078 str r0, [r7, #4] - HAL_StatusTypeDef status = HAL_OK; - 80032aa: 2300 movs r3, #0 - 80032ac: 73fb strb r3, [r7, #15] - - if(hdma->State != HAL_DMA_STATE_BUSY) - 80032ae: 687b ldr r3, [r7, #4] - 80032b0: f893 3021 ldrb.w r3, [r3, #33] ; 0x21 - 80032b4: 2b02 cmp r3, #2 - 80032b6: d008 beq.n 80032ca - { - /* no transfer ongoing */ - hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 80032b8: 687b ldr r3, [r7, #4] - 80032ba: 2204 movs r2, #4 - 80032bc: 639a str r2, [r3, #56] ; 0x38 - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 80032be: 687b ldr r3, [r7, #4] - 80032c0: 2200 movs r2, #0 - 80032c2: f883 2020 strb.w r2, [r3, #32] - - return HAL_ERROR; - 80032c6: 2301 movs r3, #1 - 80032c8: e020 b.n 800330c - } - else - - { - /* Disable DMA IT */ - __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 80032ca: 687b ldr r3, [r7, #4] - 80032cc: 681b ldr r3, [r3, #0] - 80032ce: 681a ldr r2, [r3, #0] - 80032d0: 687b ldr r3, [r7, #4] - 80032d2: 681b ldr r3, [r3, #0] - 80032d4: f022 020e bic.w r2, r2, #14 - 80032d8: 601a str r2, [r3, #0] - - /* Disable the channel */ - __HAL_DMA_DISABLE(hdma); - 80032da: 687b ldr r3, [r7, #4] - 80032dc: 681b ldr r3, [r3, #0] - 80032de: 681a ldr r2, [r3, #0] - 80032e0: 687b ldr r3, [r7, #4] - 80032e2: 681b ldr r3, [r3, #0] - 80032e4: f022 0201 bic.w r2, r2, #1 - 80032e8: 601a str r2, [r3, #0] - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - 80032ea: 687b ldr r3, [r7, #4] - 80032ec: 6c1a ldr r2, [r3, #64] ; 0x40 - 80032ee: 687b ldr r3, [r7, #4] - 80032f0: 6bdb ldr r3, [r3, #60] ; 0x3c - 80032f2: 2101 movs r1, #1 - 80032f4: fa01 f202 lsl.w r2, r1, r2 - 80032f8: 605a str r2, [r3, #4] - } - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - 80032fa: 687b ldr r3, [r7, #4] - 80032fc: 2201 movs r2, #1 - 80032fe: f883 2021 strb.w r2, [r3, #33] ; 0x21 - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 8003302: 687b ldr r3, [r7, #4] - 8003304: 2200 movs r2, #0 - 8003306: f883 2020 strb.w r2, [r3, #32] - - return status; - 800330a: 7bfb ldrb r3, [r7, #15] -} - 800330c: 4618 mov r0, r3 - 800330e: 3714 adds r7, #20 - 8003310: 46bd mov sp, r7 - 8003312: bc80 pop {r7} - 8003314: 4770 bx lr - ... - -08003318 : - * @param hdma : pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) -{ - 8003318: b580 push {r7, lr} - 800331a: b084 sub sp, #16 - 800331c: af00 add r7, sp, #0 - 800331e: 6078 str r0, [r7, #4] - HAL_StatusTypeDef status = HAL_OK; - 8003320: 2300 movs r3, #0 - 8003322: 73fb strb r3, [r7, #15] - - if(HAL_DMA_STATE_BUSY != hdma->State) - 8003324: 687b ldr r3, [r7, #4] - 8003326: f893 3021 ldrb.w r3, [r3, #33] ; 0x21 - 800332a: 2b02 cmp r3, #2 - 800332c: d005 beq.n 800333a - { - /* no transfer ongoing */ - hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 800332e: 687b ldr r3, [r7, #4] - 8003330: 2204 movs r2, #4 - 8003332: 639a str r2, [r3, #56] ; 0x38 - - status = HAL_ERROR; - 8003334: 2301 movs r3, #1 - 8003336: 73fb strb r3, [r7, #15] - 8003338: e051 b.n 80033de - } - else - { - /* Disable DMA IT */ - __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 800333a: 687b ldr r3, [r7, #4] - 800333c: 681b ldr r3, [r3, #0] - 800333e: 681a ldr r2, [r3, #0] - 8003340: 687b ldr r3, [r7, #4] - 8003342: 681b ldr r3, [r3, #0] - 8003344: f022 020e bic.w r2, r2, #14 - 8003348: 601a str r2, [r3, #0] - - /* Disable the channel */ - __HAL_DMA_DISABLE(hdma); - 800334a: 687b ldr r3, [r7, #4] - 800334c: 681b ldr r3, [r3, #0] - 800334e: 681a ldr r2, [r3, #0] - 8003350: 687b ldr r3, [r7, #4] - 8003352: 681b ldr r3, [r3, #0] - 8003354: f022 0201 bic.w r2, r2, #1 - 8003358: 601a str r2, [r3, #0] - - /* Clear all flags */ - __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); - 800335a: 687b ldr r3, [r7, #4] - 800335c: 681b ldr r3, [r3, #0] - 800335e: 4a22 ldr r2, [pc, #136] ; (80033e8 ) - 8003360: 4293 cmp r3, r2 - 8003362: d029 beq.n 80033b8 - 8003364: 687b ldr r3, [r7, #4] - 8003366: 681b ldr r3, [r3, #0] - 8003368: 4a20 ldr r2, [pc, #128] ; (80033ec ) - 800336a: 4293 cmp r3, r2 - 800336c: d022 beq.n 80033b4 - 800336e: 687b ldr r3, [r7, #4] - 8003370: 681b ldr r3, [r3, #0] - 8003372: 4a1f ldr r2, [pc, #124] ; (80033f0 ) - 8003374: 4293 cmp r3, r2 - 8003376: d01a beq.n 80033ae - 8003378: 687b ldr r3, [r7, #4] - 800337a: 681b ldr r3, [r3, #0] - 800337c: 4a1d ldr r2, [pc, #116] ; (80033f4 ) - 800337e: 4293 cmp r3, r2 - 8003380: d012 beq.n 80033a8 - 8003382: 687b ldr r3, [r7, #4] - 8003384: 681b ldr r3, [r3, #0] - 8003386: 4a1c ldr r2, [pc, #112] ; (80033f8 ) - 8003388: 4293 cmp r3, r2 - 800338a: d00a beq.n 80033a2 - 800338c: 687b ldr r3, [r7, #4] - 800338e: 681b ldr r3, [r3, #0] - 8003390: 4a1a ldr r2, [pc, #104] ; (80033fc ) - 8003392: 4293 cmp r3, r2 - 8003394: d102 bne.n 800339c - 8003396: f44f 1380 mov.w r3, #1048576 ; 0x100000 - 800339a: e00e b.n 80033ba - 800339c: f04f 7380 mov.w r3, #16777216 ; 0x1000000 - 80033a0: e00b b.n 80033ba - 80033a2: f44f 3380 mov.w r3, #65536 ; 0x10000 - 80033a6: e008 b.n 80033ba - 80033a8: f44f 5380 mov.w r3, #4096 ; 0x1000 - 80033ac: e005 b.n 80033ba - 80033ae: f44f 7380 mov.w r3, #256 ; 0x100 - 80033b2: e002 b.n 80033ba - 80033b4: 2310 movs r3, #16 - 80033b6: e000 b.n 80033ba - 80033b8: 2301 movs r3, #1 - 80033ba: 4a11 ldr r2, [pc, #68] ; (8003400 ) - 80033bc: 6053 str r3, [r2, #4] - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - 80033be: 687b ldr r3, [r7, #4] - 80033c0: 2201 movs r2, #1 - 80033c2: f883 2021 strb.w r2, [r3, #33] ; 0x21 - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 80033c6: 687b ldr r3, [r7, #4] - 80033c8: 2200 movs r2, #0 - 80033ca: f883 2020 strb.w r2, [r3, #32] - - /* Call User Abort callback */ - if(hdma->XferAbortCallback != NULL) - 80033ce: 687b ldr r3, [r7, #4] - 80033d0: 6b5b ldr r3, [r3, #52] ; 0x34 - 80033d2: 2b00 cmp r3, #0 - 80033d4: d003 beq.n 80033de - { - hdma->XferAbortCallback(hdma); - 80033d6: 687b ldr r3, [r7, #4] - 80033d8: 6b5b ldr r3, [r3, #52] ; 0x34 - 80033da: 6878 ldr r0, [r7, #4] - 80033dc: 4798 blx r3 - } - } - return status; - 80033de: 7bfb ldrb r3, [r7, #15] -} - 80033e0: 4618 mov r0, r3 - 80033e2: 3710 adds r7, #16 - 80033e4: 46bd mov sp, r7 - 80033e6: bd80 pop {r7, pc} - 80033e8: 40020008 .word 0x40020008 - 80033ec: 4002001c .word 0x4002001c - 80033f0: 40020030 .word 0x40020030 - 80033f4: 40020044 .word 0x40020044 - 80033f8: 40020058 .word 0x40020058 - 80033fc: 4002006c .word 0x4002006c - 8003400: 40020000 .word 0x40020000 - -08003404 : - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval None - */ -void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) -{ - 8003404: b580 push {r7, lr} - 8003406: b084 sub sp, #16 - 8003408: af00 add r7, sp, #0 - 800340a: 6078 str r0, [r7, #4] - uint32_t flag_it = hdma->DmaBaseAddress->ISR; - 800340c: 687b ldr r3, [r7, #4] - 800340e: 6bdb ldr r3, [r3, #60] ; 0x3c - 8003410: 681b ldr r3, [r3, #0] - 8003412: 60fb str r3, [r7, #12] - uint32_t source_it = hdma->Instance->CCR; - 8003414: 687b ldr r3, [r7, #4] - 8003416: 681b ldr r3, [r3, #0] - 8003418: 681b ldr r3, [r3, #0] - 800341a: 60bb str r3, [r7, #8] - - /* Half Transfer Complete Interrupt management ******************************/ - if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) - 800341c: 687b ldr r3, [r7, #4] - 800341e: 6c1b ldr r3, [r3, #64] ; 0x40 - 8003420: 2204 movs r2, #4 - 8003422: 409a lsls r2, r3 - 8003424: 68fb ldr r3, [r7, #12] - 8003426: 4013 ands r3, r2 - 8003428: 2b00 cmp r3, #0 - 800342a: d04f beq.n 80034cc - 800342c: 68bb ldr r3, [r7, #8] - 800342e: f003 0304 and.w r3, r3, #4 - 8003432: 2b00 cmp r3, #0 - 8003434: d04a beq.n 80034cc - { - /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ - if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) - 8003436: 687b ldr r3, [r7, #4] - 8003438: 681b ldr r3, [r3, #0] - 800343a: 681b ldr r3, [r3, #0] - 800343c: f003 0320 and.w r3, r3, #32 - 8003440: 2b00 cmp r3, #0 - 8003442: d107 bne.n 8003454 - { - /* Disable the half transfer interrupt */ - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - 8003444: 687b ldr r3, [r7, #4] - 8003446: 681b ldr r3, [r3, #0] - 8003448: 681a ldr r2, [r3, #0] - 800344a: 687b ldr r3, [r7, #4] - 800344c: 681b ldr r3, [r3, #0] - 800344e: f022 0204 bic.w r2, r2, #4 - 8003452: 601a str r2, [r3, #0] - } - /* Clear the half transfer complete flag */ - __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); - 8003454: 687b ldr r3, [r7, #4] - 8003456: 681b ldr r3, [r3, #0] - 8003458: 4a66 ldr r2, [pc, #408] ; (80035f4 ) - 800345a: 4293 cmp r3, r2 - 800345c: d029 beq.n 80034b2 - 800345e: 687b ldr r3, [r7, #4] - 8003460: 681b ldr r3, [r3, #0] - 8003462: 4a65 ldr r2, [pc, #404] ; (80035f8 ) - 8003464: 4293 cmp r3, r2 - 8003466: d022 beq.n 80034ae - 8003468: 687b ldr r3, [r7, #4] - 800346a: 681b ldr r3, [r3, #0] - 800346c: 4a63 ldr r2, [pc, #396] ; (80035fc ) - 800346e: 4293 cmp r3, r2 - 8003470: d01a beq.n 80034a8 - 8003472: 687b ldr r3, [r7, #4] - 8003474: 681b ldr r3, [r3, #0] - 8003476: 4a62 ldr r2, [pc, #392] ; (8003600 ) - 8003478: 4293 cmp r3, r2 - 800347a: d012 beq.n 80034a2 - 800347c: 687b ldr r3, [r7, #4] - 800347e: 681b ldr r3, [r3, #0] - 8003480: 4a60 ldr r2, [pc, #384] ; (8003604 ) - 8003482: 4293 cmp r3, r2 - 8003484: d00a beq.n 800349c - 8003486: 687b ldr r3, [r7, #4] - 8003488: 681b ldr r3, [r3, #0] - 800348a: 4a5f ldr r2, [pc, #380] ; (8003608 ) - 800348c: 4293 cmp r3, r2 - 800348e: d102 bne.n 8003496 - 8003490: f44f 0380 mov.w r3, #4194304 ; 0x400000 - 8003494: e00e b.n 80034b4 - 8003496: f04f 6380 mov.w r3, #67108864 ; 0x4000000 - 800349a: e00b b.n 80034b4 - 800349c: f44f 2380 mov.w r3, #262144 ; 0x40000 - 80034a0: e008 b.n 80034b4 - 80034a2: f44f 4380 mov.w r3, #16384 ; 0x4000 - 80034a6: e005 b.n 80034b4 - 80034a8: f44f 6380 mov.w r3, #1024 ; 0x400 - 80034ac: e002 b.n 80034b4 - 80034ae: 2340 movs r3, #64 ; 0x40 - 80034b0: e000 b.n 80034b4 - 80034b2: 2304 movs r3, #4 - 80034b4: 4a55 ldr r2, [pc, #340] ; (800360c ) - 80034b6: 6053 str r3, [r2, #4] - - /* DMA peripheral state is not updated in Half Transfer */ - /* but in Transfer Complete case */ - - if(hdma->XferHalfCpltCallback != NULL) - 80034b8: 687b ldr r3, [r7, #4] - 80034ba: 6adb ldr r3, [r3, #44] ; 0x2c - 80034bc: 2b00 cmp r3, #0 - 80034be: f000 8094 beq.w 80035ea - { - /* Half transfer callback */ - hdma->XferHalfCpltCallback(hdma); - 80034c2: 687b ldr r3, [r7, #4] - 80034c4: 6adb ldr r3, [r3, #44] ; 0x2c - 80034c6: 6878 ldr r0, [r7, #4] - 80034c8: 4798 blx r3 - if(hdma->XferHalfCpltCallback != NULL) - 80034ca: e08e b.n 80035ea - } - } - - /* Transfer Complete Interrupt management ***********************************/ - else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) - 80034cc: 687b ldr r3, [r7, #4] - 80034ce: 6c1b ldr r3, [r3, #64] ; 0x40 - 80034d0: 2202 movs r2, #2 - 80034d2: 409a lsls r2, r3 - 80034d4: 68fb ldr r3, [r7, #12] - 80034d6: 4013 ands r3, r2 - 80034d8: 2b00 cmp r3, #0 - 80034da: d056 beq.n 800358a - 80034dc: 68bb ldr r3, [r7, #8] - 80034de: f003 0302 and.w r3, r3, #2 - 80034e2: 2b00 cmp r3, #0 - 80034e4: d051 beq.n 800358a - { - if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) - 80034e6: 687b ldr r3, [r7, #4] - 80034e8: 681b ldr r3, [r3, #0] - 80034ea: 681b ldr r3, [r3, #0] - 80034ec: f003 0320 and.w r3, r3, #32 - 80034f0: 2b00 cmp r3, #0 - 80034f2: d10b bne.n 800350c - { - /* Disable the transfer complete and error interrupt */ - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); - 80034f4: 687b ldr r3, [r7, #4] - 80034f6: 681b ldr r3, [r3, #0] - 80034f8: 681a ldr r2, [r3, #0] - 80034fa: 687b ldr r3, [r7, #4] - 80034fc: 681b ldr r3, [r3, #0] - 80034fe: f022 020a bic.w r2, r2, #10 - 8003502: 601a str r2, [r3, #0] - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - 8003504: 687b ldr r3, [r7, #4] - 8003506: 2201 movs r2, #1 - 8003508: f883 2021 strb.w r2, [r3, #33] ; 0x21 - } - /* Clear the transfer complete flag */ - __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); - 800350c: 687b ldr r3, [r7, #4] - 800350e: 681b ldr r3, [r3, #0] - 8003510: 4a38 ldr r2, [pc, #224] ; (80035f4 ) - 8003512: 4293 cmp r3, r2 - 8003514: d029 beq.n 800356a - 8003516: 687b ldr r3, [r7, #4] - 8003518: 681b ldr r3, [r3, #0] - 800351a: 4a37 ldr r2, [pc, #220] ; (80035f8 ) - 800351c: 4293 cmp r3, r2 - 800351e: d022 beq.n 8003566 - 8003520: 687b ldr r3, [r7, #4] - 8003522: 681b ldr r3, [r3, #0] - 8003524: 4a35 ldr r2, [pc, #212] ; (80035fc ) - 8003526: 4293 cmp r3, r2 - 8003528: d01a beq.n 8003560 - 800352a: 687b ldr r3, [r7, #4] - 800352c: 681b ldr r3, [r3, #0] - 800352e: 4a34 ldr r2, [pc, #208] ; (8003600 ) - 8003530: 4293 cmp r3, r2 - 8003532: d012 beq.n 800355a - 8003534: 687b ldr r3, [r7, #4] - 8003536: 681b ldr r3, [r3, #0] - 8003538: 4a32 ldr r2, [pc, #200] ; (8003604 ) - 800353a: 4293 cmp r3, r2 - 800353c: d00a beq.n 8003554 - 800353e: 687b ldr r3, [r7, #4] - 8003540: 681b ldr r3, [r3, #0] - 8003542: 4a31 ldr r2, [pc, #196] ; (8003608 ) - 8003544: 4293 cmp r3, r2 - 8003546: d102 bne.n 800354e - 8003548: f44f 1300 mov.w r3, #2097152 ; 0x200000 - 800354c: e00e b.n 800356c - 800354e: f04f 7300 mov.w r3, #33554432 ; 0x2000000 - 8003552: e00b b.n 800356c - 8003554: f44f 3300 mov.w r3, #131072 ; 0x20000 - 8003558: e008 b.n 800356c - 800355a: f44f 5300 mov.w r3, #8192 ; 0x2000 - 800355e: e005 b.n 800356c - 8003560: f44f 7300 mov.w r3, #512 ; 0x200 - 8003564: e002 b.n 800356c - 8003566: 2320 movs r3, #32 - 8003568: e000 b.n 800356c - 800356a: 2302 movs r3, #2 - 800356c: 4a27 ldr r2, [pc, #156] ; (800360c ) - 800356e: 6053 str r3, [r2, #4] - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 8003570: 687b ldr r3, [r7, #4] - 8003572: 2200 movs r2, #0 - 8003574: f883 2020 strb.w r2, [r3, #32] - - if(hdma->XferCpltCallback != NULL) - 8003578: 687b ldr r3, [r7, #4] - 800357a: 6a9b ldr r3, [r3, #40] ; 0x28 - 800357c: 2b00 cmp r3, #0 - 800357e: d034 beq.n 80035ea - { - /* Transfer complete callback */ - hdma->XferCpltCallback(hdma); - 8003580: 687b ldr r3, [r7, #4] - 8003582: 6a9b ldr r3, [r3, #40] ; 0x28 - 8003584: 6878 ldr r0, [r7, #4] - 8003586: 4798 blx r3 - if(hdma->XferCpltCallback != NULL) - 8003588: e02f b.n 80035ea - } - } - - /* Transfer Error Interrupt management **************************************/ - else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) - 800358a: 687b ldr r3, [r7, #4] - 800358c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800358e: 2208 movs r2, #8 - 8003590: 409a lsls r2, r3 - 8003592: 68fb ldr r3, [r7, #12] - 8003594: 4013 ands r3, r2 - 8003596: 2b00 cmp r3, #0 - 8003598: d028 beq.n 80035ec - 800359a: 68bb ldr r3, [r7, #8] - 800359c: f003 0308 and.w r3, r3, #8 - 80035a0: 2b00 cmp r3, #0 - 80035a2: d023 beq.n 80035ec - { - /* When a DMA transfer error occurs */ - /* A hardware clear of its EN bits is performed */ - /* Disable ALL DMA IT */ - __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 80035a4: 687b ldr r3, [r7, #4] - 80035a6: 681b ldr r3, [r3, #0] - 80035a8: 681a ldr r2, [r3, #0] - 80035aa: 687b ldr r3, [r7, #4] - 80035ac: 681b ldr r3, [r3, #0] - 80035ae: f022 020e bic.w r2, r2, #14 - 80035b2: 601a str r2, [r3, #0] - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - 80035b4: 687b ldr r3, [r7, #4] - 80035b6: 6c1a ldr r2, [r3, #64] ; 0x40 - 80035b8: 687b ldr r3, [r7, #4] - 80035ba: 6bdb ldr r3, [r3, #60] ; 0x3c - 80035bc: 2101 movs r1, #1 - 80035be: fa01 f202 lsl.w r2, r1, r2 - 80035c2: 605a str r2, [r3, #4] - - /* Update error code */ - hdma->ErrorCode = HAL_DMA_ERROR_TE; - 80035c4: 687b ldr r3, [r7, #4] - 80035c6: 2201 movs r2, #1 - 80035c8: 639a str r2, [r3, #56] ; 0x38 - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - 80035ca: 687b ldr r3, [r7, #4] - 80035cc: 2201 movs r2, #1 - 80035ce: f883 2021 strb.w r2, [r3, #33] ; 0x21 - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 80035d2: 687b ldr r3, [r7, #4] - 80035d4: 2200 movs r2, #0 - 80035d6: f883 2020 strb.w r2, [r3, #32] - - if (hdma->XferErrorCallback != NULL) - 80035da: 687b ldr r3, [r7, #4] - 80035dc: 6b1b ldr r3, [r3, #48] ; 0x30 - 80035de: 2b00 cmp r3, #0 - 80035e0: d004 beq.n 80035ec - { - /* Transfer error callback */ - hdma->XferErrorCallback(hdma); - 80035e2: 687b ldr r3, [r7, #4] - 80035e4: 6b1b ldr r3, [r3, #48] ; 0x30 - 80035e6: 6878 ldr r0, [r7, #4] - 80035e8: 4798 blx r3 - } - } - return; - 80035ea: bf00 nop - 80035ec: bf00 nop -} - 80035ee: 3710 adds r7, #16 - 80035f0: 46bd mov sp, r7 - 80035f2: bd80 pop {r7, pc} - 80035f4: 40020008 .word 0x40020008 - 80035f8: 4002001c .word 0x4002001c - 80035fc: 40020030 .word 0x40020030 - 8003600: 40020044 .word 0x40020044 - 8003604: 40020058 .word 0x40020058 - 8003608: 4002006c .word 0x4002006c - 800360c: 40020000 .word 0x40020000 - -08003610 : - * @param DstAddress: The destination memory Buffer address - * @param DataLength: The length of data to be transferred from source to destination - * @retval HAL status - */ -static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) -{ - 8003610: b480 push {r7} - 8003612: b085 sub sp, #20 - 8003614: af00 add r7, sp, #0 - 8003616: 60f8 str r0, [r7, #12] - 8003618: 60b9 str r1, [r7, #8] - 800361a: 607a str r2, [r7, #4] - 800361c: 603b str r3, [r7, #0] - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - 800361e: 68fb ldr r3, [r7, #12] - 8003620: 6c1a ldr r2, [r3, #64] ; 0x40 - 8003622: 68fb ldr r3, [r7, #12] - 8003624: 6bdb ldr r3, [r3, #60] ; 0x3c - 8003626: 2101 movs r1, #1 - 8003628: fa01 f202 lsl.w r2, r1, r2 - 800362c: 605a str r2, [r3, #4] - - /* Configure DMA Channel data length */ - hdma->Instance->CNDTR = DataLength; - 800362e: 68fb ldr r3, [r7, #12] - 8003630: 681b ldr r3, [r3, #0] - 8003632: 683a ldr r2, [r7, #0] - 8003634: 605a str r2, [r3, #4] - - /* Memory to Peripheral */ - if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) - 8003636: 68fb ldr r3, [r7, #12] - 8003638: 685b ldr r3, [r3, #4] - 800363a: 2b10 cmp r3, #16 - 800363c: d108 bne.n 8003650 - { - /* Configure DMA Channel destination address */ - hdma->Instance->CPAR = DstAddress; - 800363e: 68fb ldr r3, [r7, #12] - 8003640: 681b ldr r3, [r3, #0] - 8003642: 687a ldr r2, [r7, #4] - 8003644: 609a str r2, [r3, #8] - - /* Configure DMA Channel source address */ - hdma->Instance->CMAR = SrcAddress; - 8003646: 68fb ldr r3, [r7, #12] - 8003648: 681b ldr r3, [r3, #0] - 800364a: 68ba ldr r2, [r7, #8] - 800364c: 60da str r2, [r3, #12] - hdma->Instance->CPAR = SrcAddress; - - /* Configure DMA Channel destination address */ - hdma->Instance->CMAR = DstAddress; - } -} - 800364e: e007 b.n 8003660 - hdma->Instance->CPAR = SrcAddress; - 8003650: 68fb ldr r3, [r7, #12] - 8003652: 681b ldr r3, [r3, #0] - 8003654: 68ba ldr r2, [r7, #8] - 8003656: 609a str r2, [r3, #8] - hdma->Instance->CMAR = DstAddress; - 8003658: 68fb ldr r3, [r7, #12] - 800365a: 681b ldr r3, [r3, #0] - 800365c: 687a ldr r2, [r7, #4] - 800365e: 60da str r2, [r3, #12] -} - 8003660: bf00 nop - 8003662: 3714 adds r7, #20 - 8003664: 46bd mov sp, r7 - 8003666: bc80 pop {r7} - 8003668: 4770 bx lr - ... - -0800366c : - * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains - * the configuration information for the specified GPIO peripheral. - * @retval None - */ -void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) -{ - 800366c: b480 push {r7} - 800366e: b08b sub sp, #44 ; 0x2c - 8003670: af00 add r7, sp, #0 - 8003672: 6078 str r0, [r7, #4] - 8003674: 6039 str r1, [r7, #0] - uint32_t position = 0x00u; - 8003676: 2300 movs r3, #0 - 8003678: 627b str r3, [r7, #36] ; 0x24 - uint32_t ioposition; - uint32_t iocurrent; - uint32_t temp; - uint32_t config = 0x00u; - 800367a: 2300 movs r3, #0 - 800367c: 623b str r3, [r7, #32] - assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); - assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); - - /* Configure the port pins */ - while (((GPIO_Init->Pin) >> position) != 0x00u) - 800367e: e169 b.n 8003954 - { - /* Get the IO position */ - ioposition = (0x01uL << position); - 8003680: 2201 movs r2, #1 - 8003682: 6a7b ldr r3, [r7, #36] ; 0x24 - 8003684: fa02 f303 lsl.w r3, r2, r3 - 8003688: 61fb str r3, [r7, #28] - - /* Get the current IO position */ - iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; - 800368a: 683b ldr r3, [r7, #0] - 800368c: 681b ldr r3, [r3, #0] - 800368e: 69fa ldr r2, [r7, #28] - 8003690: 4013 ands r3, r2 - 8003692: 61bb str r3, [r7, #24] - - if (iocurrent == ioposition) - 8003694: 69ba ldr r2, [r7, #24] - 8003696: 69fb ldr r3, [r7, #28] - 8003698: 429a cmp r2, r3 - 800369a: f040 8158 bne.w 800394e - { - /* Check the Alternate function parameters */ - assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); - - /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ - switch (GPIO_Init->Mode) - 800369e: 683b ldr r3, [r7, #0] - 80036a0: 685b ldr r3, [r3, #4] - 80036a2: 4a9a ldr r2, [pc, #616] ; (800390c ) - 80036a4: 4293 cmp r3, r2 - 80036a6: d05e beq.n 8003766 - 80036a8: 4a98 ldr r2, [pc, #608] ; (800390c ) - 80036aa: 4293 cmp r3, r2 - 80036ac: d875 bhi.n 800379a - 80036ae: 4a98 ldr r2, [pc, #608] ; (8003910 ) - 80036b0: 4293 cmp r3, r2 - 80036b2: d058 beq.n 8003766 - 80036b4: 4a96 ldr r2, [pc, #600] ; (8003910 ) - 80036b6: 4293 cmp r3, r2 - 80036b8: d86f bhi.n 800379a - 80036ba: 4a96 ldr r2, [pc, #600] ; (8003914 ) - 80036bc: 4293 cmp r3, r2 - 80036be: d052 beq.n 8003766 - 80036c0: 4a94 ldr r2, [pc, #592] ; (8003914 ) - 80036c2: 4293 cmp r3, r2 - 80036c4: d869 bhi.n 800379a - 80036c6: 4a94 ldr r2, [pc, #592] ; (8003918 ) - 80036c8: 4293 cmp r3, r2 - 80036ca: d04c beq.n 8003766 - 80036cc: 4a92 ldr r2, [pc, #584] ; (8003918 ) - 80036ce: 4293 cmp r3, r2 - 80036d0: d863 bhi.n 800379a - 80036d2: 4a92 ldr r2, [pc, #584] ; (800391c ) - 80036d4: 4293 cmp r3, r2 - 80036d6: d046 beq.n 8003766 - 80036d8: 4a90 ldr r2, [pc, #576] ; (800391c ) - 80036da: 4293 cmp r3, r2 - 80036dc: d85d bhi.n 800379a - 80036de: 2b12 cmp r3, #18 - 80036e0: d82a bhi.n 8003738 - 80036e2: 2b12 cmp r3, #18 - 80036e4: d859 bhi.n 800379a - 80036e6: a201 add r2, pc, #4 ; (adr r2, 80036ec ) - 80036e8: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 80036ec: 08003767 .word 0x08003767 - 80036f0: 08003741 .word 0x08003741 - 80036f4: 08003753 .word 0x08003753 - 80036f8: 08003795 .word 0x08003795 - 80036fc: 0800379b .word 0x0800379b - 8003700: 0800379b .word 0x0800379b - 8003704: 0800379b .word 0x0800379b - 8003708: 0800379b .word 0x0800379b - 800370c: 0800379b .word 0x0800379b - 8003710: 0800379b .word 0x0800379b - 8003714: 0800379b .word 0x0800379b - 8003718: 0800379b .word 0x0800379b - 800371c: 0800379b .word 0x0800379b - 8003720: 0800379b .word 0x0800379b - 8003724: 0800379b .word 0x0800379b - 8003728: 0800379b .word 0x0800379b - 800372c: 0800379b .word 0x0800379b - 8003730: 08003749 .word 0x08003749 - 8003734: 0800375d .word 0x0800375d - 8003738: 4a79 ldr r2, [pc, #484] ; (8003920 ) - 800373a: 4293 cmp r3, r2 - 800373c: d013 beq.n 8003766 - config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; - break; - - /* Parameters are checked with assert_param */ - default: - break; - 800373e: e02c b.n 800379a - config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; - 8003740: 683b ldr r3, [r7, #0] - 8003742: 68db ldr r3, [r3, #12] - 8003744: 623b str r3, [r7, #32] - break; - 8003746: e029 b.n 800379c - config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; - 8003748: 683b ldr r3, [r7, #0] - 800374a: 68db ldr r3, [r3, #12] - 800374c: 3304 adds r3, #4 - 800374e: 623b str r3, [r7, #32] - break; - 8003750: e024 b.n 800379c - config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; - 8003752: 683b ldr r3, [r7, #0] - 8003754: 68db ldr r3, [r3, #12] - 8003756: 3308 adds r3, #8 - 8003758: 623b str r3, [r7, #32] - break; - 800375a: e01f b.n 800379c - config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; - 800375c: 683b ldr r3, [r7, #0] - 800375e: 68db ldr r3, [r3, #12] - 8003760: 330c adds r3, #12 - 8003762: 623b str r3, [r7, #32] - break; - 8003764: e01a b.n 800379c - if (GPIO_Init->Pull == GPIO_NOPULL) - 8003766: 683b ldr r3, [r7, #0] - 8003768: 689b ldr r3, [r3, #8] - 800376a: 2b00 cmp r3, #0 - 800376c: d102 bne.n 8003774 - config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; - 800376e: 2304 movs r3, #4 - 8003770: 623b str r3, [r7, #32] - break; - 8003772: e013 b.n 800379c - else if (GPIO_Init->Pull == GPIO_PULLUP) - 8003774: 683b ldr r3, [r7, #0] - 8003776: 689b ldr r3, [r3, #8] - 8003778: 2b01 cmp r3, #1 - 800377a: d105 bne.n 8003788 - config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; - 800377c: 2308 movs r3, #8 - 800377e: 623b str r3, [r7, #32] - GPIOx->BSRR = ioposition; - 8003780: 687b ldr r3, [r7, #4] - 8003782: 69fa ldr r2, [r7, #28] - 8003784: 611a str r2, [r3, #16] - break; - 8003786: e009 b.n 800379c - config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; - 8003788: 2308 movs r3, #8 - 800378a: 623b str r3, [r7, #32] - GPIOx->BRR = ioposition; - 800378c: 687b ldr r3, [r7, #4] - 800378e: 69fa ldr r2, [r7, #28] - 8003790: 615a str r2, [r3, #20] - break; - 8003792: e003 b.n 800379c - config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; - 8003794: 2300 movs r3, #0 - 8003796: 623b str r3, [r7, #32] - break; - 8003798: e000 b.n 800379c - break; - 800379a: bf00 nop - } - - /* Check if the current bit belongs to first half or last half of the pin count number - in order to address CRH or CRL register*/ - configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; - 800379c: 69bb ldr r3, [r7, #24] - 800379e: 2bff cmp r3, #255 ; 0xff - 80037a0: d801 bhi.n 80037a6 - 80037a2: 687b ldr r3, [r7, #4] - 80037a4: e001 b.n 80037aa - 80037a6: 687b ldr r3, [r7, #4] - 80037a8: 3304 adds r3, #4 - 80037aa: 617b str r3, [r7, #20] - registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); - 80037ac: 69bb ldr r3, [r7, #24] - 80037ae: 2bff cmp r3, #255 ; 0xff - 80037b0: d802 bhi.n 80037b8 - 80037b2: 6a7b ldr r3, [r7, #36] ; 0x24 - 80037b4: 009b lsls r3, r3, #2 - 80037b6: e002 b.n 80037be - 80037b8: 6a7b ldr r3, [r7, #36] ; 0x24 - 80037ba: 3b08 subs r3, #8 - 80037bc: 009b lsls r3, r3, #2 - 80037be: 613b str r3, [r7, #16] - - /* Apply the new configuration of the pin to the register */ - MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); - 80037c0: 697b ldr r3, [r7, #20] - 80037c2: 681a ldr r2, [r3, #0] - 80037c4: 210f movs r1, #15 - 80037c6: 693b ldr r3, [r7, #16] - 80037c8: fa01 f303 lsl.w r3, r1, r3 - 80037cc: 43db mvns r3, r3 - 80037ce: 401a ands r2, r3 - 80037d0: 6a39 ldr r1, [r7, #32] - 80037d2: 693b ldr r3, [r7, #16] - 80037d4: fa01 f303 lsl.w r3, r1, r3 - 80037d8: 431a orrs r2, r3 - 80037da: 697b ldr r3, [r7, #20] - 80037dc: 601a str r2, [r3, #0] - - /*--------------------- EXTI Mode Configuration ------------------------*/ - /* Configure the External Interrupt or event for the current IO */ - if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - 80037de: 683b ldr r3, [r7, #0] - 80037e0: 685b ldr r3, [r3, #4] - 80037e2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 80037e6: 2b00 cmp r3, #0 - 80037e8: f000 80b1 beq.w 800394e - { - /* Enable AFIO Clock */ - __HAL_RCC_AFIO_CLK_ENABLE(); - 80037ec: 4b4d ldr r3, [pc, #308] ; (8003924 ) - 80037ee: 699b ldr r3, [r3, #24] - 80037f0: 4a4c ldr r2, [pc, #304] ; (8003924 ) - 80037f2: f043 0301 orr.w r3, r3, #1 - 80037f6: 6193 str r3, [r2, #24] - 80037f8: 4b4a ldr r3, [pc, #296] ; (8003924 ) - 80037fa: 699b ldr r3, [r3, #24] - 80037fc: f003 0301 and.w r3, r3, #1 - 8003800: 60bb str r3, [r7, #8] - 8003802: 68bb ldr r3, [r7, #8] - temp = AFIO->EXTICR[position >> 2u]; - 8003804: 4a48 ldr r2, [pc, #288] ; (8003928 ) - 8003806: 6a7b ldr r3, [r7, #36] ; 0x24 - 8003808: 089b lsrs r3, r3, #2 - 800380a: 3302 adds r3, #2 - 800380c: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8003810: 60fb str r3, [r7, #12] - CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); - 8003812: 6a7b ldr r3, [r7, #36] ; 0x24 - 8003814: f003 0303 and.w r3, r3, #3 - 8003818: 009b lsls r3, r3, #2 - 800381a: 220f movs r2, #15 - 800381c: fa02 f303 lsl.w r3, r2, r3 - 8003820: 43db mvns r3, r3 - 8003822: 68fa ldr r2, [r7, #12] - 8003824: 4013 ands r3, r2 - 8003826: 60fb str r3, [r7, #12] - SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); - 8003828: 687b ldr r3, [r7, #4] - 800382a: 4a40 ldr r2, [pc, #256] ; (800392c ) - 800382c: 4293 cmp r3, r2 - 800382e: d013 beq.n 8003858 - 8003830: 687b ldr r3, [r7, #4] - 8003832: 4a3f ldr r2, [pc, #252] ; (8003930 ) - 8003834: 4293 cmp r3, r2 - 8003836: d00d beq.n 8003854 - 8003838: 687b ldr r3, [r7, #4] - 800383a: 4a3e ldr r2, [pc, #248] ; (8003934 ) - 800383c: 4293 cmp r3, r2 - 800383e: d007 beq.n 8003850 - 8003840: 687b ldr r3, [r7, #4] - 8003842: 4a3d ldr r2, [pc, #244] ; (8003938 ) - 8003844: 4293 cmp r3, r2 - 8003846: d101 bne.n 800384c - 8003848: 2303 movs r3, #3 - 800384a: e006 b.n 800385a - 800384c: 2304 movs r3, #4 - 800384e: e004 b.n 800385a - 8003850: 2302 movs r3, #2 - 8003852: e002 b.n 800385a - 8003854: 2301 movs r3, #1 - 8003856: e000 b.n 800385a - 8003858: 2300 movs r3, #0 - 800385a: 6a7a ldr r2, [r7, #36] ; 0x24 - 800385c: f002 0203 and.w r2, r2, #3 - 8003860: 0092 lsls r2, r2, #2 - 8003862: 4093 lsls r3, r2 - 8003864: 68fa ldr r2, [r7, #12] - 8003866: 4313 orrs r3, r2 - 8003868: 60fb str r3, [r7, #12] - AFIO->EXTICR[position >> 2u] = temp; - 800386a: 492f ldr r1, [pc, #188] ; (8003928 ) - 800386c: 6a7b ldr r3, [r7, #36] ; 0x24 - 800386e: 089b lsrs r3, r3, #2 - 8003870: 3302 adds r3, #2 - 8003872: 68fa ldr r2, [r7, #12] - 8003874: f841 2023 str.w r2, [r1, r3, lsl #2] - - - /* Configure the interrupt mask */ - if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - 8003878: 683b ldr r3, [r7, #0] - 800387a: 685b ldr r3, [r3, #4] - 800387c: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8003880: 2b00 cmp r3, #0 - 8003882: d006 beq.n 8003892 - { - SET_BIT(EXTI->IMR, iocurrent); - 8003884: 4b2d ldr r3, [pc, #180] ; (800393c ) - 8003886: 681a ldr r2, [r3, #0] - 8003888: 492c ldr r1, [pc, #176] ; (800393c ) - 800388a: 69bb ldr r3, [r7, #24] - 800388c: 4313 orrs r3, r2 - 800388e: 600b str r3, [r1, #0] - 8003890: e006 b.n 80038a0 - } - else - { - CLEAR_BIT(EXTI->IMR, iocurrent); - 8003892: 4b2a ldr r3, [pc, #168] ; (800393c ) - 8003894: 681a ldr r2, [r3, #0] - 8003896: 69bb ldr r3, [r7, #24] - 8003898: 43db mvns r3, r3 - 800389a: 4928 ldr r1, [pc, #160] ; (800393c ) - 800389c: 4013 ands r3, r2 - 800389e: 600b str r3, [r1, #0] - } - - /* Configure the event mask */ - if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - 80038a0: 683b ldr r3, [r7, #0] - 80038a2: 685b ldr r3, [r3, #4] - 80038a4: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80038a8: 2b00 cmp r3, #0 - 80038aa: d006 beq.n 80038ba - { - SET_BIT(EXTI->EMR, iocurrent); - 80038ac: 4b23 ldr r3, [pc, #140] ; (800393c ) - 80038ae: 685a ldr r2, [r3, #4] - 80038b0: 4922 ldr r1, [pc, #136] ; (800393c ) - 80038b2: 69bb ldr r3, [r7, #24] - 80038b4: 4313 orrs r3, r2 - 80038b6: 604b str r3, [r1, #4] - 80038b8: e006 b.n 80038c8 - } - else - { - CLEAR_BIT(EXTI->EMR, iocurrent); - 80038ba: 4b20 ldr r3, [pc, #128] ; (800393c ) - 80038bc: 685a ldr r2, [r3, #4] - 80038be: 69bb ldr r3, [r7, #24] - 80038c0: 43db mvns r3, r3 - 80038c2: 491e ldr r1, [pc, #120] ; (800393c ) - 80038c4: 4013 ands r3, r2 - 80038c6: 604b str r3, [r1, #4] - } - - /* Enable or disable the rising trigger */ - if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - 80038c8: 683b ldr r3, [r7, #0] - 80038ca: 685b ldr r3, [r3, #4] - 80038cc: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 80038d0: 2b00 cmp r3, #0 - 80038d2: d006 beq.n 80038e2 - { - SET_BIT(EXTI->RTSR, iocurrent); - 80038d4: 4b19 ldr r3, [pc, #100] ; (800393c ) - 80038d6: 689a ldr r2, [r3, #8] - 80038d8: 4918 ldr r1, [pc, #96] ; (800393c ) - 80038da: 69bb ldr r3, [r7, #24] - 80038dc: 4313 orrs r3, r2 - 80038de: 608b str r3, [r1, #8] - 80038e0: e006 b.n 80038f0 - } - else - { - CLEAR_BIT(EXTI->RTSR, iocurrent); - 80038e2: 4b16 ldr r3, [pc, #88] ; (800393c ) - 80038e4: 689a ldr r2, [r3, #8] - 80038e6: 69bb ldr r3, [r7, #24] - 80038e8: 43db mvns r3, r3 - 80038ea: 4914 ldr r1, [pc, #80] ; (800393c ) - 80038ec: 4013 ands r3, r2 - 80038ee: 608b str r3, [r1, #8] - } - - /* Enable or disable the falling trigger */ - if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - 80038f0: 683b ldr r3, [r7, #0] - 80038f2: 685b ldr r3, [r3, #4] - 80038f4: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 80038f8: 2b00 cmp r3, #0 - 80038fa: d021 beq.n 8003940 - { - SET_BIT(EXTI->FTSR, iocurrent); - 80038fc: 4b0f ldr r3, [pc, #60] ; (800393c ) - 80038fe: 68da ldr r2, [r3, #12] - 8003900: 490e ldr r1, [pc, #56] ; (800393c ) - 8003902: 69bb ldr r3, [r7, #24] - 8003904: 4313 orrs r3, r2 - 8003906: 60cb str r3, [r1, #12] - 8003908: e021 b.n 800394e - 800390a: bf00 nop - 800390c: 10320000 .word 0x10320000 - 8003910: 10310000 .word 0x10310000 - 8003914: 10220000 .word 0x10220000 - 8003918: 10210000 .word 0x10210000 - 800391c: 10120000 .word 0x10120000 - 8003920: 10110000 .word 0x10110000 - 8003924: 40021000 .word 0x40021000 - 8003928: 40010000 .word 0x40010000 - 800392c: 40010800 .word 0x40010800 - 8003930: 40010c00 .word 0x40010c00 - 8003934: 40011000 .word 0x40011000 - 8003938: 40011400 .word 0x40011400 - 800393c: 40010400 .word 0x40010400 - } - else - { - CLEAR_BIT(EXTI->FTSR, iocurrent); - 8003940: 4b0b ldr r3, [pc, #44] ; (8003970 ) - 8003942: 68da ldr r2, [r3, #12] - 8003944: 69bb ldr r3, [r7, #24] - 8003946: 43db mvns r3, r3 - 8003948: 4909 ldr r1, [pc, #36] ; (8003970 ) - 800394a: 4013 ands r3, r2 - 800394c: 60cb str r3, [r1, #12] - } - } - } - - position++; - 800394e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8003950: 3301 adds r3, #1 - 8003952: 627b str r3, [r7, #36] ; 0x24 - while (((GPIO_Init->Pin) >> position) != 0x00u) - 8003954: 683b ldr r3, [r7, #0] - 8003956: 681a ldr r2, [r3, #0] - 8003958: 6a7b ldr r3, [r7, #36] ; 0x24 - 800395a: fa22 f303 lsr.w r3, r2, r3 - 800395e: 2b00 cmp r3, #0 - 8003960: f47f ae8e bne.w 8003680 - } -} - 8003964: bf00 nop - 8003966: bf00 nop - 8003968: 372c adds r7, #44 ; 0x2c - 800396a: 46bd mov sp, r7 - 800396c: bc80 pop {r7} - 800396e: 4770 bx lr - 8003970: 40010400 .word 0x40010400 - -08003974 : - * @arg GPIO_PIN_RESET: to clear the port pin - * @arg GPIO_PIN_SET: to set the port pin - * @retval None - */ -void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) -{ - 8003974: b480 push {r7} - 8003976: b083 sub sp, #12 - 8003978: af00 add r7, sp, #0 - 800397a: 6078 str r0, [r7, #4] - 800397c: 460b mov r3, r1 - 800397e: 807b strh r3, [r7, #2] - 8003980: 4613 mov r3, r2 - 8003982: 707b strb r3, [r7, #1] - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Pin)); - assert_param(IS_GPIO_PIN_ACTION(PinState)); - - if (PinState != GPIO_PIN_RESET) - 8003984: 787b ldrb r3, [r7, #1] - 8003986: 2b00 cmp r3, #0 - 8003988: d003 beq.n 8003992 - { - GPIOx->BSRR = GPIO_Pin; - 800398a: 887a ldrh r2, [r7, #2] - 800398c: 687b ldr r3, [r7, #4] - 800398e: 611a str r2, [r3, #16] - } - else - { - GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; - } -} - 8003990: e003 b.n 800399a - GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; - 8003992: 887b ldrh r3, [r7, #2] - 8003994: 041a lsls r2, r3, #16 - 8003996: 687b ldr r3, [r7, #4] - 8003998: 611a str r2, [r3, #16] -} - 800399a: bf00 nop - 800399c: 370c adds r7, #12 - 800399e: 46bd mov sp, r7 - 80039a0: bc80 pop {r7} - 80039a2: 4770 bx lr - -080039a4 : - * parameters in the PCD_InitTypeDef and initialize the associated handle. - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) -{ - 80039a4: b5f0 push {r4, r5, r6, r7, lr} - 80039a6: b08b sub sp, #44 ; 0x2c - 80039a8: af06 add r7, sp, #24 - 80039aa: 6078 str r0, [r7, #4] - USB_OTG_GlobalTypeDef *USBx; -#endif /* defined (USB_OTG_FS) */ - uint8_t i; - - /* Check the PCD handle allocation */ - if (hpcd == NULL) - 80039ac: 687b ldr r3, [r7, #4] - 80039ae: 2b00 cmp r3, #0 - 80039b0: d101 bne.n 80039b6 - { - return HAL_ERROR; - 80039b2: 2301 movs r3, #1 - 80039b4: e0fd b.n 8003bb2 - -#if defined (USB_OTG_FS) - USBx = hpcd->Instance; -#endif /* defined (USB_OTG_FS) */ - - if (hpcd->State == HAL_PCD_STATE_RESET) - 80039b6: 687b ldr r3, [r7, #4] - 80039b8: f893 32a9 ldrb.w r3, [r3, #681] ; 0x2a9 - 80039bc: b2db uxtb r3, r3 - 80039be: 2b00 cmp r3, #0 - 80039c0: d106 bne.n 80039d0 - { - /* Allocate lock resource and initialize it */ - hpcd->Lock = HAL_UNLOCKED; - 80039c2: 687b ldr r3, [r7, #4] - 80039c4: 2200 movs r2, #0 - 80039c6: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8 - - /* Init the low level hardware */ - hpcd->MspInitCallback(hpcd); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC... */ - HAL_PCD_MspInit(hpcd); - 80039ca: 6878 ldr r0, [r7, #4] - 80039cc: f7ff f8c2 bl 8002b54 -#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */ - } - - hpcd->State = HAL_PCD_STATE_BUSY; - 80039d0: 687b ldr r3, [r7, #4] - 80039d2: 2203 movs r2, #3 - 80039d4: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9 - hpcd->Init.dma_enable = 0U; - } -#endif /* defined (USB_OTG_FS) */ - - /* Disable the Interrupts */ - __HAL_PCD_DISABLE(hpcd); - 80039d8: 687b ldr r3, [r7, #4] - 80039da: 681b ldr r3, [r3, #0] - 80039dc: 4618 mov r0, r3 - 80039de: f002 fc2d bl 800623c - - /*Init the Core (common init.) */ - if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK) - 80039e2: 687b ldr r3, [r7, #4] - 80039e4: 681b ldr r3, [r3, #0] - 80039e6: 603b str r3, [r7, #0] - 80039e8: 687e ldr r6, [r7, #4] - 80039ea: 466d mov r5, sp - 80039ec: f106 0410 add.w r4, r6, #16 - 80039f0: cc0f ldmia r4!, {r0, r1, r2, r3} - 80039f2: c50f stmia r5!, {r0, r1, r2, r3} - 80039f4: 6823 ldr r3, [r4, #0] - 80039f6: 602b str r3, [r5, #0] - 80039f8: 1d33 adds r3, r6, #4 - 80039fa: cb0e ldmia r3, {r1, r2, r3} - 80039fc: 6838 ldr r0, [r7, #0] - 80039fe: f002 fc0d bl 800621c - 8003a02: 4603 mov r3, r0 - 8003a04: 2b00 cmp r3, #0 - 8003a06: d005 beq.n 8003a14 - { - hpcd->State = HAL_PCD_STATE_ERROR; - 8003a08: 687b ldr r3, [r7, #4] - 8003a0a: 2202 movs r2, #2 - 8003a0c: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9 - return HAL_ERROR; - 8003a10: 2301 movs r3, #1 - 8003a12: e0ce b.n 8003bb2 - } - - /* Force Device Mode*/ - (void)USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE); - 8003a14: 687b ldr r3, [r7, #4] - 8003a16: 681b ldr r3, [r3, #0] - 8003a18: 2100 movs r1, #0 - 8003a1a: 4618 mov r0, r3 - 8003a1c: f002 fc28 bl 8006270 - - /* Init endpoints structures */ - for (i = 0U; i < hpcd->Init.dev_endpoints; i++) - 8003a20: 2300 movs r3, #0 - 8003a22: 73fb strb r3, [r7, #15] - 8003a24: e04c b.n 8003ac0 - { - /* Init ep structure */ - hpcd->IN_ep[i].is_in = 1U; - 8003a26: 7bfb ldrb r3, [r7, #15] - 8003a28: 6879 ldr r1, [r7, #4] - 8003a2a: 1c5a adds r2, r3, #1 - 8003a2c: 4613 mov r3, r2 - 8003a2e: 009b lsls r3, r3, #2 - 8003a30: 4413 add r3, r2 - 8003a32: 00db lsls r3, r3, #3 - 8003a34: 440b add r3, r1 - 8003a36: 3301 adds r3, #1 - 8003a38: 2201 movs r2, #1 - 8003a3a: 701a strb r2, [r3, #0] - hpcd->IN_ep[i].num = i; - 8003a3c: 7bfb ldrb r3, [r7, #15] - 8003a3e: 6879 ldr r1, [r7, #4] - 8003a40: 1c5a adds r2, r3, #1 - 8003a42: 4613 mov r3, r2 - 8003a44: 009b lsls r3, r3, #2 - 8003a46: 4413 add r3, r2 - 8003a48: 00db lsls r3, r3, #3 - 8003a4a: 440b add r3, r1 - 8003a4c: 7bfa ldrb r2, [r7, #15] - 8003a4e: 701a strb r2, [r3, #0] - hpcd->IN_ep[i].tx_fifo_num = i; - 8003a50: 7bfa ldrb r2, [r7, #15] - 8003a52: 7bfb ldrb r3, [r7, #15] - 8003a54: b298 uxth r0, r3 - 8003a56: 6879 ldr r1, [r7, #4] - 8003a58: 4613 mov r3, r2 - 8003a5a: 009b lsls r3, r3, #2 - 8003a5c: 4413 add r3, r2 - 8003a5e: 00db lsls r3, r3, #3 - 8003a60: 440b add r3, r1 - 8003a62: 3336 adds r3, #54 ; 0x36 - 8003a64: 4602 mov r2, r0 - 8003a66: 801a strh r2, [r3, #0] - /* Control until ep is activated */ - hpcd->IN_ep[i].type = EP_TYPE_CTRL; - 8003a68: 7bfb ldrb r3, [r7, #15] - 8003a6a: 6879 ldr r1, [r7, #4] - 8003a6c: 1c5a adds r2, r3, #1 - 8003a6e: 4613 mov r3, r2 - 8003a70: 009b lsls r3, r3, #2 - 8003a72: 4413 add r3, r2 - 8003a74: 00db lsls r3, r3, #3 - 8003a76: 440b add r3, r1 - 8003a78: 3303 adds r3, #3 - 8003a7a: 2200 movs r2, #0 - 8003a7c: 701a strb r2, [r3, #0] - hpcd->IN_ep[i].maxpacket = 0U; - 8003a7e: 7bfa ldrb r2, [r7, #15] - 8003a80: 6879 ldr r1, [r7, #4] - 8003a82: 4613 mov r3, r2 - 8003a84: 009b lsls r3, r3, #2 - 8003a86: 4413 add r3, r2 - 8003a88: 00db lsls r3, r3, #3 - 8003a8a: 440b add r3, r1 - 8003a8c: 3338 adds r3, #56 ; 0x38 - 8003a8e: 2200 movs r2, #0 - 8003a90: 601a str r2, [r3, #0] - hpcd->IN_ep[i].xfer_buff = 0U; - 8003a92: 7bfa ldrb r2, [r7, #15] - 8003a94: 6879 ldr r1, [r7, #4] - 8003a96: 4613 mov r3, r2 - 8003a98: 009b lsls r3, r3, #2 - 8003a9a: 4413 add r3, r2 - 8003a9c: 00db lsls r3, r3, #3 - 8003a9e: 440b add r3, r1 - 8003aa0: 333c adds r3, #60 ; 0x3c - 8003aa2: 2200 movs r2, #0 - 8003aa4: 601a str r2, [r3, #0] - hpcd->IN_ep[i].xfer_len = 0U; - 8003aa6: 7bfa ldrb r2, [r7, #15] - 8003aa8: 6879 ldr r1, [r7, #4] - 8003aaa: 4613 mov r3, r2 - 8003aac: 009b lsls r3, r3, #2 - 8003aae: 4413 add r3, r2 - 8003ab0: 00db lsls r3, r3, #3 - 8003ab2: 440b add r3, r1 - 8003ab4: 3340 adds r3, #64 ; 0x40 - 8003ab6: 2200 movs r2, #0 - 8003ab8: 601a str r2, [r3, #0] - for (i = 0U; i < hpcd->Init.dev_endpoints; i++) - 8003aba: 7bfb ldrb r3, [r7, #15] - 8003abc: 3301 adds r3, #1 - 8003abe: 73fb strb r3, [r7, #15] - 8003ac0: 7bfa ldrb r2, [r7, #15] - 8003ac2: 687b ldr r3, [r7, #4] - 8003ac4: 685b ldr r3, [r3, #4] - 8003ac6: 429a cmp r2, r3 - 8003ac8: d3ad bcc.n 8003a26 - } - - for (i = 0U; i < hpcd->Init.dev_endpoints; i++) - 8003aca: 2300 movs r3, #0 - 8003acc: 73fb strb r3, [r7, #15] - 8003ace: e044 b.n 8003b5a - { - hpcd->OUT_ep[i].is_in = 0U; - 8003ad0: 7bfa ldrb r2, [r7, #15] - 8003ad2: 6879 ldr r1, [r7, #4] - 8003ad4: 4613 mov r3, r2 - 8003ad6: 009b lsls r3, r3, #2 - 8003ad8: 4413 add r3, r2 - 8003ada: 00db lsls r3, r3, #3 - 8003adc: 440b add r3, r1 - 8003ade: f203 1369 addw r3, r3, #361 ; 0x169 - 8003ae2: 2200 movs r2, #0 - 8003ae4: 701a strb r2, [r3, #0] - hpcd->OUT_ep[i].num = i; - 8003ae6: 7bfa ldrb r2, [r7, #15] - 8003ae8: 6879 ldr r1, [r7, #4] - 8003aea: 4613 mov r3, r2 - 8003aec: 009b lsls r3, r3, #2 - 8003aee: 4413 add r3, r2 - 8003af0: 00db lsls r3, r3, #3 - 8003af2: 440b add r3, r1 - 8003af4: f503 73b4 add.w r3, r3, #360 ; 0x168 - 8003af8: 7bfa ldrb r2, [r7, #15] - 8003afa: 701a strb r2, [r3, #0] - /* Control until ep is activated */ - hpcd->OUT_ep[i].type = EP_TYPE_CTRL; - 8003afc: 7bfa ldrb r2, [r7, #15] - 8003afe: 6879 ldr r1, [r7, #4] - 8003b00: 4613 mov r3, r2 - 8003b02: 009b lsls r3, r3, #2 - 8003b04: 4413 add r3, r2 - 8003b06: 00db lsls r3, r3, #3 - 8003b08: 440b add r3, r1 - 8003b0a: f203 136b addw r3, r3, #363 ; 0x16b - 8003b0e: 2200 movs r2, #0 - 8003b10: 701a strb r2, [r3, #0] - hpcd->OUT_ep[i].maxpacket = 0U; - 8003b12: 7bfa ldrb r2, [r7, #15] - 8003b14: 6879 ldr r1, [r7, #4] - 8003b16: 4613 mov r3, r2 - 8003b18: 009b lsls r3, r3, #2 - 8003b1a: 4413 add r3, r2 - 8003b1c: 00db lsls r3, r3, #3 - 8003b1e: 440b add r3, r1 - 8003b20: f503 73bc add.w r3, r3, #376 ; 0x178 - 8003b24: 2200 movs r2, #0 - 8003b26: 601a str r2, [r3, #0] - hpcd->OUT_ep[i].xfer_buff = 0U; - 8003b28: 7bfa ldrb r2, [r7, #15] - 8003b2a: 6879 ldr r1, [r7, #4] - 8003b2c: 4613 mov r3, r2 - 8003b2e: 009b lsls r3, r3, #2 - 8003b30: 4413 add r3, r2 - 8003b32: 00db lsls r3, r3, #3 - 8003b34: 440b add r3, r1 - 8003b36: f503 73be add.w r3, r3, #380 ; 0x17c - 8003b3a: 2200 movs r2, #0 - 8003b3c: 601a str r2, [r3, #0] - hpcd->OUT_ep[i].xfer_len = 0U; - 8003b3e: 7bfa ldrb r2, [r7, #15] - 8003b40: 6879 ldr r1, [r7, #4] - 8003b42: 4613 mov r3, r2 - 8003b44: 009b lsls r3, r3, #2 - 8003b46: 4413 add r3, r2 - 8003b48: 00db lsls r3, r3, #3 - 8003b4a: 440b add r3, r1 - 8003b4c: f503 73c0 add.w r3, r3, #384 ; 0x180 - 8003b50: 2200 movs r2, #0 - 8003b52: 601a str r2, [r3, #0] - for (i = 0U; i < hpcd->Init.dev_endpoints; i++) - 8003b54: 7bfb ldrb r3, [r7, #15] - 8003b56: 3301 adds r3, #1 - 8003b58: 73fb strb r3, [r7, #15] - 8003b5a: 7bfa ldrb r2, [r7, #15] - 8003b5c: 687b ldr r3, [r7, #4] - 8003b5e: 685b ldr r3, [r3, #4] - 8003b60: 429a cmp r2, r3 - 8003b62: d3b5 bcc.n 8003ad0 - } - - /* Init Device */ - if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK) - 8003b64: 687b ldr r3, [r7, #4] - 8003b66: 681b ldr r3, [r3, #0] - 8003b68: 603b str r3, [r7, #0] - 8003b6a: 687e ldr r6, [r7, #4] - 8003b6c: 466d mov r5, sp - 8003b6e: f106 0410 add.w r4, r6, #16 - 8003b72: cc0f ldmia r4!, {r0, r1, r2, r3} - 8003b74: c50f stmia r5!, {r0, r1, r2, r3} - 8003b76: 6823 ldr r3, [r4, #0] - 8003b78: 602b str r3, [r5, #0] - 8003b7a: 1d33 adds r3, r6, #4 - 8003b7c: cb0e ldmia r3, {r1, r2, r3} - 8003b7e: 6838 ldr r0, [r7, #0] - 8003b80: f002 fb82 bl 8006288 - 8003b84: 4603 mov r3, r0 - 8003b86: 2b00 cmp r3, #0 - 8003b88: d005 beq.n 8003b96 - { - hpcd->State = HAL_PCD_STATE_ERROR; - 8003b8a: 687b ldr r3, [r7, #4] - 8003b8c: 2202 movs r2, #2 - 8003b8e: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9 - return HAL_ERROR; - 8003b92: 2301 movs r3, #1 - 8003b94: e00d b.n 8003bb2 - } - - hpcd->USB_Address = 0U; - 8003b96: 687b ldr r3, [r7, #4] - 8003b98: 2200 movs r2, #0 - 8003b9a: f883 2024 strb.w r2, [r3, #36] ; 0x24 - hpcd->State = HAL_PCD_STATE_READY; - 8003b9e: 687b ldr r3, [r7, #4] - 8003ba0: 2201 movs r2, #1 - 8003ba2: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9 - (void)USB_DevDisconnect(hpcd->Instance); - 8003ba6: 687b ldr r3, [r7, #4] - 8003ba8: 681b ldr r3, [r3, #0] - 8003baa: 4618 mov r0, r3 - 8003bac: f002 fb8c bl 80062c8 - - return HAL_OK; - 8003bb0: 2300 movs r3, #0 -} - 8003bb2: 4618 mov r0, r3 - 8003bb4: 3714 adds r7, #20 - 8003bb6: 46bd mov sp, r7 - 8003bb8: bdf0 pop {r4, r5, r6, r7, pc} - ... - -08003bbc : - * supported by this macro. User should request a transition to HSE Off - * first and then HSE On or HSE Bypass. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) -{ - 8003bbc: b580 push {r7, lr} - 8003bbe: b086 sub sp, #24 - 8003bc0: af00 add r7, sp, #0 - 8003bc2: 6078 str r0, [r7, #4] - uint32_t tickstart; - uint32_t pll_config; - - /* Check Null pointer */ - if (RCC_OscInitStruct == NULL) - 8003bc4: 687b ldr r3, [r7, #4] - 8003bc6: 2b00 cmp r3, #0 - 8003bc8: d101 bne.n 8003bce - { - return HAL_ERROR; - 8003bca: 2301 movs r3, #1 - 8003bcc: e272 b.n 80040b4 - - /* Check the parameters */ - assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); - - /*------------------------------- HSE Configuration ------------------------*/ - if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8003bce: 687b ldr r3, [r7, #4] - 8003bd0: 681b ldr r3, [r3, #0] - 8003bd2: f003 0301 and.w r3, r3, #1 - 8003bd6: 2b00 cmp r3, #0 - 8003bd8: f000 8087 beq.w 8003cea - { - /* Check the parameters */ - assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); - - /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ - if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) - 8003bdc: 4b92 ldr r3, [pc, #584] ; (8003e28 ) - 8003bde: 685b ldr r3, [r3, #4] - 8003be0: f003 030c and.w r3, r3, #12 - 8003be4: 2b04 cmp r3, #4 - 8003be6: d00c beq.n 8003c02 - || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) - 8003be8: 4b8f ldr r3, [pc, #572] ; (8003e28 ) - 8003bea: 685b ldr r3, [r3, #4] - 8003bec: f003 030c and.w r3, r3, #12 - 8003bf0: 2b08 cmp r3, #8 - 8003bf2: d112 bne.n 8003c1a - 8003bf4: 4b8c ldr r3, [pc, #560] ; (8003e28 ) - 8003bf6: 685b ldr r3, [r3, #4] - 8003bf8: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8003bfc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8003c00: d10b bne.n 8003c1a - { - if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8003c02: 4b89 ldr r3, [pc, #548] ; (8003e28 ) - 8003c04: 681b ldr r3, [r3, #0] - 8003c06: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8003c0a: 2b00 cmp r3, #0 - 8003c0c: d06c beq.n 8003ce8 - 8003c0e: 687b ldr r3, [r7, #4] - 8003c10: 685b ldr r3, [r3, #4] - 8003c12: 2b00 cmp r3, #0 - 8003c14: d168 bne.n 8003ce8 - { - return HAL_ERROR; - 8003c16: 2301 movs r3, #1 - 8003c18: e24c b.n 80040b4 - } - } - else - { - /* Set the new HSE configuration ---------------------------------------*/ - __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8003c1a: 687b ldr r3, [r7, #4] - 8003c1c: 685b ldr r3, [r3, #4] - 8003c1e: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8003c22: d106 bne.n 8003c32 - 8003c24: 4b80 ldr r3, [pc, #512] ; (8003e28 ) - 8003c26: 681b ldr r3, [r3, #0] - 8003c28: 4a7f ldr r2, [pc, #508] ; (8003e28 ) - 8003c2a: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8003c2e: 6013 str r3, [r2, #0] - 8003c30: e02e b.n 8003c90 - 8003c32: 687b ldr r3, [r7, #4] - 8003c34: 685b ldr r3, [r3, #4] - 8003c36: 2b00 cmp r3, #0 - 8003c38: d10c bne.n 8003c54 - 8003c3a: 4b7b ldr r3, [pc, #492] ; (8003e28 ) - 8003c3c: 681b ldr r3, [r3, #0] - 8003c3e: 4a7a ldr r2, [pc, #488] ; (8003e28 ) - 8003c40: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8003c44: 6013 str r3, [r2, #0] - 8003c46: 4b78 ldr r3, [pc, #480] ; (8003e28 ) - 8003c48: 681b ldr r3, [r3, #0] - 8003c4a: 4a77 ldr r2, [pc, #476] ; (8003e28 ) - 8003c4c: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 8003c50: 6013 str r3, [r2, #0] - 8003c52: e01d b.n 8003c90 - 8003c54: 687b ldr r3, [r7, #4] - 8003c56: 685b ldr r3, [r3, #4] - 8003c58: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 - 8003c5c: d10c bne.n 8003c78 - 8003c5e: 4b72 ldr r3, [pc, #456] ; (8003e28 ) - 8003c60: 681b ldr r3, [r3, #0] - 8003c62: 4a71 ldr r2, [pc, #452] ; (8003e28 ) - 8003c64: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 8003c68: 6013 str r3, [r2, #0] - 8003c6a: 4b6f ldr r3, [pc, #444] ; (8003e28 ) - 8003c6c: 681b ldr r3, [r3, #0] - 8003c6e: 4a6e ldr r2, [pc, #440] ; (8003e28 ) - 8003c70: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8003c74: 6013 str r3, [r2, #0] - 8003c76: e00b b.n 8003c90 - 8003c78: 4b6b ldr r3, [pc, #428] ; (8003e28 ) - 8003c7a: 681b ldr r3, [r3, #0] - 8003c7c: 4a6a ldr r2, [pc, #424] ; (8003e28 ) - 8003c7e: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8003c82: 6013 str r3, [r2, #0] - 8003c84: 4b68 ldr r3, [pc, #416] ; (8003e28 ) - 8003c86: 681b ldr r3, [r3, #0] - 8003c88: 4a67 ldr r2, [pc, #412] ; (8003e28 ) - 8003c8a: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 8003c8e: 6013 str r3, [r2, #0] - - - /* Check the HSE State */ - if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 8003c90: 687b ldr r3, [r7, #4] - 8003c92: 685b ldr r3, [r3, #4] - 8003c94: 2b00 cmp r3, #0 - 8003c96: d013 beq.n 8003cc0 - { - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8003c98: f7ff f90e bl 8002eb8 - 8003c9c: 6138 str r0, [r7, #16] - - /* Wait till HSE is ready */ - while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8003c9e: e008 b.n 8003cb2 - { - if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 8003ca0: f7ff f90a bl 8002eb8 - 8003ca4: 4602 mov r2, r0 - 8003ca6: 693b ldr r3, [r7, #16] - 8003ca8: 1ad3 subs r3, r2, r3 - 8003caa: 2b64 cmp r3, #100 ; 0x64 - 8003cac: d901 bls.n 8003cb2 - { - return HAL_TIMEOUT; - 8003cae: 2303 movs r3, #3 - 8003cb0: e200 b.n 80040b4 - while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8003cb2: 4b5d ldr r3, [pc, #372] ; (8003e28 ) - 8003cb4: 681b ldr r3, [r3, #0] - 8003cb6: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8003cba: 2b00 cmp r3, #0 - 8003cbc: d0f0 beq.n 8003ca0 - 8003cbe: e014 b.n 8003cea - } - } - else - { - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8003cc0: f7ff f8fa bl 8002eb8 - 8003cc4: 6138 str r0, [r7, #16] - - /* Wait till HSE is disabled */ - while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8003cc6: e008 b.n 8003cda - { - if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 8003cc8: f7ff f8f6 bl 8002eb8 - 8003ccc: 4602 mov r2, r0 - 8003cce: 693b ldr r3, [r7, #16] - 8003cd0: 1ad3 subs r3, r2, r3 - 8003cd2: 2b64 cmp r3, #100 ; 0x64 - 8003cd4: d901 bls.n 8003cda - { - return HAL_TIMEOUT; - 8003cd6: 2303 movs r3, #3 - 8003cd8: e1ec b.n 80040b4 - while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8003cda: 4b53 ldr r3, [pc, #332] ; (8003e28 ) - 8003cdc: 681b ldr r3, [r3, #0] - 8003cde: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8003ce2: 2b00 cmp r3, #0 - 8003ce4: d1f0 bne.n 8003cc8 - 8003ce6: e000 b.n 8003cea - if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8003ce8: bf00 nop - } - } - } - } - /*----------------------------- HSI Configuration --------------------------*/ - if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8003cea: 687b ldr r3, [r7, #4] - 8003cec: 681b ldr r3, [r3, #0] - 8003cee: f003 0302 and.w r3, r3, #2 - 8003cf2: 2b00 cmp r3, #0 - 8003cf4: d063 beq.n 8003dbe - /* Check the parameters */ - assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); - assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); - - /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ - if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) - 8003cf6: 4b4c ldr r3, [pc, #304] ; (8003e28 ) - 8003cf8: 685b ldr r3, [r3, #4] - 8003cfa: f003 030c and.w r3, r3, #12 - 8003cfe: 2b00 cmp r3, #0 - 8003d00: d00b beq.n 8003d1a - || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) - 8003d02: 4b49 ldr r3, [pc, #292] ; (8003e28 ) - 8003d04: 685b ldr r3, [r3, #4] - 8003d06: f003 030c and.w r3, r3, #12 - 8003d0a: 2b08 cmp r3, #8 - 8003d0c: d11c bne.n 8003d48 - 8003d0e: 4b46 ldr r3, [pc, #280] ; (8003e28 ) - 8003d10: 685b ldr r3, [r3, #4] - 8003d12: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8003d16: 2b00 cmp r3, #0 - 8003d18: d116 bne.n 8003d48 - { - /* When HSI is used as system clock it will not disabled */ - if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8003d1a: 4b43 ldr r3, [pc, #268] ; (8003e28 ) - 8003d1c: 681b ldr r3, [r3, #0] - 8003d1e: f003 0302 and.w r3, r3, #2 - 8003d22: 2b00 cmp r3, #0 - 8003d24: d005 beq.n 8003d32 - 8003d26: 687b ldr r3, [r7, #4] - 8003d28: 691b ldr r3, [r3, #16] - 8003d2a: 2b01 cmp r3, #1 - 8003d2c: d001 beq.n 8003d32 - { - return HAL_ERROR; - 8003d2e: 2301 movs r3, #1 - 8003d30: e1c0 b.n 80040b4 - } - /* Otherwise, just the calibration is allowed */ - else - { - /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ - __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8003d32: 4b3d ldr r3, [pc, #244] ; (8003e28 ) - 8003d34: 681b ldr r3, [r3, #0] - 8003d36: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 8003d3a: 687b ldr r3, [r7, #4] - 8003d3c: 695b ldr r3, [r3, #20] - 8003d3e: 00db lsls r3, r3, #3 - 8003d40: 4939 ldr r1, [pc, #228] ; (8003e28 ) - 8003d42: 4313 orrs r3, r2 - 8003d44: 600b str r3, [r1, #0] - if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8003d46: e03a b.n 8003dbe - } - } - else - { - /* Check the HSI State */ - if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 8003d48: 687b ldr r3, [r7, #4] - 8003d4a: 691b ldr r3, [r3, #16] - 8003d4c: 2b00 cmp r3, #0 - 8003d4e: d020 beq.n 8003d92 - { - /* Enable the Internal High Speed oscillator (HSI). */ - __HAL_RCC_HSI_ENABLE(); - 8003d50: 4b36 ldr r3, [pc, #216] ; (8003e2c ) - 8003d52: 2201 movs r2, #1 - 8003d54: 601a str r2, [r3, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8003d56: f7ff f8af bl 8002eb8 - 8003d5a: 6138 str r0, [r7, #16] - - /* Wait till HSI is ready */ - while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8003d5c: e008 b.n 8003d70 - { - if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 8003d5e: f7ff f8ab bl 8002eb8 - 8003d62: 4602 mov r2, r0 - 8003d64: 693b ldr r3, [r7, #16] - 8003d66: 1ad3 subs r3, r2, r3 - 8003d68: 2b02 cmp r3, #2 - 8003d6a: d901 bls.n 8003d70 - { - return HAL_TIMEOUT; - 8003d6c: 2303 movs r3, #3 - 8003d6e: e1a1 b.n 80040b4 - while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8003d70: 4b2d ldr r3, [pc, #180] ; (8003e28 ) - 8003d72: 681b ldr r3, [r3, #0] - 8003d74: f003 0302 and.w r3, r3, #2 - 8003d78: 2b00 cmp r3, #0 - 8003d7a: d0f0 beq.n 8003d5e - } - } - - /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ - __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8003d7c: 4b2a ldr r3, [pc, #168] ; (8003e28 ) - 8003d7e: 681b ldr r3, [r3, #0] - 8003d80: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 8003d84: 687b ldr r3, [r7, #4] - 8003d86: 695b ldr r3, [r3, #20] - 8003d88: 00db lsls r3, r3, #3 - 8003d8a: 4927 ldr r1, [pc, #156] ; (8003e28 ) - 8003d8c: 4313 orrs r3, r2 - 8003d8e: 600b str r3, [r1, #0] - 8003d90: e015 b.n 8003dbe - } - else - { - /* Disable the Internal High Speed oscillator (HSI). */ - __HAL_RCC_HSI_DISABLE(); - 8003d92: 4b26 ldr r3, [pc, #152] ; (8003e2c ) - 8003d94: 2200 movs r2, #0 - 8003d96: 601a str r2, [r3, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8003d98: f7ff f88e bl 8002eb8 - 8003d9c: 6138 str r0, [r7, #16] - - /* Wait till HSI is disabled */ - while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8003d9e: e008 b.n 8003db2 - { - if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 8003da0: f7ff f88a bl 8002eb8 - 8003da4: 4602 mov r2, r0 - 8003da6: 693b ldr r3, [r7, #16] - 8003da8: 1ad3 subs r3, r2, r3 - 8003daa: 2b02 cmp r3, #2 - 8003dac: d901 bls.n 8003db2 - { - return HAL_TIMEOUT; - 8003dae: 2303 movs r3, #3 - 8003db0: e180 b.n 80040b4 - while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8003db2: 4b1d ldr r3, [pc, #116] ; (8003e28 ) - 8003db4: 681b ldr r3, [r3, #0] - 8003db6: f003 0302 and.w r3, r3, #2 - 8003dba: 2b00 cmp r3, #0 - 8003dbc: d1f0 bne.n 8003da0 - } - } - } - } - /*------------------------------ LSI Configuration -------------------------*/ - if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 8003dbe: 687b ldr r3, [r7, #4] - 8003dc0: 681b ldr r3, [r3, #0] - 8003dc2: f003 0308 and.w r3, r3, #8 - 8003dc6: 2b00 cmp r3, #0 - 8003dc8: d03a beq.n 8003e40 - { - /* Check the parameters */ - assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); - - /* Check the LSI State */ - if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 8003dca: 687b ldr r3, [r7, #4] - 8003dcc: 699b ldr r3, [r3, #24] - 8003dce: 2b00 cmp r3, #0 - 8003dd0: d019 beq.n 8003e06 - { - /* Enable the Internal Low Speed oscillator (LSI). */ - __HAL_RCC_LSI_ENABLE(); - 8003dd2: 4b17 ldr r3, [pc, #92] ; (8003e30 ) - 8003dd4: 2201 movs r2, #1 - 8003dd6: 601a str r2, [r3, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8003dd8: f7ff f86e bl 8002eb8 - 8003ddc: 6138 str r0, [r7, #16] - - /* Wait till LSI is ready */ - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8003dde: e008 b.n 8003df2 - { - if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 8003de0: f7ff f86a bl 8002eb8 - 8003de4: 4602 mov r2, r0 - 8003de6: 693b ldr r3, [r7, #16] - 8003de8: 1ad3 subs r3, r2, r3 - 8003dea: 2b02 cmp r3, #2 - 8003dec: d901 bls.n 8003df2 - { - return HAL_TIMEOUT; - 8003dee: 2303 movs r3, #3 - 8003df0: e160 b.n 80040b4 - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8003df2: 4b0d ldr r3, [pc, #52] ; (8003e28 ) - 8003df4: 6a5b ldr r3, [r3, #36] ; 0x24 - 8003df6: f003 0302 and.w r3, r3, #2 - 8003dfa: 2b00 cmp r3, #0 - 8003dfc: d0f0 beq.n 8003de0 - } - } - /* To have a fully stabilized clock in the specified range, a software delay of 1ms - should be added.*/ - RCC_Delay(1); - 8003dfe: 2001 movs r0, #1 - 8003e00: f000 fad8 bl 80043b4 - 8003e04: e01c b.n 8003e40 - } - else - { - /* Disable the Internal Low Speed oscillator (LSI). */ - __HAL_RCC_LSI_DISABLE(); - 8003e06: 4b0a ldr r3, [pc, #40] ; (8003e30 ) - 8003e08: 2200 movs r2, #0 - 8003e0a: 601a str r2, [r3, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8003e0c: f7ff f854 bl 8002eb8 - 8003e10: 6138 str r0, [r7, #16] - - /* Wait till LSI is disabled */ - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8003e12: e00f b.n 8003e34 - { - if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 8003e14: f7ff f850 bl 8002eb8 - 8003e18: 4602 mov r2, r0 - 8003e1a: 693b ldr r3, [r7, #16] - 8003e1c: 1ad3 subs r3, r2, r3 - 8003e1e: 2b02 cmp r3, #2 - 8003e20: d908 bls.n 8003e34 - { - return HAL_TIMEOUT; - 8003e22: 2303 movs r3, #3 - 8003e24: e146 b.n 80040b4 - 8003e26: bf00 nop - 8003e28: 40021000 .word 0x40021000 - 8003e2c: 42420000 .word 0x42420000 - 8003e30: 42420480 .word 0x42420480 - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8003e34: 4b92 ldr r3, [pc, #584] ; (8004080 ) - 8003e36: 6a5b ldr r3, [r3, #36] ; 0x24 - 8003e38: f003 0302 and.w r3, r3, #2 - 8003e3c: 2b00 cmp r3, #0 - 8003e3e: d1e9 bne.n 8003e14 - } - } - } - } - /*------------------------------ LSE Configuration -------------------------*/ - if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 8003e40: 687b ldr r3, [r7, #4] - 8003e42: 681b ldr r3, [r3, #0] - 8003e44: f003 0304 and.w r3, r3, #4 - 8003e48: 2b00 cmp r3, #0 - 8003e4a: f000 80a6 beq.w 8003f9a - { - FlagStatus pwrclkchanged = RESET; - 8003e4e: 2300 movs r3, #0 - 8003e50: 75fb strb r3, [r7, #23] - /* Check the parameters */ - assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); - - /* Update LSE configuration in Backup Domain control register */ - /* Requires to enable write access to Backup Domain of necessary */ - if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8003e52: 4b8b ldr r3, [pc, #556] ; (8004080 ) - 8003e54: 69db ldr r3, [r3, #28] - 8003e56: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8003e5a: 2b00 cmp r3, #0 - 8003e5c: d10d bne.n 8003e7a - { - __HAL_RCC_PWR_CLK_ENABLE(); - 8003e5e: 4b88 ldr r3, [pc, #544] ; (8004080 ) - 8003e60: 69db ldr r3, [r3, #28] - 8003e62: 4a87 ldr r2, [pc, #540] ; (8004080 ) - 8003e64: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8003e68: 61d3 str r3, [r2, #28] - 8003e6a: 4b85 ldr r3, [pc, #532] ; (8004080 ) - 8003e6c: 69db ldr r3, [r3, #28] - 8003e6e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8003e72: 60bb str r3, [r7, #8] - 8003e74: 68bb ldr r3, [r7, #8] - pwrclkchanged = SET; - 8003e76: 2301 movs r3, #1 - 8003e78: 75fb strb r3, [r7, #23] - } - - if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8003e7a: 4b82 ldr r3, [pc, #520] ; (8004084 ) - 8003e7c: 681b ldr r3, [r3, #0] - 8003e7e: f403 7380 and.w r3, r3, #256 ; 0x100 - 8003e82: 2b00 cmp r3, #0 - 8003e84: d118 bne.n 8003eb8 - { - /* Enable write access to Backup domain */ - SET_BIT(PWR->CR, PWR_CR_DBP); - 8003e86: 4b7f ldr r3, [pc, #508] ; (8004084 ) - 8003e88: 681b ldr r3, [r3, #0] - 8003e8a: 4a7e ldr r2, [pc, #504] ; (8004084 ) - 8003e8c: f443 7380 orr.w r3, r3, #256 ; 0x100 - 8003e90: 6013 str r3, [r2, #0] - - /* Wait for Backup domain Write protection disable */ - tickstart = HAL_GetTick(); - 8003e92: f7ff f811 bl 8002eb8 - 8003e96: 6138 str r0, [r7, #16] - - while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8003e98: e008 b.n 8003eac - { - if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8003e9a: f7ff f80d bl 8002eb8 - 8003e9e: 4602 mov r2, r0 - 8003ea0: 693b ldr r3, [r7, #16] - 8003ea2: 1ad3 subs r3, r2, r3 - 8003ea4: 2b64 cmp r3, #100 ; 0x64 - 8003ea6: d901 bls.n 8003eac - { - return HAL_TIMEOUT; - 8003ea8: 2303 movs r3, #3 - 8003eaa: e103 b.n 80040b4 - while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8003eac: 4b75 ldr r3, [pc, #468] ; (8004084 ) - 8003eae: 681b ldr r3, [r3, #0] - 8003eb0: f403 7380 and.w r3, r3, #256 ; 0x100 - 8003eb4: 2b00 cmp r3, #0 - 8003eb6: d0f0 beq.n 8003e9a - } - } - } - - /* Set the new LSE configuration -----------------------------------------*/ - __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 8003eb8: 687b ldr r3, [r7, #4] - 8003eba: 68db ldr r3, [r3, #12] - 8003ebc: 2b01 cmp r3, #1 - 8003ebe: d106 bne.n 8003ece - 8003ec0: 4b6f ldr r3, [pc, #444] ; (8004080 ) - 8003ec2: 6a1b ldr r3, [r3, #32] - 8003ec4: 4a6e ldr r2, [pc, #440] ; (8004080 ) - 8003ec6: f043 0301 orr.w r3, r3, #1 - 8003eca: 6213 str r3, [r2, #32] - 8003ecc: e02d b.n 8003f2a - 8003ece: 687b ldr r3, [r7, #4] - 8003ed0: 68db ldr r3, [r3, #12] - 8003ed2: 2b00 cmp r3, #0 - 8003ed4: d10c bne.n 8003ef0 - 8003ed6: 4b6a ldr r3, [pc, #424] ; (8004080 ) - 8003ed8: 6a1b ldr r3, [r3, #32] - 8003eda: 4a69 ldr r2, [pc, #420] ; (8004080 ) - 8003edc: f023 0301 bic.w r3, r3, #1 - 8003ee0: 6213 str r3, [r2, #32] - 8003ee2: 4b67 ldr r3, [pc, #412] ; (8004080 ) - 8003ee4: 6a1b ldr r3, [r3, #32] - 8003ee6: 4a66 ldr r2, [pc, #408] ; (8004080 ) - 8003ee8: f023 0304 bic.w r3, r3, #4 - 8003eec: 6213 str r3, [r2, #32] - 8003eee: e01c b.n 8003f2a - 8003ef0: 687b ldr r3, [r7, #4] - 8003ef2: 68db ldr r3, [r3, #12] - 8003ef4: 2b05 cmp r3, #5 - 8003ef6: d10c bne.n 8003f12 - 8003ef8: 4b61 ldr r3, [pc, #388] ; (8004080 ) - 8003efa: 6a1b ldr r3, [r3, #32] - 8003efc: 4a60 ldr r2, [pc, #384] ; (8004080 ) - 8003efe: f043 0304 orr.w r3, r3, #4 - 8003f02: 6213 str r3, [r2, #32] - 8003f04: 4b5e ldr r3, [pc, #376] ; (8004080 ) - 8003f06: 6a1b ldr r3, [r3, #32] - 8003f08: 4a5d ldr r2, [pc, #372] ; (8004080 ) - 8003f0a: f043 0301 orr.w r3, r3, #1 - 8003f0e: 6213 str r3, [r2, #32] - 8003f10: e00b b.n 8003f2a - 8003f12: 4b5b ldr r3, [pc, #364] ; (8004080 ) - 8003f14: 6a1b ldr r3, [r3, #32] - 8003f16: 4a5a ldr r2, [pc, #360] ; (8004080 ) - 8003f18: f023 0301 bic.w r3, r3, #1 - 8003f1c: 6213 str r3, [r2, #32] - 8003f1e: 4b58 ldr r3, [pc, #352] ; (8004080 ) - 8003f20: 6a1b ldr r3, [r3, #32] - 8003f22: 4a57 ldr r2, [pc, #348] ; (8004080 ) - 8003f24: f023 0304 bic.w r3, r3, #4 - 8003f28: 6213 str r3, [r2, #32] - /* Check the LSE State */ - if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 8003f2a: 687b ldr r3, [r7, #4] - 8003f2c: 68db ldr r3, [r3, #12] - 8003f2e: 2b00 cmp r3, #0 - 8003f30: d015 beq.n 8003f5e - { - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8003f32: f7fe ffc1 bl 8002eb8 - 8003f36: 6138 str r0, [r7, #16] - - /* Wait till LSE is ready */ - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8003f38: e00a b.n 8003f50 - { - if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8003f3a: f7fe ffbd bl 8002eb8 - 8003f3e: 4602 mov r2, r0 - 8003f40: 693b ldr r3, [r7, #16] - 8003f42: 1ad3 subs r3, r2, r3 - 8003f44: f241 3288 movw r2, #5000 ; 0x1388 - 8003f48: 4293 cmp r3, r2 - 8003f4a: d901 bls.n 8003f50 - { - return HAL_TIMEOUT; - 8003f4c: 2303 movs r3, #3 - 8003f4e: e0b1 b.n 80040b4 - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8003f50: 4b4b ldr r3, [pc, #300] ; (8004080 ) - 8003f52: 6a1b ldr r3, [r3, #32] - 8003f54: f003 0302 and.w r3, r3, #2 - 8003f58: 2b00 cmp r3, #0 - 8003f5a: d0ee beq.n 8003f3a - 8003f5c: e014 b.n 8003f88 - } - } - else - { - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8003f5e: f7fe ffab bl 8002eb8 - 8003f62: 6138 str r0, [r7, #16] - - /* Wait till LSE is disabled */ - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8003f64: e00a b.n 8003f7c - { - if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8003f66: f7fe ffa7 bl 8002eb8 - 8003f6a: 4602 mov r2, r0 - 8003f6c: 693b ldr r3, [r7, #16] - 8003f6e: 1ad3 subs r3, r2, r3 - 8003f70: f241 3288 movw r2, #5000 ; 0x1388 - 8003f74: 4293 cmp r3, r2 - 8003f76: d901 bls.n 8003f7c - { - return HAL_TIMEOUT; - 8003f78: 2303 movs r3, #3 - 8003f7a: e09b b.n 80040b4 - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8003f7c: 4b40 ldr r3, [pc, #256] ; (8004080 ) - 8003f7e: 6a1b ldr r3, [r3, #32] - 8003f80: f003 0302 and.w r3, r3, #2 - 8003f84: 2b00 cmp r3, #0 - 8003f86: d1ee bne.n 8003f66 - } - } - } - - /* Require to disable power clock if necessary */ - if (pwrclkchanged == SET) - 8003f88: 7dfb ldrb r3, [r7, #23] - 8003f8a: 2b01 cmp r3, #1 - 8003f8c: d105 bne.n 8003f9a - { - __HAL_RCC_PWR_CLK_DISABLE(); - 8003f8e: 4b3c ldr r3, [pc, #240] ; (8004080 ) - 8003f90: 69db ldr r3, [r3, #28] - 8003f92: 4a3b ldr r2, [pc, #236] ; (8004080 ) - 8003f94: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 8003f98: 61d3 str r3, [r2, #28] - -#endif /* RCC_CR_PLL2ON */ - /*-------------------------------- PLL Configuration -----------------------*/ - /* Check the parameters */ - assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); - if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 8003f9a: 687b ldr r3, [r7, #4] - 8003f9c: 69db ldr r3, [r3, #28] - 8003f9e: 2b00 cmp r3, #0 - 8003fa0: f000 8087 beq.w 80040b2 - { - /* Check if the PLL is used as system clock or not */ - if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8003fa4: 4b36 ldr r3, [pc, #216] ; (8004080 ) - 8003fa6: 685b ldr r3, [r3, #4] - 8003fa8: f003 030c and.w r3, r3, #12 - 8003fac: 2b08 cmp r3, #8 - 8003fae: d061 beq.n 8004074 - { - if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 8003fb0: 687b ldr r3, [r7, #4] - 8003fb2: 69db ldr r3, [r3, #28] - 8003fb4: 2b02 cmp r3, #2 - 8003fb6: d146 bne.n 8004046 - /* Check the parameters */ - assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); - assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); - - /* Disable the main PLL. */ - __HAL_RCC_PLL_DISABLE(); - 8003fb8: 4b33 ldr r3, [pc, #204] ; (8004088 ) - 8003fba: 2200 movs r2, #0 - 8003fbc: 601a str r2, [r3, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 8003fbe: f7fe ff7b bl 8002eb8 - 8003fc2: 6138 str r0, [r7, #16] - - /* Wait till PLL is disabled */ - while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8003fc4: e008 b.n 8003fd8 - { - if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8003fc6: f7fe ff77 bl 8002eb8 - 8003fca: 4602 mov r2, r0 - 8003fcc: 693b ldr r3, [r7, #16] - 8003fce: 1ad3 subs r3, r2, r3 - 8003fd0: 2b02 cmp r3, #2 - 8003fd2: d901 bls.n 8003fd8 - { - return HAL_TIMEOUT; - 8003fd4: 2303 movs r3, #3 - 8003fd6: e06d b.n 80040b4 - while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8003fd8: 4b29 ldr r3, [pc, #164] ; (8004080 ) - 8003fda: 681b ldr r3, [r3, #0] - 8003fdc: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8003fe0: 2b00 cmp r3, #0 - 8003fe2: d1f0 bne.n 8003fc6 - } - } - - /* Configure the HSE prediv factor --------------------------------*/ - /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ - if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) - 8003fe4: 687b ldr r3, [r7, #4] - 8003fe6: 6a1b ldr r3, [r3, #32] - 8003fe8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8003fec: d108 bne.n 8004000 - /* Set PREDIV1 source */ - SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); -#endif /* RCC_CFGR2_PREDIV1SRC */ - - /* Set PREDIV1 Value */ - __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); - 8003fee: 4b24 ldr r3, [pc, #144] ; (8004080 ) - 8003ff0: 685b ldr r3, [r3, #4] - 8003ff2: f423 3200 bic.w r2, r3, #131072 ; 0x20000 - 8003ff6: 687b ldr r3, [r7, #4] - 8003ff8: 689b ldr r3, [r3, #8] - 8003ffa: 4921 ldr r1, [pc, #132] ; (8004080 ) - 8003ffc: 4313 orrs r3, r2 - 8003ffe: 604b str r3, [r1, #4] - } - - /* Configure the main PLL clock source and multiplication factors. */ - __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 8004000: 4b1f ldr r3, [pc, #124] ; (8004080 ) - 8004002: 685b ldr r3, [r3, #4] - 8004004: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000 - 8004008: 687b ldr r3, [r7, #4] - 800400a: 6a19 ldr r1, [r3, #32] - 800400c: 687b ldr r3, [r7, #4] - 800400e: 6a5b ldr r3, [r3, #36] ; 0x24 - 8004010: 430b orrs r3, r1 - 8004012: 491b ldr r1, [pc, #108] ; (8004080 ) - 8004014: 4313 orrs r3, r2 - 8004016: 604b str r3, [r1, #4] - RCC_OscInitStruct->PLL.PLLMUL); - /* Enable the main PLL. */ - __HAL_RCC_PLL_ENABLE(); - 8004018: 4b1b ldr r3, [pc, #108] ; (8004088 ) - 800401a: 2201 movs r2, #1 - 800401c: 601a str r2, [r3, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 800401e: f7fe ff4b bl 8002eb8 - 8004022: 6138 str r0, [r7, #16] - - /* Wait till PLL is ready */ - while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8004024: e008 b.n 8004038 - { - if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8004026: f7fe ff47 bl 8002eb8 - 800402a: 4602 mov r2, r0 - 800402c: 693b ldr r3, [r7, #16] - 800402e: 1ad3 subs r3, r2, r3 - 8004030: 2b02 cmp r3, #2 - 8004032: d901 bls.n 8004038 - { - return HAL_TIMEOUT; - 8004034: 2303 movs r3, #3 - 8004036: e03d b.n 80040b4 - while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8004038: 4b11 ldr r3, [pc, #68] ; (8004080 ) - 800403a: 681b ldr r3, [r3, #0] - 800403c: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8004040: 2b00 cmp r3, #0 - 8004042: d0f0 beq.n 8004026 - 8004044: e035 b.n 80040b2 - } - } - else - { - /* Disable the main PLL. */ - __HAL_RCC_PLL_DISABLE(); - 8004046: 4b10 ldr r3, [pc, #64] ; (8004088 ) - 8004048: 2200 movs r2, #0 - 800404a: 601a str r2, [r3, #0] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 800404c: f7fe ff34 bl 8002eb8 - 8004050: 6138 str r0, [r7, #16] - - /* Wait till PLL is disabled */ - while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8004052: e008 b.n 8004066 - { - if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8004054: f7fe ff30 bl 8002eb8 - 8004058: 4602 mov r2, r0 - 800405a: 693b ldr r3, [r7, #16] - 800405c: 1ad3 subs r3, r2, r3 - 800405e: 2b02 cmp r3, #2 - 8004060: d901 bls.n 8004066 - { - return HAL_TIMEOUT; - 8004062: 2303 movs r3, #3 - 8004064: e026 b.n 80040b4 - while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8004066: 4b06 ldr r3, [pc, #24] ; (8004080 ) - 8004068: 681b ldr r3, [r3, #0] - 800406a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 800406e: 2b00 cmp r3, #0 - 8004070: d1f0 bne.n 8004054 - 8004072: e01e b.n 80040b2 - } - } - else - { - /* Check if there is a request to disable the PLL used as System clock source */ - if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 8004074: 687b ldr r3, [r7, #4] - 8004076: 69db ldr r3, [r3, #28] - 8004078: 2b01 cmp r3, #1 - 800407a: d107 bne.n 800408c - { - return HAL_ERROR; - 800407c: 2301 movs r3, #1 - 800407e: e019 b.n 80040b4 - 8004080: 40021000 .word 0x40021000 - 8004084: 40007000 .word 0x40007000 - 8004088: 42420060 .word 0x42420060 - } - else - { - /* Do not return HAL_ERROR if request repeats the current configuration */ - pll_config = RCC->CFGR; - 800408c: 4b0b ldr r3, [pc, #44] ; (80040bc ) - 800408e: 685b ldr r3, [r3, #4] - 8004090: 60fb str r3, [r7, #12] - if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8004092: 68fb ldr r3, [r7, #12] - 8004094: f403 3280 and.w r2, r3, #65536 ; 0x10000 - 8004098: 687b ldr r3, [r7, #4] - 800409a: 6a1b ldr r3, [r3, #32] - 800409c: 429a cmp r2, r3 - 800409e: d106 bne.n 80040ae - (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) - 80040a0: 68fb ldr r3, [r7, #12] - 80040a2: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000 - 80040a6: 687b ldr r3, [r7, #4] - 80040a8: 6a5b ldr r3, [r3, #36] ; 0x24 - if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80040aa: 429a cmp r2, r3 - 80040ac: d001 beq.n 80040b2 - { - return HAL_ERROR; - 80040ae: 2301 movs r3, #1 - 80040b0: e000 b.n 80040b4 - } - } - } - } - - return HAL_OK; - 80040b2: 2300 movs r3, #0 -} - 80040b4: 4618 mov r0, r3 - 80040b6: 3718 adds r7, #24 - 80040b8: 46bd mov sp, r7 - 80040ba: bd80 pop {r7, pc} - 80040bc: 40021000 .word 0x40021000 - -080040c0 : - * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is - * currently used as system clock source. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) -{ - 80040c0: b580 push {r7, lr} - 80040c2: b084 sub sp, #16 - 80040c4: af00 add r7, sp, #0 - 80040c6: 6078 str r0, [r7, #4] - 80040c8: 6039 str r1, [r7, #0] - uint32_t tickstart; - - /* Check Null pointer */ - if (RCC_ClkInitStruct == NULL) - 80040ca: 687b ldr r3, [r7, #4] - 80040cc: 2b00 cmp r3, #0 - 80040ce: d101 bne.n 80040d4 - { - return HAL_ERROR; - 80040d0: 2301 movs r3, #1 - 80040d2: e0d0 b.n 8004276 - must be correctly programmed according to the frequency of the CPU clock - (HCLK) of the device. */ - -#if defined(FLASH_ACR_LATENCY) - /* Increasing the number of wait states because of higher CPU frequency */ - if (FLatency > __HAL_FLASH_GET_LATENCY()) - 80040d4: 4b6a ldr r3, [pc, #424] ; (8004280 ) - 80040d6: 681b ldr r3, [r3, #0] - 80040d8: f003 0307 and.w r3, r3, #7 - 80040dc: 683a ldr r2, [r7, #0] - 80040de: 429a cmp r2, r3 - 80040e0: d910 bls.n 8004104 - { - /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ - __HAL_FLASH_SET_LATENCY(FLatency); - 80040e2: 4b67 ldr r3, [pc, #412] ; (8004280 ) - 80040e4: 681b ldr r3, [r3, #0] - 80040e6: f023 0207 bic.w r2, r3, #7 - 80040ea: 4965 ldr r1, [pc, #404] ; (8004280 ) - 80040ec: 683b ldr r3, [r7, #0] - 80040ee: 4313 orrs r3, r2 - 80040f0: 600b str r3, [r1, #0] - - /* Check that the new number of wait states is taken into account to access the Flash - memory by reading the FLASH_ACR register */ - if (__HAL_FLASH_GET_LATENCY() != FLatency) - 80040f2: 4b63 ldr r3, [pc, #396] ; (8004280 ) - 80040f4: 681b ldr r3, [r3, #0] - 80040f6: f003 0307 and.w r3, r3, #7 - 80040fa: 683a ldr r2, [r7, #0] - 80040fc: 429a cmp r2, r3 - 80040fe: d001 beq.n 8004104 - { - return HAL_ERROR; - 8004100: 2301 movs r3, #1 - 8004102: e0b8 b.n 8004276 - } -} - -#endif /* FLASH_ACR_LATENCY */ -/*-------------------------- HCLK Configuration --------------------------*/ -if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8004104: 687b ldr r3, [r7, #4] - 8004106: 681b ldr r3, [r3, #0] - 8004108: f003 0302 and.w r3, r3, #2 - 800410c: 2b00 cmp r3, #0 - 800410e: d020 beq.n 8004152 - { - /* Set the highest APBx dividers in order to ensure that we do not go through - a non-spec phase whatever we decrease or increase HCLK. */ - if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8004110: 687b ldr r3, [r7, #4] - 8004112: 681b ldr r3, [r3, #0] - 8004114: f003 0304 and.w r3, r3, #4 - 8004118: 2b00 cmp r3, #0 - 800411a: d005 beq.n 8004128 - { - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); - 800411c: 4b59 ldr r3, [pc, #356] ; (8004284 ) - 800411e: 685b ldr r3, [r3, #4] - 8004120: 4a58 ldr r2, [pc, #352] ; (8004284 ) - 8004122: f443 63e0 orr.w r3, r3, #1792 ; 0x700 - 8004126: 6053 str r3, [r2, #4] - } - - if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8004128: 687b ldr r3, [r7, #4] - 800412a: 681b ldr r3, [r3, #0] - 800412c: f003 0308 and.w r3, r3, #8 - 8004130: 2b00 cmp r3, #0 - 8004132: d005 beq.n 8004140 - { - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); - 8004134: 4b53 ldr r3, [pc, #332] ; (8004284 ) - 8004136: 685b ldr r3, [r3, #4] - 8004138: 4a52 ldr r2, [pc, #328] ; (8004284 ) - 800413a: f443 5360 orr.w r3, r3, #14336 ; 0x3800 - 800413e: 6053 str r3, [r2, #4] - } - - /* Set the new HCLK clock divider */ - assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8004140: 4b50 ldr r3, [pc, #320] ; (8004284 ) - 8004142: 685b ldr r3, [r3, #4] - 8004144: f023 02f0 bic.w r2, r3, #240 ; 0xf0 - 8004148: 687b ldr r3, [r7, #4] - 800414a: 689b ldr r3, [r3, #8] - 800414c: 494d ldr r1, [pc, #308] ; (8004284 ) - 800414e: 4313 orrs r3, r2 - 8004150: 604b str r3, [r1, #4] - } - - /*------------------------- SYSCLK Configuration ---------------------------*/ - if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 8004152: 687b ldr r3, [r7, #4] - 8004154: 681b ldr r3, [r3, #0] - 8004156: f003 0301 and.w r3, r3, #1 - 800415a: 2b00 cmp r3, #0 - 800415c: d040 beq.n 80041e0 - { - assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); - - /* HSE is selected as System Clock Source */ - if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 800415e: 687b ldr r3, [r7, #4] - 8004160: 685b ldr r3, [r3, #4] - 8004162: 2b01 cmp r3, #1 - 8004164: d107 bne.n 8004176 - { - /* Check the HSE ready flag */ - if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8004166: 4b47 ldr r3, [pc, #284] ; (8004284 ) - 8004168: 681b ldr r3, [r3, #0] - 800416a: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 800416e: 2b00 cmp r3, #0 - 8004170: d115 bne.n 800419e - { - return HAL_ERROR; - 8004172: 2301 movs r3, #1 - 8004174: e07f b.n 8004276 - } - } - /* PLL is selected as System Clock Source */ - else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 8004176: 687b ldr r3, [r7, #4] - 8004178: 685b ldr r3, [r3, #4] - 800417a: 2b02 cmp r3, #2 - 800417c: d107 bne.n 800418e - { - /* Check the PLL ready flag */ - if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 800417e: 4b41 ldr r3, [pc, #260] ; (8004284 ) - 8004180: 681b ldr r3, [r3, #0] - 8004182: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8004186: 2b00 cmp r3, #0 - 8004188: d109 bne.n 800419e - { - return HAL_ERROR; - 800418a: 2301 movs r3, #1 - 800418c: e073 b.n 8004276 - } - /* HSI is selected as System Clock Source */ - else - { - /* Check the HSI ready flag */ - if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 800418e: 4b3d ldr r3, [pc, #244] ; (8004284 ) - 8004190: 681b ldr r3, [r3, #0] - 8004192: f003 0302 and.w r3, r3, #2 - 8004196: 2b00 cmp r3, #0 - 8004198: d101 bne.n 800419e - { - return HAL_ERROR; - 800419a: 2301 movs r3, #1 - 800419c: e06b b.n 8004276 - } - } - __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 800419e: 4b39 ldr r3, [pc, #228] ; (8004284 ) - 80041a0: 685b ldr r3, [r3, #4] - 80041a2: f023 0203 bic.w r2, r3, #3 - 80041a6: 687b ldr r3, [r7, #4] - 80041a8: 685b ldr r3, [r3, #4] - 80041aa: 4936 ldr r1, [pc, #216] ; (8004284 ) - 80041ac: 4313 orrs r3, r2 - 80041ae: 604b str r3, [r1, #4] - - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 80041b0: f7fe fe82 bl 8002eb8 - 80041b4: 60f8 str r0, [r7, #12] - - while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80041b6: e00a b.n 80041ce - { - if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 80041b8: f7fe fe7e bl 8002eb8 - 80041bc: 4602 mov r2, r0 - 80041be: 68fb ldr r3, [r7, #12] - 80041c0: 1ad3 subs r3, r2, r3 - 80041c2: f241 3288 movw r2, #5000 ; 0x1388 - 80041c6: 4293 cmp r3, r2 - 80041c8: d901 bls.n 80041ce - { - return HAL_TIMEOUT; - 80041ca: 2303 movs r3, #3 - 80041cc: e053 b.n 8004276 - while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80041ce: 4b2d ldr r3, [pc, #180] ; (8004284 ) - 80041d0: 685b ldr r3, [r3, #4] - 80041d2: f003 020c and.w r2, r3, #12 - 80041d6: 687b ldr r3, [r7, #4] - 80041d8: 685b ldr r3, [r3, #4] - 80041da: 009b lsls r3, r3, #2 - 80041dc: 429a cmp r2, r3 - 80041de: d1eb bne.n 80041b8 - } - } - -#if defined(FLASH_ACR_LATENCY) - /* Decreasing the number of wait states because of lower CPU frequency */ - if (FLatency < __HAL_FLASH_GET_LATENCY()) - 80041e0: 4b27 ldr r3, [pc, #156] ; (8004280 ) - 80041e2: 681b ldr r3, [r3, #0] - 80041e4: f003 0307 and.w r3, r3, #7 - 80041e8: 683a ldr r2, [r7, #0] - 80041ea: 429a cmp r2, r3 - 80041ec: d210 bcs.n 8004210 - { - /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ - __HAL_FLASH_SET_LATENCY(FLatency); - 80041ee: 4b24 ldr r3, [pc, #144] ; (8004280 ) - 80041f0: 681b ldr r3, [r3, #0] - 80041f2: f023 0207 bic.w r2, r3, #7 - 80041f6: 4922 ldr r1, [pc, #136] ; (8004280 ) - 80041f8: 683b ldr r3, [r7, #0] - 80041fa: 4313 orrs r3, r2 - 80041fc: 600b str r3, [r1, #0] - - /* Check that the new number of wait states is taken into account to access the Flash - memory by reading the FLASH_ACR register */ - if (__HAL_FLASH_GET_LATENCY() != FLatency) - 80041fe: 4b20 ldr r3, [pc, #128] ; (8004280 ) - 8004200: 681b ldr r3, [r3, #0] - 8004202: f003 0307 and.w r3, r3, #7 - 8004206: 683a ldr r2, [r7, #0] - 8004208: 429a cmp r2, r3 - 800420a: d001 beq.n 8004210 - { - return HAL_ERROR; - 800420c: 2301 movs r3, #1 - 800420e: e032 b.n 8004276 - } -} -#endif /* FLASH_ACR_LATENCY */ - -/*-------------------------- PCLK1 Configuration ---------------------------*/ -if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8004210: 687b ldr r3, [r7, #4] - 8004212: 681b ldr r3, [r3, #0] - 8004214: f003 0304 and.w r3, r3, #4 - 8004218: 2b00 cmp r3, #0 - 800421a: d008 beq.n 800422e - { - assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 800421c: 4b19 ldr r3, [pc, #100] ; (8004284 ) - 800421e: 685b ldr r3, [r3, #4] - 8004220: f423 62e0 bic.w r2, r3, #1792 ; 0x700 - 8004224: 687b ldr r3, [r7, #4] - 8004226: 68db ldr r3, [r3, #12] - 8004228: 4916 ldr r1, [pc, #88] ; (8004284 ) - 800422a: 4313 orrs r3, r2 - 800422c: 604b str r3, [r1, #4] - } - - /*-------------------------- PCLK2 Configuration ---------------------------*/ - if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 800422e: 687b ldr r3, [r7, #4] - 8004230: 681b ldr r3, [r3, #0] - 8004232: f003 0308 and.w r3, r3, #8 - 8004236: 2b00 cmp r3, #0 - 8004238: d009 beq.n 800424e - { - assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); - 800423a: 4b12 ldr r3, [pc, #72] ; (8004284 ) - 800423c: 685b ldr r3, [r3, #4] - 800423e: f423 5260 bic.w r2, r3, #14336 ; 0x3800 - 8004242: 687b ldr r3, [r7, #4] - 8004244: 691b ldr r3, [r3, #16] - 8004246: 00db lsls r3, r3, #3 - 8004248: 490e ldr r1, [pc, #56] ; (8004284 ) - 800424a: 4313 orrs r3, r2 - 800424c: 604b str r3, [r1, #4] - } - - /* Update the SystemCoreClock global variable */ - SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; - 800424e: f000 f821 bl 8004294 - 8004252: 4602 mov r2, r0 - 8004254: 4b0b ldr r3, [pc, #44] ; (8004284 ) - 8004256: 685b ldr r3, [r3, #4] - 8004258: 091b lsrs r3, r3, #4 - 800425a: f003 030f and.w r3, r3, #15 - 800425e: 490a ldr r1, [pc, #40] ; (8004288 ) - 8004260: 5ccb ldrb r3, [r1, r3] - 8004262: fa22 f303 lsr.w r3, r2, r3 - 8004266: 4a09 ldr r2, [pc, #36] ; (800428c ) - 8004268: 6013 str r3, [r2, #0] - - /* Configure the source of time base considering new system clocks settings*/ - HAL_InitTick(uwTickPrio); - 800426a: 4b09 ldr r3, [pc, #36] ; (8004290 ) - 800426c: 681b ldr r3, [r3, #0] - 800426e: 4618 mov r0, r3 - 8004270: f7fe fde0 bl 8002e34 - - return HAL_OK; - 8004274: 2300 movs r3, #0 -} - 8004276: 4618 mov r0, r3 - 8004278: 3710 adds r7, #16 - 800427a: 46bd mov sp, r7 - 800427c: bd80 pop {r7, pc} - 800427e: bf00 nop - 8004280: 40022000 .word 0x40022000 - 8004284: 40021000 .word 0x40021000 - 8004288: 0800b0c4 .word 0x0800b0c4 - 800428c: 20000010 .word 0x20000010 - 8004290: 20000014 .word 0x20000014 - -08004294 : - * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. - * - * @retval SYSCLK frequency - */ -uint32_t HAL_RCC_GetSysClockFreq(void) -{ - 8004294: b490 push {r4, r7} - 8004296: b08a sub sp, #40 ; 0x28 - 8004298: af00 add r7, sp, #0 -#if defined(RCC_CFGR2_PREDIV1SRC) - const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13}; - const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; -#else - const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; - 800429a: 4b29 ldr r3, [pc, #164] ; (8004340 ) - 800429c: 1d3c adds r4, r7, #4 - 800429e: cb0f ldmia r3, {r0, r1, r2, r3} - 80042a0: e884 000f stmia.w r4, {r0, r1, r2, r3} -#if defined(RCC_CFGR2_PREDIV1) - const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; -#else - const uint8_t aPredivFactorTable[2] = {1, 2}; - 80042a4: f240 2301 movw r3, #513 ; 0x201 - 80042a8: 803b strh r3, [r7, #0] -#endif /*RCC_CFGR2_PREDIV1*/ - -#endif - uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; - 80042aa: 2300 movs r3, #0 - 80042ac: 61fb str r3, [r7, #28] - 80042ae: 2300 movs r3, #0 - 80042b0: 61bb str r3, [r7, #24] - 80042b2: 2300 movs r3, #0 - 80042b4: 627b str r3, [r7, #36] ; 0x24 - 80042b6: 2300 movs r3, #0 - 80042b8: 617b str r3, [r7, #20] - uint32_t sysclockfreq = 0U; - 80042ba: 2300 movs r3, #0 - 80042bc: 623b str r3, [r7, #32] -#if defined(RCC_CFGR2_PREDIV1SRC) - uint32_t prediv2 = 0U, pll2mul = 0U; -#endif /*RCC_CFGR2_PREDIV1SRC*/ - - tmpreg = RCC->CFGR; - 80042be: 4b21 ldr r3, [pc, #132] ; (8004344 ) - 80042c0: 685b ldr r3, [r3, #4] - 80042c2: 61fb str r3, [r7, #28] - - /* Get SYSCLK source -------------------------------------------------------*/ - switch (tmpreg & RCC_CFGR_SWS) - 80042c4: 69fb ldr r3, [r7, #28] - 80042c6: f003 030c and.w r3, r3, #12 - 80042ca: 2b04 cmp r3, #4 - 80042cc: d002 beq.n 80042d4 - 80042ce: 2b08 cmp r3, #8 - 80042d0: d003 beq.n 80042da - 80042d2: e02b b.n 800432c - { - case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ - { - sysclockfreq = HSE_VALUE; - 80042d4: 4b1c ldr r3, [pc, #112] ; (8004348 ) - 80042d6: 623b str r3, [r7, #32] - break; - 80042d8: e02b b.n 8004332 - } - case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ - { - pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; - 80042da: 69fb ldr r3, [r7, #28] - 80042dc: 0c9b lsrs r3, r3, #18 - 80042de: f003 030f and.w r3, r3, #15 - 80042e2: 3328 adds r3, #40 ; 0x28 - 80042e4: 443b add r3, r7 - 80042e6: f813 3c24 ldrb.w r3, [r3, #-36] - 80042ea: 617b str r3, [r7, #20] - if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) - 80042ec: 69fb ldr r3, [r7, #28] - 80042ee: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 80042f2: 2b00 cmp r3, #0 - 80042f4: d012 beq.n 800431c - { -#if defined(RCC_CFGR2_PREDIV1) - prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; -#else - prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; - 80042f6: 4b13 ldr r3, [pc, #76] ; (8004344 ) - 80042f8: 685b ldr r3, [r3, #4] - 80042fa: 0c5b lsrs r3, r3, #17 - 80042fc: f003 0301 and.w r3, r3, #1 - 8004300: 3328 adds r3, #40 ; 0x28 - 8004302: 443b add r3, r7 - 8004304: f813 3c28 ldrb.w r3, [r3, #-40] - 8004308: 61bb str r3, [r7, #24] - { - pllclk = pllclk / 2; - } -#else - /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ - pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); - 800430a: 697b ldr r3, [r7, #20] - 800430c: 4a0e ldr r2, [pc, #56] ; (8004348 ) - 800430e: fb03 f202 mul.w r2, r3, r2 - 8004312: 69bb ldr r3, [r7, #24] - 8004314: fbb2 f3f3 udiv r3, r2, r3 - 8004318: 627b str r3, [r7, #36] ; 0x24 - 800431a: e004 b.n 8004326 -#endif /*RCC_CFGR2_PREDIV1SRC*/ - } - else - { - /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ - pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); - 800431c: 697b ldr r3, [r7, #20] - 800431e: 4a0b ldr r2, [pc, #44] ; (800434c ) - 8004320: fb02 f303 mul.w r3, r2, r3 - 8004324: 627b str r3, [r7, #36] ; 0x24 - } - sysclockfreq = pllclk; - 8004326: 6a7b ldr r3, [r7, #36] ; 0x24 - 8004328: 623b str r3, [r7, #32] - break; - 800432a: e002 b.n 8004332 - } - case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ - default: /* HSI used as system clock */ - { - sysclockfreq = HSI_VALUE; - 800432c: 4b06 ldr r3, [pc, #24] ; (8004348 ) - 800432e: 623b str r3, [r7, #32] - break; - 8004330: bf00 nop - } - } - return sysclockfreq; - 8004332: 6a3b ldr r3, [r7, #32] -} - 8004334: 4618 mov r0, r3 - 8004336: 3728 adds r7, #40 ; 0x28 - 8004338: 46bd mov sp, r7 - 800433a: bc90 pop {r4, r7} - 800433c: 4770 bx lr - 800433e: bf00 nop - 8004340: 0800b094 .word 0x0800b094 - 8004344: 40021000 .word 0x40021000 - 8004348: 007a1200 .word 0x007a1200 - 800434c: 003d0900 .word 0x003d0900 - -08004350 : - * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency - * and updated within this function - * @retval HCLK frequency - */ -uint32_t HAL_RCC_GetHCLKFreq(void) -{ - 8004350: b480 push {r7} - 8004352: af00 add r7, sp, #0 - return SystemCoreClock; - 8004354: 4b02 ldr r3, [pc, #8] ; (8004360 ) - 8004356: 681b ldr r3, [r3, #0] -} - 8004358: 4618 mov r0, r3 - 800435a: 46bd mov sp, r7 - 800435c: bc80 pop {r7} - 800435e: 4770 bx lr - 8004360: 20000010 .word 0x20000010 - -08004364 : - * @note Each time PCLK1 changes, this function must be called to update the - * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. - * @retval PCLK1 frequency - */ -uint32_t HAL_RCC_GetPCLK1Freq(void) -{ - 8004364: b580 push {r7, lr} - 8004366: af00 add r7, sp, #0 - /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ - return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); - 8004368: f7ff fff2 bl 8004350 - 800436c: 4602 mov r2, r0 - 800436e: 4b05 ldr r3, [pc, #20] ; (8004384 ) - 8004370: 685b ldr r3, [r3, #4] - 8004372: 0a1b lsrs r3, r3, #8 - 8004374: f003 0307 and.w r3, r3, #7 - 8004378: 4903 ldr r1, [pc, #12] ; (8004388 ) - 800437a: 5ccb ldrb r3, [r1, r3] - 800437c: fa22 f303 lsr.w r3, r2, r3 -} - 8004380: 4618 mov r0, r3 - 8004382: bd80 pop {r7, pc} - 8004384: 40021000 .word 0x40021000 - 8004388: 0800b0d4 .word 0x0800b0d4 - -0800438c : - * @note Each time PCLK2 changes, this function must be called to update the - * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. - * @retval PCLK2 frequency - */ -uint32_t HAL_RCC_GetPCLK2Freq(void) -{ - 800438c: b580 push {r7, lr} - 800438e: af00 add r7, sp, #0 - /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ - return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); - 8004390: f7ff ffde bl 8004350 - 8004394: 4602 mov r2, r0 - 8004396: 4b05 ldr r3, [pc, #20] ; (80043ac ) - 8004398: 685b ldr r3, [r3, #4] - 800439a: 0adb lsrs r3, r3, #11 - 800439c: f003 0307 and.w r3, r3, #7 - 80043a0: 4903 ldr r1, [pc, #12] ; (80043b0 ) - 80043a2: 5ccb ldrb r3, [r1, r3] - 80043a4: fa22 f303 lsr.w r3, r2, r3 -} - 80043a8: 4618 mov r0, r3 - 80043aa: bd80 pop {r7, pc} - 80043ac: 40021000 .word 0x40021000 - 80043b0: 0800b0d4 .word 0x0800b0d4 - -080043b4 : - * @brief This function provides delay (in milliseconds) based on CPU cycles method. - * @param mdelay: specifies the delay time length, in milliseconds. - * @retval None - */ -static void RCC_Delay(uint32_t mdelay) -{ - 80043b4: b480 push {r7} - 80043b6: b085 sub sp, #20 - 80043b8: af00 add r7, sp, #0 - 80043ba: 6078 str r0, [r7, #4] - __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); - 80043bc: 4b0a ldr r3, [pc, #40] ; (80043e8 ) - 80043be: 681b ldr r3, [r3, #0] - 80043c0: 4a0a ldr r2, [pc, #40] ; (80043ec ) - 80043c2: fba2 2303 umull r2, r3, r2, r3 - 80043c6: 0a5b lsrs r3, r3, #9 - 80043c8: 687a ldr r2, [r7, #4] - 80043ca: fb02 f303 mul.w r3, r2, r3 - 80043ce: 60fb str r3, [r7, #12] - do - { - __NOP(); - 80043d0: bf00 nop - } - while (Delay --); - 80043d2: 68fb ldr r3, [r7, #12] - 80043d4: 1e5a subs r2, r3, #1 - 80043d6: 60fa str r2, [r7, #12] - 80043d8: 2b00 cmp r3, #0 - 80043da: d1f9 bne.n 80043d0 -} - 80043dc: bf00 nop - 80043de: bf00 nop - 80043e0: 3714 adds r7, #20 - 80043e2: 46bd mov sp, r7 - 80043e4: bc80 pop {r7} - 80043e6: 4770 bx lr - 80043e8: 20000010 .word 0x20000010 - 80043ec: 10624dd3 .word 0x10624dd3 - -080043f0 : - * manually disable it. - * - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) -{ - 80043f0: b580 push {r7, lr} - 80043f2: b086 sub sp, #24 - 80043f4: af00 add r7, sp, #0 - 80043f6: 6078 str r0, [r7, #4] - uint32_t tickstart = 0U, temp_reg = 0U; - 80043f8: 2300 movs r3, #0 - 80043fa: 613b str r3, [r7, #16] - 80043fc: 2300 movs r3, #0 - 80043fe: 60fb str r3, [r7, #12] - - /* Check the parameters */ - assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); - - /*------------------------------- RTC/LCD Configuration ------------------------*/ - if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) - 8004400: 687b ldr r3, [r7, #4] - 8004402: 681b ldr r3, [r3, #0] - 8004404: f003 0301 and.w r3, r3, #1 - 8004408: 2b00 cmp r3, #0 - 800440a: d07d beq.n 8004508 - { - FlagStatus pwrclkchanged = RESET; - 800440c: 2300 movs r3, #0 - 800440e: 75fb strb r3, [r7, #23] - assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); - - /* As soon as function is called to change RTC clock source, activation of the - power domain is done. */ - /* Requires to enable write access to Backup Domain of necessary */ - if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8004410: 4b4f ldr r3, [pc, #316] ; (8004550 ) - 8004412: 69db ldr r3, [r3, #28] - 8004414: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8004418: 2b00 cmp r3, #0 - 800441a: d10d bne.n 8004438 - { - __HAL_RCC_PWR_CLK_ENABLE(); - 800441c: 4b4c ldr r3, [pc, #304] ; (8004550 ) - 800441e: 69db ldr r3, [r3, #28] - 8004420: 4a4b ldr r2, [pc, #300] ; (8004550 ) - 8004422: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8004426: 61d3 str r3, [r2, #28] - 8004428: 4b49 ldr r3, [pc, #292] ; (8004550 ) - 800442a: 69db ldr r3, [r3, #28] - 800442c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8004430: 60bb str r3, [r7, #8] - 8004432: 68bb ldr r3, [r7, #8] - pwrclkchanged = SET; - 8004434: 2301 movs r3, #1 - 8004436: 75fb strb r3, [r7, #23] - } - - if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8004438: 4b46 ldr r3, [pc, #280] ; (8004554 ) - 800443a: 681b ldr r3, [r3, #0] - 800443c: f403 7380 and.w r3, r3, #256 ; 0x100 - 8004440: 2b00 cmp r3, #0 - 8004442: d118 bne.n 8004476 - { - /* Enable write access to Backup domain */ - SET_BIT(PWR->CR, PWR_CR_DBP); - 8004444: 4b43 ldr r3, [pc, #268] ; (8004554 ) - 8004446: 681b ldr r3, [r3, #0] - 8004448: 4a42 ldr r2, [pc, #264] ; (8004554 ) - 800444a: f443 7380 orr.w r3, r3, #256 ; 0x100 - 800444e: 6013 str r3, [r2, #0] - - /* Wait for Backup domain Write protection disable */ - tickstart = HAL_GetTick(); - 8004450: f7fe fd32 bl 8002eb8 - 8004454: 6138 str r0, [r7, #16] - - while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8004456: e008 b.n 800446a - { - if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8004458: f7fe fd2e bl 8002eb8 - 800445c: 4602 mov r2, r0 - 800445e: 693b ldr r3, [r7, #16] - 8004460: 1ad3 subs r3, r2, r3 - 8004462: 2b64 cmp r3, #100 ; 0x64 - 8004464: d901 bls.n 800446a - { - return HAL_TIMEOUT; - 8004466: 2303 movs r3, #3 - 8004468: e06d b.n 8004546 - while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 800446a: 4b3a ldr r3, [pc, #232] ; (8004554 ) - 800446c: 681b ldr r3, [r3, #0] - 800446e: f403 7380 and.w r3, r3, #256 ; 0x100 - 8004472: 2b00 cmp r3, #0 - 8004474: d0f0 beq.n 8004458 - } - } - } - - /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ - temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); - 8004476: 4b36 ldr r3, [pc, #216] ; (8004550 ) - 8004478: 6a1b ldr r3, [r3, #32] - 800447a: f403 7340 and.w r3, r3, #768 ; 0x300 - 800447e: 60fb str r3, [r7, #12] - if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) - 8004480: 68fb ldr r3, [r7, #12] - 8004482: 2b00 cmp r3, #0 - 8004484: d02e beq.n 80044e4 - 8004486: 687b ldr r3, [r7, #4] - 8004488: 685b ldr r3, [r3, #4] - 800448a: f403 7340 and.w r3, r3, #768 ; 0x300 - 800448e: 68fa ldr r2, [r7, #12] - 8004490: 429a cmp r2, r3 - 8004492: d027 beq.n 80044e4 - { - /* Store the content of BDCR register before the reset of Backup Domain */ - temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); - 8004494: 4b2e ldr r3, [pc, #184] ; (8004550 ) - 8004496: 6a1b ldr r3, [r3, #32] - 8004498: f423 7340 bic.w r3, r3, #768 ; 0x300 - 800449c: 60fb str r3, [r7, #12] - /* RTC Clock selection can be changed only if the Backup Domain is reset */ - __HAL_RCC_BACKUPRESET_FORCE(); - 800449e: 4b2e ldr r3, [pc, #184] ; (8004558 ) - 80044a0: 2201 movs r2, #1 - 80044a2: 601a str r2, [r3, #0] - __HAL_RCC_BACKUPRESET_RELEASE(); - 80044a4: 4b2c ldr r3, [pc, #176] ; (8004558 ) - 80044a6: 2200 movs r2, #0 - 80044a8: 601a str r2, [r3, #0] - /* Restore the Content of BDCR register */ - RCC->BDCR = temp_reg; - 80044aa: 4a29 ldr r2, [pc, #164] ; (8004550 ) - 80044ac: 68fb ldr r3, [r7, #12] - 80044ae: 6213 str r3, [r2, #32] - - /* Wait for LSERDY if LSE was enabled */ - if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) - 80044b0: 68fb ldr r3, [r7, #12] - 80044b2: f003 0301 and.w r3, r3, #1 - 80044b6: 2b00 cmp r3, #0 - 80044b8: d014 beq.n 80044e4 - { - /* Get Start Tick */ - tickstart = HAL_GetTick(); - 80044ba: f7fe fcfd bl 8002eb8 - 80044be: 6138 str r0, [r7, #16] - - /* Wait till LSE is ready */ - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 80044c0: e00a b.n 80044d8 - { - if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 80044c2: f7fe fcf9 bl 8002eb8 - 80044c6: 4602 mov r2, r0 - 80044c8: 693b ldr r3, [r7, #16] - 80044ca: 1ad3 subs r3, r2, r3 - 80044cc: f241 3288 movw r2, #5000 ; 0x1388 - 80044d0: 4293 cmp r3, r2 - 80044d2: d901 bls.n 80044d8 - { - return HAL_TIMEOUT; - 80044d4: 2303 movs r3, #3 - 80044d6: e036 b.n 8004546 - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 80044d8: 4b1d ldr r3, [pc, #116] ; (8004550 ) - 80044da: 6a1b ldr r3, [r3, #32] - 80044dc: f003 0302 and.w r3, r3, #2 - 80044e0: 2b00 cmp r3, #0 - 80044e2: d0ee beq.n 80044c2 - } - } - } - } - __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 80044e4: 4b1a ldr r3, [pc, #104] ; (8004550 ) - 80044e6: 6a1b ldr r3, [r3, #32] - 80044e8: f423 7240 bic.w r2, r3, #768 ; 0x300 - 80044ec: 687b ldr r3, [r7, #4] - 80044ee: 685b ldr r3, [r3, #4] - 80044f0: 4917 ldr r1, [pc, #92] ; (8004550 ) - 80044f2: 4313 orrs r3, r2 - 80044f4: 620b str r3, [r1, #32] - - /* Require to disable power clock if necessary */ - if (pwrclkchanged == SET) - 80044f6: 7dfb ldrb r3, [r7, #23] - 80044f8: 2b01 cmp r3, #1 - 80044fa: d105 bne.n 8004508 - { - __HAL_RCC_PWR_CLK_DISABLE(); - 80044fc: 4b14 ldr r3, [pc, #80] ; (8004550 ) - 80044fe: 69db ldr r3, [r3, #28] - 8004500: 4a13 ldr r2, [pc, #76] ; (8004550 ) - 8004502: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 8004506: 61d3 str r3, [r2, #28] - } - } - - /*------------------------------ ADC clock Configuration ------------------*/ - if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) - 8004508: 687b ldr r3, [r7, #4] - 800450a: 681b ldr r3, [r3, #0] - 800450c: f003 0302 and.w r3, r3, #2 - 8004510: 2b00 cmp r3, #0 - 8004512: d008 beq.n 8004526 - { - /* Check the parameters */ - assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); - - /* Configure the ADC clock source */ - __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); - 8004514: 4b0e ldr r3, [pc, #56] ; (8004550 ) - 8004516: 685b ldr r3, [r3, #4] - 8004518: f423 4240 bic.w r2, r3, #49152 ; 0xc000 - 800451c: 687b ldr r3, [r7, #4] - 800451e: 689b ldr r3, [r3, #8] - 8004520: 490b ldr r1, [pc, #44] ; (8004550 ) - 8004522: 4313 orrs r3, r2 - 8004524: 604b str r3, [r1, #4] - -#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ - || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ - || defined(STM32F105xC) || defined(STM32F107xC) - /*------------------------------ USB clock Configuration ------------------*/ - if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) - 8004526: 687b ldr r3, [r7, #4] - 8004528: 681b ldr r3, [r3, #0] - 800452a: f003 0310 and.w r3, r3, #16 - 800452e: 2b00 cmp r3, #0 - 8004530: d008 beq.n 8004544 - { - /* Check the parameters */ - assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); - - /* Configure the USB clock source */ - __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); - 8004532: 4b07 ldr r3, [pc, #28] ; (8004550 ) - 8004534: 685b ldr r3, [r3, #4] - 8004536: f423 0280 bic.w r2, r3, #4194304 ; 0x400000 - 800453a: 687b ldr r3, [r7, #4] - 800453c: 68db ldr r3, [r3, #12] - 800453e: 4904 ldr r1, [pc, #16] ; (8004550 ) - 8004540: 4313 orrs r3, r2 - 8004542: 604b str r3, [r1, #4] - } -#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ - - return HAL_OK; - 8004544: 2300 movs r3, #0 -} - 8004546: 4618 mov r0, r3 - 8004548: 3718 adds r7, #24 - 800454a: 46bd mov sp, r7 - 800454c: bd80 pop {r7, pc} - 800454e: bf00 nop - 8004550: 40021000 .word 0x40021000 - 8004554: 40007000 .word 0x40007000 - 8004558: 42420440 .word 0x42420440 - -0800455c : - * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() - * @param htim TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) -{ - 800455c: b580 push {r7, lr} - 800455e: b082 sub sp, #8 - 8004560: af00 add r7, sp, #0 - 8004562: 6078 str r0, [r7, #4] - /* Check the TIM handle allocation */ - if (htim == NULL) - 8004564: 687b ldr r3, [r7, #4] - 8004566: 2b00 cmp r3, #0 - 8004568: d101 bne.n 800456e - { - return HAL_ERROR; - 800456a: 2301 movs r3, #1 - 800456c: e041 b.n 80045f2 - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if (htim->State == HAL_TIM_STATE_RESET) - 800456e: 687b ldr r3, [r7, #4] - 8004570: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 8004574: b2db uxtb r3, r3 - 8004576: 2b00 cmp r3, #0 - 8004578: d106 bne.n 8004588 - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - 800457a: 687b ldr r3, [r7, #4] - 800457c: 2200 movs r2, #0 - 800457e: f883 203c strb.w r2, [r3, #60] ; 0x3c - } - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - htim->Base_MspInitCallback(htim); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - HAL_TIM_Base_MspInit(htim); - 8004582: 6878 ldr r0, [r7, #4] - 8004584: f7fe f980 bl 8002888 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - 8004588: 687b ldr r3, [r7, #4] - 800458a: 2202 movs r2, #2 - 800458c: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Set the Time Base configuration */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8004590: 687b ldr r3, [r7, #4] - 8004592: 681a ldr r2, [r3, #0] - 8004594: 687b ldr r3, [r7, #4] - 8004596: 3304 adds r3, #4 - 8004598: 4619 mov r1, r3 - 800459a: 4610 mov r0, r2 - 800459c: f000 fd50 bl 8005040 - - /* Initialize the DMA burst operation state */ - htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 80045a0: 687b ldr r3, [r7, #4] - 80045a2: 2201 movs r2, #1 - 80045a4: f883 2046 strb.w r2, [r3, #70] ; 0x46 - - /* Initialize the TIM channels state */ - TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 80045a8: 687b ldr r3, [r7, #4] - 80045aa: 2201 movs r2, #1 - 80045ac: f883 203e strb.w r2, [r3, #62] ; 0x3e - 80045b0: 687b ldr r3, [r7, #4] - 80045b2: 2201 movs r2, #1 - 80045b4: f883 203f strb.w r2, [r3, #63] ; 0x3f - 80045b8: 687b ldr r3, [r7, #4] - 80045ba: 2201 movs r2, #1 - 80045bc: f883 2040 strb.w r2, [r3, #64] ; 0x40 - 80045c0: 687b ldr r3, [r7, #4] - 80045c2: 2201 movs r2, #1 - 80045c4: f883 2041 strb.w r2, [r3, #65] ; 0x41 - TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 80045c8: 687b ldr r3, [r7, #4] - 80045ca: 2201 movs r2, #1 - 80045cc: f883 2042 strb.w r2, [r3, #66] ; 0x42 - 80045d0: 687b ldr r3, [r7, #4] - 80045d2: 2201 movs r2, #1 - 80045d4: f883 2043 strb.w r2, [r3, #67] ; 0x43 - 80045d8: 687b ldr r3, [r7, #4] - 80045da: 2201 movs r2, #1 - 80045dc: f883 2044 strb.w r2, [r3, #68] ; 0x44 - 80045e0: 687b ldr r3, [r7, #4] - 80045e2: 2201 movs r2, #1 - 80045e4: f883 2045 strb.w r2, [r3, #69] ; 0x45 - - /* Initialize the TIM state*/ - htim->State = HAL_TIM_STATE_READY; - 80045e8: 687b ldr r3, [r7, #4] - 80045ea: 2201 movs r2, #1 - 80045ec: f883 203d strb.w r2, [r3, #61] ; 0x3d - - return HAL_OK; - 80045f0: 2300 movs r3, #0 -} - 80045f2: 4618 mov r0, r3 - 80045f4: 3708 adds r7, #8 - 80045f6: 46bd mov sp, r7 - 80045f8: bd80 pop {r7, pc} - ... - -080045fc : - * @brief Starts the TIM Base generation. - * @param htim TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim) -{ - 80045fc: b480 push {r7} - 80045fe: b085 sub sp, #20 - 8004600: af00 add r7, sp, #0 - 8004602: 6078 str r0, [r7, #4] - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - /* Check the TIM state */ - if (htim->State != HAL_TIM_STATE_READY) - 8004604: 687b ldr r3, [r7, #4] - 8004606: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 800460a: b2db uxtb r3, r3 - 800460c: 2b01 cmp r3, #1 - 800460e: d001 beq.n 8004614 - { - return HAL_ERROR; - 8004610: 2301 movs r3, #1 - 8004612: e032 b.n 800467a - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - 8004614: 687b ldr r3, [r7, #4] - 8004616: 2202 movs r2, #2 - 8004618: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 800461c: 687b ldr r3, [r7, #4] - 800461e: 681b ldr r3, [r3, #0] - 8004620: 4a18 ldr r2, [pc, #96] ; (8004684 ) - 8004622: 4293 cmp r3, r2 - 8004624: d00e beq.n 8004644 - 8004626: 687b ldr r3, [r7, #4] - 8004628: 681b ldr r3, [r3, #0] - 800462a: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 800462e: d009 beq.n 8004644 - 8004630: 687b ldr r3, [r7, #4] - 8004632: 681b ldr r3, [r3, #0] - 8004634: 4a14 ldr r2, [pc, #80] ; (8004688 ) - 8004636: 4293 cmp r3, r2 - 8004638: d004 beq.n 8004644 - 800463a: 687b ldr r3, [r7, #4] - 800463c: 681b ldr r3, [r3, #0] - 800463e: 4a13 ldr r2, [pc, #76] ; (800468c ) - 8004640: 4293 cmp r3, r2 - 8004642: d111 bne.n 8004668 - { - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 8004644: 687b ldr r3, [r7, #4] - 8004646: 681b ldr r3, [r3, #0] - 8004648: 689b ldr r3, [r3, #8] - 800464a: f003 0307 and.w r3, r3, #7 - 800464e: 60fb str r3, [r7, #12] - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8004650: 68fb ldr r3, [r7, #12] - 8004652: 2b06 cmp r3, #6 - 8004654: d010 beq.n 8004678 - { - __HAL_TIM_ENABLE(htim); - 8004656: 687b ldr r3, [r7, #4] - 8004658: 681b ldr r3, [r3, #0] - 800465a: 681a ldr r2, [r3, #0] - 800465c: 687b ldr r3, [r7, #4] - 800465e: 681b ldr r3, [r3, #0] - 8004660: f042 0201 orr.w r2, r2, #1 - 8004664: 601a str r2, [r3, #0] - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8004666: e007 b.n 8004678 - } - } - else - { - __HAL_TIM_ENABLE(htim); - 8004668: 687b ldr r3, [r7, #4] - 800466a: 681b ldr r3, [r3, #0] - 800466c: 681a ldr r2, [r3, #0] - 800466e: 687b ldr r3, [r7, #4] - 8004670: 681b ldr r3, [r3, #0] - 8004672: f042 0201 orr.w r2, r2, #1 - 8004676: 601a str r2, [r3, #0] - } - - /* Return function status */ - return HAL_OK; - 8004678: 2300 movs r3, #0 -} - 800467a: 4618 mov r0, r3 - 800467c: 3714 adds r7, #20 - 800467e: 46bd mov sp, r7 - 8004680: bc80 pop {r7} - 8004682: 4770 bx lr - 8004684: 40012c00 .word 0x40012c00 - 8004688: 40000400 .word 0x40000400 - 800468c: 40000800 .word 0x40000800 - -08004690 : - * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() - * @param htim TIM PWM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) -{ - 8004690: b580 push {r7, lr} - 8004692: b082 sub sp, #8 - 8004694: af00 add r7, sp, #0 - 8004696: 6078 str r0, [r7, #4] - /* Check the TIM handle allocation */ - if (htim == NULL) - 8004698: 687b ldr r3, [r7, #4] - 800469a: 2b00 cmp r3, #0 - 800469c: d101 bne.n 80046a2 - { - return HAL_ERROR; - 800469e: 2301 movs r3, #1 - 80046a0: e041 b.n 8004726 - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if (htim->State == HAL_TIM_STATE_RESET) - 80046a2: 687b ldr r3, [r7, #4] - 80046a4: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 80046a8: b2db uxtb r3, r3 - 80046aa: 2b00 cmp r3, #0 - 80046ac: d106 bne.n 80046bc - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - 80046ae: 687b ldr r3, [r7, #4] - 80046b0: 2200 movs r2, #0 - 80046b2: f883 203c strb.w r2, [r3, #60] ; 0x3c - } - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - htim->PWM_MspInitCallback(htim); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_PWM_MspInit(htim); - 80046b6: 6878 ldr r0, [r7, #4] - 80046b8: f000 f839 bl 800472e -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - 80046bc: 687b ldr r3, [r7, #4] - 80046be: 2202 movs r2, #2 - 80046c0: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Init the base time for the PWM */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - 80046c4: 687b ldr r3, [r7, #4] - 80046c6: 681a ldr r2, [r3, #0] - 80046c8: 687b ldr r3, [r7, #4] - 80046ca: 3304 adds r3, #4 - 80046cc: 4619 mov r1, r3 - 80046ce: 4610 mov r0, r2 - 80046d0: f000 fcb6 bl 8005040 - - /* Initialize the DMA burst operation state */ - htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 80046d4: 687b ldr r3, [r7, #4] - 80046d6: 2201 movs r2, #1 - 80046d8: f883 2046 strb.w r2, [r3, #70] ; 0x46 - - /* Initialize the TIM channels state */ - TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 80046dc: 687b ldr r3, [r7, #4] - 80046de: 2201 movs r2, #1 - 80046e0: f883 203e strb.w r2, [r3, #62] ; 0x3e - 80046e4: 687b ldr r3, [r7, #4] - 80046e6: 2201 movs r2, #1 - 80046e8: f883 203f strb.w r2, [r3, #63] ; 0x3f - 80046ec: 687b ldr r3, [r7, #4] - 80046ee: 2201 movs r2, #1 - 80046f0: f883 2040 strb.w r2, [r3, #64] ; 0x40 - 80046f4: 687b ldr r3, [r7, #4] - 80046f6: 2201 movs r2, #1 - 80046f8: f883 2041 strb.w r2, [r3, #65] ; 0x41 - TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 80046fc: 687b ldr r3, [r7, #4] - 80046fe: 2201 movs r2, #1 - 8004700: f883 2042 strb.w r2, [r3, #66] ; 0x42 - 8004704: 687b ldr r3, [r7, #4] - 8004706: 2201 movs r2, #1 - 8004708: f883 2043 strb.w r2, [r3, #67] ; 0x43 - 800470c: 687b ldr r3, [r7, #4] - 800470e: 2201 movs r2, #1 - 8004710: f883 2044 strb.w r2, [r3, #68] ; 0x44 - 8004714: 687b ldr r3, [r7, #4] - 8004716: 2201 movs r2, #1 - 8004718: f883 2045 strb.w r2, [r3, #69] ; 0x45 - - /* Initialize the TIM state*/ - htim->State = HAL_TIM_STATE_READY; - 800471c: 687b ldr r3, [r7, #4] - 800471e: 2201 movs r2, #1 - 8004720: f883 203d strb.w r2, [r3, #61] ; 0x3d - - return HAL_OK; - 8004724: 2300 movs r3, #0 -} - 8004726: 4618 mov r0, r3 - 8004728: 3708 adds r7, #8 - 800472a: 46bd mov sp, r7 - 800472c: bd80 pop {r7, pc} - -0800472e : - * @brief Initializes the TIM PWM MSP. - * @param htim TIM PWM handle - * @retval None - */ -__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) -{ - 800472e: b480 push {r7} - 8004730: b083 sub sp, #12 - 8004732: af00 add r7, sp, #0 - 8004734: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_PWM_MspInit could be implemented in the user file - */ -} - 8004736: bf00 nop - 8004738: 370c adds r7, #12 - 800473a: 46bd mov sp, r7 - 800473c: bc80 pop {r7} - 800473e: 4770 bx lr - -08004740 : - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - 8004740: b580 push {r7, lr} - 8004742: b084 sub sp, #16 - 8004744: af00 add r7, sp, #0 - 8004746: 6078 str r0, [r7, #4] - 8004748: 6039 str r1, [r7, #0] - - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Check the TIM channel state */ - if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) - 800474a: 683b ldr r3, [r7, #0] - 800474c: 2b00 cmp r3, #0 - 800474e: d109 bne.n 8004764 - 8004750: 687b ldr r3, [r7, #4] - 8004752: f893 303e ldrb.w r3, [r3, #62] ; 0x3e - 8004756: b2db uxtb r3, r3 - 8004758: 2b01 cmp r3, #1 - 800475a: bf14 ite ne - 800475c: 2301 movne r3, #1 - 800475e: 2300 moveq r3, #0 - 8004760: b2db uxtb r3, r3 - 8004762: e022 b.n 80047aa - 8004764: 683b ldr r3, [r7, #0] - 8004766: 2b04 cmp r3, #4 - 8004768: d109 bne.n 800477e - 800476a: 687b ldr r3, [r7, #4] - 800476c: f893 303f ldrb.w r3, [r3, #63] ; 0x3f - 8004770: b2db uxtb r3, r3 - 8004772: 2b01 cmp r3, #1 - 8004774: bf14 ite ne - 8004776: 2301 movne r3, #1 - 8004778: 2300 moveq r3, #0 - 800477a: b2db uxtb r3, r3 - 800477c: e015 b.n 80047aa - 800477e: 683b ldr r3, [r7, #0] - 8004780: 2b08 cmp r3, #8 - 8004782: d109 bne.n 8004798 - 8004784: 687b ldr r3, [r7, #4] - 8004786: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 - 800478a: b2db uxtb r3, r3 - 800478c: 2b01 cmp r3, #1 - 800478e: bf14 ite ne - 8004790: 2301 movne r3, #1 - 8004792: 2300 moveq r3, #0 - 8004794: b2db uxtb r3, r3 - 8004796: e008 b.n 80047aa - 8004798: 687b ldr r3, [r7, #4] - 800479a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 800479e: b2db uxtb r3, r3 - 80047a0: 2b01 cmp r3, #1 - 80047a2: bf14 ite ne - 80047a4: 2301 movne r3, #1 - 80047a6: 2300 moveq r3, #0 - 80047a8: b2db uxtb r3, r3 - 80047aa: 2b00 cmp r3, #0 - 80047ac: d001 beq.n 80047b2 - { - return HAL_ERROR; - 80047ae: 2301 movs r3, #1 - 80047b0: e05e b.n 8004870 - } - - /* Set the TIM channel state */ - TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); - 80047b2: 683b ldr r3, [r7, #0] - 80047b4: 2b00 cmp r3, #0 - 80047b6: d104 bne.n 80047c2 - 80047b8: 687b ldr r3, [r7, #4] - 80047ba: 2202 movs r2, #2 - 80047bc: f883 203e strb.w r2, [r3, #62] ; 0x3e - 80047c0: e013 b.n 80047ea - 80047c2: 683b ldr r3, [r7, #0] - 80047c4: 2b04 cmp r3, #4 - 80047c6: d104 bne.n 80047d2 - 80047c8: 687b ldr r3, [r7, #4] - 80047ca: 2202 movs r2, #2 - 80047cc: f883 203f strb.w r2, [r3, #63] ; 0x3f - 80047d0: e00b b.n 80047ea - 80047d2: 683b ldr r3, [r7, #0] - 80047d4: 2b08 cmp r3, #8 - 80047d6: d104 bne.n 80047e2 - 80047d8: 687b ldr r3, [r7, #4] - 80047da: 2202 movs r2, #2 - 80047dc: f883 2040 strb.w r2, [r3, #64] ; 0x40 - 80047e0: e003 b.n 80047ea - 80047e2: 687b ldr r3, [r7, #4] - 80047e4: 2202 movs r2, #2 - 80047e6: f883 2041 strb.w r2, [r3, #65] ; 0x41 - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - 80047ea: 687b ldr r3, [r7, #4] - 80047ec: 681b ldr r3, [r3, #0] - 80047ee: 2201 movs r2, #1 - 80047f0: 6839 ldr r1, [r7, #0] - 80047f2: 4618 mov r0, r3 - 80047f4: f000 fea4 bl 8005540 - - if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - 80047f8: 687b ldr r3, [r7, #4] - 80047fa: 681b ldr r3, [r3, #0] - 80047fc: 4a1e ldr r2, [pc, #120] ; (8004878 ) - 80047fe: 4293 cmp r3, r2 - 8004800: d107 bne.n 8004812 - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - 8004802: 687b ldr r3, [r7, #4] - 8004804: 681b ldr r3, [r3, #0] - 8004806: 6c5a ldr r2, [r3, #68] ; 0x44 - 8004808: 687b ldr r3, [r7, #4] - 800480a: 681b ldr r3, [r3, #0] - 800480c: f442 4200 orr.w r2, r2, #32768 ; 0x8000 - 8004810: 645a str r2, [r3, #68] ; 0x44 - } - - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8004812: 687b ldr r3, [r7, #4] - 8004814: 681b ldr r3, [r3, #0] - 8004816: 4a18 ldr r2, [pc, #96] ; (8004878 ) - 8004818: 4293 cmp r3, r2 - 800481a: d00e beq.n 800483a - 800481c: 687b ldr r3, [r7, #4] - 800481e: 681b ldr r3, [r3, #0] - 8004820: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8004824: d009 beq.n 800483a - 8004826: 687b ldr r3, [r7, #4] - 8004828: 681b ldr r3, [r3, #0] - 800482a: 4a14 ldr r2, [pc, #80] ; (800487c ) - 800482c: 4293 cmp r3, r2 - 800482e: d004 beq.n 800483a - 8004830: 687b ldr r3, [r7, #4] - 8004832: 681b ldr r3, [r3, #0] - 8004834: 4a12 ldr r2, [pc, #72] ; (8004880 ) - 8004836: 4293 cmp r3, r2 - 8004838: d111 bne.n 800485e - { - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 800483a: 687b ldr r3, [r7, #4] - 800483c: 681b ldr r3, [r3, #0] - 800483e: 689b ldr r3, [r3, #8] - 8004840: f003 0307 and.w r3, r3, #7 - 8004844: 60fb str r3, [r7, #12] - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8004846: 68fb ldr r3, [r7, #12] - 8004848: 2b06 cmp r3, #6 - 800484a: d010 beq.n 800486e - { - __HAL_TIM_ENABLE(htim); - 800484c: 687b ldr r3, [r7, #4] - 800484e: 681b ldr r3, [r3, #0] - 8004850: 681a ldr r2, [r3, #0] - 8004852: 687b ldr r3, [r7, #4] - 8004854: 681b ldr r3, [r3, #0] - 8004856: f042 0201 orr.w r2, r2, #1 - 800485a: 601a str r2, [r3, #0] - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 800485c: e007 b.n 800486e - } - } - else - { - __HAL_TIM_ENABLE(htim); - 800485e: 687b ldr r3, [r7, #4] - 8004860: 681b ldr r3, [r3, #0] - 8004862: 681a ldr r2, [r3, #0] - 8004864: 687b ldr r3, [r7, #4] - 8004866: 681b ldr r3, [r3, #0] - 8004868: f042 0201 orr.w r2, r2, #1 - 800486c: 601a str r2, [r3, #0] - } - - /* Return function status */ - return HAL_OK; - 800486e: 2300 movs r3, #0 -} - 8004870: 4618 mov r0, r3 - 8004872: 3710 adds r7, #16 - 8004874: 46bd mov sp, r7 - 8004876: bd80 pop {r7, pc} - 8004878: 40012c00 .word 0x40012c00 - 800487c: 40000400 .word 0x40000400 - 8004880: 40000800 .word 0x40000800 - -08004884 : - * @param htim TIM Encoder Interface handle - * @param sConfig TIM Encoder Interface configuration structure - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig) -{ - 8004884: b580 push {r7, lr} - 8004886: b086 sub sp, #24 - 8004888: af00 add r7, sp, #0 - 800488a: 6078 str r0, [r7, #4] - 800488c: 6039 str r1, [r7, #0] - uint32_t tmpsmcr; - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Check the TIM handle allocation */ - if (htim == NULL) - 800488e: 687b ldr r3, [r7, #4] - 8004890: 2b00 cmp r3, #0 - 8004892: d101 bne.n 8004898 - { - return HAL_ERROR; - 8004894: 2301 movs r3, #1 - 8004896: e093 b.n 80049c0 - assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); - assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); - assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); - - if (htim->State == HAL_TIM_STATE_RESET) - 8004898: 687b ldr r3, [r7, #4] - 800489a: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 800489e: b2db uxtb r3, r3 - 80048a0: 2b00 cmp r3, #0 - 80048a2: d106 bne.n 80048b2 - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - 80048a4: 687b ldr r3, [r7, #4] - 80048a6: 2200 movs r2, #0 - 80048a8: f883 203c strb.w r2, [r3, #60] ; 0x3c - } - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - htim->Encoder_MspInitCallback(htim); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_Encoder_MspInit(htim); - 80048ac: 6878 ldr r0, [r7, #4] - 80048ae: f7fd ff7f bl 80027b0 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - 80048b2: 687b ldr r3, [r7, #4] - 80048b4: 2202 movs r2, #2 - 80048b6: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Reset the SMS and ECE bits */ - htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); - 80048ba: 687b ldr r3, [r7, #4] - 80048bc: 681b ldr r3, [r3, #0] - 80048be: 689b ldr r3, [r3, #8] - 80048c0: 687a ldr r2, [r7, #4] - 80048c2: 6812 ldr r2, [r2, #0] - 80048c4: f423 4380 bic.w r3, r3, #16384 ; 0x4000 - 80048c8: f023 0307 bic.w r3, r3, #7 - 80048cc: 6093 str r3, [r2, #8] - - /* Configure the Time base in the Encoder Mode */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - 80048ce: 687b ldr r3, [r7, #4] - 80048d0: 681a ldr r2, [r3, #0] - 80048d2: 687b ldr r3, [r7, #4] - 80048d4: 3304 adds r3, #4 - 80048d6: 4619 mov r1, r3 - 80048d8: 4610 mov r0, r2 - 80048da: f000 fbb1 bl 8005040 - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - 80048de: 687b ldr r3, [r7, #4] - 80048e0: 681b ldr r3, [r3, #0] - 80048e2: 689b ldr r3, [r3, #8] - 80048e4: 617b str r3, [r7, #20] - - /* Get the TIMx CCMR1 register value */ - tmpccmr1 = htim->Instance->CCMR1; - 80048e6: 687b ldr r3, [r7, #4] - 80048e8: 681b ldr r3, [r3, #0] - 80048ea: 699b ldr r3, [r3, #24] - 80048ec: 613b str r3, [r7, #16] - - /* Get the TIMx CCER register value */ - tmpccer = htim->Instance->CCER; - 80048ee: 687b ldr r3, [r7, #4] - 80048f0: 681b ldr r3, [r3, #0] - 80048f2: 6a1b ldr r3, [r3, #32] - 80048f4: 60fb str r3, [r7, #12] - - /* Set the encoder Mode */ - tmpsmcr |= sConfig->EncoderMode; - 80048f6: 683b ldr r3, [r7, #0] - 80048f8: 681b ldr r3, [r3, #0] - 80048fa: 697a ldr r2, [r7, #20] - 80048fc: 4313 orrs r3, r2 - 80048fe: 617b str r3, [r7, #20] - - /* Select the Capture Compare 1 and the Capture Compare 2 as input */ - tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); - 8004900: 693b ldr r3, [r7, #16] - 8004902: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8004906: f023 0303 bic.w r3, r3, #3 - 800490a: 613b str r3, [r7, #16] - tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); - 800490c: 683b ldr r3, [r7, #0] - 800490e: 689a ldr r2, [r3, #8] - 8004910: 683b ldr r3, [r7, #0] - 8004912: 699b ldr r3, [r3, #24] - 8004914: 021b lsls r3, r3, #8 - 8004916: 4313 orrs r3, r2 - 8004918: 693a ldr r2, [r7, #16] - 800491a: 4313 orrs r3, r2 - 800491c: 613b str r3, [r7, #16] - - /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */ - tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC); - 800491e: 693b ldr r3, [r7, #16] - 8004920: f423 6340 bic.w r3, r3, #3072 ; 0xc00 - 8004924: f023 030c bic.w r3, r3, #12 - 8004928: 613b str r3, [r7, #16] - tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); - 800492a: 693b ldr r3, [r7, #16] - 800492c: f423 4370 bic.w r3, r3, #61440 ; 0xf000 - 8004930: f023 03f0 bic.w r3, r3, #240 ; 0xf0 - 8004934: 613b str r3, [r7, #16] - tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); - 8004936: 683b ldr r3, [r7, #0] - 8004938: 68da ldr r2, [r3, #12] - 800493a: 683b ldr r3, [r7, #0] - 800493c: 69db ldr r3, [r3, #28] - 800493e: 021b lsls r3, r3, #8 - 8004940: 4313 orrs r3, r2 - 8004942: 693a ldr r2, [r7, #16] - 8004944: 4313 orrs r3, r2 - 8004946: 613b str r3, [r7, #16] - tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); - 8004948: 683b ldr r3, [r7, #0] - 800494a: 691b ldr r3, [r3, #16] - 800494c: 011a lsls r2, r3, #4 - 800494e: 683b ldr r3, [r7, #0] - 8004950: 6a1b ldr r3, [r3, #32] - 8004952: 031b lsls r3, r3, #12 - 8004954: 4313 orrs r3, r2 - 8004956: 693a ldr r2, [r7, #16] - 8004958: 4313 orrs r3, r2 - 800495a: 613b str r3, [r7, #16] - - /* Set the TI1 and the TI2 Polarities */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P); - 800495c: 68fb ldr r3, [r7, #12] - 800495e: f023 0322 bic.w r3, r3, #34 ; 0x22 - 8004962: 60fb str r3, [r7, #12] - tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); - 8004964: 683b ldr r3, [r7, #0] - 8004966: 685a ldr r2, [r3, #4] - 8004968: 683b ldr r3, [r7, #0] - 800496a: 695b ldr r3, [r3, #20] - 800496c: 011b lsls r3, r3, #4 - 800496e: 4313 orrs r3, r2 - 8004970: 68fa ldr r2, [r7, #12] - 8004972: 4313 orrs r3, r2 - 8004974: 60fb str r3, [r7, #12] - - /* Write to TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - 8004976: 687b ldr r3, [r7, #4] - 8004978: 681b ldr r3, [r3, #0] - 800497a: 697a ldr r2, [r7, #20] - 800497c: 609a str r2, [r3, #8] - - /* Write to TIMx CCMR1 */ - htim->Instance->CCMR1 = tmpccmr1; - 800497e: 687b ldr r3, [r7, #4] - 8004980: 681b ldr r3, [r3, #0] - 8004982: 693a ldr r2, [r7, #16] - 8004984: 619a str r2, [r3, #24] - - /* Write to TIMx CCER */ - htim->Instance->CCER = tmpccer; - 8004986: 687b ldr r3, [r7, #4] - 8004988: 681b ldr r3, [r3, #0] - 800498a: 68fa ldr r2, [r7, #12] - 800498c: 621a str r2, [r3, #32] - - /* Initialize the DMA burst operation state */ - htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 800498e: 687b ldr r3, [r7, #4] - 8004990: 2201 movs r2, #1 - 8004992: f883 2046 strb.w r2, [r3, #70] ; 0x46 - - /* Set the TIM channels state */ - TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); - 8004996: 687b ldr r3, [r7, #4] - 8004998: 2201 movs r2, #1 - 800499a: f883 203e strb.w r2, [r3, #62] ; 0x3e - TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); - 800499e: 687b ldr r3, [r7, #4] - 80049a0: 2201 movs r2, #1 - 80049a2: f883 203f strb.w r2, [r3, #63] ; 0x3f - TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); - 80049a6: 687b ldr r3, [r7, #4] - 80049a8: 2201 movs r2, #1 - 80049aa: f883 2042 strb.w r2, [r3, #66] ; 0x42 - TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); - 80049ae: 687b ldr r3, [r7, #4] - 80049b0: 2201 movs r2, #1 - 80049b2: f883 2043 strb.w r2, [r3, #67] ; 0x43 - - /* Initialize the TIM state*/ - htim->State = HAL_TIM_STATE_READY; - 80049b6: 687b ldr r3, [r7, #4] - 80049b8: 2201 movs r2, #1 - 80049ba: f883 203d strb.w r2, [r3, #61] ; 0x3d - - return HAL_OK; - 80049be: 2300 movs r3, #0 -} - 80049c0: 4618 mov r0, r3 - 80049c2: 3718 adds r7, #24 - 80049c4: 46bd mov sp, r7 - 80049c6: bd80 pop {r7, pc} - -080049c8 : - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - 80049c8: b580 push {r7, lr} - 80049ca: b084 sub sp, #16 - 80049cc: af00 add r7, sp, #0 - 80049ce: 6078 str r0, [r7, #4] - 80049d0: 6039 str r1, [r7, #0] - HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); - 80049d2: 687b ldr r3, [r7, #4] - 80049d4: f893 303e ldrb.w r3, [r3, #62] ; 0x3e - 80049d8: 73fb strb r3, [r7, #15] - HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); - 80049da: 687b ldr r3, [r7, #4] - 80049dc: f893 303f ldrb.w r3, [r3, #63] ; 0x3f - 80049e0: 73bb strb r3, [r7, #14] - HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1); - 80049e2: 687b ldr r3, [r7, #4] - 80049e4: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 80049e8: 737b strb r3, [r7, #13] - HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2); - 80049ea: 687b ldr r3, [r7, #4] - 80049ec: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 - 80049f0: 733b strb r3, [r7, #12] - - /* Check the parameters */ - assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); - - /* Set the TIM channel(s) state */ - if (Channel == TIM_CHANNEL_1) - 80049f2: 683b ldr r3, [r7, #0] - 80049f4: 2b00 cmp r3, #0 - 80049f6: d110 bne.n 8004a1a - { - if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) - 80049f8: 7bfb ldrb r3, [r7, #15] - 80049fa: 2b01 cmp r3, #1 - 80049fc: d102 bne.n 8004a04 - || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) - 80049fe: 7b7b ldrb r3, [r7, #13] - 8004a00: 2b01 cmp r3, #1 - 8004a02: d001 beq.n 8004a08 - { - return HAL_ERROR; - 8004a04: 2301 movs r3, #1 - 8004a06: e069 b.n 8004adc - } - else - { - TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); - 8004a08: 687b ldr r3, [r7, #4] - 8004a0a: 2202 movs r2, #2 - 8004a0c: f883 203e strb.w r2, [r3, #62] ; 0x3e - TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); - 8004a10: 687b ldr r3, [r7, #4] - 8004a12: 2202 movs r2, #2 - 8004a14: f883 2042 strb.w r2, [r3, #66] ; 0x42 - 8004a18: e031 b.n 8004a7e - } - } - else if (Channel == TIM_CHANNEL_2) - 8004a1a: 683b ldr r3, [r7, #0] - 8004a1c: 2b04 cmp r3, #4 - 8004a1e: d110 bne.n 8004a42 - { - if ((channel_2_state != HAL_TIM_CHANNEL_STATE_READY) - 8004a20: 7bbb ldrb r3, [r7, #14] - 8004a22: 2b01 cmp r3, #1 - 8004a24: d102 bne.n 8004a2c - || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) - 8004a26: 7b3b ldrb r3, [r7, #12] - 8004a28: 2b01 cmp r3, #1 - 8004a2a: d001 beq.n 8004a30 - { - return HAL_ERROR; - 8004a2c: 2301 movs r3, #1 - 8004a2e: e055 b.n 8004adc - } - else - { - TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); - 8004a30: 687b ldr r3, [r7, #4] - 8004a32: 2202 movs r2, #2 - 8004a34: f883 203f strb.w r2, [r3, #63] ; 0x3f - TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); - 8004a38: 687b ldr r3, [r7, #4] - 8004a3a: 2202 movs r2, #2 - 8004a3c: f883 2043 strb.w r2, [r3, #67] ; 0x43 - 8004a40: e01d b.n 8004a7e - } - } - else - { - if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) - 8004a42: 7bfb ldrb r3, [r7, #15] - 8004a44: 2b01 cmp r3, #1 - 8004a46: d108 bne.n 8004a5a - || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) - 8004a48: 7bbb ldrb r3, [r7, #14] - 8004a4a: 2b01 cmp r3, #1 - 8004a4c: d105 bne.n 8004a5a - || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) - 8004a4e: 7b7b ldrb r3, [r7, #13] - 8004a50: 2b01 cmp r3, #1 - 8004a52: d102 bne.n 8004a5a - || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) - 8004a54: 7b3b ldrb r3, [r7, #12] - 8004a56: 2b01 cmp r3, #1 - 8004a58: d001 beq.n 8004a5e - { - return HAL_ERROR; - 8004a5a: 2301 movs r3, #1 - 8004a5c: e03e b.n 8004adc - } - else - { - TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); - 8004a5e: 687b ldr r3, [r7, #4] - 8004a60: 2202 movs r2, #2 - 8004a62: f883 203e strb.w r2, [r3, #62] ; 0x3e - TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); - 8004a66: 687b ldr r3, [r7, #4] - 8004a68: 2202 movs r2, #2 - 8004a6a: f883 203f strb.w r2, [r3, #63] ; 0x3f - TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); - 8004a6e: 687b ldr r3, [r7, #4] - 8004a70: 2202 movs r2, #2 - 8004a72: f883 2042 strb.w r2, [r3, #66] ; 0x42 - TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); - 8004a76: 687b ldr r3, [r7, #4] - 8004a78: 2202 movs r2, #2 - 8004a7a: f883 2043 strb.w r2, [r3, #67] ; 0x43 - } - } - - /* Enable the encoder interface channels */ - switch (Channel) - 8004a7e: 683b ldr r3, [r7, #0] - 8004a80: 2b00 cmp r3, #0 - 8004a82: d003 beq.n 8004a8c - 8004a84: 683b ldr r3, [r7, #0] - 8004a86: 2b04 cmp r3, #4 - 8004a88: d008 beq.n 8004a9c - 8004a8a: e00f b.n 8004aac - { - case TIM_CHANNEL_1: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - 8004a8c: 687b ldr r3, [r7, #4] - 8004a8e: 681b ldr r3, [r3, #0] - 8004a90: 2201 movs r2, #1 - 8004a92: 2100 movs r1, #0 - 8004a94: 4618 mov r0, r3 - 8004a96: f000 fd53 bl 8005540 - break; - 8004a9a: e016 b.n 8004aca - } - - case TIM_CHANNEL_2: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - 8004a9c: 687b ldr r3, [r7, #4] - 8004a9e: 681b ldr r3, [r3, #0] - 8004aa0: 2201 movs r2, #1 - 8004aa2: 2104 movs r1, #4 - 8004aa4: 4618 mov r0, r3 - 8004aa6: f000 fd4b bl 8005540 - break; - 8004aaa: e00e b.n 8004aca - } - - default : - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - 8004aac: 687b ldr r3, [r7, #4] - 8004aae: 681b ldr r3, [r3, #0] - 8004ab0: 2201 movs r2, #1 - 8004ab2: 2100 movs r1, #0 - 8004ab4: 4618 mov r0, r3 - 8004ab6: f000 fd43 bl 8005540 - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - 8004aba: 687b ldr r3, [r7, #4] - 8004abc: 681b ldr r3, [r3, #0] - 8004abe: 2201 movs r2, #1 - 8004ac0: 2104 movs r1, #4 - 8004ac2: 4618 mov r0, r3 - 8004ac4: f000 fd3c bl 8005540 - break; - 8004ac8: bf00 nop - } - } - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - 8004aca: 687b ldr r3, [r7, #4] - 8004acc: 681b ldr r3, [r3, #0] - 8004ace: 681a ldr r2, [r3, #0] - 8004ad0: 687b ldr r3, [r7, #4] - 8004ad2: 681b ldr r3, [r3, #0] - 8004ad4: f042 0201 orr.w r2, r2, #1 - 8004ad8: 601a str r2, [r3, #0] - - /* Return function status */ - return HAL_OK; - 8004ada: 2300 movs r3, #0 -} - 8004adc: 4618 mov r0, r3 - 8004ade: 3710 adds r7, #16 - 8004ae0: 46bd mov sp, r7 - 8004ae2: bd80 pop {r7, pc} - -08004ae4 : - * @brief This function handles TIM interrupts requests. - * @param htim TIM handle - * @retval None - */ -void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) -{ - 8004ae4: b580 push {r7, lr} - 8004ae6: b082 sub sp, #8 - 8004ae8: af00 add r7, sp, #0 - 8004aea: 6078 str r0, [r7, #4] - /* Capture compare 1 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) - 8004aec: 687b ldr r3, [r7, #4] - 8004aee: 681b ldr r3, [r3, #0] - 8004af0: 691b ldr r3, [r3, #16] - 8004af2: f003 0302 and.w r3, r3, #2 - 8004af6: 2b02 cmp r3, #2 - 8004af8: d122 bne.n 8004b40 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) - 8004afa: 687b ldr r3, [r7, #4] - 8004afc: 681b ldr r3, [r3, #0] - 8004afe: 68db ldr r3, [r3, #12] - 8004b00: f003 0302 and.w r3, r3, #2 - 8004b04: 2b02 cmp r3, #2 - 8004b06: d11b bne.n 8004b40 - { - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); - 8004b08: 687b ldr r3, [r7, #4] - 8004b0a: 681b ldr r3, [r3, #0] - 8004b0c: f06f 0202 mvn.w r2, #2 - 8004b10: 611a str r2, [r3, #16] - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - 8004b12: 687b ldr r3, [r7, #4] - 8004b14: 2201 movs r2, #1 - 8004b16: 771a strb r2, [r3, #28] - - /* Input capture event */ - if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) - 8004b18: 687b ldr r3, [r7, #4] - 8004b1a: 681b ldr r3, [r3, #0] - 8004b1c: 699b ldr r3, [r3, #24] - 8004b1e: f003 0303 and.w r3, r3, #3 - 8004b22: 2b00 cmp r3, #0 - 8004b24: d003 beq.n 8004b2e - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->IC_CaptureCallback(htim); -#else - HAL_TIM_IC_CaptureCallback(htim); - 8004b26: 6878 ldr r0, [r7, #4] - 8004b28: f000 fa6f bl 800500a - 8004b2c: e005 b.n 8004b3a - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->OC_DelayElapsedCallback(htim); - htim->PWM_PulseFinishedCallback(htim); -#else - HAL_TIM_OC_DelayElapsedCallback(htim); - 8004b2e: 6878 ldr r0, [r7, #4] - 8004b30: f000 fa62 bl 8004ff8 - HAL_TIM_PWM_PulseFinishedCallback(htim); - 8004b34: 6878 ldr r0, [r7, #4] - 8004b36: f000 fa71 bl 800501c -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8004b3a: 687b ldr r3, [r7, #4] - 8004b3c: 2200 movs r2, #0 - 8004b3e: 771a strb r2, [r3, #28] - } - } - } - /* Capture compare 2 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) - 8004b40: 687b ldr r3, [r7, #4] - 8004b42: 681b ldr r3, [r3, #0] - 8004b44: 691b ldr r3, [r3, #16] - 8004b46: f003 0304 and.w r3, r3, #4 - 8004b4a: 2b04 cmp r3, #4 - 8004b4c: d122 bne.n 8004b94 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) - 8004b4e: 687b ldr r3, [r7, #4] - 8004b50: 681b ldr r3, [r3, #0] - 8004b52: 68db ldr r3, [r3, #12] - 8004b54: f003 0304 and.w r3, r3, #4 - 8004b58: 2b04 cmp r3, #4 - 8004b5a: d11b bne.n 8004b94 - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); - 8004b5c: 687b ldr r3, [r7, #4] - 8004b5e: 681b ldr r3, [r3, #0] - 8004b60: f06f 0204 mvn.w r2, #4 - 8004b64: 611a str r2, [r3, #16] - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - 8004b66: 687b ldr r3, [r7, #4] - 8004b68: 2202 movs r2, #2 - 8004b6a: 771a strb r2, [r3, #28] - /* Input capture event */ - if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 8004b6c: 687b ldr r3, [r7, #4] - 8004b6e: 681b ldr r3, [r3, #0] - 8004b70: 699b ldr r3, [r3, #24] - 8004b72: f403 7340 and.w r3, r3, #768 ; 0x300 - 8004b76: 2b00 cmp r3, #0 - 8004b78: d003 beq.n 8004b82 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->IC_CaptureCallback(htim); -#else - HAL_TIM_IC_CaptureCallback(htim); - 8004b7a: 6878 ldr r0, [r7, #4] - 8004b7c: f000 fa45 bl 800500a - 8004b80: e005 b.n 8004b8e - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->OC_DelayElapsedCallback(htim); - htim->PWM_PulseFinishedCallback(htim); -#else - HAL_TIM_OC_DelayElapsedCallback(htim); - 8004b82: 6878 ldr r0, [r7, #4] - 8004b84: f000 fa38 bl 8004ff8 - HAL_TIM_PWM_PulseFinishedCallback(htim); - 8004b88: 6878 ldr r0, [r7, #4] - 8004b8a: f000 fa47 bl 800501c -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8004b8e: 687b ldr r3, [r7, #4] - 8004b90: 2200 movs r2, #0 - 8004b92: 771a strb r2, [r3, #28] - } - } - /* Capture compare 3 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) - 8004b94: 687b ldr r3, [r7, #4] - 8004b96: 681b ldr r3, [r3, #0] - 8004b98: 691b ldr r3, [r3, #16] - 8004b9a: f003 0308 and.w r3, r3, #8 - 8004b9e: 2b08 cmp r3, #8 - 8004ba0: d122 bne.n 8004be8 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) - 8004ba2: 687b ldr r3, [r7, #4] - 8004ba4: 681b ldr r3, [r3, #0] - 8004ba6: 68db ldr r3, [r3, #12] - 8004ba8: f003 0308 and.w r3, r3, #8 - 8004bac: 2b08 cmp r3, #8 - 8004bae: d11b bne.n 8004be8 - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); - 8004bb0: 687b ldr r3, [r7, #4] - 8004bb2: 681b ldr r3, [r3, #0] - 8004bb4: f06f 0208 mvn.w r2, #8 - 8004bb8: 611a str r2, [r3, #16] - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - 8004bba: 687b ldr r3, [r7, #4] - 8004bbc: 2204 movs r2, #4 - 8004bbe: 771a strb r2, [r3, #28] - /* Input capture event */ - if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 8004bc0: 687b ldr r3, [r7, #4] - 8004bc2: 681b ldr r3, [r3, #0] - 8004bc4: 69db ldr r3, [r3, #28] - 8004bc6: f003 0303 and.w r3, r3, #3 - 8004bca: 2b00 cmp r3, #0 - 8004bcc: d003 beq.n 8004bd6 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->IC_CaptureCallback(htim); -#else - HAL_TIM_IC_CaptureCallback(htim); - 8004bce: 6878 ldr r0, [r7, #4] - 8004bd0: f000 fa1b bl 800500a - 8004bd4: e005 b.n 8004be2 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->OC_DelayElapsedCallback(htim); - htim->PWM_PulseFinishedCallback(htim); -#else - HAL_TIM_OC_DelayElapsedCallback(htim); - 8004bd6: 6878 ldr r0, [r7, #4] - 8004bd8: f000 fa0e bl 8004ff8 - HAL_TIM_PWM_PulseFinishedCallback(htim); - 8004bdc: 6878 ldr r0, [r7, #4] - 8004bde: f000 fa1d bl 800501c -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8004be2: 687b ldr r3, [r7, #4] - 8004be4: 2200 movs r2, #0 - 8004be6: 771a strb r2, [r3, #28] - } - } - /* Capture compare 4 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) - 8004be8: 687b ldr r3, [r7, #4] - 8004bea: 681b ldr r3, [r3, #0] - 8004bec: 691b ldr r3, [r3, #16] - 8004bee: f003 0310 and.w r3, r3, #16 - 8004bf2: 2b10 cmp r3, #16 - 8004bf4: d122 bne.n 8004c3c - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) - 8004bf6: 687b ldr r3, [r7, #4] - 8004bf8: 681b ldr r3, [r3, #0] - 8004bfa: 68db ldr r3, [r3, #12] - 8004bfc: f003 0310 and.w r3, r3, #16 - 8004c00: 2b10 cmp r3, #16 - 8004c02: d11b bne.n 8004c3c - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); - 8004c04: 687b ldr r3, [r7, #4] - 8004c06: 681b ldr r3, [r3, #0] - 8004c08: f06f 0210 mvn.w r2, #16 - 8004c0c: 611a str r2, [r3, #16] - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - 8004c0e: 687b ldr r3, [r7, #4] - 8004c10: 2208 movs r2, #8 - 8004c12: 771a strb r2, [r3, #28] - /* Input capture event */ - if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 8004c14: 687b ldr r3, [r7, #4] - 8004c16: 681b ldr r3, [r3, #0] - 8004c18: 69db ldr r3, [r3, #28] - 8004c1a: f403 7340 and.w r3, r3, #768 ; 0x300 - 8004c1e: 2b00 cmp r3, #0 - 8004c20: d003 beq.n 8004c2a - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->IC_CaptureCallback(htim); -#else - HAL_TIM_IC_CaptureCallback(htim); - 8004c22: 6878 ldr r0, [r7, #4] - 8004c24: f000 f9f1 bl 800500a - 8004c28: e005 b.n 8004c36 - { -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->OC_DelayElapsedCallback(htim); - htim->PWM_PulseFinishedCallback(htim); -#else - HAL_TIM_OC_DelayElapsedCallback(htim); - 8004c2a: 6878 ldr r0, [r7, #4] - 8004c2c: f000 f9e4 bl 8004ff8 - HAL_TIM_PWM_PulseFinishedCallback(htim); - 8004c30: 6878 ldr r0, [r7, #4] - 8004c32: f000 f9f3 bl 800501c -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8004c36: 687b ldr r3, [r7, #4] - 8004c38: 2200 movs r2, #0 - 8004c3a: 771a strb r2, [r3, #28] - } - } - /* TIM Update event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) - 8004c3c: 687b ldr r3, [r7, #4] - 8004c3e: 681b ldr r3, [r3, #0] - 8004c40: 691b ldr r3, [r3, #16] - 8004c42: f003 0301 and.w r3, r3, #1 - 8004c46: 2b01 cmp r3, #1 - 8004c48: d10e bne.n 8004c68 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) - 8004c4a: 687b ldr r3, [r7, #4] - 8004c4c: 681b ldr r3, [r3, #0] - 8004c4e: 68db ldr r3, [r3, #12] - 8004c50: f003 0301 and.w r3, r3, #1 - 8004c54: 2b01 cmp r3, #1 - 8004c56: d107 bne.n 8004c68 - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); - 8004c58: 687b ldr r3, [r7, #4] - 8004c5a: 681b ldr r3, [r3, #0] - 8004c5c: f06f 0201 mvn.w r2, #1 - 8004c60: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->PeriodElapsedCallback(htim); -#else - HAL_TIM_PeriodElapsedCallback(htim); - 8004c62: 6878 ldr r0, [r7, #4] - 8004c64: f7fc ff76 bl 8001b54 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - } - /* TIM Break input event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) - 8004c68: 687b ldr r3, [r7, #4] - 8004c6a: 681b ldr r3, [r3, #0] - 8004c6c: 691b ldr r3, [r3, #16] - 8004c6e: f003 0380 and.w r3, r3, #128 ; 0x80 - 8004c72: 2b80 cmp r3, #128 ; 0x80 - 8004c74: d10e bne.n 8004c94 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) - 8004c76: 687b ldr r3, [r7, #4] - 8004c78: 681b ldr r3, [r3, #0] - 8004c7a: 68db ldr r3, [r3, #12] - 8004c7c: f003 0380 and.w r3, r3, #128 ; 0x80 - 8004c80: 2b80 cmp r3, #128 ; 0x80 - 8004c82: d107 bne.n 8004c94 - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); - 8004c84: 687b ldr r3, [r7, #4] - 8004c86: 681b ldr r3, [r3, #0] - 8004c88: f06f 0280 mvn.w r2, #128 ; 0x80 - 8004c8c: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->BreakCallback(htim); -#else - HAL_TIMEx_BreakCallback(htim); - 8004c8e: 6878 ldr r0, [r7, #4] - 8004c90: f000 fce1 bl 8005656 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - } - /* TIM Trigger detection event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) - 8004c94: 687b ldr r3, [r7, #4] - 8004c96: 681b ldr r3, [r3, #0] - 8004c98: 691b ldr r3, [r3, #16] - 8004c9a: f003 0340 and.w r3, r3, #64 ; 0x40 - 8004c9e: 2b40 cmp r3, #64 ; 0x40 - 8004ca0: d10e bne.n 8004cc0 - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) - 8004ca2: 687b ldr r3, [r7, #4] - 8004ca4: 681b ldr r3, [r3, #0] - 8004ca6: 68db ldr r3, [r3, #12] - 8004ca8: f003 0340 and.w r3, r3, #64 ; 0x40 - 8004cac: 2b40 cmp r3, #64 ; 0x40 - 8004cae: d107 bne.n 8004cc0 - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); - 8004cb0: 687b ldr r3, [r7, #4] - 8004cb2: 681b ldr r3, [r3, #0] - 8004cb4: f06f 0240 mvn.w r2, #64 ; 0x40 - 8004cb8: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->TriggerCallback(htim); -#else - HAL_TIM_TriggerCallback(htim); - 8004cba: 6878 ldr r0, [r7, #4] - 8004cbc: f000 f9b7 bl 800502e -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - } - /* TIM commutation event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) - 8004cc0: 687b ldr r3, [r7, #4] - 8004cc2: 681b ldr r3, [r3, #0] - 8004cc4: 691b ldr r3, [r3, #16] - 8004cc6: f003 0320 and.w r3, r3, #32 - 8004cca: 2b20 cmp r3, #32 - 8004ccc: d10e bne.n 8004cec - { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) - 8004cce: 687b ldr r3, [r7, #4] - 8004cd0: 681b ldr r3, [r3, #0] - 8004cd2: 68db ldr r3, [r3, #12] - 8004cd4: f003 0320 and.w r3, r3, #32 - 8004cd8: 2b20 cmp r3, #32 - 8004cda: d107 bne.n 8004cec - { - __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); - 8004cdc: 687b ldr r3, [r7, #4] - 8004cde: 681b ldr r3, [r3, #0] - 8004ce0: f06f 0220 mvn.w r2, #32 - 8004ce4: 611a str r2, [r3, #16] -#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - htim->CommutationCallback(htim); -#else - HAL_TIMEx_CommutCallback(htim); - 8004ce6: 6878 ldr r0, [r7, #4] - 8004ce8: f000 fcac bl 8005644 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - } -} - 8004cec: bf00 nop - 8004cee: 3708 adds r7, #8 - 8004cf0: 46bd mov sp, r7 - 8004cf2: bd80 pop {r7, pc} - -08004cf4 : - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, - TIM_OC_InitTypeDef *sConfig, - uint32_t Channel) -{ - 8004cf4: b580 push {r7, lr} - 8004cf6: b084 sub sp, #16 - 8004cf8: af00 add r7, sp, #0 - 8004cfa: 60f8 str r0, [r7, #12] - 8004cfc: 60b9 str r1, [r7, #8] - 8004cfe: 607a str r2, [r7, #4] - assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); - assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); - assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); - - /* Process Locked */ - __HAL_LOCK(htim); - 8004d00: 68fb ldr r3, [r7, #12] - 8004d02: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8004d06: 2b01 cmp r3, #1 - 8004d08: d101 bne.n 8004d0e - 8004d0a: 2302 movs r3, #2 - 8004d0c: e0ac b.n 8004e68 - 8004d0e: 68fb ldr r3, [r7, #12] - 8004d10: 2201 movs r2, #1 - 8004d12: f883 203c strb.w r2, [r3, #60] ; 0x3c - - switch (Channel) - 8004d16: 687b ldr r3, [r7, #4] - 8004d18: 2b0c cmp r3, #12 - 8004d1a: f200 809f bhi.w 8004e5c - 8004d1e: a201 add r2, pc, #4 ; (adr r2, 8004d24 ) - 8004d20: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8004d24: 08004d59 .word 0x08004d59 - 8004d28: 08004e5d .word 0x08004e5d - 8004d2c: 08004e5d .word 0x08004e5d - 8004d30: 08004e5d .word 0x08004e5d - 8004d34: 08004d99 .word 0x08004d99 - 8004d38: 08004e5d .word 0x08004e5d - 8004d3c: 08004e5d .word 0x08004e5d - 8004d40: 08004e5d .word 0x08004e5d - 8004d44: 08004ddb .word 0x08004ddb - 8004d48: 08004e5d .word 0x08004e5d - 8004d4c: 08004e5d .word 0x08004e5d - 8004d50: 08004e5d .word 0x08004e5d - 8004d54: 08004e1b .word 0x08004e1b - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - /* Configure the Channel 1 in PWM mode */ - TIM_OC1_SetConfig(htim->Instance, sConfig); - 8004d58: 68fb ldr r3, [r7, #12] - 8004d5a: 681b ldr r3, [r3, #0] - 8004d5c: 68b9 ldr r1, [r7, #8] - 8004d5e: 4618 mov r0, r3 - 8004d60: f000 f9d0 bl 8005104 - - /* Set the Preload enable bit for channel1 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; - 8004d64: 68fb ldr r3, [r7, #12] - 8004d66: 681b ldr r3, [r3, #0] - 8004d68: 699a ldr r2, [r3, #24] - 8004d6a: 68fb ldr r3, [r7, #12] - 8004d6c: 681b ldr r3, [r3, #0] - 8004d6e: f042 0208 orr.w r2, r2, #8 - 8004d72: 619a str r2, [r3, #24] - - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; - 8004d74: 68fb ldr r3, [r7, #12] - 8004d76: 681b ldr r3, [r3, #0] - 8004d78: 699a ldr r2, [r3, #24] - 8004d7a: 68fb ldr r3, [r7, #12] - 8004d7c: 681b ldr r3, [r3, #0] - 8004d7e: f022 0204 bic.w r2, r2, #4 - 8004d82: 619a str r2, [r3, #24] - htim->Instance->CCMR1 |= sConfig->OCFastMode; - 8004d84: 68fb ldr r3, [r7, #12] - 8004d86: 681b ldr r3, [r3, #0] - 8004d88: 6999 ldr r1, [r3, #24] - 8004d8a: 68bb ldr r3, [r7, #8] - 8004d8c: 691a ldr r2, [r3, #16] - 8004d8e: 68fb ldr r3, [r7, #12] - 8004d90: 681b ldr r3, [r3, #0] - 8004d92: 430a orrs r2, r1 - 8004d94: 619a str r2, [r3, #24] - break; - 8004d96: e062 b.n 8004e5e - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Configure the Channel 2 in PWM mode */ - TIM_OC2_SetConfig(htim->Instance, sConfig); - 8004d98: 68fb ldr r3, [r7, #12] - 8004d9a: 681b ldr r3, [r3, #0] - 8004d9c: 68b9 ldr r1, [r7, #8] - 8004d9e: 4618 mov r0, r3 - 8004da0: f000 fa16 bl 80051d0 - - /* Set the Preload enable bit for channel2 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; - 8004da4: 68fb ldr r3, [r7, #12] - 8004da6: 681b ldr r3, [r3, #0] - 8004da8: 699a ldr r2, [r3, #24] - 8004daa: 68fb ldr r3, [r7, #12] - 8004dac: 681b ldr r3, [r3, #0] - 8004dae: f442 6200 orr.w r2, r2, #2048 ; 0x800 - 8004db2: 619a str r2, [r3, #24] - - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; - 8004db4: 68fb ldr r3, [r7, #12] - 8004db6: 681b ldr r3, [r3, #0] - 8004db8: 699a ldr r2, [r3, #24] - 8004dba: 68fb ldr r3, [r7, #12] - 8004dbc: 681b ldr r3, [r3, #0] - 8004dbe: f422 6280 bic.w r2, r2, #1024 ; 0x400 - 8004dc2: 619a str r2, [r3, #24] - htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; - 8004dc4: 68fb ldr r3, [r7, #12] - 8004dc6: 681b ldr r3, [r3, #0] - 8004dc8: 6999 ldr r1, [r3, #24] - 8004dca: 68bb ldr r3, [r7, #8] - 8004dcc: 691b ldr r3, [r3, #16] - 8004dce: 021a lsls r2, r3, #8 - 8004dd0: 68fb ldr r3, [r7, #12] - 8004dd2: 681b ldr r3, [r3, #0] - 8004dd4: 430a orrs r2, r1 - 8004dd6: 619a str r2, [r3, #24] - break; - 8004dd8: e041 b.n 8004e5e - { - /* Check the parameters */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - /* Configure the Channel 3 in PWM mode */ - TIM_OC3_SetConfig(htim->Instance, sConfig); - 8004dda: 68fb ldr r3, [r7, #12] - 8004ddc: 681b ldr r3, [r3, #0] - 8004dde: 68b9 ldr r1, [r7, #8] - 8004de0: 4618 mov r0, r3 - 8004de2: f000 fa5f bl 80052a4 - - /* Set the Preload enable bit for channel3 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; - 8004de6: 68fb ldr r3, [r7, #12] - 8004de8: 681b ldr r3, [r3, #0] - 8004dea: 69da ldr r2, [r3, #28] - 8004dec: 68fb ldr r3, [r7, #12] - 8004dee: 681b ldr r3, [r3, #0] - 8004df0: f042 0208 orr.w r2, r2, #8 - 8004df4: 61da str r2, [r3, #28] - - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; - 8004df6: 68fb ldr r3, [r7, #12] - 8004df8: 681b ldr r3, [r3, #0] - 8004dfa: 69da ldr r2, [r3, #28] - 8004dfc: 68fb ldr r3, [r7, #12] - 8004dfe: 681b ldr r3, [r3, #0] - 8004e00: f022 0204 bic.w r2, r2, #4 - 8004e04: 61da str r2, [r3, #28] - htim->Instance->CCMR2 |= sConfig->OCFastMode; - 8004e06: 68fb ldr r3, [r7, #12] - 8004e08: 681b ldr r3, [r3, #0] - 8004e0a: 69d9 ldr r1, [r3, #28] - 8004e0c: 68bb ldr r3, [r7, #8] - 8004e0e: 691a ldr r2, [r3, #16] - 8004e10: 68fb ldr r3, [r7, #12] - 8004e12: 681b ldr r3, [r3, #0] - 8004e14: 430a orrs r2, r1 - 8004e16: 61da str r2, [r3, #28] - break; - 8004e18: e021 b.n 8004e5e - { - /* Check the parameters */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - /* Configure the Channel 4 in PWM mode */ - TIM_OC4_SetConfig(htim->Instance, sConfig); - 8004e1a: 68fb ldr r3, [r7, #12] - 8004e1c: 681b ldr r3, [r3, #0] - 8004e1e: 68b9 ldr r1, [r7, #8] - 8004e20: 4618 mov r0, r3 - 8004e22: f000 faa9 bl 8005378 - - /* Set the Preload enable bit for channel4 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; - 8004e26: 68fb ldr r3, [r7, #12] - 8004e28: 681b ldr r3, [r3, #0] - 8004e2a: 69da ldr r2, [r3, #28] - 8004e2c: 68fb ldr r3, [r7, #12] - 8004e2e: 681b ldr r3, [r3, #0] - 8004e30: f442 6200 orr.w r2, r2, #2048 ; 0x800 - 8004e34: 61da str r2, [r3, #28] - - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; - 8004e36: 68fb ldr r3, [r7, #12] - 8004e38: 681b ldr r3, [r3, #0] - 8004e3a: 69da ldr r2, [r3, #28] - 8004e3c: 68fb ldr r3, [r7, #12] - 8004e3e: 681b ldr r3, [r3, #0] - 8004e40: f422 6280 bic.w r2, r2, #1024 ; 0x400 - 8004e44: 61da str r2, [r3, #28] - htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; - 8004e46: 68fb ldr r3, [r7, #12] - 8004e48: 681b ldr r3, [r3, #0] - 8004e4a: 69d9 ldr r1, [r3, #28] - 8004e4c: 68bb ldr r3, [r7, #8] - 8004e4e: 691b ldr r3, [r3, #16] - 8004e50: 021a lsls r2, r3, #8 - 8004e52: 68fb ldr r3, [r7, #12] - 8004e54: 681b ldr r3, [r3, #0] - 8004e56: 430a orrs r2, r1 - 8004e58: 61da str r2, [r3, #28] - break; - 8004e5a: e000 b.n 8004e5e - } - - default: - break; - 8004e5c: bf00 nop - } - - __HAL_UNLOCK(htim); - 8004e5e: 68fb ldr r3, [r7, #12] - 8004e60: 2200 movs r2, #0 - 8004e62: f883 203c strb.w r2, [r3, #60] ; 0x3c - - return HAL_OK; - 8004e66: 2300 movs r3, #0 -} - 8004e68: 4618 mov r0, r3 - 8004e6a: 3710 adds r7, #16 - 8004e6c: 46bd mov sp, r7 - 8004e6e: bd80 pop {r7, pc} - -08004e70 : - * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that - * contains the clock source information for the TIM peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig) -{ - 8004e70: b580 push {r7, lr} - 8004e72: b084 sub sp, #16 - 8004e74: af00 add r7, sp, #0 - 8004e76: 6078 str r0, [r7, #4] - 8004e78: 6039 str r1, [r7, #0] - uint32_t tmpsmcr; - - /* Process Locked */ - __HAL_LOCK(htim); - 8004e7a: 687b ldr r3, [r7, #4] - 8004e7c: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8004e80: 2b01 cmp r3, #1 - 8004e82: d101 bne.n 8004e88 - 8004e84: 2302 movs r3, #2 - 8004e86: e0b3 b.n 8004ff0 - 8004e88: 687b ldr r3, [r7, #4] - 8004e8a: 2201 movs r2, #1 - 8004e8c: f883 203c strb.w r2, [r3, #60] ; 0x3c - - htim->State = HAL_TIM_STATE_BUSY; - 8004e90: 687b ldr r3, [r7, #4] - 8004e92: 2202 movs r2, #2 - 8004e94: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Check the parameters */ - assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); - - /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ - tmpsmcr = htim->Instance->SMCR; - 8004e98: 687b ldr r3, [r7, #4] - 8004e9a: 681b ldr r3, [r3, #0] - 8004e9c: 689b ldr r3, [r3, #8] - 8004e9e: 60fb str r3, [r7, #12] - tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - 8004ea0: 68fb ldr r3, [r7, #12] - 8004ea2: f023 0377 bic.w r3, r3, #119 ; 0x77 - 8004ea6: 60fb str r3, [r7, #12] - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8004ea8: 68fb ldr r3, [r7, #12] - 8004eaa: f423 437f bic.w r3, r3, #65280 ; 0xff00 - 8004eae: 60fb str r3, [r7, #12] - htim->Instance->SMCR = tmpsmcr; - 8004eb0: 687b ldr r3, [r7, #4] - 8004eb2: 681b ldr r3, [r3, #0] - 8004eb4: 68fa ldr r2, [r7, #12] - 8004eb6: 609a str r2, [r3, #8] - - switch (sClockSourceConfig->ClockSource) - 8004eb8: 683b ldr r3, [r7, #0] - 8004eba: 681b ldr r3, [r3, #0] - 8004ebc: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8004ec0: d03e beq.n 8004f40 - 8004ec2: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8004ec6: f200 8087 bhi.w 8004fd8 - 8004eca: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8004ece: f000 8085 beq.w 8004fdc - 8004ed2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8004ed6: d87f bhi.n 8004fd8 - 8004ed8: 2b70 cmp r3, #112 ; 0x70 - 8004eda: d01a beq.n 8004f12 - 8004edc: 2b70 cmp r3, #112 ; 0x70 - 8004ede: d87b bhi.n 8004fd8 - 8004ee0: 2b60 cmp r3, #96 ; 0x60 - 8004ee2: d050 beq.n 8004f86 - 8004ee4: 2b60 cmp r3, #96 ; 0x60 - 8004ee6: d877 bhi.n 8004fd8 - 8004ee8: 2b50 cmp r3, #80 ; 0x50 - 8004eea: d03c beq.n 8004f66 - 8004eec: 2b50 cmp r3, #80 ; 0x50 - 8004eee: d873 bhi.n 8004fd8 - 8004ef0: 2b40 cmp r3, #64 ; 0x40 - 8004ef2: d058 beq.n 8004fa6 - 8004ef4: 2b40 cmp r3, #64 ; 0x40 - 8004ef6: d86f bhi.n 8004fd8 - 8004ef8: 2b30 cmp r3, #48 ; 0x30 - 8004efa: d064 beq.n 8004fc6 - 8004efc: 2b30 cmp r3, #48 ; 0x30 - 8004efe: d86b bhi.n 8004fd8 - 8004f00: 2b20 cmp r3, #32 - 8004f02: d060 beq.n 8004fc6 - 8004f04: 2b20 cmp r3, #32 - 8004f06: d867 bhi.n 8004fd8 - 8004f08: 2b00 cmp r3, #0 - 8004f0a: d05c beq.n 8004fc6 - 8004f0c: 2b10 cmp r3, #16 - 8004f0e: d05a beq.n 8004fc6 - TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - break; - } - - default: - break; - 8004f10: e062 b.n 8004fd8 - TIM_ETR_SetConfig(htim->Instance, - 8004f12: 687b ldr r3, [r7, #4] - 8004f14: 6818 ldr r0, [r3, #0] - 8004f16: 683b ldr r3, [r7, #0] - 8004f18: 6899 ldr r1, [r3, #8] - 8004f1a: 683b ldr r3, [r7, #0] - 8004f1c: 685a ldr r2, [r3, #4] - 8004f1e: 683b ldr r3, [r7, #0] - 8004f20: 68db ldr r3, [r3, #12] - 8004f22: f000 faee bl 8005502 - tmpsmcr = htim->Instance->SMCR; - 8004f26: 687b ldr r3, [r7, #4] - 8004f28: 681b ldr r3, [r3, #0] - 8004f2a: 689b ldr r3, [r3, #8] - 8004f2c: 60fb str r3, [r7, #12] - tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - 8004f2e: 68fb ldr r3, [r7, #12] - 8004f30: f043 0377 orr.w r3, r3, #119 ; 0x77 - 8004f34: 60fb str r3, [r7, #12] - htim->Instance->SMCR = tmpsmcr; - 8004f36: 687b ldr r3, [r7, #4] - 8004f38: 681b ldr r3, [r3, #0] - 8004f3a: 68fa ldr r2, [r7, #12] - 8004f3c: 609a str r2, [r3, #8] - break; - 8004f3e: e04e b.n 8004fde - TIM_ETR_SetConfig(htim->Instance, - 8004f40: 687b ldr r3, [r7, #4] - 8004f42: 6818 ldr r0, [r3, #0] - 8004f44: 683b ldr r3, [r7, #0] - 8004f46: 6899 ldr r1, [r3, #8] - 8004f48: 683b ldr r3, [r7, #0] - 8004f4a: 685a ldr r2, [r3, #4] - 8004f4c: 683b ldr r3, [r7, #0] - 8004f4e: 68db ldr r3, [r3, #12] - 8004f50: f000 fad7 bl 8005502 - htim->Instance->SMCR |= TIM_SMCR_ECE; - 8004f54: 687b ldr r3, [r7, #4] - 8004f56: 681b ldr r3, [r3, #0] - 8004f58: 689a ldr r2, [r3, #8] - 8004f5a: 687b ldr r3, [r7, #4] - 8004f5c: 681b ldr r3, [r3, #0] - 8004f5e: f442 4280 orr.w r2, r2, #16384 ; 0x4000 - 8004f62: 609a str r2, [r3, #8] - break; - 8004f64: e03b b.n 8004fde - TIM_TI1_ConfigInputStage(htim->Instance, - 8004f66: 687b ldr r3, [r7, #4] - 8004f68: 6818 ldr r0, [r3, #0] - 8004f6a: 683b ldr r3, [r7, #0] - 8004f6c: 6859 ldr r1, [r3, #4] - 8004f6e: 683b ldr r3, [r7, #0] - 8004f70: 68db ldr r3, [r3, #12] - 8004f72: 461a mov r2, r3 - 8004f74: f000 fa4e bl 8005414 - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - 8004f78: 687b ldr r3, [r7, #4] - 8004f7a: 681b ldr r3, [r3, #0] - 8004f7c: 2150 movs r1, #80 ; 0x50 - 8004f7e: 4618 mov r0, r3 - 8004f80: f000 faa5 bl 80054ce - break; - 8004f84: e02b b.n 8004fde - TIM_TI2_ConfigInputStage(htim->Instance, - 8004f86: 687b ldr r3, [r7, #4] - 8004f88: 6818 ldr r0, [r3, #0] - 8004f8a: 683b ldr r3, [r7, #0] - 8004f8c: 6859 ldr r1, [r3, #4] - 8004f8e: 683b ldr r3, [r7, #0] - 8004f90: 68db ldr r3, [r3, #12] - 8004f92: 461a mov r2, r3 - 8004f94: f000 fa6c bl 8005470 - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - 8004f98: 687b ldr r3, [r7, #4] - 8004f9a: 681b ldr r3, [r3, #0] - 8004f9c: 2160 movs r1, #96 ; 0x60 - 8004f9e: 4618 mov r0, r3 - 8004fa0: f000 fa95 bl 80054ce - break; - 8004fa4: e01b b.n 8004fde - TIM_TI1_ConfigInputStage(htim->Instance, - 8004fa6: 687b ldr r3, [r7, #4] - 8004fa8: 6818 ldr r0, [r3, #0] - 8004faa: 683b ldr r3, [r7, #0] - 8004fac: 6859 ldr r1, [r3, #4] - 8004fae: 683b ldr r3, [r7, #0] - 8004fb0: 68db ldr r3, [r3, #12] - 8004fb2: 461a mov r2, r3 - 8004fb4: f000 fa2e bl 8005414 - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - 8004fb8: 687b ldr r3, [r7, #4] - 8004fba: 681b ldr r3, [r3, #0] - 8004fbc: 2140 movs r1, #64 ; 0x40 - 8004fbe: 4618 mov r0, r3 - 8004fc0: f000 fa85 bl 80054ce - break; - 8004fc4: e00b b.n 8004fde - TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - 8004fc6: 687b ldr r3, [r7, #4] - 8004fc8: 681a ldr r2, [r3, #0] - 8004fca: 683b ldr r3, [r7, #0] - 8004fcc: 681b ldr r3, [r3, #0] - 8004fce: 4619 mov r1, r3 - 8004fd0: 4610 mov r0, r2 - 8004fd2: f000 fa7c bl 80054ce - break; - 8004fd6: e002 b.n 8004fde - break; - 8004fd8: bf00 nop - 8004fda: e000 b.n 8004fde - break; - 8004fdc: bf00 nop - } - htim->State = HAL_TIM_STATE_READY; - 8004fde: 687b ldr r3, [r7, #4] - 8004fe0: 2201 movs r2, #1 - 8004fe2: f883 203d strb.w r2, [r3, #61] ; 0x3d - - __HAL_UNLOCK(htim); - 8004fe6: 687b ldr r3, [r7, #4] - 8004fe8: 2200 movs r2, #0 - 8004fea: f883 203c strb.w r2, [r3, #60] ; 0x3c - - return HAL_OK; - 8004fee: 2300 movs r3, #0 -} - 8004ff0: 4618 mov r0, r3 - 8004ff2: 3710 adds r7, #16 - 8004ff4: 46bd mov sp, r7 - 8004ff6: bd80 pop {r7, pc} - -08004ff8 : - * @brief Output Compare callback in non-blocking mode - * @param htim TIM OC handle - * @retval None - */ -__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) -{ - 8004ff8: b480 push {r7} - 8004ffa: b083 sub sp, #12 - 8004ffc: af00 add r7, sp, #0 - 8004ffe: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file - */ -} - 8005000: bf00 nop - 8005002: 370c adds r7, #12 - 8005004: 46bd mov sp, r7 - 8005006: bc80 pop {r7} - 8005008: 4770 bx lr - -0800500a : - * @brief Input Capture callback in non-blocking mode - * @param htim TIM IC handle - * @retval None - */ -__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) -{ - 800500a: b480 push {r7} - 800500c: b083 sub sp, #12 - 800500e: af00 add r7, sp, #0 - 8005010: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_IC_CaptureCallback could be implemented in the user file - */ -} - 8005012: bf00 nop - 8005014: 370c adds r7, #12 - 8005016: 46bd mov sp, r7 - 8005018: bc80 pop {r7} - 800501a: 4770 bx lr - -0800501c : - * @brief PWM Pulse finished callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) -{ - 800501c: b480 push {r7} - 800501e: b083 sub sp, #12 - 8005020: af00 add r7, sp, #0 - 8005022: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file - */ -} - 8005024: bf00 nop - 8005026: 370c adds r7, #12 - 8005028: 46bd mov sp, r7 - 800502a: bc80 pop {r7} - 800502c: 4770 bx lr - -0800502e : - * @brief Hall Trigger detection callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) -{ - 800502e: b480 push {r7} - 8005030: b083 sub sp, #12 - 8005032: af00 add r7, sp, #0 - 8005034: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_TriggerCallback could be implemented in the user file - */ -} - 8005036: bf00 nop - 8005038: 370c adds r7, #12 - 800503a: 46bd mov sp, r7 - 800503c: bc80 pop {r7} - 800503e: 4770 bx lr - -08005040 : - * @param TIMx TIM peripheral - * @param Structure TIM Base configuration structure - * @retval None - */ -void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) -{ - 8005040: b480 push {r7} - 8005042: b085 sub sp, #20 - 8005044: af00 add r7, sp, #0 - 8005046: 6078 str r0, [r7, #4] - 8005048: 6039 str r1, [r7, #0] - uint32_t tmpcr1; - tmpcr1 = TIMx->CR1; - 800504a: 687b ldr r3, [r7, #4] - 800504c: 681b ldr r3, [r3, #0] - 800504e: 60fb str r3, [r7, #12] - - /* Set TIM Time Base Unit parameters ---------------------------------------*/ - if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 8005050: 687b ldr r3, [r7, #4] - 8005052: 4a29 ldr r2, [pc, #164] ; (80050f8 ) - 8005054: 4293 cmp r3, r2 - 8005056: d00b beq.n 8005070 - 8005058: 687b ldr r3, [r7, #4] - 800505a: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 800505e: d007 beq.n 8005070 - 8005060: 687b ldr r3, [r7, #4] - 8005062: 4a26 ldr r2, [pc, #152] ; (80050fc ) - 8005064: 4293 cmp r3, r2 - 8005066: d003 beq.n 8005070 - 8005068: 687b ldr r3, [r7, #4] - 800506a: 4a25 ldr r2, [pc, #148] ; (8005100 ) - 800506c: 4293 cmp r3, r2 - 800506e: d108 bne.n 8005082 - { - /* Select the Counter Mode */ - tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 8005070: 68fb ldr r3, [r7, #12] - 8005072: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8005076: 60fb str r3, [r7, #12] - tmpcr1 |= Structure->CounterMode; - 8005078: 683b ldr r3, [r7, #0] - 800507a: 685b ldr r3, [r3, #4] - 800507c: 68fa ldr r2, [r7, #12] - 800507e: 4313 orrs r3, r2 - 8005080: 60fb str r3, [r7, #12] - } - - if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 8005082: 687b ldr r3, [r7, #4] - 8005084: 4a1c ldr r2, [pc, #112] ; (80050f8 ) - 8005086: 4293 cmp r3, r2 - 8005088: d00b beq.n 80050a2 - 800508a: 687b ldr r3, [r7, #4] - 800508c: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8005090: d007 beq.n 80050a2 - 8005092: 687b ldr r3, [r7, #4] - 8005094: 4a19 ldr r2, [pc, #100] ; (80050fc ) - 8005096: 4293 cmp r3, r2 - 8005098: d003 beq.n 80050a2 - 800509a: 687b ldr r3, [r7, #4] - 800509c: 4a18 ldr r2, [pc, #96] ; (8005100 ) - 800509e: 4293 cmp r3, r2 - 80050a0: d108 bne.n 80050b4 - { - /* Set the clock division */ - tmpcr1 &= ~TIM_CR1_CKD; - 80050a2: 68fb ldr r3, [r7, #12] - 80050a4: f423 7340 bic.w r3, r3, #768 ; 0x300 - 80050a8: 60fb str r3, [r7, #12] - tmpcr1 |= (uint32_t)Structure->ClockDivision; - 80050aa: 683b ldr r3, [r7, #0] - 80050ac: 68db ldr r3, [r3, #12] - 80050ae: 68fa ldr r2, [r7, #12] - 80050b0: 4313 orrs r3, r2 - 80050b2: 60fb str r3, [r7, #12] - } - - /* Set the auto-reload preload */ - MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 80050b4: 68fb ldr r3, [r7, #12] - 80050b6: f023 0280 bic.w r2, r3, #128 ; 0x80 - 80050ba: 683b ldr r3, [r7, #0] - 80050bc: 695b ldr r3, [r3, #20] - 80050be: 4313 orrs r3, r2 - 80050c0: 60fb str r3, [r7, #12] - - TIMx->CR1 = tmpcr1; - 80050c2: 687b ldr r3, [r7, #4] - 80050c4: 68fa ldr r2, [r7, #12] - 80050c6: 601a str r2, [r3, #0] - - /* Set the Autoreload value */ - TIMx->ARR = (uint32_t)Structure->Period ; - 80050c8: 683b ldr r3, [r7, #0] - 80050ca: 689a ldr r2, [r3, #8] - 80050cc: 687b ldr r3, [r7, #4] - 80050ce: 62da str r2, [r3, #44] ; 0x2c - - /* Set the Prescaler value */ - TIMx->PSC = Structure->Prescaler; - 80050d0: 683b ldr r3, [r7, #0] - 80050d2: 681a ldr r2, [r3, #0] - 80050d4: 687b ldr r3, [r7, #4] - 80050d6: 629a str r2, [r3, #40] ; 0x28 - - if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - 80050d8: 687b ldr r3, [r7, #4] - 80050da: 4a07 ldr r2, [pc, #28] ; (80050f8 ) - 80050dc: 4293 cmp r3, r2 - 80050de: d103 bne.n 80050e8 - { - /* Set the Repetition Counter value */ - TIMx->RCR = Structure->RepetitionCounter; - 80050e0: 683b ldr r3, [r7, #0] - 80050e2: 691a ldr r2, [r3, #16] - 80050e4: 687b ldr r3, [r7, #4] - 80050e6: 631a str r2, [r3, #48] ; 0x30 - } - - /* Generate an update event to reload the Prescaler - and the repetition counter (only for advanced timer) value immediately */ - TIMx->EGR = TIM_EGR_UG; - 80050e8: 687b ldr r3, [r7, #4] - 80050ea: 2201 movs r2, #1 - 80050ec: 615a str r2, [r3, #20] -} - 80050ee: bf00 nop - 80050f0: 3714 adds r7, #20 - 80050f2: 46bd mov sp, r7 - 80050f4: bc80 pop {r7} - 80050f6: 4770 bx lr - 80050f8: 40012c00 .word 0x40012c00 - 80050fc: 40000400 .word 0x40000400 - 8005100: 40000800 .word 0x40000800 - -08005104 : - * @param TIMx to select the TIM peripheral - * @param OC_Config The output configuration structure - * @retval None - */ -static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - 8005104: b480 push {r7} - 8005106: b087 sub sp, #28 - 8005108: af00 add r7, sp, #0 - 800510a: 6078 str r0, [r7, #4] - 800510c: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; - - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= ~TIM_CCER_CC1E; - 800510e: 687b ldr r3, [r7, #4] - 8005110: 6a1b ldr r3, [r3, #32] - 8005112: f023 0201 bic.w r2, r3, #1 - 8005116: 687b ldr r3, [r7, #4] - 8005118: 621a str r2, [r3, #32] - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 800511a: 687b ldr r3, [r7, #4] - 800511c: 6a1b ldr r3, [r3, #32] - 800511e: 617b str r3, [r7, #20] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 8005120: 687b ldr r3, [r7, #4] - 8005122: 685b ldr r3, [r3, #4] - 8005124: 613b str r3, [r7, #16] - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - 8005126: 687b ldr r3, [r7, #4] - 8005128: 699b ldr r3, [r3, #24] - 800512a: 60fb str r3, [r7, #12] - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~TIM_CCMR1_OC1M; - 800512c: 68fb ldr r3, [r7, #12] - 800512e: f023 0370 bic.w r3, r3, #112 ; 0x70 - 8005132: 60fb str r3, [r7, #12] - tmpccmrx &= ~TIM_CCMR1_CC1S; - 8005134: 68fb ldr r3, [r7, #12] - 8005136: f023 0303 bic.w r3, r3, #3 - 800513a: 60fb str r3, [r7, #12] - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - 800513c: 683b ldr r3, [r7, #0] - 800513e: 681b ldr r3, [r3, #0] - 8005140: 68fa ldr r2, [r7, #12] - 8005142: 4313 orrs r3, r2 - 8005144: 60fb str r3, [r7, #12] - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC1P; - 8005146: 697b ldr r3, [r7, #20] - 8005148: f023 0302 bic.w r3, r3, #2 - 800514c: 617b str r3, [r7, #20] - /* Set the Output Compare Polarity */ - tmpccer |= OC_Config->OCPolarity; - 800514e: 683b ldr r3, [r7, #0] - 8005150: 689b ldr r3, [r3, #8] - 8005152: 697a ldr r2, [r7, #20] - 8005154: 4313 orrs r3, r2 - 8005156: 617b str r3, [r7, #20] - - if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) - 8005158: 687b ldr r3, [r7, #4] - 800515a: 4a1c ldr r2, [pc, #112] ; (80051cc ) - 800515c: 4293 cmp r3, r2 - 800515e: d10c bne.n 800517a - { - /* Check parameters */ - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC1NP; - 8005160: 697b ldr r3, [r7, #20] - 8005162: f023 0308 bic.w r3, r3, #8 - 8005166: 617b str r3, [r7, #20] - /* Set the Output N Polarity */ - tmpccer |= OC_Config->OCNPolarity; - 8005168: 683b ldr r3, [r7, #0] - 800516a: 68db ldr r3, [r3, #12] - 800516c: 697a ldr r2, [r7, #20] - 800516e: 4313 orrs r3, r2 - 8005170: 617b str r3, [r7, #20] - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC1NE; - 8005172: 697b ldr r3, [r7, #20] - 8005174: f023 0304 bic.w r3, r3, #4 - 8005178: 617b str r3, [r7, #20] - } - - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 800517a: 687b ldr r3, [r7, #4] - 800517c: 4a13 ldr r2, [pc, #76] ; (80051cc ) - 800517e: 4293 cmp r3, r2 - 8005180: d111 bne.n 80051a6 - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS1; - 8005182: 693b ldr r3, [r7, #16] - 8005184: f423 7380 bic.w r3, r3, #256 ; 0x100 - 8005188: 613b str r3, [r7, #16] - tmpcr2 &= ~TIM_CR2_OIS1N; - 800518a: 693b ldr r3, [r7, #16] - 800518c: f423 7300 bic.w r3, r3, #512 ; 0x200 - 8005190: 613b str r3, [r7, #16] - /* Set the Output Idle state */ - tmpcr2 |= OC_Config->OCIdleState; - 8005192: 683b ldr r3, [r7, #0] - 8005194: 695b ldr r3, [r3, #20] - 8005196: 693a ldr r2, [r7, #16] - 8005198: 4313 orrs r3, r2 - 800519a: 613b str r3, [r7, #16] - /* Set the Output N Idle state */ - tmpcr2 |= OC_Config->OCNIdleState; - 800519c: 683b ldr r3, [r7, #0] - 800519e: 699b ldr r3, [r3, #24] - 80051a0: 693a ldr r2, [r7, #16] - 80051a2: 4313 orrs r3, r2 - 80051a4: 613b str r3, [r7, #16] - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 80051a6: 687b ldr r3, [r7, #4] - 80051a8: 693a ldr r2, [r7, #16] - 80051aa: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - 80051ac: 687b ldr r3, [r7, #4] - 80051ae: 68fa ldr r2, [r7, #12] - 80051b0: 619a str r2, [r3, #24] - - /* Set the Capture Compare Register value */ - TIMx->CCR1 = OC_Config->Pulse; - 80051b2: 683b ldr r3, [r7, #0] - 80051b4: 685a ldr r2, [r3, #4] - 80051b6: 687b ldr r3, [r7, #4] - 80051b8: 635a str r2, [r3, #52] ; 0x34 - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 80051ba: 687b ldr r3, [r7, #4] - 80051bc: 697a ldr r2, [r7, #20] - 80051be: 621a str r2, [r3, #32] -} - 80051c0: bf00 nop - 80051c2: 371c adds r7, #28 - 80051c4: 46bd mov sp, r7 - 80051c6: bc80 pop {r7} - 80051c8: 4770 bx lr - 80051ca: bf00 nop - 80051cc: 40012c00 .word 0x40012c00 - -080051d0 : - * @param TIMx to select the TIM peripheral - * @param OC_Config The output configuration structure - * @retval None - */ -void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - 80051d0: b480 push {r7} - 80051d2: b087 sub sp, #28 - 80051d4: af00 add r7, sp, #0 - 80051d6: 6078 str r0, [r7, #4] - 80051d8: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - 80051da: 687b ldr r3, [r7, #4] - 80051dc: 6a1b ldr r3, [r3, #32] - 80051de: f023 0210 bic.w r2, r3, #16 - 80051e2: 687b ldr r3, [r7, #4] - 80051e4: 621a str r2, [r3, #32] - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 80051e6: 687b ldr r3, [r7, #4] - 80051e8: 6a1b ldr r3, [r3, #32] - 80051ea: 617b str r3, [r7, #20] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 80051ec: 687b ldr r3, [r7, #4] - 80051ee: 685b ldr r3, [r3, #4] - 80051f0: 613b str r3, [r7, #16] - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - 80051f2: 687b ldr r3, [r7, #4] - 80051f4: 699b ldr r3, [r3, #24] - 80051f6: 60fb str r3, [r7, #12] - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR1_OC2M; - 80051f8: 68fb ldr r3, [r7, #12] - 80051fa: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 80051fe: 60fb str r3, [r7, #12] - tmpccmrx &= ~TIM_CCMR1_CC2S; - 8005200: 68fb ldr r3, [r7, #12] - 8005202: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8005206: 60fb str r3, [r7, #12] - - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8U); - 8005208: 683b ldr r3, [r7, #0] - 800520a: 681b ldr r3, [r3, #0] - 800520c: 021b lsls r3, r3, #8 - 800520e: 68fa ldr r2, [r7, #12] - 8005210: 4313 orrs r3, r2 - 8005212: 60fb str r3, [r7, #12] - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC2P; - 8005214: 697b ldr r3, [r7, #20] - 8005216: f023 0320 bic.w r3, r3, #32 - 800521a: 617b str r3, [r7, #20] - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 4U); - 800521c: 683b ldr r3, [r7, #0] - 800521e: 689b ldr r3, [r3, #8] - 8005220: 011b lsls r3, r3, #4 - 8005222: 697a ldr r2, [r7, #20] - 8005224: 4313 orrs r3, r2 - 8005226: 617b str r3, [r7, #20] - - if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) - 8005228: 687b ldr r3, [r7, #4] - 800522a: 4a1d ldr r2, [pc, #116] ; (80052a0 ) - 800522c: 4293 cmp r3, r2 - 800522e: d10d bne.n 800524c - { - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC2NP; - 8005230: 697b ldr r3, [r7, #20] - 8005232: f023 0380 bic.w r3, r3, #128 ; 0x80 - 8005236: 617b str r3, [r7, #20] - /* Set the Output N Polarity */ - tmpccer |= (OC_Config->OCNPolarity << 4U); - 8005238: 683b ldr r3, [r7, #0] - 800523a: 68db ldr r3, [r3, #12] - 800523c: 011b lsls r3, r3, #4 - 800523e: 697a ldr r2, [r7, #20] - 8005240: 4313 orrs r3, r2 - 8005242: 617b str r3, [r7, #20] - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC2NE; - 8005244: 697b ldr r3, [r7, #20] - 8005246: f023 0340 bic.w r3, r3, #64 ; 0x40 - 800524a: 617b str r3, [r7, #20] - - } - - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 800524c: 687b ldr r3, [r7, #4] - 800524e: 4a14 ldr r2, [pc, #80] ; (80052a0 ) - 8005250: 4293 cmp r3, r2 - 8005252: d113 bne.n 800527c - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS2; - 8005254: 693b ldr r3, [r7, #16] - 8005256: f423 6380 bic.w r3, r3, #1024 ; 0x400 - 800525a: 613b str r3, [r7, #16] - tmpcr2 &= ~TIM_CR2_OIS2N; - 800525c: 693b ldr r3, [r7, #16] - 800525e: f423 6300 bic.w r3, r3, #2048 ; 0x800 - 8005262: 613b str r3, [r7, #16] - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 2U); - 8005264: 683b ldr r3, [r7, #0] - 8005266: 695b ldr r3, [r3, #20] - 8005268: 009b lsls r3, r3, #2 - 800526a: 693a ldr r2, [r7, #16] - 800526c: 4313 orrs r3, r2 - 800526e: 613b str r3, [r7, #16] - /* Set the Output N Idle state */ - tmpcr2 |= (OC_Config->OCNIdleState << 2U); - 8005270: 683b ldr r3, [r7, #0] - 8005272: 699b ldr r3, [r3, #24] - 8005274: 009b lsls r3, r3, #2 - 8005276: 693a ldr r2, [r7, #16] - 8005278: 4313 orrs r3, r2 - 800527a: 613b str r3, [r7, #16] - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 800527c: 687b ldr r3, [r7, #4] - 800527e: 693a ldr r2, [r7, #16] - 8005280: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - 8005282: 687b ldr r3, [r7, #4] - 8005284: 68fa ldr r2, [r7, #12] - 8005286: 619a str r2, [r3, #24] - - /* Set the Capture Compare Register value */ - TIMx->CCR2 = OC_Config->Pulse; - 8005288: 683b ldr r3, [r7, #0] - 800528a: 685a ldr r2, [r3, #4] - 800528c: 687b ldr r3, [r7, #4] - 800528e: 639a str r2, [r3, #56] ; 0x38 - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 8005290: 687b ldr r3, [r7, #4] - 8005292: 697a ldr r2, [r7, #20] - 8005294: 621a str r2, [r3, #32] -} - 8005296: bf00 nop - 8005298: 371c adds r7, #28 - 800529a: 46bd mov sp, r7 - 800529c: bc80 pop {r7} - 800529e: 4770 bx lr - 80052a0: 40012c00 .word 0x40012c00 - -080052a4 : - * @param TIMx to select the TIM peripheral - * @param OC_Config The output configuration structure - * @retval None - */ -static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - 80052a4: b480 push {r7} - 80052a6: b087 sub sp, #28 - 80052a8: af00 add r7, sp, #0 - 80052aa: 6078 str r0, [r7, #4] - 80052ac: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; - - /* Disable the Channel 3: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC3E; - 80052ae: 687b ldr r3, [r7, #4] - 80052b0: 6a1b ldr r3, [r3, #32] - 80052b2: f423 7280 bic.w r2, r3, #256 ; 0x100 - 80052b6: 687b ldr r3, [r7, #4] - 80052b8: 621a str r2, [r3, #32] - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 80052ba: 687b ldr r3, [r7, #4] - 80052bc: 6a1b ldr r3, [r3, #32] - 80052be: 617b str r3, [r7, #20] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 80052c0: 687b ldr r3, [r7, #4] - 80052c2: 685b ldr r3, [r3, #4] - 80052c4: 613b str r3, [r7, #16] - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - 80052c6: 687b ldr r3, [r7, #4] - 80052c8: 69db ldr r3, [r3, #28] - 80052ca: 60fb str r3, [r7, #12] - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR2_OC3M; - 80052cc: 68fb ldr r3, [r7, #12] - 80052ce: f023 0370 bic.w r3, r3, #112 ; 0x70 - 80052d2: 60fb str r3, [r7, #12] - tmpccmrx &= ~TIM_CCMR2_CC3S; - 80052d4: 68fb ldr r3, [r7, #12] - 80052d6: f023 0303 bic.w r3, r3, #3 - 80052da: 60fb str r3, [r7, #12] - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - 80052dc: 683b ldr r3, [r7, #0] - 80052de: 681b ldr r3, [r3, #0] - 80052e0: 68fa ldr r2, [r7, #12] - 80052e2: 4313 orrs r3, r2 - 80052e4: 60fb str r3, [r7, #12] - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC3P; - 80052e6: 697b ldr r3, [r7, #20] - 80052e8: f423 7300 bic.w r3, r3, #512 ; 0x200 - 80052ec: 617b str r3, [r7, #20] - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 8U); - 80052ee: 683b ldr r3, [r7, #0] - 80052f0: 689b ldr r3, [r3, #8] - 80052f2: 021b lsls r3, r3, #8 - 80052f4: 697a ldr r2, [r7, #20] - 80052f6: 4313 orrs r3, r2 - 80052f8: 617b str r3, [r7, #20] - - if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) - 80052fa: 687b ldr r3, [r7, #4] - 80052fc: 4a1d ldr r2, [pc, #116] ; (8005374 ) - 80052fe: 4293 cmp r3, r2 - 8005300: d10d bne.n 800531e - { - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC3NP; - 8005302: 697b ldr r3, [r7, #20] - 8005304: f423 6300 bic.w r3, r3, #2048 ; 0x800 - 8005308: 617b str r3, [r7, #20] - /* Set the Output N Polarity */ - tmpccer |= (OC_Config->OCNPolarity << 8U); - 800530a: 683b ldr r3, [r7, #0] - 800530c: 68db ldr r3, [r3, #12] - 800530e: 021b lsls r3, r3, #8 - 8005310: 697a ldr r2, [r7, #20] - 8005312: 4313 orrs r3, r2 - 8005314: 617b str r3, [r7, #20] - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC3NE; - 8005316: 697b ldr r3, [r7, #20] - 8005318: f423 6380 bic.w r3, r3, #1024 ; 0x400 - 800531c: 617b str r3, [r7, #20] - } - - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 800531e: 687b ldr r3, [r7, #4] - 8005320: 4a14 ldr r2, [pc, #80] ; (8005374 ) - 8005322: 4293 cmp r3, r2 - 8005324: d113 bne.n 800534e - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS3; - 8005326: 693b ldr r3, [r7, #16] - 8005328: f423 5380 bic.w r3, r3, #4096 ; 0x1000 - 800532c: 613b str r3, [r7, #16] - tmpcr2 &= ~TIM_CR2_OIS3N; - 800532e: 693b ldr r3, [r7, #16] - 8005330: f423 5300 bic.w r3, r3, #8192 ; 0x2000 - 8005334: 613b str r3, [r7, #16] - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 4U); - 8005336: 683b ldr r3, [r7, #0] - 8005338: 695b ldr r3, [r3, #20] - 800533a: 011b lsls r3, r3, #4 - 800533c: 693a ldr r2, [r7, #16] - 800533e: 4313 orrs r3, r2 - 8005340: 613b str r3, [r7, #16] - /* Set the Output N Idle state */ - tmpcr2 |= (OC_Config->OCNIdleState << 4U); - 8005342: 683b ldr r3, [r7, #0] - 8005344: 699b ldr r3, [r3, #24] - 8005346: 011b lsls r3, r3, #4 - 8005348: 693a ldr r2, [r7, #16] - 800534a: 4313 orrs r3, r2 - 800534c: 613b str r3, [r7, #16] - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 800534e: 687b ldr r3, [r7, #4] - 8005350: 693a ldr r2, [r7, #16] - 8005352: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - 8005354: 687b ldr r3, [r7, #4] - 8005356: 68fa ldr r2, [r7, #12] - 8005358: 61da str r2, [r3, #28] - - /* Set the Capture Compare Register value */ - TIMx->CCR3 = OC_Config->Pulse; - 800535a: 683b ldr r3, [r7, #0] - 800535c: 685a ldr r2, [r3, #4] - 800535e: 687b ldr r3, [r7, #4] - 8005360: 63da str r2, [r3, #60] ; 0x3c - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 8005362: 687b ldr r3, [r7, #4] - 8005364: 697a ldr r2, [r7, #20] - 8005366: 621a str r2, [r3, #32] -} - 8005368: bf00 nop - 800536a: 371c adds r7, #28 - 800536c: 46bd mov sp, r7 - 800536e: bc80 pop {r7} - 8005370: 4770 bx lr - 8005372: bf00 nop - 8005374: 40012c00 .word 0x40012c00 - -08005378 : - * @param TIMx to select the TIM peripheral - * @param OC_Config The output configuration structure - * @retval None - */ -static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - 8005378: b480 push {r7} - 800537a: b087 sub sp, #28 - 800537c: af00 add r7, sp, #0 - 800537e: 6078 str r0, [r7, #4] - 8005380: 6039 str r1, [r7, #0] - uint32_t tmpccmrx; - uint32_t tmpccer; - uint32_t tmpcr2; - - /* Disable the Channel 4: Reset the CC4E Bit */ - TIMx->CCER &= ~TIM_CCER_CC4E; - 8005382: 687b ldr r3, [r7, #4] - 8005384: 6a1b ldr r3, [r3, #32] - 8005386: f423 5280 bic.w r2, r3, #4096 ; 0x1000 - 800538a: 687b ldr r3, [r7, #4] - 800538c: 621a str r2, [r3, #32] - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - 800538e: 687b ldr r3, [r7, #4] - 8005390: 6a1b ldr r3, [r3, #32] - 8005392: 613b str r3, [r7, #16] - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - 8005394: 687b ldr r3, [r7, #4] - 8005396: 685b ldr r3, [r3, #4] - 8005398: 617b str r3, [r7, #20] - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - 800539a: 687b ldr r3, [r7, #4] - 800539c: 69db ldr r3, [r3, #28] - 800539e: 60fb str r3, [r7, #12] - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR2_OC4M; - 80053a0: 68fb ldr r3, [r7, #12] - 80053a2: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 - 80053a6: 60fb str r3, [r7, #12] - tmpccmrx &= ~TIM_CCMR2_CC4S; - 80053a8: 68fb ldr r3, [r7, #12] - 80053aa: f423 7340 bic.w r3, r3, #768 ; 0x300 - 80053ae: 60fb str r3, [r7, #12] - - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8U); - 80053b0: 683b ldr r3, [r7, #0] - 80053b2: 681b ldr r3, [r3, #0] - 80053b4: 021b lsls r3, r3, #8 - 80053b6: 68fa ldr r2, [r7, #12] - 80053b8: 4313 orrs r3, r2 - 80053ba: 60fb str r3, [r7, #12] - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC4P; - 80053bc: 693b ldr r3, [r7, #16] - 80053be: f423 5300 bic.w r3, r3, #8192 ; 0x2000 - 80053c2: 613b str r3, [r7, #16] - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 12U); - 80053c4: 683b ldr r3, [r7, #0] - 80053c6: 689b ldr r3, [r3, #8] - 80053c8: 031b lsls r3, r3, #12 - 80053ca: 693a ldr r2, [r7, #16] - 80053cc: 4313 orrs r3, r2 - 80053ce: 613b str r3, [r7, #16] - - if (IS_TIM_BREAK_INSTANCE(TIMx)) - 80053d0: 687b ldr r3, [r7, #4] - 80053d2: 4a0f ldr r2, [pc, #60] ; (8005410 ) - 80053d4: 4293 cmp r3, r2 - 80053d6: d109 bne.n 80053ec - { - /* Check parameters */ - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS4; - 80053d8: 697b ldr r3, [r7, #20] - 80053da: f423 4380 bic.w r3, r3, #16384 ; 0x4000 - 80053de: 617b str r3, [r7, #20] - - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 6U); - 80053e0: 683b ldr r3, [r7, #0] - 80053e2: 695b ldr r3, [r3, #20] - 80053e4: 019b lsls r3, r3, #6 - 80053e6: 697a ldr r2, [r7, #20] - 80053e8: 4313 orrs r3, r2 - 80053ea: 617b str r3, [r7, #20] - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - 80053ec: 687b ldr r3, [r7, #4] - 80053ee: 697a ldr r2, [r7, #20] - 80053f0: 605a str r2, [r3, #4] - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - 80053f2: 687b ldr r3, [r7, #4] - 80053f4: 68fa ldr r2, [r7, #12] - 80053f6: 61da str r2, [r3, #28] - - /* Set the Capture Compare Register value */ - TIMx->CCR4 = OC_Config->Pulse; - 80053f8: 683b ldr r3, [r7, #0] - 80053fa: 685a ldr r2, [r3, #4] - 80053fc: 687b ldr r3, [r7, #4] - 80053fe: 641a str r2, [r3, #64] ; 0x40 - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; - 8005400: 687b ldr r3, [r7, #4] - 8005402: 693a ldr r2, [r7, #16] - 8005404: 621a str r2, [r3, #32] -} - 8005406: bf00 nop - 8005408: 371c adds r7, #28 - 800540a: 46bd mov sp, r7 - 800540c: bc80 pop {r7} - 800540e: 4770 bx lr - 8005410: 40012c00 .word 0x40012c00 - -08005414 : - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - 8005414: b480 push {r7} - 8005416: b087 sub sp, #28 - 8005418: af00 add r7, sp, #0 - 800541a: 60f8 str r0, [r7, #12] - 800541c: 60b9 str r1, [r7, #8] - 800541e: 607a str r2, [r7, #4] - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Disable the Channel 1: Reset the CC1E Bit */ - tmpccer = TIMx->CCER; - 8005420: 68fb ldr r3, [r7, #12] - 8005422: 6a1b ldr r3, [r3, #32] - 8005424: 617b str r3, [r7, #20] - TIMx->CCER &= ~TIM_CCER_CC1E; - 8005426: 68fb ldr r3, [r7, #12] - 8005428: 6a1b ldr r3, [r3, #32] - 800542a: f023 0201 bic.w r2, r3, #1 - 800542e: 68fb ldr r3, [r7, #12] - 8005430: 621a str r2, [r3, #32] - tmpccmr1 = TIMx->CCMR1; - 8005432: 68fb ldr r3, [r7, #12] - 8005434: 699b ldr r3, [r3, #24] - 8005436: 613b str r3, [r7, #16] - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - 8005438: 693b ldr r3, [r7, #16] - 800543a: f023 03f0 bic.w r3, r3, #240 ; 0xf0 - 800543e: 613b str r3, [r7, #16] - tmpccmr1 |= (TIM_ICFilter << 4U); - 8005440: 687b ldr r3, [r7, #4] - 8005442: 011b lsls r3, r3, #4 - 8005444: 693a ldr r2, [r7, #16] - 8005446: 4313 orrs r3, r2 - 8005448: 613b str r3, [r7, #16] - - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 800544a: 697b ldr r3, [r7, #20] - 800544c: f023 030a bic.w r3, r3, #10 - 8005450: 617b str r3, [r7, #20] - tmpccer |= TIM_ICPolarity; - 8005452: 697a ldr r2, [r7, #20] - 8005454: 68bb ldr r3, [r7, #8] - 8005456: 4313 orrs r3, r2 - 8005458: 617b str r3, [r7, #20] - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - 800545a: 68fb ldr r3, [r7, #12] - 800545c: 693a ldr r2, [r7, #16] - 800545e: 619a str r2, [r3, #24] - TIMx->CCER = tmpccer; - 8005460: 68fb ldr r3, [r7, #12] - 8005462: 697a ldr r2, [r7, #20] - 8005464: 621a str r2, [r3, #32] -} - 8005466: bf00 nop - 8005468: 371c adds r7, #28 - 800546a: 46bd mov sp, r7 - 800546c: bc80 pop {r7} - 800546e: 4770 bx lr - -08005470 : - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - 8005470: b480 push {r7} - 8005472: b087 sub sp, #28 - 8005474: af00 add r7, sp, #0 - 8005476: 60f8 str r0, [r7, #12] - 8005478: 60b9 str r1, [r7, #8] - 800547a: 607a str r2, [r7, #4] - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - 800547c: 68fb ldr r3, [r7, #12] - 800547e: 6a1b ldr r3, [r3, #32] - 8005480: f023 0210 bic.w r2, r3, #16 - 8005484: 68fb ldr r3, [r7, #12] - 8005486: 621a str r2, [r3, #32] - tmpccmr1 = TIMx->CCMR1; - 8005488: 68fb ldr r3, [r7, #12] - 800548a: 699b ldr r3, [r3, #24] - 800548c: 617b str r3, [r7, #20] - tmpccer = TIMx->CCER; - 800548e: 68fb ldr r3, [r7, #12] - 8005490: 6a1b ldr r3, [r3, #32] - 8005492: 613b str r3, [r7, #16] - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC2F; - 8005494: 697b ldr r3, [r7, #20] - 8005496: f423 4370 bic.w r3, r3, #61440 ; 0xf000 - 800549a: 617b str r3, [r7, #20] - tmpccmr1 |= (TIM_ICFilter << 12U); - 800549c: 687b ldr r3, [r7, #4] - 800549e: 031b lsls r3, r3, #12 - 80054a0: 697a ldr r2, [r7, #20] - 80054a2: 4313 orrs r3, r2 - 80054a4: 617b str r3, [r7, #20] - - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 80054a6: 693b ldr r3, [r7, #16] - 80054a8: f023 03a0 bic.w r3, r3, #160 ; 0xa0 - 80054ac: 613b str r3, [r7, #16] - tmpccer |= (TIM_ICPolarity << 4U); - 80054ae: 68bb ldr r3, [r7, #8] - 80054b0: 011b lsls r3, r3, #4 - 80054b2: 693a ldr r2, [r7, #16] - 80054b4: 4313 orrs r3, r2 - 80054b6: 613b str r3, [r7, #16] - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - 80054b8: 68fb ldr r3, [r7, #12] - 80054ba: 697a ldr r2, [r7, #20] - 80054bc: 619a str r2, [r3, #24] - TIMx->CCER = tmpccer; - 80054be: 68fb ldr r3, [r7, #12] - 80054c0: 693a ldr r2, [r7, #16] - 80054c2: 621a str r2, [r3, #32] -} - 80054c4: bf00 nop - 80054c6: 371c adds r7, #28 - 80054c8: 46bd mov sp, r7 - 80054ca: bc80 pop {r7} - 80054cc: 4770 bx lr - -080054ce : - * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 - * @arg TIM_TS_ETRF: External Trigger input - * @retval None - */ -static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) -{ - 80054ce: b480 push {r7} - 80054d0: b085 sub sp, #20 - 80054d2: af00 add r7, sp, #0 - 80054d4: 6078 str r0, [r7, #4] - 80054d6: 6039 str r1, [r7, #0] - uint32_t tmpsmcr; - - /* Get the TIMx SMCR register value */ - tmpsmcr = TIMx->SMCR; - 80054d8: 687b ldr r3, [r7, #4] - 80054da: 689b ldr r3, [r3, #8] - 80054dc: 60fb str r3, [r7, #12] - /* Reset the TS Bits */ - tmpsmcr &= ~TIM_SMCR_TS; - 80054de: 68fb ldr r3, [r7, #12] - 80054e0: f023 0370 bic.w r3, r3, #112 ; 0x70 - 80054e4: 60fb str r3, [r7, #12] - /* Set the Input Trigger source and the slave mode*/ - tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 80054e6: 683a ldr r2, [r7, #0] - 80054e8: 68fb ldr r3, [r7, #12] - 80054ea: 4313 orrs r3, r2 - 80054ec: f043 0307 orr.w r3, r3, #7 - 80054f0: 60fb str r3, [r7, #12] - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; - 80054f2: 687b ldr r3, [r7, #4] - 80054f4: 68fa ldr r2, [r7, #12] - 80054f6: 609a str r2, [r3, #8] -} - 80054f8: bf00 nop - 80054fa: 3714 adds r7, #20 - 80054fc: 46bd mov sp, r7 - 80054fe: bc80 pop {r7} - 8005500: 4770 bx lr - -08005502 : - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, - uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) -{ - 8005502: b480 push {r7} - 8005504: b087 sub sp, #28 - 8005506: af00 add r7, sp, #0 - 8005508: 60f8 str r0, [r7, #12] - 800550a: 60b9 str r1, [r7, #8] - 800550c: 607a str r2, [r7, #4] - 800550e: 603b str r3, [r7, #0] - uint32_t tmpsmcr; - - tmpsmcr = TIMx->SMCR; - 8005510: 68fb ldr r3, [r7, #12] - 8005512: 689b ldr r3, [r3, #8] - 8005514: 617b str r3, [r7, #20] - - /* Reset the ETR Bits */ - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8005516: 697b ldr r3, [r7, #20] - 8005518: f423 437f bic.w r3, r3, #65280 ; 0xff00 - 800551c: 617b str r3, [r7, #20] - - /* Set the Prescaler, the Filter value and the Polarity */ - tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 800551e: 683b ldr r3, [r7, #0] - 8005520: 021a lsls r2, r3, #8 - 8005522: 687b ldr r3, [r7, #4] - 8005524: 431a orrs r2, r3 - 8005526: 68bb ldr r3, [r7, #8] - 8005528: 4313 orrs r3, r2 - 800552a: 697a ldr r2, [r7, #20] - 800552c: 4313 orrs r3, r2 - 800552e: 617b str r3, [r7, #20] - - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; - 8005530: 68fb ldr r3, [r7, #12] - 8005532: 697a ldr r2, [r7, #20] - 8005534: 609a str r2, [r3, #8] -} - 8005536: bf00 nop - 8005538: 371c adds r7, #28 - 800553a: 46bd mov sp, r7 - 800553c: bc80 pop {r7} - 800553e: 4770 bx lr - -08005540 : - * @param ChannelState specifies the TIM Channel CCxE bit new state. - * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. - * @retval None - */ -void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) -{ - 8005540: b480 push {r7} - 8005542: b087 sub sp, #28 - 8005544: af00 add r7, sp, #0 - 8005546: 60f8 str r0, [r7, #12] - 8005548: 60b9 str r1, [r7, #8] - 800554a: 607a str r2, [r7, #4] - - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(TIMx)); - assert_param(IS_TIM_CHANNELS(Channel)); - - tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ - 800554c: 68bb ldr r3, [r7, #8] - 800554e: f003 031f and.w r3, r3, #31 - 8005552: 2201 movs r2, #1 - 8005554: fa02 f303 lsl.w r3, r2, r3 - 8005558: 617b str r3, [r7, #20] - - /* Reset the CCxE Bit */ - TIMx->CCER &= ~tmp; - 800555a: 68fb ldr r3, [r7, #12] - 800555c: 6a1a ldr r2, [r3, #32] - 800555e: 697b ldr r3, [r7, #20] - 8005560: 43db mvns r3, r3 - 8005562: 401a ands r2, r3 - 8005564: 68fb ldr r3, [r7, #12] - 8005566: 621a str r2, [r3, #32] - - /* Set or reset the CCxE Bit */ - TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ - 8005568: 68fb ldr r3, [r7, #12] - 800556a: 6a1a ldr r2, [r3, #32] - 800556c: 68bb ldr r3, [r7, #8] - 800556e: f003 031f and.w r3, r3, #31 - 8005572: 6879 ldr r1, [r7, #4] - 8005574: fa01 f303 lsl.w r3, r1, r3 - 8005578: 431a orrs r2, r3 - 800557a: 68fb ldr r3, [r7, #12] - 800557c: 621a str r2, [r3, #32] -} - 800557e: bf00 nop - 8005580: 371c adds r7, #28 - 8005582: 46bd mov sp, r7 - 8005584: bc80 pop {r7} - 8005586: 4770 bx lr - -08005588 : - * mode. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, - TIM_MasterConfigTypeDef *sMasterConfig) -{ - 8005588: b480 push {r7} - 800558a: b085 sub sp, #20 - 800558c: af00 add r7, sp, #0 - 800558e: 6078 str r0, [r7, #4] - 8005590: 6039 str r1, [r7, #0] - assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); - assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); - - /* Check input state */ - __HAL_LOCK(htim); - 8005592: 687b ldr r3, [r7, #4] - 8005594: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8005598: 2b01 cmp r3, #1 - 800559a: d101 bne.n 80055a0 - 800559c: 2302 movs r3, #2 - 800559e: e046 b.n 800562e - 80055a0: 687b ldr r3, [r7, #4] - 80055a2: 2201 movs r2, #1 - 80055a4: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Change the handler state */ - htim->State = HAL_TIM_STATE_BUSY; - 80055a8: 687b ldr r3, [r7, #4] - 80055aa: 2202 movs r2, #2 - 80055ac: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Get the TIMx CR2 register value */ - tmpcr2 = htim->Instance->CR2; - 80055b0: 687b ldr r3, [r7, #4] - 80055b2: 681b ldr r3, [r3, #0] - 80055b4: 685b ldr r3, [r3, #4] - 80055b6: 60fb str r3, [r7, #12] - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - 80055b8: 687b ldr r3, [r7, #4] - 80055ba: 681b ldr r3, [r3, #0] - 80055bc: 689b ldr r3, [r3, #8] - 80055be: 60bb str r3, [r7, #8] - - /* Reset the MMS Bits */ - tmpcr2 &= ~TIM_CR2_MMS; - 80055c0: 68fb ldr r3, [r7, #12] - 80055c2: f023 0370 bic.w r3, r3, #112 ; 0x70 - 80055c6: 60fb str r3, [r7, #12] - /* Select the TRGO source */ - tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 80055c8: 683b ldr r3, [r7, #0] - 80055ca: 681b ldr r3, [r3, #0] - 80055cc: 68fa ldr r2, [r7, #12] - 80055ce: 4313 orrs r3, r2 - 80055d0: 60fb str r3, [r7, #12] - - /* Update TIMx CR2 */ - htim->Instance->CR2 = tmpcr2; - 80055d2: 687b ldr r3, [r7, #4] - 80055d4: 681b ldr r3, [r3, #0] - 80055d6: 68fa ldr r2, [r7, #12] - 80055d8: 605a str r2, [r3, #4] - - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 80055da: 687b ldr r3, [r7, #4] - 80055dc: 681b ldr r3, [r3, #0] - 80055de: 4a16 ldr r2, [pc, #88] ; (8005638 ) - 80055e0: 4293 cmp r3, r2 - 80055e2: d00e beq.n 8005602 - 80055e4: 687b ldr r3, [r7, #4] - 80055e6: 681b ldr r3, [r3, #0] - 80055e8: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 80055ec: d009 beq.n 8005602 - 80055ee: 687b ldr r3, [r7, #4] - 80055f0: 681b ldr r3, [r3, #0] - 80055f2: 4a12 ldr r2, [pc, #72] ; (800563c ) - 80055f4: 4293 cmp r3, r2 - 80055f6: d004 beq.n 8005602 - 80055f8: 687b ldr r3, [r7, #4] - 80055fa: 681b ldr r3, [r3, #0] - 80055fc: 4a10 ldr r2, [pc, #64] ; (8005640 ) - 80055fe: 4293 cmp r3, r2 - 8005600: d10c bne.n 800561c - { - /* Reset the MSM Bit */ - tmpsmcr &= ~TIM_SMCR_MSM; - 8005602: 68bb ldr r3, [r7, #8] - 8005604: f023 0380 bic.w r3, r3, #128 ; 0x80 - 8005608: 60bb str r3, [r7, #8] - /* Set master mode */ - tmpsmcr |= sMasterConfig->MasterSlaveMode; - 800560a: 683b ldr r3, [r7, #0] - 800560c: 685b ldr r3, [r3, #4] - 800560e: 68ba ldr r2, [r7, #8] - 8005610: 4313 orrs r3, r2 - 8005612: 60bb str r3, [r7, #8] - - /* Update TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - 8005614: 687b ldr r3, [r7, #4] - 8005616: 681b ldr r3, [r3, #0] - 8005618: 68ba ldr r2, [r7, #8] - 800561a: 609a str r2, [r3, #8] - } - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - 800561c: 687b ldr r3, [r7, #4] - 800561e: 2201 movs r2, #1 - 8005620: f883 203d strb.w r2, [r3, #61] ; 0x3d - - __HAL_UNLOCK(htim); - 8005624: 687b ldr r3, [r7, #4] - 8005626: 2200 movs r2, #0 - 8005628: f883 203c strb.w r2, [r3, #60] ; 0x3c - - return HAL_OK; - 800562c: 2300 movs r3, #0 -} - 800562e: 4618 mov r0, r3 - 8005630: 3714 adds r7, #20 - 8005632: 46bd mov sp, r7 - 8005634: bc80 pop {r7} - 8005636: 4770 bx lr - 8005638: 40012c00 .word 0x40012c00 - 800563c: 40000400 .word 0x40000400 - 8005640: 40000800 .word 0x40000800 - -08005644 : - * @brief Hall commutation changed callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) -{ - 8005644: b480 push {r7} - 8005646: b083 sub sp, #12 - 8005648: af00 add r7, sp, #0 - 800564a: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_CommutCallback could be implemented in the user file - */ -} - 800564c: bf00 nop - 800564e: 370c adds r7, #12 - 8005650: 46bd mov sp, r7 - 8005652: bc80 pop {r7} - 8005654: 4770 bx lr - -08005656 : - * @brief Hall Break detection callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) -{ - 8005656: b480 push {r7} - 8005658: b083 sub sp, #12 - 800565a: af00 add r7, sp, #0 - 800565c: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_BreakCallback could be implemented in the user file - */ -} - 800565e: bf00 nop - 8005660: 370c adds r7, #12 - 8005662: 46bd mov sp, r7 - 8005664: bc80 pop {r7} - 8005666: 4770 bx lr - -08005668 : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) -{ - 8005668: b580 push {r7, lr} - 800566a: b082 sub sp, #8 - 800566c: af00 add r7, sp, #0 - 800566e: 6078 str r0, [r7, #4] - /* Check the UART handle allocation */ - if (huart == NULL) - 8005670: 687b ldr r3, [r7, #4] - 8005672: 2b00 cmp r3, #0 - 8005674: d101 bne.n 800567a - { - return HAL_ERROR; - 8005676: 2301 movs r3, #1 - 8005678: e03f b.n 80056fa - assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); -#if defined(USART_CR1_OVER8) - assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); -#endif /* USART_CR1_OVER8 */ - - if (huart->gState == HAL_UART_STATE_RESET) - 800567a: 687b ldr r3, [r7, #4] - 800567c: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 8005680: b2db uxtb r3, r3 - 8005682: 2b00 cmp r3, #0 - 8005684: d106 bne.n 8005694 - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - 8005686: 687b ldr r3, [r7, #4] - 8005688: 2200 movs r2, #0 - 800568a: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Init the low level hardware */ - huart->MspInitCallback(huart); -#else - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); - 800568e: 6878 ldr r0, [r7, #4] - 8005690: f7fd f992 bl 80029b8 -#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ - } - - huart->gState = HAL_UART_STATE_BUSY; - 8005694: 687b ldr r3, [r7, #4] - 8005696: 2224 movs r2, #36 ; 0x24 - 8005698: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Disable the peripheral */ - __HAL_UART_DISABLE(huart); - 800569c: 687b ldr r3, [r7, #4] - 800569e: 681b ldr r3, [r3, #0] - 80056a0: 68da ldr r2, [r3, #12] - 80056a2: 687b ldr r3, [r7, #4] - 80056a4: 681b ldr r3, [r3, #0] - 80056a6: f422 5200 bic.w r2, r2, #8192 ; 0x2000 - 80056aa: 60da str r2, [r3, #12] - - /* Set the UART Communication parameters */ - UART_SetConfig(huart); - 80056ac: 6878 ldr r0, [r7, #4] - 80056ae: f000 fd27 bl 8006100 - - /* In asynchronous mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 80056b2: 687b ldr r3, [r7, #4] - 80056b4: 681b ldr r3, [r3, #0] - 80056b6: 691a ldr r2, [r3, #16] - 80056b8: 687b ldr r3, [r7, #4] - 80056ba: 681b ldr r3, [r3, #0] - 80056bc: f422 4290 bic.w r2, r2, #18432 ; 0x4800 - 80056c0: 611a str r2, [r3, #16] - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 80056c2: 687b ldr r3, [r7, #4] - 80056c4: 681b ldr r3, [r3, #0] - 80056c6: 695a ldr r2, [r3, #20] - 80056c8: 687b ldr r3, [r7, #4] - 80056ca: 681b ldr r3, [r3, #0] - 80056cc: f022 022a bic.w r2, r2, #42 ; 0x2a - 80056d0: 615a str r2, [r3, #20] - - /* Enable the peripheral */ - __HAL_UART_ENABLE(huart); - 80056d2: 687b ldr r3, [r7, #4] - 80056d4: 681b ldr r3, [r3, #0] - 80056d6: 68da ldr r2, [r3, #12] - 80056d8: 687b ldr r3, [r7, #4] - 80056da: 681b ldr r3, [r3, #0] - 80056dc: f442 5200 orr.w r2, r2, #8192 ; 0x2000 - 80056e0: 60da str r2, [r3, #12] - - /* Initialize the UART state */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - 80056e2: 687b ldr r3, [r7, #4] - 80056e4: 2200 movs r2, #0 - 80056e6: 641a str r2, [r3, #64] ; 0x40 - huart->gState = HAL_UART_STATE_READY; - 80056e8: 687b ldr r3, [r7, #4] - 80056ea: 2220 movs r2, #32 - 80056ec: f883 203d strb.w r2, [r3, #61] ; 0x3d - huart->RxState = HAL_UART_STATE_READY; - 80056f0: 687b ldr r3, [r7, #4] - 80056f2: 2220 movs r2, #32 - 80056f4: f883 203e strb.w r2, [r3, #62] ; 0x3e - - return HAL_OK; - 80056f8: 2300 movs r3, #0 -} - 80056fa: 4618 mov r0, r3 - 80056fc: 3708 adds r7, #8 - 80056fe: 46bd mov sp, r7 - 8005700: bd80 pop {r7, pc} - -08005702 : - * @param Size Amount of data elements (u8 or u16) to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - 8005702: b580 push {r7, lr} - 8005704: b08a sub sp, #40 ; 0x28 - 8005706: af02 add r7, sp, #8 - 8005708: 60f8 str r0, [r7, #12] - 800570a: 60b9 str r1, [r7, #8] - 800570c: 603b str r3, [r7, #0] - 800570e: 4613 mov r3, r2 - 8005710: 80fb strh r3, [r7, #6] - uint8_t *pdata8bits; - uint16_t *pdata16bits; - uint32_t tickstart = 0U; - 8005712: 2300 movs r3, #0 - 8005714: 617b str r3, [r7, #20] - - /* Check that a Tx process is not already ongoing */ - if (huart->gState == HAL_UART_STATE_READY) - 8005716: 68fb ldr r3, [r7, #12] - 8005718: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 800571c: b2db uxtb r3, r3 - 800571e: 2b20 cmp r3, #32 - 8005720: d17c bne.n 800581c - { - if ((pData == NULL) || (Size == 0U)) - 8005722: 68bb ldr r3, [r7, #8] - 8005724: 2b00 cmp r3, #0 - 8005726: d002 beq.n 800572e - 8005728: 88fb ldrh r3, [r7, #6] - 800572a: 2b00 cmp r3, #0 - 800572c: d101 bne.n 8005732 - { - return HAL_ERROR; - 800572e: 2301 movs r3, #1 - 8005730: e075 b.n 800581e - } - - /* Process Locked */ - __HAL_LOCK(huart); - 8005732: 68fb ldr r3, [r7, #12] - 8005734: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8005738: 2b01 cmp r3, #1 - 800573a: d101 bne.n 8005740 - 800573c: 2302 movs r3, #2 - 800573e: e06e b.n 800581e - 8005740: 68fb ldr r3, [r7, #12] - 8005742: 2201 movs r2, #1 - 8005744: f883 203c strb.w r2, [r3, #60] ; 0x3c - - huart->ErrorCode = HAL_UART_ERROR_NONE; - 8005748: 68fb ldr r3, [r7, #12] - 800574a: 2200 movs r2, #0 - 800574c: 641a str r2, [r3, #64] ; 0x40 - huart->gState = HAL_UART_STATE_BUSY_TX; - 800574e: 68fb ldr r3, [r7, #12] - 8005750: 2221 movs r2, #33 ; 0x21 - 8005752: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Init tickstart for timeout management */ - tickstart = HAL_GetTick(); - 8005756: f7fd fbaf bl 8002eb8 - 800575a: 6178 str r0, [r7, #20] - - huart->TxXferSize = Size; - 800575c: 68fb ldr r3, [r7, #12] - 800575e: 88fa ldrh r2, [r7, #6] - 8005760: 849a strh r2, [r3, #36] ; 0x24 - huart->TxXferCount = Size; - 8005762: 68fb ldr r3, [r7, #12] - 8005764: 88fa ldrh r2, [r7, #6] - 8005766: 84da strh r2, [r3, #38] ; 0x26 - - /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8005768: 68fb ldr r3, [r7, #12] - 800576a: 689b ldr r3, [r3, #8] - 800576c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8005770: d108 bne.n 8005784 - 8005772: 68fb ldr r3, [r7, #12] - 8005774: 691b ldr r3, [r3, #16] - 8005776: 2b00 cmp r3, #0 - 8005778: d104 bne.n 8005784 - { - pdata8bits = NULL; - 800577a: 2300 movs r3, #0 - 800577c: 61fb str r3, [r7, #28] - pdata16bits = (uint16_t *) pData; - 800577e: 68bb ldr r3, [r7, #8] - 8005780: 61bb str r3, [r7, #24] - 8005782: e003 b.n 800578c - } - else - { - pdata8bits = pData; - 8005784: 68bb ldr r3, [r7, #8] - 8005786: 61fb str r3, [r7, #28] - pdata16bits = NULL; - 8005788: 2300 movs r3, #0 - 800578a: 61bb str r3, [r7, #24] - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - 800578c: 68fb ldr r3, [r7, #12] - 800578e: 2200 movs r2, #0 - 8005790: f883 203c strb.w r2, [r3, #60] ; 0x3c - - while (huart->TxXferCount > 0U) - 8005794: e02a b.n 80057ec - { - if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 8005796: 683b ldr r3, [r7, #0] - 8005798: 9300 str r3, [sp, #0] - 800579a: 697b ldr r3, [r7, #20] - 800579c: 2200 movs r2, #0 - 800579e: 2180 movs r1, #128 ; 0x80 - 80057a0: 68f8 ldr r0, [r7, #12] - 80057a2: f000 fafe bl 8005da2 - 80057a6: 4603 mov r3, r0 - 80057a8: 2b00 cmp r3, #0 - 80057aa: d001 beq.n 80057b0 - { - return HAL_TIMEOUT; - 80057ac: 2303 movs r3, #3 - 80057ae: e036 b.n 800581e - } - if (pdata8bits == NULL) - 80057b0: 69fb ldr r3, [r7, #28] - 80057b2: 2b00 cmp r3, #0 - 80057b4: d10b bne.n 80057ce - { - huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU); - 80057b6: 69bb ldr r3, [r7, #24] - 80057b8: 881b ldrh r3, [r3, #0] - 80057ba: 461a mov r2, r3 - 80057bc: 68fb ldr r3, [r7, #12] - 80057be: 681b ldr r3, [r3, #0] - 80057c0: f3c2 0208 ubfx r2, r2, #0, #9 - 80057c4: 605a str r2, [r3, #4] - pdata16bits++; - 80057c6: 69bb ldr r3, [r7, #24] - 80057c8: 3302 adds r3, #2 - 80057ca: 61bb str r3, [r7, #24] - 80057cc: e007 b.n 80057de - } - else - { - huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU); - 80057ce: 69fb ldr r3, [r7, #28] - 80057d0: 781a ldrb r2, [r3, #0] - 80057d2: 68fb ldr r3, [r7, #12] - 80057d4: 681b ldr r3, [r3, #0] - 80057d6: 605a str r2, [r3, #4] - pdata8bits++; - 80057d8: 69fb ldr r3, [r7, #28] - 80057da: 3301 adds r3, #1 - 80057dc: 61fb str r3, [r7, #28] - } - huart->TxXferCount--; - 80057de: 68fb ldr r3, [r7, #12] - 80057e0: 8cdb ldrh r3, [r3, #38] ; 0x26 - 80057e2: b29b uxth r3, r3 - 80057e4: 3b01 subs r3, #1 - 80057e6: b29a uxth r2, r3 - 80057e8: 68fb ldr r3, [r7, #12] - 80057ea: 84da strh r2, [r3, #38] ; 0x26 - while (huart->TxXferCount > 0U) - 80057ec: 68fb ldr r3, [r7, #12] - 80057ee: 8cdb ldrh r3, [r3, #38] ; 0x26 - 80057f0: b29b uxth r3, r3 - 80057f2: 2b00 cmp r3, #0 - 80057f4: d1cf bne.n 8005796 - } - - if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 80057f6: 683b ldr r3, [r7, #0] - 80057f8: 9300 str r3, [sp, #0] - 80057fa: 697b ldr r3, [r7, #20] - 80057fc: 2200 movs r2, #0 - 80057fe: 2140 movs r1, #64 ; 0x40 - 8005800: 68f8 ldr r0, [r7, #12] - 8005802: f000 face bl 8005da2 - 8005806: 4603 mov r3, r0 - 8005808: 2b00 cmp r3, #0 - 800580a: d001 beq.n 8005810 - { - return HAL_TIMEOUT; - 800580c: 2303 movs r3, #3 - 800580e: e006 b.n 800581e - } - - /* At end of Tx process, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - 8005810: 68fb ldr r3, [r7, #12] - 8005812: 2220 movs r2, #32 - 8005814: f883 203d strb.w r2, [r3, #61] ; 0x3d - - return HAL_OK; - 8005818: 2300 movs r3, #0 - 800581a: e000 b.n 800581e - } - else - { - return HAL_BUSY; - 800581c: 2302 movs r3, #2 - } -} - 800581e: 4618 mov r0, r3 - 8005820: 3720 adds r7, #32 - 8005822: 46bd mov sp, r7 - 8005824: bd80 pop {r7, pc} - ... - -08005828 : - * @param pData Pointer to data buffer (u8 or u16 data elements). - * @param Size Amount of data elements (u8 or u16) to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - 8005828: b580 push {r7, lr} - 800582a: b086 sub sp, #24 - 800582c: af00 add r7, sp, #0 - 800582e: 60f8 str r0, [r7, #12] - 8005830: 60b9 str r1, [r7, #8] - 8005832: 4613 mov r3, r2 - 8005834: 80fb strh r3, [r7, #6] - uint32_t *tmp; - - /* Check that a Tx process is not already ongoing */ - if (huart->gState == HAL_UART_STATE_READY) - 8005836: 68fb ldr r3, [r7, #12] - 8005838: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 800583c: b2db uxtb r3, r3 - 800583e: 2b20 cmp r3, #32 - 8005840: d153 bne.n 80058ea - { - if ((pData == NULL) || (Size == 0U)) - 8005842: 68bb ldr r3, [r7, #8] - 8005844: 2b00 cmp r3, #0 - 8005846: d002 beq.n 800584e - 8005848: 88fb ldrh r3, [r7, #6] - 800584a: 2b00 cmp r3, #0 - 800584c: d101 bne.n 8005852 - { - return HAL_ERROR; - 800584e: 2301 movs r3, #1 - 8005850: e04c b.n 80058ec - } - - /* Process Locked */ - __HAL_LOCK(huart); - 8005852: 68fb ldr r3, [r7, #12] - 8005854: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8005858: 2b01 cmp r3, #1 - 800585a: d101 bne.n 8005860 - 800585c: 2302 movs r3, #2 - 800585e: e045 b.n 80058ec - 8005860: 68fb ldr r3, [r7, #12] - 8005862: 2201 movs r2, #1 - 8005864: f883 203c strb.w r2, [r3, #60] ; 0x3c - - huart->pTxBuffPtr = pData; - 8005868: 68ba ldr r2, [r7, #8] - 800586a: 68fb ldr r3, [r7, #12] - 800586c: 621a str r2, [r3, #32] - huart->TxXferSize = Size; - 800586e: 68fb ldr r3, [r7, #12] - 8005870: 88fa ldrh r2, [r7, #6] - 8005872: 849a strh r2, [r3, #36] ; 0x24 - huart->TxXferCount = Size; - 8005874: 68fb ldr r3, [r7, #12] - 8005876: 88fa ldrh r2, [r7, #6] - 8005878: 84da strh r2, [r3, #38] ; 0x26 - - huart->ErrorCode = HAL_UART_ERROR_NONE; - 800587a: 68fb ldr r3, [r7, #12] - 800587c: 2200 movs r2, #0 - 800587e: 641a str r2, [r3, #64] ; 0x40 - huart->gState = HAL_UART_STATE_BUSY_TX; - 8005880: 68fb ldr r3, [r7, #12] - 8005882: 2221 movs r2, #33 ; 0x21 - 8005884: f883 203d strb.w r2, [r3, #61] ; 0x3d - - /* Set the UART DMA transfer complete callback */ - huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; - 8005888: 68fb ldr r3, [r7, #12] - 800588a: 6b5b ldr r3, [r3, #52] ; 0x34 - 800588c: 4a19 ldr r2, [pc, #100] ; (80058f4 ) - 800588e: 629a str r2, [r3, #40] ; 0x28 - - /* Set the UART DMA Half transfer complete callback */ - huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; - 8005890: 68fb ldr r3, [r7, #12] - 8005892: 6b5b ldr r3, [r3, #52] ; 0x34 - 8005894: 4a18 ldr r2, [pc, #96] ; (80058f8 ) - 8005896: 62da str r2, [r3, #44] ; 0x2c - - /* Set the DMA error callback */ - huart->hdmatx->XferErrorCallback = UART_DMAError; - 8005898: 68fb ldr r3, [r7, #12] - 800589a: 6b5b ldr r3, [r3, #52] ; 0x34 - 800589c: 4a17 ldr r2, [pc, #92] ; (80058fc ) - 800589e: 631a str r2, [r3, #48] ; 0x30 - - /* Set the DMA abort callback */ - huart->hdmatx->XferAbortCallback = NULL; - 80058a0: 68fb ldr r3, [r7, #12] - 80058a2: 6b5b ldr r3, [r3, #52] ; 0x34 - 80058a4: 2200 movs r2, #0 - 80058a6: 635a str r2, [r3, #52] ; 0x34 - - /* Enable the UART transmit DMA channel */ - tmp = (uint32_t *)&pData; - 80058a8: f107 0308 add.w r3, r7, #8 - 80058ac: 617b str r3, [r7, #20] - HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size); - 80058ae: 68fb ldr r3, [r7, #12] - 80058b0: 6b58 ldr r0, [r3, #52] ; 0x34 - 80058b2: 697b ldr r3, [r7, #20] - 80058b4: 6819 ldr r1, [r3, #0] - 80058b6: 68fb ldr r3, [r7, #12] - 80058b8: 681b ldr r3, [r3, #0] - 80058ba: 3304 adds r3, #4 - 80058bc: 461a mov r2, r3 - 80058be: 88fb ldrh r3, [r7, #6] - 80058c0: f7fd fc90 bl 80031e4 - - /* Clear the TC flag in the SR register by writing 0 to it */ - __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); - 80058c4: 68fb ldr r3, [r7, #12] - 80058c6: 681b ldr r3, [r3, #0] - 80058c8: f06f 0240 mvn.w r2, #64 ; 0x40 - 80058cc: 601a str r2, [r3, #0] - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - 80058ce: 68fb ldr r3, [r7, #12] - 80058d0: 2200 movs r2, #0 - 80058d2: f883 203c strb.w r2, [r3, #60] ; 0x3c - - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the UART CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); - 80058d6: 68fb ldr r3, [r7, #12] - 80058d8: 681b ldr r3, [r3, #0] - 80058da: 695a ldr r2, [r3, #20] - 80058dc: 68fb ldr r3, [r7, #12] - 80058de: 681b ldr r3, [r3, #0] - 80058e0: f042 0280 orr.w r2, r2, #128 ; 0x80 - 80058e4: 615a str r2, [r3, #20] - - return HAL_OK; - 80058e6: 2300 movs r3, #0 - 80058e8: e000 b.n 80058ec - } - else - { - return HAL_BUSY; - 80058ea: 2302 movs r3, #2 - } -} - 80058ec: 4618 mov r0, r3 - 80058ee: 3718 adds r7, #24 - 80058f0: 46bd mov sp, r7 - 80058f2: bd80 pop {r7, pc} - 80058f4: 08005ca1 .word 0x08005ca1 - 80058f8: 08005cf3 .word 0x08005cf3 - 80058fc: 08005d0f .word 0x08005d0f - -08005900 : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) -{ - 8005900: b580 push {r7, lr} - 8005902: b08a sub sp, #40 ; 0x28 - 8005904: af00 add r7, sp, #0 - 8005906: 6078 str r0, [r7, #4] - uint32_t isrflags = READ_REG(huart->Instance->SR); - 8005908: 687b ldr r3, [r7, #4] - 800590a: 681b ldr r3, [r3, #0] - 800590c: 681b ldr r3, [r3, #0] - 800590e: 627b str r3, [r7, #36] ; 0x24 - uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8005910: 687b ldr r3, [r7, #4] - 8005912: 681b ldr r3, [r3, #0] - 8005914: 68db ldr r3, [r3, #12] - 8005916: 623b str r3, [r7, #32] - uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8005918: 687b ldr r3, [r7, #4] - 800591a: 681b ldr r3, [r3, #0] - 800591c: 695b ldr r3, [r3, #20] - 800591e: 61fb str r3, [r7, #28] - uint32_t errorflags = 0x00U; - 8005920: 2300 movs r3, #0 - 8005922: 61bb str r3, [r7, #24] - uint32_t dmarequest = 0x00U; - 8005924: 2300 movs r3, #0 - 8005926: 617b str r3, [r7, #20] - - /* If no error occurs */ - errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); - 8005928: 6a7b ldr r3, [r7, #36] ; 0x24 - 800592a: f003 030f and.w r3, r3, #15 - 800592e: 61bb str r3, [r7, #24] - if (errorflags == RESET) - 8005930: 69bb ldr r3, [r7, #24] - 8005932: 2b00 cmp r3, #0 - 8005934: d10d bne.n 8005952 - { - /* UART in mode Receiver -------------------------------------------------*/ - if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 8005936: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005938: f003 0320 and.w r3, r3, #32 - 800593c: 2b00 cmp r3, #0 - 800593e: d008 beq.n 8005952 - 8005940: 6a3b ldr r3, [r7, #32] - 8005942: f003 0320 and.w r3, r3, #32 - 8005946: 2b00 cmp r3, #0 - 8005948: d003 beq.n 8005952 - { - UART_Receive_IT(huart); - 800594a: 6878 ldr r0, [r7, #4] - 800594c: f000 fb2f bl 8005fae - return; - 8005950: e17b b.n 8005c4a - } - } - - /* If some errors occur */ - if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) - 8005952: 69bb ldr r3, [r7, #24] - 8005954: 2b00 cmp r3, #0 - 8005956: f000 80b1 beq.w 8005abc - 800595a: 69fb ldr r3, [r7, #28] - 800595c: f003 0301 and.w r3, r3, #1 - 8005960: 2b00 cmp r3, #0 - 8005962: d105 bne.n 8005970 - 8005964: 6a3b ldr r3, [r7, #32] - 8005966: f403 7390 and.w r3, r3, #288 ; 0x120 - 800596a: 2b00 cmp r3, #0 - 800596c: f000 80a6 beq.w 8005abc - { - /* UART parity error interrupt occurred ----------------------------------*/ - if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) - 8005970: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005972: f003 0301 and.w r3, r3, #1 - 8005976: 2b00 cmp r3, #0 - 8005978: d00a beq.n 8005990 - 800597a: 6a3b ldr r3, [r7, #32] - 800597c: f403 7380 and.w r3, r3, #256 ; 0x100 - 8005980: 2b00 cmp r3, #0 - 8005982: d005 beq.n 8005990 - { - huart->ErrorCode |= HAL_UART_ERROR_PE; - 8005984: 687b ldr r3, [r7, #4] - 8005986: 6c1b ldr r3, [r3, #64] ; 0x40 - 8005988: f043 0201 orr.w r2, r3, #1 - 800598c: 687b ldr r3, [r7, #4] - 800598e: 641a str r2, [r3, #64] ; 0x40 - } - - /* UART noise error interrupt occurred -----------------------------------*/ - if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 8005990: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005992: f003 0304 and.w r3, r3, #4 - 8005996: 2b00 cmp r3, #0 - 8005998: d00a beq.n 80059b0 - 800599a: 69fb ldr r3, [r7, #28] - 800599c: f003 0301 and.w r3, r3, #1 - 80059a0: 2b00 cmp r3, #0 - 80059a2: d005 beq.n 80059b0 - { - huart->ErrorCode |= HAL_UART_ERROR_NE; - 80059a4: 687b ldr r3, [r7, #4] - 80059a6: 6c1b ldr r3, [r3, #64] ; 0x40 - 80059a8: f043 0202 orr.w r2, r3, #2 - 80059ac: 687b ldr r3, [r7, #4] - 80059ae: 641a str r2, [r3, #64] ; 0x40 - } - - /* UART frame error interrupt occurred -----------------------------------*/ - if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 80059b0: 6a7b ldr r3, [r7, #36] ; 0x24 - 80059b2: f003 0302 and.w r3, r3, #2 - 80059b6: 2b00 cmp r3, #0 - 80059b8: d00a beq.n 80059d0 - 80059ba: 69fb ldr r3, [r7, #28] - 80059bc: f003 0301 and.w r3, r3, #1 - 80059c0: 2b00 cmp r3, #0 - 80059c2: d005 beq.n 80059d0 - { - huart->ErrorCode |= HAL_UART_ERROR_FE; - 80059c4: 687b ldr r3, [r7, #4] - 80059c6: 6c1b ldr r3, [r3, #64] ; 0x40 - 80059c8: f043 0204 orr.w r2, r3, #4 - 80059cc: 687b ldr r3, [r7, #4] - 80059ce: 641a str r2, [r3, #64] ; 0x40 - } - - /* UART Over-Run interrupt occurred --------------------------------------*/ - if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET))) - 80059d0: 6a7b ldr r3, [r7, #36] ; 0x24 - 80059d2: f003 0308 and.w r3, r3, #8 - 80059d6: 2b00 cmp r3, #0 - 80059d8: d00f beq.n 80059fa - 80059da: 6a3b ldr r3, [r7, #32] - 80059dc: f003 0320 and.w r3, r3, #32 - 80059e0: 2b00 cmp r3, #0 - 80059e2: d104 bne.n 80059ee - 80059e4: 69fb ldr r3, [r7, #28] - 80059e6: f003 0301 and.w r3, r3, #1 - 80059ea: 2b00 cmp r3, #0 - 80059ec: d005 beq.n 80059fa - { - huart->ErrorCode |= HAL_UART_ERROR_ORE; - 80059ee: 687b ldr r3, [r7, #4] - 80059f0: 6c1b ldr r3, [r3, #64] ; 0x40 - 80059f2: f043 0208 orr.w r2, r3, #8 - 80059f6: 687b ldr r3, [r7, #4] - 80059f8: 641a str r2, [r3, #64] ; 0x40 - } - - /* Call UART Error Call back function if need be --------------------------*/ - if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 80059fa: 687b ldr r3, [r7, #4] - 80059fc: 6c1b ldr r3, [r3, #64] ; 0x40 - 80059fe: 2b00 cmp r3, #0 - 8005a00: f000 811e beq.w 8005c40 - { - /* UART in mode Receiver -----------------------------------------------*/ - if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 8005a04: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005a06: f003 0320 and.w r3, r3, #32 - 8005a0a: 2b00 cmp r3, #0 - 8005a0c: d007 beq.n 8005a1e - 8005a0e: 6a3b ldr r3, [r7, #32] - 8005a10: f003 0320 and.w r3, r3, #32 - 8005a14: 2b00 cmp r3, #0 - 8005a16: d002 beq.n 8005a1e - { - UART_Receive_IT(huart); - 8005a18: 6878 ldr r0, [r7, #4] - 8005a1a: f000 fac8 bl 8005fae - } - - /* If Overrun error occurs, or if any error occurs in DMA mode reception, - consider error as blocking */ - dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); - 8005a1e: 687b ldr r3, [r7, #4] - 8005a20: 681b ldr r3, [r3, #0] - 8005a22: 695b ldr r3, [r3, #20] - 8005a24: f003 0340 and.w r3, r3, #64 ; 0x40 - 8005a28: 2b00 cmp r3, #0 - 8005a2a: bf14 ite ne - 8005a2c: 2301 movne r3, #1 - 8005a2e: 2300 moveq r3, #0 - 8005a30: b2db uxtb r3, r3 - 8005a32: 617b str r3, [r7, #20] - if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) - 8005a34: 687b ldr r3, [r7, #4] - 8005a36: 6c1b ldr r3, [r3, #64] ; 0x40 - 8005a38: f003 0308 and.w r3, r3, #8 - 8005a3c: 2b00 cmp r3, #0 - 8005a3e: d102 bne.n 8005a46 - 8005a40: 697b ldr r3, [r7, #20] - 8005a42: 2b00 cmp r3, #0 - 8005a44: d031 beq.n 8005aaa - { - /* Blocking error : transfer is aborted - Set the UART state ready to be able to start again the process, - Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ - UART_EndRxTransfer(huart); - 8005a46: 6878 ldr r0, [r7, #4] - 8005a48: f000 fa0a bl 8005e60 - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005a4c: 687b ldr r3, [r7, #4] - 8005a4e: 681b ldr r3, [r3, #0] - 8005a50: 695b ldr r3, [r3, #20] - 8005a52: f003 0340 and.w r3, r3, #64 ; 0x40 - 8005a56: 2b00 cmp r3, #0 - 8005a58: d023 beq.n 8005aa2 - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8005a5a: 687b ldr r3, [r7, #4] - 8005a5c: 681b ldr r3, [r3, #0] - 8005a5e: 695a ldr r2, [r3, #20] - 8005a60: 687b ldr r3, [r7, #4] - 8005a62: 681b ldr r3, [r3, #0] - 8005a64: f022 0240 bic.w r2, r2, #64 ; 0x40 - 8005a68: 615a str r2, [r3, #20] - - /* Abort the UART DMA Rx channel */ - if (huart->hdmarx != NULL) - 8005a6a: 687b ldr r3, [r7, #4] - 8005a6c: 6b9b ldr r3, [r3, #56] ; 0x38 - 8005a6e: 2b00 cmp r3, #0 - 8005a70: d013 beq.n 8005a9a - { - /* Set the UART DMA Abort callback : - will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 8005a72: 687b ldr r3, [r7, #4] - 8005a74: 6b9b ldr r3, [r3, #56] ; 0x38 - 8005a76: 4a76 ldr r2, [pc, #472] ; (8005c50 ) - 8005a78: 635a str r2, [r3, #52] ; 0x34 - if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 8005a7a: 687b ldr r3, [r7, #4] - 8005a7c: 6b9b ldr r3, [r3, #56] ; 0x38 - 8005a7e: 4618 mov r0, r3 - 8005a80: f7fd fc4a bl 8003318 - 8005a84: 4603 mov r3, r0 - 8005a86: 2b00 cmp r3, #0 - 8005a88: d016 beq.n 8005ab8 - { - /* Call Directly XferAbortCallback function in case of error */ - huart->hdmarx->XferAbortCallback(huart->hdmarx); - 8005a8a: 687b ldr r3, [r7, #4] - 8005a8c: 6b9b ldr r3, [r3, #56] ; 0x38 - 8005a8e: 6b5b ldr r3, [r3, #52] ; 0x34 - 8005a90: 687a ldr r2, [r7, #4] - 8005a92: 6b92 ldr r2, [r2, #56] ; 0x38 - 8005a94: 4610 mov r0, r2 - 8005a96: 4798 blx r3 - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005a98: e00e b.n 8005ab8 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 8005a9a: 6878 ldr r0, [r7, #4] - 8005a9c: f000 f8ec bl 8005c78 - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005aa0: e00a b.n 8005ab8 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 8005aa2: 6878 ldr r0, [r7, #4] - 8005aa4: f000 f8e8 bl 8005c78 - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005aa8: e006 b.n 8005ab8 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 8005aaa: 6878 ldr r0, [r7, #4] - 8005aac: f000 f8e4 bl 8005c78 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - - huart->ErrorCode = HAL_UART_ERROR_NONE; - 8005ab0: 687b ldr r3, [r7, #4] - 8005ab2: 2200 movs r2, #0 - 8005ab4: 641a str r2, [r3, #64] ; 0x40 - } - } - return; - 8005ab6: e0c3 b.n 8005c40 - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005ab8: bf00 nop - return; - 8005aba: e0c1 b.n 8005c40 - } /* End if some error occurs */ - - /* Check current reception Mode : - If Reception till IDLE event has been selected : */ - if ( (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8005abc: 687b ldr r3, [r7, #4] - 8005abe: 6b1b ldr r3, [r3, #48] ; 0x30 - 8005ac0: 2b01 cmp r3, #1 - 8005ac2: f040 80a1 bne.w 8005c08 - &&((isrflags & USART_SR_IDLE) != 0U) - 8005ac6: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005ac8: f003 0310 and.w r3, r3, #16 - 8005acc: 2b00 cmp r3, #0 - 8005ace: f000 809b beq.w 8005c08 - &&((cr1its & USART_SR_IDLE) != 0U)) - 8005ad2: 6a3b ldr r3, [r7, #32] - 8005ad4: f003 0310 and.w r3, r3, #16 - 8005ad8: 2b00 cmp r3, #0 - 8005ada: f000 8095 beq.w 8005c08 - { - __HAL_UART_CLEAR_IDLEFLAG(huart); - 8005ade: 2300 movs r3, #0 - 8005ae0: 60fb str r3, [r7, #12] - 8005ae2: 687b ldr r3, [r7, #4] - 8005ae4: 681b ldr r3, [r3, #0] - 8005ae6: 681b ldr r3, [r3, #0] - 8005ae8: 60fb str r3, [r7, #12] - 8005aea: 687b ldr r3, [r7, #4] - 8005aec: 681b ldr r3, [r3, #0] - 8005aee: 685b ldr r3, [r3, #4] - 8005af0: 60fb str r3, [r7, #12] - 8005af2: 68fb ldr r3, [r7, #12] - - /* Check if DMA mode is enabled in UART */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005af4: 687b ldr r3, [r7, #4] - 8005af6: 681b ldr r3, [r3, #0] - 8005af8: 695b ldr r3, [r3, #20] - 8005afa: f003 0340 and.w r3, r3, #64 ; 0x40 - 8005afe: 2b00 cmp r3, #0 - 8005b00: d04e beq.n 8005ba0 - { - /* DMA mode enabled */ - /* Check received length : If all expected data are received, do nothing, - (DMA cplt callback will be called). - Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ - uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); - 8005b02: 687b ldr r3, [r7, #4] - 8005b04: 6b9b ldr r3, [r3, #56] ; 0x38 - 8005b06: 681b ldr r3, [r3, #0] - 8005b08: 685b ldr r3, [r3, #4] - 8005b0a: 823b strh r3, [r7, #16] - if ( (nb_remaining_rx_data > 0U) - 8005b0c: 8a3b ldrh r3, [r7, #16] - 8005b0e: 2b00 cmp r3, #0 - 8005b10: f000 8098 beq.w 8005c44 - &&(nb_remaining_rx_data < huart->RxXferSize)) - 8005b14: 687b ldr r3, [r7, #4] - 8005b16: 8d9b ldrh r3, [r3, #44] ; 0x2c - 8005b18: 8a3a ldrh r2, [r7, #16] - 8005b1a: 429a cmp r2, r3 - 8005b1c: f080 8092 bcs.w 8005c44 - { - /* Reception is not complete */ - huart->RxXferCount = nb_remaining_rx_data; - 8005b20: 687b ldr r3, [r7, #4] - 8005b22: 8a3a ldrh r2, [r7, #16] - 8005b24: 85da strh r2, [r3, #46] ; 0x2e - - /* In Normal mode, end DMA xfer and HAL UART Rx process*/ - if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) - 8005b26: 687b ldr r3, [r7, #4] - 8005b28: 6b9b ldr r3, [r3, #56] ; 0x38 - 8005b2a: 699b ldr r3, [r3, #24] - 8005b2c: 2b20 cmp r3, #32 - 8005b2e: d02b beq.n 8005b88 - { - /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8005b30: 687b ldr r3, [r7, #4] - 8005b32: 681b ldr r3, [r3, #0] - 8005b34: 68da ldr r2, [r3, #12] - 8005b36: 687b ldr r3, [r7, #4] - 8005b38: 681b ldr r3, [r3, #0] - 8005b3a: f422 7280 bic.w r2, r2, #256 ; 0x100 - 8005b3e: 60da str r2, [r3, #12] - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005b40: 687b ldr r3, [r7, #4] - 8005b42: 681b ldr r3, [r3, #0] - 8005b44: 695a ldr r2, [r3, #20] - 8005b46: 687b ldr r3, [r7, #4] - 8005b48: 681b ldr r3, [r3, #0] - 8005b4a: f022 0201 bic.w r2, r2, #1 - 8005b4e: 615a str r2, [r3, #20] - - /* Disable the DMA transfer for the receiver request by resetting the DMAR bit - in the UART CR3 register */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8005b50: 687b ldr r3, [r7, #4] - 8005b52: 681b ldr r3, [r3, #0] - 8005b54: 695a ldr r2, [r3, #20] - 8005b56: 687b ldr r3, [r7, #4] - 8005b58: 681b ldr r3, [r3, #0] - 8005b5a: f022 0240 bic.w r2, r2, #64 ; 0x40 - 8005b5e: 615a str r2, [r3, #20] - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - 8005b60: 687b ldr r3, [r7, #4] - 8005b62: 2220 movs r2, #32 - 8005b64: f883 203e strb.w r2, [r3, #62] ; 0x3e - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005b68: 687b ldr r3, [r7, #4] - 8005b6a: 2200 movs r2, #0 - 8005b6c: 631a str r2, [r3, #48] ; 0x30 - - CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005b6e: 687b ldr r3, [r7, #4] - 8005b70: 681b ldr r3, [r3, #0] - 8005b72: 68da ldr r2, [r3, #12] - 8005b74: 687b ldr r3, [r7, #4] - 8005b76: 681b ldr r3, [r3, #0] - 8005b78: f022 0210 bic.w r2, r2, #16 - 8005b7c: 60da str r2, [r3, #12] - - /* Last bytes received, so no need as the abort is immediate */ - (void)HAL_DMA_Abort(huart->hdmarx); - 8005b7e: 687b ldr r3, [r7, #4] - 8005b80: 6b9b ldr r3, [r3, #56] ; 0x38 - 8005b82: 4618 mov r0, r3 - 8005b84: f7fd fb8d bl 80032a2 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx Event callback*/ - huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); -#else - /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 8005b88: 687b ldr r3, [r7, #4] - 8005b8a: 8d9a ldrh r2, [r3, #44] ; 0x2c - 8005b8c: 687b ldr r3, [r7, #4] - 8005b8e: 8ddb ldrh r3, [r3, #46] ; 0x2e - 8005b90: b29b uxth r3, r3 - 8005b92: 1ad3 subs r3, r2, r3 - 8005b94: b29b uxth r3, r3 - 8005b96: 4619 mov r1, r3 - 8005b98: 6878 ldr r0, [r7, #4] - 8005b9a: f000 f876 bl 8005c8a -#endif - } - return; - 8005b9e: e051 b.n 8005c44 - else - { - /* DMA mode not enabled */ - /* Check received length : If all expected data are received, do nothing. - Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ - uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 8005ba0: 687b ldr r3, [r7, #4] - 8005ba2: 8d9a ldrh r2, [r3, #44] ; 0x2c - 8005ba4: 687b ldr r3, [r7, #4] - 8005ba6: 8ddb ldrh r3, [r3, #46] ; 0x2e - 8005ba8: b29b uxth r3, r3 - 8005baa: 1ad3 subs r3, r2, r3 - 8005bac: 827b strh r3, [r7, #18] - if ( (huart->RxXferCount > 0U) - 8005bae: 687b ldr r3, [r7, #4] - 8005bb0: 8ddb ldrh r3, [r3, #46] ; 0x2e - 8005bb2: b29b uxth r3, r3 - 8005bb4: 2b00 cmp r3, #0 - 8005bb6: d047 beq.n 8005c48 - &&(nb_rx_data > 0U) ) - 8005bb8: 8a7b ldrh r3, [r7, #18] - 8005bba: 2b00 cmp r3, #0 - 8005bbc: d044 beq.n 8005c48 - { - /* Disable the UART Parity Error Interrupt and RXNE interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 8005bbe: 687b ldr r3, [r7, #4] - 8005bc0: 681b ldr r3, [r3, #0] - 8005bc2: 68da ldr r2, [r3, #12] - 8005bc4: 687b ldr r3, [r7, #4] - 8005bc6: 681b ldr r3, [r3, #0] - 8005bc8: f422 7290 bic.w r2, r2, #288 ; 0x120 - 8005bcc: 60da str r2, [r3, #12] - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005bce: 687b ldr r3, [r7, #4] - 8005bd0: 681b ldr r3, [r3, #0] - 8005bd2: 695a ldr r2, [r3, #20] - 8005bd4: 687b ldr r3, [r7, #4] - 8005bd6: 681b ldr r3, [r3, #0] - 8005bd8: f022 0201 bic.w r2, r2, #1 - 8005bdc: 615a str r2, [r3, #20] - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - 8005bde: 687b ldr r3, [r7, #4] - 8005be0: 2220 movs r2, #32 - 8005be2: f883 203e strb.w r2, [r3, #62] ; 0x3e - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005be6: 687b ldr r3, [r7, #4] - 8005be8: 2200 movs r2, #0 - 8005bea: 631a str r2, [r3, #48] ; 0x30 - - CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005bec: 687b ldr r3, [r7, #4] - 8005bee: 681b ldr r3, [r3, #0] - 8005bf0: 68da ldr r2, [r3, #12] - 8005bf2: 687b ldr r3, [r7, #4] - 8005bf4: 681b ldr r3, [r3, #0] - 8005bf6: f022 0210 bic.w r2, r2, #16 - 8005bfa: 60da str r2, [r3, #12] -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx complete callback*/ - huart->RxEventCallback(huart, nb_rx_data); -#else - /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, nb_rx_data); - 8005bfc: 8a7b ldrh r3, [r7, #18] - 8005bfe: 4619 mov r1, r3 - 8005c00: 6878 ldr r0, [r7, #4] - 8005c02: f000 f842 bl 8005c8a -#endif - } - return; - 8005c06: e01f b.n 8005c48 - } - } - - /* UART in mode Transmitter ------------------------------------------------*/ - if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) - 8005c08: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005c0a: f003 0380 and.w r3, r3, #128 ; 0x80 - 8005c0e: 2b00 cmp r3, #0 - 8005c10: d008 beq.n 8005c24 - 8005c12: 6a3b ldr r3, [r7, #32] - 8005c14: f003 0380 and.w r3, r3, #128 ; 0x80 - 8005c18: 2b00 cmp r3, #0 - 8005c1a: d003 beq.n 8005c24 - { - UART_Transmit_IT(huart); - 8005c1c: 6878 ldr r0, [r7, #4] - 8005c1e: f000 f95f bl 8005ee0 - return; - 8005c22: e012 b.n 8005c4a - } - - /* UART in mode Transmitter end --------------------------------------------*/ - if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) - 8005c24: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005c26: f003 0340 and.w r3, r3, #64 ; 0x40 - 8005c2a: 2b00 cmp r3, #0 - 8005c2c: d00d beq.n 8005c4a - 8005c2e: 6a3b ldr r3, [r7, #32] - 8005c30: f003 0340 and.w r3, r3, #64 ; 0x40 - 8005c34: 2b00 cmp r3, #0 - 8005c36: d008 beq.n 8005c4a - { - UART_EndTransmit_IT(huart); - 8005c38: 6878 ldr r0, [r7, #4] - 8005c3a: f000 f9a0 bl 8005f7e - return; - 8005c3e: e004 b.n 8005c4a - return; - 8005c40: bf00 nop - 8005c42: e002 b.n 8005c4a - return; - 8005c44: bf00 nop - 8005c46: e000 b.n 8005c4a - return; - 8005c48: bf00 nop - } -} - 8005c4a: 3728 adds r7, #40 ; 0x28 - 8005c4c: 46bd mov sp, r7 - 8005c4e: bd80 pop {r7, pc} - 8005c50: 08005eb9 .word 0x08005eb9 - -08005c54 : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) -{ - 8005c54: b480 push {r7} - 8005c56: b083 sub sp, #12 - 8005c58: af00 add r7, sp, #0 - 8005c5a: 6078 str r0, [r7, #4] - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_TxHalfCpltCallback could be implemented in the user file - */ -} - 8005c5c: bf00 nop - 8005c5e: 370c adds r7, #12 - 8005c60: 46bd mov sp, r7 - 8005c62: bc80 pop {r7} - 8005c64: 4770 bx lr - -08005c66 : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) -{ - 8005c66: b480 push {r7} - 8005c68: b083 sub sp, #12 - 8005c6a: af00 add r7, sp, #0 - 8005c6c: 6078 str r0, [r7, #4] - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_RxCpltCallback could be implemented in the user file - */ -} - 8005c6e: bf00 nop - 8005c70: 370c adds r7, #12 - 8005c72: 46bd mov sp, r7 - 8005c74: bc80 pop {r7} - 8005c76: 4770 bx lr - -08005c78 : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) -{ - 8005c78: b480 push {r7} - 8005c7a: b083 sub sp, #12 - 8005c7c: af00 add r7, sp, #0 - 8005c7e: 6078 str r0, [r7, #4] - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_ErrorCallback could be implemented in the user file - */ -} - 8005c80: bf00 nop - 8005c82: 370c adds r7, #12 - 8005c84: 46bd mov sp, r7 - 8005c86: bc80 pop {r7} - 8005c88: 4770 bx lr - -08005c8a : - * @param Size Number of data available in application reception buffer (indicates a position in - * reception buffer until which, data are available) - * @retval None - */ -__weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) -{ - 8005c8a: b480 push {r7} - 8005c8c: b083 sub sp, #12 - 8005c8e: af00 add r7, sp, #0 - 8005c90: 6078 str r0, [r7, #4] - 8005c92: 460b mov r3, r1 - 8005c94: 807b strh r3, [r7, #2] - UNUSED(Size); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UARTEx_RxEventCallback can be implemented in the user file. - */ -} - 8005c96: bf00 nop - 8005c98: 370c adds r7, #12 - 8005c9a: 46bd mov sp, r7 - 8005c9c: bc80 pop {r7} - 8005c9e: 4770 bx lr - -08005ca0 : - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) -{ - 8005ca0: b580 push {r7, lr} - 8005ca2: b084 sub sp, #16 - 8005ca4: af00 add r7, sp, #0 - 8005ca6: 6078 str r0, [r7, #4] - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - 8005ca8: 687b ldr r3, [r7, #4] - 8005caa: 6a5b ldr r3, [r3, #36] ; 0x24 - 8005cac: 60fb str r3, [r7, #12] - /* DMA Normal mode*/ - if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) - 8005cae: 687b ldr r3, [r7, #4] - 8005cb0: 681b ldr r3, [r3, #0] - 8005cb2: 681b ldr r3, [r3, #0] - 8005cb4: f003 0320 and.w r3, r3, #32 - 8005cb8: 2b00 cmp r3, #0 - 8005cba: d113 bne.n 8005ce4 - { - huart->TxXferCount = 0x00U; - 8005cbc: 68fb ldr r3, [r7, #12] - 8005cbe: 2200 movs r2, #0 - 8005cc0: 84da strh r2, [r3, #38] ; 0x26 - - /* Disable the DMA transfer for transmit request by setting the DMAT bit - in the UART CR3 register */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - 8005cc2: 68fb ldr r3, [r7, #12] - 8005cc4: 681b ldr r3, [r3, #0] - 8005cc6: 695a ldr r2, [r3, #20] - 8005cc8: 68fb ldr r3, [r7, #12] - 8005cca: 681b ldr r3, [r3, #0] - 8005ccc: f022 0280 bic.w r2, r2, #128 ; 0x80 - 8005cd0: 615a str r2, [r3, #20] - - /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 8005cd2: 68fb ldr r3, [r7, #12] - 8005cd4: 681b ldr r3, [r3, #0] - 8005cd6: 68da ldr r2, [r3, #12] - 8005cd8: 68fb ldr r3, [r7, #12] - 8005cda: 681b ldr r3, [r3, #0] - 8005cdc: f042 0240 orr.w r2, r2, #64 ; 0x40 - 8005ce0: 60da str r2, [r3, #12] -#else - /*Call legacy weak Tx complete callback*/ - HAL_UART_TxCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } -} - 8005ce2: e002 b.n 8005cea - HAL_UART_TxCpltCallback(huart); - 8005ce4: 68f8 ldr r0, [r7, #12] - 8005ce6: f7fb ff3f bl 8001b68 -} - 8005cea: bf00 nop - 8005cec: 3710 adds r7, #16 - 8005cee: 46bd mov sp, r7 - 8005cf0: bd80 pop {r7, pc} - -08005cf2 : - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) -{ - 8005cf2: b580 push {r7, lr} - 8005cf4: b084 sub sp, #16 - 8005cf6: af00 add r7, sp, #0 - 8005cf8: 6078 str r0, [r7, #4] - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - 8005cfa: 687b ldr r3, [r7, #4] - 8005cfc: 6a5b ldr r3, [r3, #36] ; 0x24 - 8005cfe: 60fb str r3, [r7, #12] -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Tx complete callback*/ - huart->TxHalfCpltCallback(huart); -#else - /*Call legacy weak Tx complete callback*/ - HAL_UART_TxHalfCpltCallback(huart); - 8005d00: 68f8 ldr r0, [r7, #12] - 8005d02: f7ff ffa7 bl 8005c54 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - 8005d06: bf00 nop - 8005d08: 3710 adds r7, #16 - 8005d0a: 46bd mov sp, r7 - 8005d0c: bd80 pop {r7, pc} - -08005d0e : - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMAError(DMA_HandleTypeDef *hdma) -{ - 8005d0e: b580 push {r7, lr} - 8005d10: b084 sub sp, #16 - 8005d12: af00 add r7, sp, #0 - 8005d14: 6078 str r0, [r7, #4] - uint32_t dmarequest = 0x00U; - 8005d16: 2300 movs r3, #0 - 8005d18: 60fb str r3, [r7, #12] - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - 8005d1a: 687b ldr r3, [r7, #4] - 8005d1c: 6a5b ldr r3, [r3, #36] ; 0x24 - 8005d1e: 60bb str r3, [r7, #8] - - /* Stop UART DMA Tx request if ongoing */ - dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); - 8005d20: 68bb ldr r3, [r7, #8] - 8005d22: 681b ldr r3, [r3, #0] - 8005d24: 695b ldr r3, [r3, #20] - 8005d26: f003 0380 and.w r3, r3, #128 ; 0x80 - 8005d2a: 2b00 cmp r3, #0 - 8005d2c: bf14 ite ne - 8005d2e: 2301 movne r3, #1 - 8005d30: 2300 moveq r3, #0 - 8005d32: b2db uxtb r3, r3 - 8005d34: 60fb str r3, [r7, #12] - if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) - 8005d36: 68bb ldr r3, [r7, #8] - 8005d38: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 8005d3c: b2db uxtb r3, r3 - 8005d3e: 2b21 cmp r3, #33 ; 0x21 - 8005d40: d108 bne.n 8005d54 - 8005d42: 68fb ldr r3, [r7, #12] - 8005d44: 2b00 cmp r3, #0 - 8005d46: d005 beq.n 8005d54 - { - huart->TxXferCount = 0x00U; - 8005d48: 68bb ldr r3, [r7, #8] - 8005d4a: 2200 movs r2, #0 - 8005d4c: 84da strh r2, [r3, #38] ; 0x26 - UART_EndTxTransfer(huart); - 8005d4e: 68b8 ldr r0, [r7, #8] - 8005d50: f000 f871 bl 8005e36 - } - - /* Stop UART DMA Rx request if ongoing */ - dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); - 8005d54: 68bb ldr r3, [r7, #8] - 8005d56: 681b ldr r3, [r3, #0] - 8005d58: 695b ldr r3, [r3, #20] - 8005d5a: f003 0340 and.w r3, r3, #64 ; 0x40 - 8005d5e: 2b00 cmp r3, #0 - 8005d60: bf14 ite ne - 8005d62: 2301 movne r3, #1 - 8005d64: 2300 moveq r3, #0 - 8005d66: b2db uxtb r3, r3 - 8005d68: 60fb str r3, [r7, #12] - if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) - 8005d6a: 68bb ldr r3, [r7, #8] - 8005d6c: f893 303e ldrb.w r3, [r3, #62] ; 0x3e - 8005d70: b2db uxtb r3, r3 - 8005d72: 2b22 cmp r3, #34 ; 0x22 - 8005d74: d108 bne.n 8005d88 - 8005d76: 68fb ldr r3, [r7, #12] - 8005d78: 2b00 cmp r3, #0 - 8005d7a: d005 beq.n 8005d88 - { - huart->RxXferCount = 0x00U; - 8005d7c: 68bb ldr r3, [r7, #8] - 8005d7e: 2200 movs r2, #0 - 8005d80: 85da strh r2, [r3, #46] ; 0x2e - UART_EndRxTransfer(huart); - 8005d82: 68b8 ldr r0, [r7, #8] - 8005d84: f000 f86c bl 8005e60 - } - - huart->ErrorCode |= HAL_UART_ERROR_DMA; - 8005d88: 68bb ldr r3, [r7, #8] - 8005d8a: 6c1b ldr r3, [r3, #64] ; 0x40 - 8005d8c: f043 0210 orr.w r2, r3, #16 - 8005d90: 68bb ldr r3, [r7, #8] - 8005d92: 641a str r2, [r3, #64] ; 0x40 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 8005d94: 68b8 ldr r0, [r7, #8] - 8005d96: f7ff ff6f bl 8005c78 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - 8005d9a: bf00 nop - 8005d9c: 3710 adds r7, #16 - 8005d9e: 46bd mov sp, r7 - 8005da0: bd80 pop {r7, pc} - -08005da2 : - * @param Tickstart Tick start value - * @param Timeout Timeout duration - * @retval HAL status - */ -static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) -{ - 8005da2: b580 push {r7, lr} - 8005da4: b084 sub sp, #16 - 8005da6: af00 add r7, sp, #0 - 8005da8: 60f8 str r0, [r7, #12] - 8005daa: 60b9 str r1, [r7, #8] - 8005dac: 603b str r3, [r7, #0] - 8005dae: 4613 mov r3, r2 - 8005db0: 71fb strb r3, [r7, #7] - /* Wait until flag is set */ - while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8005db2: e02c b.n 8005e0e - { - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) - 8005db4: 69bb ldr r3, [r7, #24] - 8005db6: f1b3 3fff cmp.w r3, #4294967295 - 8005dba: d028 beq.n 8005e0e - { - if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) - 8005dbc: 69bb ldr r3, [r7, #24] - 8005dbe: 2b00 cmp r3, #0 - 8005dc0: d007 beq.n 8005dd2 - 8005dc2: f7fd f879 bl 8002eb8 - 8005dc6: 4602 mov r2, r0 - 8005dc8: 683b ldr r3, [r7, #0] - 8005dca: 1ad3 subs r3, r2, r3 - 8005dcc: 69ba ldr r2, [r7, #24] - 8005dce: 429a cmp r2, r3 - 8005dd0: d21d bcs.n 8005e0e - { - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); - 8005dd2: 68fb ldr r3, [r7, #12] - 8005dd4: 681b ldr r3, [r3, #0] - 8005dd6: 68da ldr r2, [r3, #12] - 8005dd8: 68fb ldr r3, [r7, #12] - 8005dda: 681b ldr r3, [r3, #0] - 8005ddc: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 - 8005de0: 60da str r2, [r3, #12] - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005de2: 68fb ldr r3, [r7, #12] - 8005de4: 681b ldr r3, [r3, #0] - 8005de6: 695a ldr r2, [r3, #20] - 8005de8: 68fb ldr r3, [r7, #12] - 8005dea: 681b ldr r3, [r3, #0] - 8005dec: f022 0201 bic.w r2, r2, #1 - 8005df0: 615a str r2, [r3, #20] - - huart->gState = HAL_UART_STATE_READY; - 8005df2: 68fb ldr r3, [r7, #12] - 8005df4: 2220 movs r2, #32 - 8005df6: f883 203d strb.w r2, [r3, #61] ; 0x3d - huart->RxState = HAL_UART_STATE_READY; - 8005dfa: 68fb ldr r3, [r7, #12] - 8005dfc: 2220 movs r2, #32 - 8005dfe: f883 203e strb.w r2, [r3, #62] ; 0x3e - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - 8005e02: 68fb ldr r3, [r7, #12] - 8005e04: 2200 movs r2, #0 - 8005e06: f883 203c strb.w r2, [r3, #60] ; 0x3c - - return HAL_TIMEOUT; - 8005e0a: 2303 movs r3, #3 - 8005e0c: e00f b.n 8005e2e - while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8005e0e: 68fb ldr r3, [r7, #12] - 8005e10: 681b ldr r3, [r3, #0] - 8005e12: 681a ldr r2, [r3, #0] - 8005e14: 68bb ldr r3, [r7, #8] - 8005e16: 4013 ands r3, r2 - 8005e18: 68ba ldr r2, [r7, #8] - 8005e1a: 429a cmp r2, r3 - 8005e1c: bf0c ite eq - 8005e1e: 2301 moveq r3, #1 - 8005e20: 2300 movne r3, #0 - 8005e22: b2db uxtb r3, r3 - 8005e24: 461a mov r2, r3 - 8005e26: 79fb ldrb r3, [r7, #7] - 8005e28: 429a cmp r2, r3 - 8005e2a: d0c3 beq.n 8005db4 - } - } - } - return HAL_OK; - 8005e2c: 2300 movs r3, #0 -} - 8005e2e: 4618 mov r0, r3 - 8005e30: 3710 adds r7, #16 - 8005e32: 46bd mov sp, r7 - 8005e34: bd80 pop {r7, pc} - -08005e36 : - * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). - * @param huart UART handle. - * @retval None - */ -static void UART_EndTxTransfer(UART_HandleTypeDef *huart) -{ - 8005e36: b480 push {r7} - 8005e38: b083 sub sp, #12 - 8005e3a: af00 add r7, sp, #0 - 8005e3c: 6078 str r0, [r7, #4] - /* Disable TXEIE and TCIE interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); - 8005e3e: 687b ldr r3, [r7, #4] - 8005e40: 681b ldr r3, [r3, #0] - 8005e42: 68da ldr r2, [r3, #12] - 8005e44: 687b ldr r3, [r7, #4] - 8005e46: 681b ldr r3, [r3, #0] - 8005e48: f022 02c0 bic.w r2, r2, #192 ; 0xc0 - 8005e4c: 60da str r2, [r3, #12] - - /* At end of Tx process, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - 8005e4e: 687b ldr r3, [r7, #4] - 8005e50: 2220 movs r2, #32 - 8005e52: f883 203d strb.w r2, [r3, #61] ; 0x3d -} - 8005e56: bf00 nop - 8005e58: 370c adds r7, #12 - 8005e5a: 46bd mov sp, r7 - 8005e5c: bc80 pop {r7} - 8005e5e: 4770 bx lr - -08005e60 : - * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). - * @param huart UART handle. - * @retval None - */ -static void UART_EndRxTransfer(UART_HandleTypeDef *huart) -{ - 8005e60: b480 push {r7} - 8005e62: b083 sub sp, #12 - 8005e64: af00 add r7, sp, #0 - 8005e66: 6078 str r0, [r7, #4] - /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 8005e68: 687b ldr r3, [r7, #4] - 8005e6a: 681b ldr r3, [r3, #0] - 8005e6c: 68da ldr r2, [r3, #12] - 8005e6e: 687b ldr r3, [r7, #4] - 8005e70: 681b ldr r3, [r3, #0] - 8005e72: f422 7290 bic.w r2, r2, #288 ; 0x120 - 8005e76: 60da str r2, [r3, #12] - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005e78: 687b ldr r3, [r7, #4] - 8005e7a: 681b ldr r3, [r3, #0] - 8005e7c: 695a ldr r2, [r3, #20] - 8005e7e: 687b ldr r3, [r7, #4] - 8005e80: 681b ldr r3, [r3, #0] - 8005e82: f022 0201 bic.w r2, r2, #1 - 8005e86: 615a str r2, [r3, #20] - - /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8005e88: 687b ldr r3, [r7, #4] - 8005e8a: 6b1b ldr r3, [r3, #48] ; 0x30 - 8005e8c: 2b01 cmp r3, #1 - 8005e8e: d107 bne.n 8005ea0 - { - CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005e90: 687b ldr r3, [r7, #4] - 8005e92: 681b ldr r3, [r3, #0] - 8005e94: 68da ldr r2, [r3, #12] - 8005e96: 687b ldr r3, [r7, #4] - 8005e98: 681b ldr r3, [r3, #0] - 8005e9a: f022 0210 bic.w r2, r2, #16 - 8005e9e: 60da str r2, [r3, #12] - } - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - 8005ea0: 687b ldr r3, [r7, #4] - 8005ea2: 2220 movs r2, #32 - 8005ea4: f883 203e strb.w r2, [r3, #62] ; 0x3e - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005ea8: 687b ldr r3, [r7, #4] - 8005eaa: 2200 movs r2, #0 - 8005eac: 631a str r2, [r3, #48] ; 0x30 -} - 8005eae: bf00 nop - 8005eb0: 370c adds r7, #12 - 8005eb2: 46bd mov sp, r7 - 8005eb4: bc80 pop {r7} - 8005eb6: 4770 bx lr - -08005eb8 : - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) -{ - 8005eb8: b580 push {r7, lr} - 8005eba: b084 sub sp, #16 - 8005ebc: af00 add r7, sp, #0 - 8005ebe: 6078 str r0, [r7, #4] - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - 8005ec0: 687b ldr r3, [r7, #4] - 8005ec2: 6a5b ldr r3, [r3, #36] ; 0x24 - 8005ec4: 60fb str r3, [r7, #12] - huart->RxXferCount = 0x00U; - 8005ec6: 68fb ldr r3, [r7, #12] - 8005ec8: 2200 movs r2, #0 - 8005eca: 85da strh r2, [r3, #46] ; 0x2e - huart->TxXferCount = 0x00U; - 8005ecc: 68fb ldr r3, [r7, #12] - 8005ece: 2200 movs r2, #0 - 8005ed0: 84da strh r2, [r3, #38] ; 0x26 -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); - 8005ed2: 68f8 ldr r0, [r7, #12] - 8005ed4: f7ff fed0 bl 8005c78 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - 8005ed8: bf00 nop - 8005eda: 3710 adds r7, #16 - 8005edc: 46bd mov sp, r7 - 8005ede: bd80 pop {r7, pc} - -08005ee0 : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) -{ - 8005ee0: b480 push {r7} - 8005ee2: b085 sub sp, #20 - 8005ee4: af00 add r7, sp, #0 - 8005ee6: 6078 str r0, [r7, #4] - uint16_t *tmp; - - /* Check that a Tx process is ongoing */ - if (huart->gState == HAL_UART_STATE_BUSY_TX) - 8005ee8: 687b ldr r3, [r7, #4] - 8005eea: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 8005eee: b2db uxtb r3, r3 - 8005ef0: 2b21 cmp r3, #33 ; 0x21 - 8005ef2: d13e bne.n 8005f72 - { - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8005ef4: 687b ldr r3, [r7, #4] - 8005ef6: 689b ldr r3, [r3, #8] - 8005ef8: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8005efc: d114 bne.n 8005f28 - 8005efe: 687b ldr r3, [r7, #4] - 8005f00: 691b ldr r3, [r3, #16] - 8005f02: 2b00 cmp r3, #0 - 8005f04: d110 bne.n 8005f28 - { - tmp = (uint16_t *) huart->pTxBuffPtr; - 8005f06: 687b ldr r3, [r7, #4] - 8005f08: 6a1b ldr r3, [r3, #32] - 8005f0a: 60fb str r3, [r7, #12] - huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); - 8005f0c: 68fb ldr r3, [r7, #12] - 8005f0e: 881b ldrh r3, [r3, #0] - 8005f10: 461a mov r2, r3 - 8005f12: 687b ldr r3, [r7, #4] - 8005f14: 681b ldr r3, [r3, #0] - 8005f16: f3c2 0208 ubfx r2, r2, #0, #9 - 8005f1a: 605a str r2, [r3, #4] - huart->pTxBuffPtr += 2U; - 8005f1c: 687b ldr r3, [r7, #4] - 8005f1e: 6a1b ldr r3, [r3, #32] - 8005f20: 1c9a adds r2, r3, #2 - 8005f22: 687b ldr r3, [r7, #4] - 8005f24: 621a str r2, [r3, #32] - 8005f26: e008 b.n 8005f3a - } - else - { - huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); - 8005f28: 687b ldr r3, [r7, #4] - 8005f2a: 6a1b ldr r3, [r3, #32] - 8005f2c: 1c59 adds r1, r3, #1 - 8005f2e: 687a ldr r2, [r7, #4] - 8005f30: 6211 str r1, [r2, #32] - 8005f32: 781a ldrb r2, [r3, #0] - 8005f34: 687b ldr r3, [r7, #4] - 8005f36: 681b ldr r3, [r3, #0] - 8005f38: 605a str r2, [r3, #4] - } - - if (--huart->TxXferCount == 0U) - 8005f3a: 687b ldr r3, [r7, #4] - 8005f3c: 8cdb ldrh r3, [r3, #38] ; 0x26 - 8005f3e: b29b uxth r3, r3 - 8005f40: 3b01 subs r3, #1 - 8005f42: b29b uxth r3, r3 - 8005f44: 687a ldr r2, [r7, #4] - 8005f46: 4619 mov r1, r3 - 8005f48: 84d1 strh r1, [r2, #38] ; 0x26 - 8005f4a: 2b00 cmp r3, #0 - 8005f4c: d10f bne.n 8005f6e - { - /* Disable the UART Transmit Complete Interrupt */ - __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); - 8005f4e: 687b ldr r3, [r7, #4] - 8005f50: 681b ldr r3, [r3, #0] - 8005f52: 68da ldr r2, [r3, #12] - 8005f54: 687b ldr r3, [r7, #4] - 8005f56: 681b ldr r3, [r3, #0] - 8005f58: f022 0280 bic.w r2, r2, #128 ; 0x80 - 8005f5c: 60da str r2, [r3, #12] - - /* Enable the UART Transmit Complete Interrupt */ - __HAL_UART_ENABLE_IT(huart, UART_IT_TC); - 8005f5e: 687b ldr r3, [r7, #4] - 8005f60: 681b ldr r3, [r3, #0] - 8005f62: 68da ldr r2, [r3, #12] - 8005f64: 687b ldr r3, [r7, #4] - 8005f66: 681b ldr r3, [r3, #0] - 8005f68: f042 0240 orr.w r2, r2, #64 ; 0x40 - 8005f6c: 60da str r2, [r3, #12] - } - return HAL_OK; - 8005f6e: 2300 movs r3, #0 - 8005f70: e000 b.n 8005f74 - } - else - { - return HAL_BUSY; - 8005f72: 2302 movs r3, #2 - } -} - 8005f74: 4618 mov r0, r3 - 8005f76: 3714 adds r7, #20 - 8005f78: 46bd mov sp, r7 - 8005f7a: bc80 pop {r7} - 8005f7c: 4770 bx lr - -08005f7e : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) -{ - 8005f7e: b580 push {r7, lr} - 8005f80: b082 sub sp, #8 - 8005f82: af00 add r7, sp, #0 - 8005f84: 6078 str r0, [r7, #4] - /* Disable the UART Transmit Complete Interrupt */ - __HAL_UART_DISABLE_IT(huart, UART_IT_TC); - 8005f86: 687b ldr r3, [r7, #4] - 8005f88: 681b ldr r3, [r3, #0] - 8005f8a: 68da ldr r2, [r3, #12] - 8005f8c: 687b ldr r3, [r7, #4] - 8005f8e: 681b ldr r3, [r3, #0] - 8005f90: f022 0240 bic.w r2, r2, #64 ; 0x40 - 8005f94: 60da str r2, [r3, #12] - - /* Tx process is ended, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - 8005f96: 687b ldr r3, [r7, #4] - 8005f98: 2220 movs r2, #32 - 8005f9a: f883 203d strb.w r2, [r3, #61] ; 0x3d -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Tx complete callback*/ - huart->TxCpltCallback(huart); -#else - /*Call legacy weak Tx complete callback*/ - HAL_UART_TxCpltCallback(huart); - 8005f9e: 6878 ldr r0, [r7, #4] - 8005fa0: f7fb fde2 bl 8001b68 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - - return HAL_OK; - 8005fa4: 2300 movs r3, #0 -} - 8005fa6: 4618 mov r0, r3 - 8005fa8: 3708 adds r7, #8 - 8005faa: 46bd mov sp, r7 - 8005fac: bd80 pop {r7, pc} - -08005fae : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) -{ - 8005fae: b580 push {r7, lr} - 8005fb0: b086 sub sp, #24 - 8005fb2: af00 add r7, sp, #0 - 8005fb4: 6078 str r0, [r7, #4] - uint8_t *pdata8bits; - uint16_t *pdata16bits; - - /* Check that a Rx process is ongoing */ - if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 8005fb6: 687b ldr r3, [r7, #4] - 8005fb8: f893 303e ldrb.w r3, [r3, #62] ; 0x3e - 8005fbc: b2db uxtb r3, r3 - 8005fbe: 2b22 cmp r3, #34 ; 0x22 - 8005fc0: f040 8099 bne.w 80060f6 - { - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8005fc4: 687b ldr r3, [r7, #4] - 8005fc6: 689b ldr r3, [r3, #8] - 8005fc8: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8005fcc: d117 bne.n 8005ffe - 8005fce: 687b ldr r3, [r7, #4] - 8005fd0: 691b ldr r3, [r3, #16] - 8005fd2: 2b00 cmp r3, #0 - 8005fd4: d113 bne.n 8005ffe - { - pdata8bits = NULL; - 8005fd6: 2300 movs r3, #0 - 8005fd8: 617b str r3, [r7, #20] - pdata16bits = (uint16_t *) huart->pRxBuffPtr; - 8005fda: 687b ldr r3, [r7, #4] - 8005fdc: 6a9b ldr r3, [r3, #40] ; 0x28 - 8005fde: 613b str r3, [r7, #16] - *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); - 8005fe0: 687b ldr r3, [r7, #4] - 8005fe2: 681b ldr r3, [r3, #0] - 8005fe4: 685b ldr r3, [r3, #4] - 8005fe6: b29b uxth r3, r3 - 8005fe8: f3c3 0308 ubfx r3, r3, #0, #9 - 8005fec: b29a uxth r2, r3 - 8005fee: 693b ldr r3, [r7, #16] - 8005ff0: 801a strh r2, [r3, #0] - huart->pRxBuffPtr += 2U; - 8005ff2: 687b ldr r3, [r7, #4] - 8005ff4: 6a9b ldr r3, [r3, #40] ; 0x28 - 8005ff6: 1c9a adds r2, r3, #2 - 8005ff8: 687b ldr r3, [r7, #4] - 8005ffa: 629a str r2, [r3, #40] ; 0x28 - 8005ffc: e026 b.n 800604c - } - else - { - pdata8bits = (uint8_t *) huart->pRxBuffPtr; - 8005ffe: 687b ldr r3, [r7, #4] - 8006000: 6a9b ldr r3, [r3, #40] ; 0x28 - 8006002: 617b str r3, [r7, #20] - pdata16bits = NULL; - 8006004: 2300 movs r3, #0 - 8006006: 613b str r3, [r7, #16] - - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) - 8006008: 687b ldr r3, [r7, #4] - 800600a: 689b ldr r3, [r3, #8] - 800600c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8006010: d007 beq.n 8006022 - 8006012: 687b ldr r3, [r7, #4] - 8006014: 689b ldr r3, [r3, #8] - 8006016: 2b00 cmp r3, #0 - 8006018: d10a bne.n 8006030 - 800601a: 687b ldr r3, [r7, #4] - 800601c: 691b ldr r3, [r3, #16] - 800601e: 2b00 cmp r3, #0 - 8006020: d106 bne.n 8006030 - { - *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); - 8006022: 687b ldr r3, [r7, #4] - 8006024: 681b ldr r3, [r3, #0] - 8006026: 685b ldr r3, [r3, #4] - 8006028: b2da uxtb r2, r3 - 800602a: 697b ldr r3, [r7, #20] - 800602c: 701a strb r2, [r3, #0] - 800602e: e008 b.n 8006042 - } - else - { - *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); - 8006030: 687b ldr r3, [r7, #4] - 8006032: 681b ldr r3, [r3, #0] - 8006034: 685b ldr r3, [r3, #4] - 8006036: b2db uxtb r3, r3 - 8006038: f003 037f and.w r3, r3, #127 ; 0x7f - 800603c: b2da uxtb r2, r3 - 800603e: 697b ldr r3, [r7, #20] - 8006040: 701a strb r2, [r3, #0] - } - huart->pRxBuffPtr += 1U; - 8006042: 687b ldr r3, [r7, #4] - 8006044: 6a9b ldr r3, [r3, #40] ; 0x28 - 8006046: 1c5a adds r2, r3, #1 - 8006048: 687b ldr r3, [r7, #4] - 800604a: 629a str r2, [r3, #40] ; 0x28 - } - - if (--huart->RxXferCount == 0U) - 800604c: 687b ldr r3, [r7, #4] - 800604e: 8ddb ldrh r3, [r3, #46] ; 0x2e - 8006050: b29b uxth r3, r3 - 8006052: 3b01 subs r3, #1 - 8006054: b29b uxth r3, r3 - 8006056: 687a ldr r2, [r7, #4] - 8006058: 4619 mov r1, r3 - 800605a: 85d1 strh r1, [r2, #46] ; 0x2e - 800605c: 2b00 cmp r3, #0 - 800605e: d148 bne.n 80060f2 - { - /* Disable the UART Data Register not empty Interrupt */ - __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); - 8006060: 687b ldr r3, [r7, #4] - 8006062: 681b ldr r3, [r3, #0] - 8006064: 68da ldr r2, [r3, #12] - 8006066: 687b ldr r3, [r7, #4] - 8006068: 681b ldr r3, [r3, #0] - 800606a: f022 0220 bic.w r2, r2, #32 - 800606e: 60da str r2, [r3, #12] - - /* Disable the UART Parity Error Interrupt */ - __HAL_UART_DISABLE_IT(huart, UART_IT_PE); - 8006070: 687b ldr r3, [r7, #4] - 8006072: 681b ldr r3, [r3, #0] - 8006074: 68da ldr r2, [r3, #12] - 8006076: 687b ldr r3, [r7, #4] - 8006078: 681b ldr r3, [r3, #0] - 800607a: f422 7280 bic.w r2, r2, #256 ; 0x100 - 800607e: 60da str r2, [r3, #12] - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); - 8006080: 687b ldr r3, [r7, #4] - 8006082: 681b ldr r3, [r3, #0] - 8006084: 695a ldr r2, [r3, #20] - 8006086: 687b ldr r3, [r7, #4] - 8006088: 681b ldr r3, [r3, #0] - 800608a: f022 0201 bic.w r2, r2, #1 - 800608e: 615a str r2, [r3, #20] - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - 8006090: 687b ldr r3, [r7, #4] - 8006092: 2220 movs r2, #32 - 8006094: f883 203e strb.w r2, [r3, #62] ; 0x3e - - /* Check current reception Mode : - If Reception till IDLE event has been selected : */ - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8006098: 687b ldr r3, [r7, #4] - 800609a: 6b1b ldr r3, [r3, #48] ; 0x30 - 800609c: 2b01 cmp r3, #1 - 800609e: d123 bne.n 80060e8 - { - /* Set reception type to Standard */ - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 80060a0: 687b ldr r3, [r7, #4] - 80060a2: 2200 movs r2, #0 - 80060a4: 631a str r2, [r3, #48] ; 0x30 - - /* Disable IDLE interrupt */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 80060a6: 687b ldr r3, [r7, #4] - 80060a8: 681b ldr r3, [r3, #0] - 80060aa: 68da ldr r2, [r3, #12] - 80060ac: 687b ldr r3, [r7, #4] - 80060ae: 681b ldr r3, [r3, #0] - 80060b0: f022 0210 bic.w r2, r2, #16 - 80060b4: 60da str r2, [r3, #12] - - /* Check if IDLE flag is set */ - if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) - 80060b6: 687b ldr r3, [r7, #4] - 80060b8: 681b ldr r3, [r3, #0] - 80060ba: 681b ldr r3, [r3, #0] - 80060bc: f003 0310 and.w r3, r3, #16 - 80060c0: 2b10 cmp r3, #16 - 80060c2: d10a bne.n 80060da - { - /* Clear IDLE flag in ISR */ - __HAL_UART_CLEAR_IDLEFLAG(huart); - 80060c4: 2300 movs r3, #0 - 80060c6: 60fb str r3, [r7, #12] - 80060c8: 687b ldr r3, [r7, #4] - 80060ca: 681b ldr r3, [r3, #0] - 80060cc: 681b ldr r3, [r3, #0] - 80060ce: 60fb str r3, [r7, #12] - 80060d0: 687b ldr r3, [r7, #4] - 80060d2: 681b ldr r3, [r3, #0] - 80060d4: 685b ldr r3, [r3, #4] - 80060d6: 60fb str r3, [r7, #12] - 80060d8: 68fb ldr r3, [r7, #12] -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx Event callback*/ - huart->RxEventCallback(huart, huart->RxXferSize); -#else - /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 80060da: 687b ldr r3, [r7, #4] - 80060dc: 8d9b ldrh r3, [r3, #44] ; 0x2c - 80060de: 4619 mov r1, r3 - 80060e0: 6878 ldr r0, [r7, #4] - 80060e2: f7ff fdd2 bl 8005c8a - 80060e6: e002 b.n 80060ee -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx complete callback*/ - huart->RxCpltCallback(huart); -#else - /*Call legacy weak Rx complete callback*/ - HAL_UART_RxCpltCallback(huart); - 80060e8: 6878 ldr r0, [r7, #4] - 80060ea: f7ff fdbc bl 8005c66 -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - - return HAL_OK; - 80060ee: 2300 movs r3, #0 - 80060f0: e002 b.n 80060f8 - } - return HAL_OK; - 80060f2: 2300 movs r3, #0 - 80060f4: e000 b.n 80060f8 - } - else - { - return HAL_BUSY; - 80060f6: 2302 movs r3, #2 - } -} - 80060f8: 4618 mov r0, r3 - 80060fa: 3718 adds r7, #24 - 80060fc: 46bd mov sp, r7 - 80060fe: bd80 pop {r7, pc} - -08006100 : - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -static void UART_SetConfig(UART_HandleTypeDef *huart) -{ - 8006100: b580 push {r7, lr} - 8006102: b084 sub sp, #16 - 8006104: af00 add r7, sp, #0 - 8006106: 6078 str r0, [r7, #4] - assert_param(IS_UART_MODE(huart->Init.Mode)); - - /*-------------------------- USART CR2 Configuration -----------------------*/ - /* Configure the UART Stop Bits: Set STOP[13:12] bits - according to huart->Init.StopBits value */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 8006108: 687b ldr r3, [r7, #4] - 800610a: 681b ldr r3, [r3, #0] - 800610c: 691b ldr r3, [r3, #16] - 800610e: f423 5140 bic.w r1, r3, #12288 ; 0x3000 - 8006112: 687b ldr r3, [r7, #4] - 8006114: 68da ldr r2, [r3, #12] - 8006116: 687b ldr r3, [r7, #4] - 8006118: 681b ldr r3, [r3, #0] - 800611a: 430a orrs r2, r1 - 800611c: 611a str r2, [r3, #16] - tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; - MODIFY_REG(huart->Instance->CR1, - (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), - tmpreg); -#else - tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; - 800611e: 687b ldr r3, [r7, #4] - 8006120: 689a ldr r2, [r3, #8] - 8006122: 687b ldr r3, [r7, #4] - 8006124: 691b ldr r3, [r3, #16] - 8006126: 431a orrs r2, r3 - 8006128: 687b ldr r3, [r7, #4] - 800612a: 695b ldr r3, [r3, #20] - 800612c: 4313 orrs r3, r2 - 800612e: 60bb str r3, [r7, #8] - MODIFY_REG(huart->Instance->CR1, - 8006130: 687b ldr r3, [r7, #4] - 8006132: 681b ldr r3, [r3, #0] - 8006134: 68db ldr r3, [r3, #12] - 8006136: f423 53b0 bic.w r3, r3, #5632 ; 0x1600 - 800613a: f023 030c bic.w r3, r3, #12 - 800613e: 687a ldr r2, [r7, #4] - 8006140: 6812 ldr r2, [r2, #0] - 8006142: 68b9 ldr r1, [r7, #8] - 8006144: 430b orrs r3, r1 - 8006146: 60d3 str r3, [r2, #12] - tmpreg); -#endif /* USART_CR1_OVER8 */ - - /*-------------------------- USART CR3 Configuration -----------------------*/ - /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ - MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); - 8006148: 687b ldr r3, [r7, #4] - 800614a: 681b ldr r3, [r3, #0] - 800614c: 695b ldr r3, [r3, #20] - 800614e: f423 7140 bic.w r1, r3, #768 ; 0x300 - 8006152: 687b ldr r3, [r7, #4] - 8006154: 699a ldr r2, [r3, #24] - 8006156: 687b ldr r3, [r7, #4] - 8006158: 681b ldr r3, [r3, #0] - 800615a: 430a orrs r2, r1 - 800615c: 615a str r2, [r3, #20] - - - if(huart->Instance == USART1) - 800615e: 687b ldr r3, [r7, #4] - 8006160: 681b ldr r3, [r3, #0] - 8006162: 4a2c ldr r2, [pc, #176] ; (8006214 ) - 8006164: 4293 cmp r3, r2 - 8006166: d103 bne.n 8006170 - { - pclk = HAL_RCC_GetPCLK2Freq(); - 8006168: f7fe f910 bl 800438c - 800616c: 60f8 str r0, [r7, #12] - 800616e: e002 b.n 8006176 - } - else - { - pclk = HAL_RCC_GetPCLK1Freq(); - 8006170: f7fe f8f8 bl 8004364 - 8006174: 60f8 str r0, [r7, #12] - else - { - huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); - } -#else - huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); - 8006176: 68fa ldr r2, [r7, #12] - 8006178: 4613 mov r3, r2 - 800617a: 009b lsls r3, r3, #2 - 800617c: 4413 add r3, r2 - 800617e: 009a lsls r2, r3, #2 - 8006180: 441a add r2, r3 - 8006182: 687b ldr r3, [r7, #4] - 8006184: 685b ldr r3, [r3, #4] - 8006186: 009b lsls r3, r3, #2 - 8006188: fbb2 f3f3 udiv r3, r2, r3 - 800618c: 4a22 ldr r2, [pc, #136] ; (8006218 ) - 800618e: fba2 2303 umull r2, r3, r2, r3 - 8006192: 095b lsrs r3, r3, #5 - 8006194: 0119 lsls r1, r3, #4 - 8006196: 68fa ldr r2, [r7, #12] - 8006198: 4613 mov r3, r2 - 800619a: 009b lsls r3, r3, #2 - 800619c: 4413 add r3, r2 - 800619e: 009a lsls r2, r3, #2 - 80061a0: 441a add r2, r3 - 80061a2: 687b ldr r3, [r7, #4] - 80061a4: 685b ldr r3, [r3, #4] - 80061a6: 009b lsls r3, r3, #2 - 80061a8: fbb2 f2f3 udiv r2, r2, r3 - 80061ac: 4b1a ldr r3, [pc, #104] ; (8006218 ) - 80061ae: fba3 0302 umull r0, r3, r3, r2 - 80061b2: 095b lsrs r3, r3, #5 - 80061b4: 2064 movs r0, #100 ; 0x64 - 80061b6: fb00 f303 mul.w r3, r0, r3 - 80061ba: 1ad3 subs r3, r2, r3 - 80061bc: 011b lsls r3, r3, #4 - 80061be: 3332 adds r3, #50 ; 0x32 - 80061c0: 4a15 ldr r2, [pc, #84] ; (8006218 ) - 80061c2: fba2 2303 umull r2, r3, r2, r3 - 80061c6: 095b lsrs r3, r3, #5 - 80061c8: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 80061cc: 4419 add r1, r3 - 80061ce: 68fa ldr r2, [r7, #12] - 80061d0: 4613 mov r3, r2 - 80061d2: 009b lsls r3, r3, #2 - 80061d4: 4413 add r3, r2 - 80061d6: 009a lsls r2, r3, #2 - 80061d8: 441a add r2, r3 - 80061da: 687b ldr r3, [r7, #4] - 80061dc: 685b ldr r3, [r3, #4] - 80061de: 009b lsls r3, r3, #2 - 80061e0: fbb2 f2f3 udiv r2, r2, r3 - 80061e4: 4b0c ldr r3, [pc, #48] ; (8006218 ) - 80061e6: fba3 0302 umull r0, r3, r3, r2 - 80061ea: 095b lsrs r3, r3, #5 - 80061ec: 2064 movs r0, #100 ; 0x64 - 80061ee: fb00 f303 mul.w r3, r0, r3 - 80061f2: 1ad3 subs r3, r2, r3 - 80061f4: 011b lsls r3, r3, #4 - 80061f6: 3332 adds r3, #50 ; 0x32 - 80061f8: 4a07 ldr r2, [pc, #28] ; (8006218 ) - 80061fa: fba2 2303 umull r2, r3, r2, r3 - 80061fe: 095b lsrs r3, r3, #5 - 8006200: f003 020f and.w r2, r3, #15 - 8006204: 687b ldr r3, [r7, #4] - 8006206: 681b ldr r3, [r3, #0] - 8006208: 440a add r2, r1 - 800620a: 609a str r2, [r3, #8] -#endif /* USART_CR1_OVER8 */ -} - 800620c: bf00 nop - 800620e: 3710 adds r7, #16 - 8006210: 46bd mov sp, r7 - 8006212: bd80 pop {r7, pc} - 8006214: 40013800 .word 0x40013800 - 8006218: 51eb851f .word 0x51eb851f - -0800621c : - * @param cfg pointer to a USB_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) -{ - 800621c: b084 sub sp, #16 - 800621e: b480 push {r7} - 8006220: b083 sub sp, #12 - 8006222: af00 add r7, sp, #0 - 8006224: 6078 str r0, [r7, #4] - 8006226: f107 0014 add.w r0, r7, #20 - 800622a: e880 000e stmia.w r0, {r1, r2, r3} - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - return HAL_OK; - 800622e: 2300 movs r3, #0 -} - 8006230: 4618 mov r0, r3 - 8006232: 370c adds r7, #12 - 8006234: 46bd mov sp, r7 - 8006236: bc80 pop {r7} - 8006238: b004 add sp, #16 - 800623a: 4770 bx lr - -0800623c : - * Disable the controller's Global Int in the AHB Config reg - * @param USBx Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx) -{ - 800623c: b480 push {r7} - 800623e: b085 sub sp, #20 - 8006240: af00 add r7, sp, #0 - 8006242: 6078 str r0, [r7, #4] - uint32_t winterruptmask; - - /* Set winterruptmask variable */ - winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | - 8006244: f44f 433f mov.w r3, #48896 ; 0xbf00 - 8006248: 60fb str r3, [r7, #12] - USB_CNTR_SUSPM | USB_CNTR_ERRM | - USB_CNTR_SOFM | USB_CNTR_ESOFM | - USB_CNTR_RESETM; - - /* Clear interrupt mask */ - USBx->CNTR &= (uint16_t)(~winterruptmask); - 800624a: 687b ldr r3, [r7, #4] - 800624c: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40 - 8006250: b29a uxth r2, r3 - 8006252: 68fb ldr r3, [r7, #12] - 8006254: b29b uxth r3, r3 - 8006256: 43db mvns r3, r3 - 8006258: b29b uxth r3, r3 - 800625a: 4013 ands r3, r2 - 800625c: b29a uxth r2, r3 - 800625e: 687b ldr r3, [r7, #4] - 8006260: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 - - return HAL_OK; - 8006264: 2300 movs r3, #0 -} - 8006266: 4618 mov r0, r3 - 8006268: 3714 adds r7, #20 - 800626a: 46bd mov sp, r7 - 800626c: bc80 pop {r7} - 800626e: 4770 bx lr - -08006270 : - * This parameter can be one of the these values: - * @arg USB_DEVICE_MODE Peripheral mode - * @retval HAL status - */ -HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode) -{ - 8006270: b480 push {r7} - 8006272: b083 sub sp, #12 - 8006274: af00 add r7, sp, #0 - 8006276: 6078 str r0, [r7, #4] - 8006278: 460b mov r3, r1 - 800627a: 70fb strb r3, [r7, #3] - - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - return HAL_OK; - 800627c: 2300 movs r3, #0 -} - 800627e: 4618 mov r0, r3 - 8006280: 370c adds r7, #12 - 8006282: 46bd mov sp, r7 - 8006284: bc80 pop {r7} - 8006286: 4770 bx lr - -08006288 : - * @param cfg pointer to a USB_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) -{ - 8006288: b084 sub sp, #16 - 800628a: b480 push {r7} - 800628c: b083 sub sp, #12 - 800628e: af00 add r7, sp, #0 - 8006290: 6078 str r0, [r7, #4] - 8006292: f107 0014 add.w r0, r7, #20 - 8006296: e880 000e stmia.w r0, {r1, r2, r3} - /* Prevent unused argument(s) compilation warning */ - UNUSED(cfg); - - /* Init Device */ - /* CNTR_FRES = 1 */ - USBx->CNTR = (uint16_t)USB_CNTR_FRES; - 800629a: 687b ldr r3, [r7, #4] - 800629c: 2201 movs r2, #1 - 800629e: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 - - /* CNTR_FRES = 0 */ - USBx->CNTR = 0U; - 80062a2: 687b ldr r3, [r7, #4] - 80062a4: 2200 movs r2, #0 - 80062a6: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 - - /* Clear pending interrupts */ - USBx->ISTR = 0U; - 80062aa: 687b ldr r3, [r7, #4] - 80062ac: 2200 movs r2, #0 - 80062ae: f8a3 2044 strh.w r2, [r3, #68] ; 0x44 - - /*Set Btable Address*/ - USBx->BTABLE = BTABLE_ADDRESS; - 80062b2: 687b ldr r3, [r7, #4] - 80062b4: 2200 movs r2, #0 - 80062b6: f8a3 2050 strh.w r2, [r3, #80] ; 0x50 - - return HAL_OK; - 80062ba: 2300 movs r3, #0 -} - 80062bc: 4618 mov r0, r3 - 80062be: 370c adds r7, #12 - 80062c0: 46bd mov sp, r7 - 80062c2: bc80 pop {r7} - 80062c4: b004 add sp, #16 - 80062c6: 4770 bx lr - -080062c8 : - * @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down - * @param USBx Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx) -{ - 80062c8: b480 push {r7} - 80062ca: b083 sub sp, #12 - 80062cc: af00 add r7, sp, #0 - 80062ce: 6078 str r0, [r7, #4] - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - return HAL_OK; - 80062d0: 2300 movs r3, #0 -} - 80062d2: 4618 mov r0, r3 - 80062d4: 370c adds r7, #12 - 80062d6: 46bd mov sp, r7 - 80062d8: bc80 pop {r7} - 80062da: 4770 bx lr - -080062dc <_ZdlPvj>: - 80062dc: f000 b813 b.w 8006306 <_ZdlPv> - -080062e0 <_Znwj>: - 80062e0: 2801 cmp r0, #1 - 80062e2: bf38 it cc - 80062e4: 2001 movcc r0, #1 - 80062e6: b510 push {r4, lr} - 80062e8: 4604 mov r4, r0 - 80062ea: 4620 mov r0, r4 - 80062ec: f000 f848 bl 8006380 - 80062f0: b930 cbnz r0, 8006300 <_Znwj+0x20> - 80062f2: f000 f80b bl 800630c <_ZSt15get_new_handlerv> - 80062f6: b908 cbnz r0, 80062fc <_Znwj+0x1c> - 80062f8: f000 f810 bl 800631c - 80062fc: 4780 blx r0 - 80062fe: e7f4 b.n 80062ea <_Znwj+0xa> - 8006300: bd10 pop {r4, pc} - -08006302 <_Znaj>: - 8006302: f7ff bfed b.w 80062e0 <_Znwj> - -08006306 <_ZdlPv>: - 8006306: f000 b843 b.w 8006390 - ... - -0800630c <_ZSt15get_new_handlerv>: - 800630c: 4b02 ldr r3, [pc, #8] ; (8006318 <_ZSt15get_new_handlerv+0xc>) - 800630e: 6818 ldr r0, [r3, #0] - 8006310: f3bf 8f5b dmb ish - 8006314: 4770 bx lr - 8006316: bf00 nop - 8006318: 20001338 .word 0x20001338 - -0800631c : - 800631c: 2006 movs r0, #6 - 800631e: b508 push {r3, lr} - 8006320: f000 fad6 bl 80068d0 - 8006324: 2001 movs r0, #1 - 8006326: f7fc fc9a bl 8002c5e <_exit> - ... - -0800632c <__errno>: - 800632c: 4b01 ldr r3, [pc, #4] ; (8006334 <__errno+0x8>) - 800632e: 6818 ldr r0, [r3, #0] - 8006330: 4770 bx lr - 8006332: bf00 nop - 8006334: 2000001c .word 0x2000001c - -08006338 <__libc_init_array>: - 8006338: b570 push {r4, r5, r6, lr} - 800633a: 2600 movs r6, #0 - 800633c: 4d0c ldr r5, [pc, #48] ; (8006370 <__libc_init_array+0x38>) - 800633e: 4c0d ldr r4, [pc, #52] ; (8006374 <__libc_init_array+0x3c>) - 8006340: 1b64 subs r4, r4, r5 - 8006342: 10a4 asrs r4, r4, #2 - 8006344: 42a6 cmp r6, r4 - 8006346: d109 bne.n 800635c <__libc_init_array+0x24> - 8006348: f004 fdac bl 800aea4 <_init> - 800634c: 2600 movs r6, #0 - 800634e: 4d0a ldr r5, [pc, #40] ; (8006378 <__libc_init_array+0x40>) - 8006350: 4c0a ldr r4, [pc, #40] ; (800637c <__libc_init_array+0x44>) - 8006352: 1b64 subs r4, r4, r5 - 8006354: 10a4 asrs r4, r4, #2 - 8006356: 42a6 cmp r6, r4 - 8006358: d105 bne.n 8006366 <__libc_init_array+0x2e> - 800635a: bd70 pop {r4, r5, r6, pc} - 800635c: f855 3b04 ldr.w r3, [r5], #4 - 8006360: 4798 blx r3 - 8006362: 3601 adds r6, #1 - 8006364: e7ee b.n 8006344 <__libc_init_array+0xc> - 8006366: f855 3b04 ldr.w r3, [r5], #4 - 800636a: 4798 blx r3 - 800636c: 3601 adds r6, #1 - 800636e: e7f2 b.n 8006356 <__libc_init_array+0x1e> - 8006370: 0800b47c .word 0x0800b47c - 8006374: 0800b47c .word 0x0800b47c - 8006378: 0800b47c .word 0x0800b47c - 800637c: 0800b488 .word 0x0800b488 - -08006380 : - 8006380: 4b02 ldr r3, [pc, #8] ; (800638c ) - 8006382: 4601 mov r1, r0 - 8006384: 6818 ldr r0, [r3, #0] - 8006386: f000 b80b b.w 80063a0 <_malloc_r> - 800638a: bf00 nop - 800638c: 2000001c .word 0x2000001c - -08006390 : - 8006390: 4b02 ldr r3, [pc, #8] ; (800639c ) - 8006392: 4601 mov r1, r0 - 8006394: 6818 ldr r0, [r3, #0] - 8006396: f002 bc13 b.w 8008bc0 <_free_r> - 800639a: bf00 nop - 800639c: 2000001c .word 0x2000001c - -080063a0 <_malloc_r>: - 80063a0: f101 030b add.w r3, r1, #11 - 80063a4: 2b16 cmp r3, #22 - 80063a6: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} - 80063aa: 4605 mov r5, r0 - 80063ac: d906 bls.n 80063bc <_malloc_r+0x1c> - 80063ae: f033 0707 bics.w r7, r3, #7 - 80063b2: d504 bpl.n 80063be <_malloc_r+0x1e> - 80063b4: 230c movs r3, #12 - 80063b6: 602b str r3, [r5, #0] - 80063b8: 2400 movs r4, #0 - 80063ba: e1a3 b.n 8006704 <_malloc_r+0x364> - 80063bc: 2710 movs r7, #16 - 80063be: 42b9 cmp r1, r7 - 80063c0: d8f8 bhi.n 80063b4 <_malloc_r+0x14> - 80063c2: 4628 mov r0, r5 - 80063c4: f000 fa3e bl 8006844 <__malloc_lock> - 80063c8: f5b7 7ffc cmp.w r7, #504 ; 0x1f8 - 80063cc: 4eaf ldr r6, [pc, #700] ; (800668c <_malloc_r+0x2ec>) - 80063ce: d237 bcs.n 8006440 <_malloc_r+0xa0> - 80063d0: f107 0208 add.w r2, r7, #8 - 80063d4: 4432 add r2, r6 - 80063d6: 6854 ldr r4, [r2, #4] - 80063d8: f1a2 0108 sub.w r1, r2, #8 - 80063dc: 428c cmp r4, r1 - 80063de: ea4f 03d7 mov.w r3, r7, lsr #3 - 80063e2: d102 bne.n 80063ea <_malloc_r+0x4a> - 80063e4: 68d4 ldr r4, [r2, #12] - 80063e6: 42a2 cmp r2, r4 - 80063e8: d010 beq.n 800640c <_malloc_r+0x6c> - 80063ea: 6863 ldr r3, [r4, #4] - 80063ec: e9d4 1202 ldrd r1, r2, [r4, #8] - 80063f0: f023 0303 bic.w r3, r3, #3 - 80063f4: 60ca str r2, [r1, #12] - 80063f6: 4423 add r3, r4 - 80063f8: 6091 str r1, [r2, #8] - 80063fa: 685a ldr r2, [r3, #4] - 80063fc: f042 0201 orr.w r2, r2, #1 - 8006400: 605a str r2, [r3, #4] - 8006402: 4628 mov r0, r5 - 8006404: f000 fa24 bl 8006850 <__malloc_unlock> - 8006408: 3408 adds r4, #8 - 800640a: e17b b.n 8006704 <_malloc_r+0x364> - 800640c: 3302 adds r3, #2 - 800640e: 6934 ldr r4, [r6, #16] - 8006410: 499f ldr r1, [pc, #636] ; (8006690 <_malloc_r+0x2f0>) - 8006412: 428c cmp r4, r1 - 8006414: d077 beq.n 8006506 <_malloc_r+0x166> - 8006416: 6862 ldr r2, [r4, #4] - 8006418: f022 0c03 bic.w ip, r2, #3 - 800641c: ebac 0007 sub.w r0, ip, r7 - 8006420: 280f cmp r0, #15 - 8006422: dd48 ble.n 80064b6 <_malloc_r+0x116> - 8006424: 19e2 adds r2, r4, r7 - 8006426: f040 0301 orr.w r3, r0, #1 - 800642a: f047 0701 orr.w r7, r7, #1 - 800642e: 6067 str r7, [r4, #4] - 8006430: e9c6 2204 strd r2, r2, [r6, #16] - 8006434: e9c2 1102 strd r1, r1, [r2, #8] - 8006438: 6053 str r3, [r2, #4] - 800643a: f844 000c str.w r0, [r4, ip] - 800643e: e7e0 b.n 8006402 <_malloc_r+0x62> - 8006440: 0a7b lsrs r3, r7, #9 - 8006442: d02a beq.n 800649a <_malloc_r+0xfa> - 8006444: 2b04 cmp r3, #4 - 8006446: d812 bhi.n 800646e <_malloc_r+0xce> - 8006448: 09bb lsrs r3, r7, #6 - 800644a: 3338 adds r3, #56 ; 0x38 - 800644c: 1c5a adds r2, r3, #1 - 800644e: eb06 02c2 add.w r2, r6, r2, lsl #3 - 8006452: 6854 ldr r4, [r2, #4] - 8006454: f1a2 0c08 sub.w ip, r2, #8 - 8006458: 4564 cmp r4, ip - 800645a: d006 beq.n 800646a <_malloc_r+0xca> - 800645c: 6862 ldr r2, [r4, #4] - 800645e: f022 0203 bic.w r2, r2, #3 - 8006462: 1bd0 subs r0, r2, r7 - 8006464: 280f cmp r0, #15 - 8006466: dd1c ble.n 80064a2 <_malloc_r+0x102> - 8006468: 3b01 subs r3, #1 - 800646a: 3301 adds r3, #1 - 800646c: e7cf b.n 800640e <_malloc_r+0x6e> - 800646e: 2b14 cmp r3, #20 - 8006470: d801 bhi.n 8006476 <_malloc_r+0xd6> - 8006472: 335b adds r3, #91 ; 0x5b - 8006474: e7ea b.n 800644c <_malloc_r+0xac> - 8006476: 2b54 cmp r3, #84 ; 0x54 - 8006478: d802 bhi.n 8006480 <_malloc_r+0xe0> - 800647a: 0b3b lsrs r3, r7, #12 - 800647c: 336e adds r3, #110 ; 0x6e - 800647e: e7e5 b.n 800644c <_malloc_r+0xac> - 8006480: f5b3 7faa cmp.w r3, #340 ; 0x154 - 8006484: d802 bhi.n 800648c <_malloc_r+0xec> - 8006486: 0bfb lsrs r3, r7, #15 - 8006488: 3377 adds r3, #119 ; 0x77 - 800648a: e7df b.n 800644c <_malloc_r+0xac> - 800648c: f240 5254 movw r2, #1364 ; 0x554 - 8006490: 4293 cmp r3, r2 - 8006492: d804 bhi.n 800649e <_malloc_r+0xfe> - 8006494: 0cbb lsrs r3, r7, #18 - 8006496: 337c adds r3, #124 ; 0x7c - 8006498: e7d8 b.n 800644c <_malloc_r+0xac> - 800649a: 233f movs r3, #63 ; 0x3f - 800649c: e7d6 b.n 800644c <_malloc_r+0xac> - 800649e: 237e movs r3, #126 ; 0x7e - 80064a0: e7d4 b.n 800644c <_malloc_r+0xac> - 80064a2: 2800 cmp r0, #0 - 80064a4: 68e1 ldr r1, [r4, #12] - 80064a6: db04 blt.n 80064b2 <_malloc_r+0x112> - 80064a8: 68a3 ldr r3, [r4, #8] - 80064aa: 60d9 str r1, [r3, #12] - 80064ac: 608b str r3, [r1, #8] - 80064ae: 18a3 adds r3, r4, r2 - 80064b0: e7a3 b.n 80063fa <_malloc_r+0x5a> - 80064b2: 460c mov r4, r1 - 80064b4: e7d0 b.n 8006458 <_malloc_r+0xb8> - 80064b6: 2800 cmp r0, #0 - 80064b8: e9c6 1104 strd r1, r1, [r6, #16] - 80064bc: db07 blt.n 80064ce <_malloc_r+0x12e> - 80064be: 44a4 add ip, r4 - 80064c0: f8dc 3004 ldr.w r3, [ip, #4] - 80064c4: f043 0301 orr.w r3, r3, #1 - 80064c8: f8cc 3004 str.w r3, [ip, #4] - 80064cc: e799 b.n 8006402 <_malloc_r+0x62> - 80064ce: f5bc 7f00 cmp.w ip, #512 ; 0x200 - 80064d2: 6870 ldr r0, [r6, #4] - 80064d4: f080 8094 bcs.w 8006600 <_malloc_r+0x260> - 80064d8: ea4f 02dc mov.w r2, ip, lsr #3 - 80064dc: ea4f 1e5c mov.w lr, ip, lsr #5 - 80064e0: f04f 0c01 mov.w ip, #1 - 80064e4: fa0c fc0e lsl.w ip, ip, lr - 80064e8: ea4c 0000 orr.w r0, ip, r0 - 80064ec: 3201 adds r2, #1 - 80064ee: f856 c032 ldr.w ip, [r6, r2, lsl #3] - 80064f2: 6070 str r0, [r6, #4] - 80064f4: eb06 00c2 add.w r0, r6, r2, lsl #3 - 80064f8: 3808 subs r0, #8 - 80064fa: e9c4 c002 strd ip, r0, [r4, #8] - 80064fe: f846 4032 str.w r4, [r6, r2, lsl #3] - 8006502: f8cc 400c str.w r4, [ip, #12] - 8006506: 2001 movs r0, #1 - 8006508: 109a asrs r2, r3, #2 - 800650a: fa00 f202 lsl.w r2, r0, r2 - 800650e: 6870 ldr r0, [r6, #4] - 8006510: 4290 cmp r0, r2 - 8006512: d326 bcc.n 8006562 <_malloc_r+0x1c2> - 8006514: 4210 tst r0, r2 - 8006516: d106 bne.n 8006526 <_malloc_r+0x186> - 8006518: f023 0303 bic.w r3, r3, #3 - 800651c: 0052 lsls r2, r2, #1 - 800651e: 4210 tst r0, r2 - 8006520: f103 0304 add.w r3, r3, #4 - 8006524: d0fa beq.n 800651c <_malloc_r+0x17c> - 8006526: eb06 08c3 add.w r8, r6, r3, lsl #3 - 800652a: 46c1 mov r9, r8 - 800652c: 469e mov lr, r3 - 800652e: f8d9 400c ldr.w r4, [r9, #12] - 8006532: 454c cmp r4, r9 - 8006534: f040 80b8 bne.w 80066a8 <_malloc_r+0x308> - 8006538: f10e 0e01 add.w lr, lr, #1 - 800653c: f01e 0f03 tst.w lr, #3 - 8006540: f109 0908 add.w r9, r9, #8 - 8006544: d1f3 bne.n 800652e <_malloc_r+0x18e> - 8006546: 0798 lsls r0, r3, #30 - 8006548: f040 80e2 bne.w 8006710 <_malloc_r+0x370> - 800654c: 6873 ldr r3, [r6, #4] - 800654e: ea23 0302 bic.w r3, r3, r2 - 8006552: 6073 str r3, [r6, #4] - 8006554: 6870 ldr r0, [r6, #4] - 8006556: 0052 lsls r2, r2, #1 - 8006558: 4290 cmp r0, r2 - 800655a: d302 bcc.n 8006562 <_malloc_r+0x1c2> - 800655c: 2a00 cmp r2, #0 - 800655e: f040 80e3 bne.w 8006728 <_malloc_r+0x388> - 8006562: f8d6 a008 ldr.w sl, [r6, #8] - 8006566: f8da 3004 ldr.w r3, [sl, #4] - 800656a: f023 0903 bic.w r9, r3, #3 - 800656e: 45b9 cmp r9, r7 - 8006570: d304 bcc.n 800657c <_malloc_r+0x1dc> - 8006572: eba9 0207 sub.w r2, r9, r7 - 8006576: 2a0f cmp r2, #15 - 8006578: f300 8141 bgt.w 80067fe <_malloc_r+0x45e> - 800657c: 4b45 ldr r3, [pc, #276] ; (8006694 <_malloc_r+0x2f4>) - 800657e: 2008 movs r0, #8 - 8006580: 6819 ldr r1, [r3, #0] - 8006582: eb0a 0b09 add.w fp, sl, r9 - 8006586: 3110 adds r1, #16 - 8006588: 4439 add r1, r7 - 800658a: 9101 str r1, [sp, #4] - 800658c: f001 fc52 bl 8007e34 - 8006590: 4a41 ldr r2, [pc, #260] ; (8006698 <_malloc_r+0x2f8>) - 8006592: 9901 ldr r1, [sp, #4] - 8006594: 6813 ldr r3, [r2, #0] - 8006596: 4680 mov r8, r0 - 8006598: 3301 adds r3, #1 - 800659a: bf1f itttt ne - 800659c: f101 31ff addne.w r1, r1, #4294967295 - 80065a0: 1809 addne r1, r1, r0 - 80065a2: 4243 negne r3, r0 - 80065a4: 4019 andne r1, r3 - 80065a6: 4628 mov r0, r5 - 80065a8: 9101 str r1, [sp, #4] - 80065aa: f000 f957 bl 800685c <_sbrk_r> - 80065ae: 1c42 adds r2, r0, #1 - 80065b0: 4604 mov r4, r0 - 80065b2: f000 80f7 beq.w 80067a4 <_malloc_r+0x404> - 80065b6: 4583 cmp fp, r0 - 80065b8: 9901 ldr r1, [sp, #4] - 80065ba: 4a37 ldr r2, [pc, #220] ; (8006698 <_malloc_r+0x2f8>) - 80065bc: d902 bls.n 80065c4 <_malloc_r+0x224> - 80065be: 45b2 cmp sl, r6 - 80065c0: f040 80f0 bne.w 80067a4 <_malloc_r+0x404> - 80065c4: 4b35 ldr r3, [pc, #212] ; (800669c <_malloc_r+0x2fc>) - 80065c6: 45a3 cmp fp, r4 - 80065c8: 6818 ldr r0, [r3, #0] - 80065ca: f108 3cff add.w ip, r8, #4294967295 - 80065ce: 4408 add r0, r1 - 80065d0: 6018 str r0, [r3, #0] - 80065d2: f040 80ab bne.w 800672c <_malloc_r+0x38c> - 80065d6: ea1b 0f0c tst.w fp, ip - 80065da: f040 80a7 bne.w 800672c <_malloc_r+0x38c> - 80065de: 68b2 ldr r2, [r6, #8] - 80065e0: 4449 add r1, r9 - 80065e2: f041 0101 orr.w r1, r1, #1 - 80065e6: 6051 str r1, [r2, #4] - 80065e8: 4a2d ldr r2, [pc, #180] ; (80066a0 <_malloc_r+0x300>) - 80065ea: 681b ldr r3, [r3, #0] - 80065ec: 6811 ldr r1, [r2, #0] - 80065ee: 428b cmp r3, r1 - 80065f0: bf88 it hi - 80065f2: 6013 strhi r3, [r2, #0] - 80065f4: 4a2b ldr r2, [pc, #172] ; (80066a4 <_malloc_r+0x304>) - 80065f6: 6811 ldr r1, [r2, #0] - 80065f8: 428b cmp r3, r1 - 80065fa: bf88 it hi - 80065fc: 6013 strhi r3, [r2, #0] - 80065fe: e0d1 b.n 80067a4 <_malloc_r+0x404> - 8006600: f5bc 6f20 cmp.w ip, #2560 ; 0xa00 - 8006604: ea4f 225c mov.w r2, ip, lsr #9 - 8006608: d218 bcs.n 800663c <_malloc_r+0x29c> - 800660a: ea4f 129c mov.w r2, ip, lsr #6 - 800660e: 3238 adds r2, #56 ; 0x38 - 8006610: f102 0e01 add.w lr, r2, #1 - 8006614: f856 e03e ldr.w lr, [r6, lr, lsl #3] - 8006618: eb06 08c2 add.w r8, r6, r2, lsl #3 - 800661c: 45f0 cmp r8, lr - 800661e: d12b bne.n 8006678 <_malloc_r+0x2d8> - 8006620: f04f 0c01 mov.w ip, #1 - 8006624: 1092 asrs r2, r2, #2 - 8006626: fa0c f202 lsl.w r2, ip, r2 - 800662a: 4310 orrs r0, r2 - 800662c: 6070 str r0, [r6, #4] - 800662e: e9c4 e802 strd lr, r8, [r4, #8] - 8006632: f8c8 4008 str.w r4, [r8, #8] - 8006636: f8ce 400c str.w r4, [lr, #12] - 800663a: e764 b.n 8006506 <_malloc_r+0x166> - 800663c: 2a14 cmp r2, #20 - 800663e: d801 bhi.n 8006644 <_malloc_r+0x2a4> - 8006640: 325b adds r2, #91 ; 0x5b - 8006642: e7e5 b.n 8006610 <_malloc_r+0x270> - 8006644: 2a54 cmp r2, #84 ; 0x54 - 8006646: d803 bhi.n 8006650 <_malloc_r+0x2b0> - 8006648: ea4f 321c mov.w r2, ip, lsr #12 - 800664c: 326e adds r2, #110 ; 0x6e - 800664e: e7df b.n 8006610 <_malloc_r+0x270> - 8006650: f5b2 7faa cmp.w r2, #340 ; 0x154 - 8006654: d803 bhi.n 800665e <_malloc_r+0x2be> - 8006656: ea4f 32dc mov.w r2, ip, lsr #15 - 800665a: 3277 adds r2, #119 ; 0x77 - 800665c: e7d8 b.n 8006610 <_malloc_r+0x270> - 800665e: f240 5e54 movw lr, #1364 ; 0x554 - 8006662: 4572 cmp r2, lr - 8006664: bf96 itet ls - 8006666: ea4f 429c movls.w r2, ip, lsr #18 - 800666a: 227e movhi r2, #126 ; 0x7e - 800666c: 327c addls r2, #124 ; 0x7c - 800666e: e7cf b.n 8006610 <_malloc_r+0x270> - 8006670: f8de e008 ldr.w lr, [lr, #8] - 8006674: 45f0 cmp r8, lr - 8006676: d005 beq.n 8006684 <_malloc_r+0x2e4> - 8006678: f8de 2004 ldr.w r2, [lr, #4] - 800667c: f022 0203 bic.w r2, r2, #3 - 8006680: 4562 cmp r2, ip - 8006682: d8f5 bhi.n 8006670 <_malloc_r+0x2d0> - 8006684: f8de 800c ldr.w r8, [lr, #12] - 8006688: e7d1 b.n 800662e <_malloc_r+0x28e> - 800668a: bf00 nop - 800668c: 20000448 .word 0x20000448 - 8006690: 20000450 .word 0x20000450 - 8006694: 2000136c .word 0x2000136c - 8006698: 20000850 .word 0x20000850 - 800669c: 2000133c .word 0x2000133c - 80066a0: 20001364 .word 0x20001364 - 80066a4: 20001368 .word 0x20001368 - 80066a8: 6860 ldr r0, [r4, #4] - 80066aa: f8d4 c00c ldr.w ip, [r4, #12] - 80066ae: f020 0003 bic.w r0, r0, #3 - 80066b2: eba0 0a07 sub.w sl, r0, r7 - 80066b6: f1ba 0f0f cmp.w sl, #15 - 80066ba: dd12 ble.n 80066e2 <_malloc_r+0x342> - 80066bc: 68a3 ldr r3, [r4, #8] - 80066be: 19e2 adds r2, r4, r7 - 80066c0: f047 0701 orr.w r7, r7, #1 - 80066c4: 6067 str r7, [r4, #4] - 80066c6: f8c3 c00c str.w ip, [r3, #12] - 80066ca: f8cc 3008 str.w r3, [ip, #8] - 80066ce: f04a 0301 orr.w r3, sl, #1 - 80066d2: e9c6 2204 strd r2, r2, [r6, #16] - 80066d6: e9c2 1102 strd r1, r1, [r2, #8] - 80066da: 6053 str r3, [r2, #4] - 80066dc: f844 a000 str.w sl, [r4, r0] - 80066e0: e68f b.n 8006402 <_malloc_r+0x62> - 80066e2: f1ba 0f00 cmp.w sl, #0 - 80066e6: db11 blt.n 800670c <_malloc_r+0x36c> - 80066e8: 4420 add r0, r4 - 80066ea: 6843 ldr r3, [r0, #4] - 80066ec: f043 0301 orr.w r3, r3, #1 - 80066f0: 6043 str r3, [r0, #4] - 80066f2: f854 3f08 ldr.w r3, [r4, #8]! - 80066f6: 4628 mov r0, r5 - 80066f8: f8c3 c00c str.w ip, [r3, #12] - 80066fc: f8cc 3008 str.w r3, [ip, #8] - 8006700: f000 f8a6 bl 8006850 <__malloc_unlock> - 8006704: 4620 mov r0, r4 - 8006706: b003 add sp, #12 - 8006708: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 800670c: 4664 mov r4, ip - 800670e: e710 b.n 8006532 <_malloc_r+0x192> - 8006710: f858 0908 ldr.w r0, [r8], #-8 - 8006714: 3b01 subs r3, #1 - 8006716: 4540 cmp r0, r8 - 8006718: f43f af15 beq.w 8006546 <_malloc_r+0x1a6> - 800671c: e71a b.n 8006554 <_malloc_r+0x1b4> - 800671e: 3304 adds r3, #4 - 8006720: 0052 lsls r2, r2, #1 - 8006722: 4210 tst r0, r2 - 8006724: d0fb beq.n 800671e <_malloc_r+0x37e> - 8006726: e6fe b.n 8006526 <_malloc_r+0x186> - 8006728: 4673 mov r3, lr - 800672a: e7fa b.n 8006722 <_malloc_r+0x382> - 800672c: f8d2 e000 ldr.w lr, [r2] - 8006730: f1be 3fff cmp.w lr, #4294967295 - 8006734: bf1b ittet ne - 8006736: eba4 0b0b subne.w fp, r4, fp - 800673a: eb0b 0200 addne.w r2, fp, r0 - 800673e: 6014 streq r4, [r2, #0] - 8006740: 601a strne r2, [r3, #0] - 8006742: f014 0b07 ands.w fp, r4, #7 - 8006746: bf0e itee eq - 8006748: 4658 moveq r0, fp - 800674a: f1cb 0008 rsbne r0, fp, #8 - 800674e: 1824 addne r4, r4, r0 - 8006750: 1862 adds r2, r4, r1 - 8006752: ea02 010c and.w r1, r2, ip - 8006756: 4480 add r8, r0 - 8006758: eba8 0801 sub.w r8, r8, r1 - 800675c: ea08 080c and.w r8, r8, ip - 8006760: 4641 mov r1, r8 - 8006762: 4628 mov r0, r5 - 8006764: 9201 str r2, [sp, #4] - 8006766: f000 f879 bl 800685c <_sbrk_r> - 800676a: 1c43 adds r3, r0, #1 - 800676c: 9a01 ldr r2, [sp, #4] - 800676e: 4b29 ldr r3, [pc, #164] ; (8006814 <_malloc_r+0x474>) - 8006770: d107 bne.n 8006782 <_malloc_r+0x3e2> - 8006772: f1bb 0f00 cmp.w fp, #0 - 8006776: d023 beq.n 80067c0 <_malloc_r+0x420> - 8006778: f04f 0800 mov.w r8, #0 - 800677c: f1ab 0008 sub.w r0, fp, #8 - 8006780: 4410 add r0, r2 - 8006782: 681a ldr r2, [r3, #0] - 8006784: 1b00 subs r0, r0, r4 - 8006786: 4440 add r0, r8 - 8006788: 4442 add r2, r8 - 800678a: f040 0001 orr.w r0, r0, #1 - 800678e: 45b2 cmp sl, r6 - 8006790: 60b4 str r4, [r6, #8] - 8006792: 601a str r2, [r3, #0] - 8006794: 6060 str r0, [r4, #4] - 8006796: f43f af27 beq.w 80065e8 <_malloc_r+0x248> - 800679a: f1b9 0f0f cmp.w r9, #15 - 800679e: d812 bhi.n 80067c6 <_malloc_r+0x426> - 80067a0: 2301 movs r3, #1 - 80067a2: 6063 str r3, [r4, #4] - 80067a4: 68b3 ldr r3, [r6, #8] - 80067a6: 685b ldr r3, [r3, #4] - 80067a8: f023 0303 bic.w r3, r3, #3 - 80067ac: 42bb cmp r3, r7 - 80067ae: eba3 0207 sub.w r2, r3, r7 - 80067b2: d301 bcc.n 80067b8 <_malloc_r+0x418> - 80067b4: 2a0f cmp r2, #15 - 80067b6: dc22 bgt.n 80067fe <_malloc_r+0x45e> - 80067b8: 4628 mov r0, r5 - 80067ba: f000 f849 bl 8006850 <__malloc_unlock> - 80067be: e5fb b.n 80063b8 <_malloc_r+0x18> - 80067c0: 4610 mov r0, r2 - 80067c2: 46d8 mov r8, fp - 80067c4: e7dd b.n 8006782 <_malloc_r+0x3e2> - 80067c6: 2105 movs r1, #5 - 80067c8: f8da 2004 ldr.w r2, [sl, #4] - 80067cc: f1a9 090c sub.w r9, r9, #12 - 80067d0: f029 0907 bic.w r9, r9, #7 - 80067d4: f002 0201 and.w r2, r2, #1 - 80067d8: ea42 0209 orr.w r2, r2, r9 - 80067dc: f8ca 2004 str.w r2, [sl, #4] - 80067e0: f1b9 0f0f cmp.w r9, #15 - 80067e4: eb0a 0209 add.w r2, sl, r9 - 80067e8: e9c2 1101 strd r1, r1, [r2, #4] - 80067ec: f67f aefc bls.w 80065e8 <_malloc_r+0x248> - 80067f0: 4628 mov r0, r5 - 80067f2: f10a 0108 add.w r1, sl, #8 - 80067f6: f002 f9e3 bl 8008bc0 <_free_r> - 80067fa: 4b06 ldr r3, [pc, #24] ; (8006814 <_malloc_r+0x474>) - 80067fc: e6f4 b.n 80065e8 <_malloc_r+0x248> - 80067fe: 68b4 ldr r4, [r6, #8] - 8006800: f047 0301 orr.w r3, r7, #1 - 8006804: f042 0201 orr.w r2, r2, #1 - 8006808: 4427 add r7, r4 - 800680a: 6063 str r3, [r4, #4] - 800680c: 60b7 str r7, [r6, #8] - 800680e: 607a str r2, [r7, #4] - 8006810: e5f7 b.n 8006402 <_malloc_r+0x62> - 8006812: bf00 nop - 8006814: 2000133c .word 0x2000133c - -08006818 : - 8006818: 440a add r2, r1 - 800681a: 4291 cmp r1, r2 - 800681c: f100 33ff add.w r3, r0, #4294967295 - 8006820: d100 bne.n 8006824 - 8006822: 4770 bx lr - 8006824: b510 push {r4, lr} - 8006826: f811 4b01 ldrb.w r4, [r1], #1 - 800682a: 4291 cmp r1, r2 - 800682c: f803 4f01 strb.w r4, [r3, #1]! - 8006830: d1f9 bne.n 8006826 - 8006832: bd10 pop {r4, pc} - -08006834 : - 8006834: 4603 mov r3, r0 - 8006836: 4402 add r2, r0 - 8006838: 4293 cmp r3, r2 - 800683a: d100 bne.n 800683e - 800683c: 4770 bx lr - 800683e: f803 1b01 strb.w r1, [r3], #1 - 8006842: e7f9 b.n 8006838 - -08006844 <__malloc_lock>: - 8006844: 4801 ldr r0, [pc, #4] ; (800684c <__malloc_lock+0x8>) - 8006846: f002 ba81 b.w 8008d4c <__retarget_lock_acquire_recursive> - 800684a: bf00 nop - 800684c: 20001371 .word 0x20001371 - -08006850 <__malloc_unlock>: - 8006850: 4801 ldr r0, [pc, #4] ; (8006858 <__malloc_unlock+0x8>) - 8006852: f002 ba7c b.w 8008d4e <__retarget_lock_release_recursive> - 8006856: bf00 nop - 8006858: 20001371 .word 0x20001371 - -0800685c <_sbrk_r>: - 800685c: b538 push {r3, r4, r5, lr} - 800685e: 2300 movs r3, #0 - 8006860: 4d05 ldr r5, [pc, #20] ; (8006878 <_sbrk_r+0x1c>) - 8006862: 4604 mov r4, r0 - 8006864: 4608 mov r0, r1 - 8006866: 602b str r3, [r5, #0] - 8006868: f7fc fa6c bl 8002d44 <_sbrk> - 800686c: 1c43 adds r3, r0, #1 - 800686e: d102 bne.n 8006876 <_sbrk_r+0x1a> - 8006870: 682b ldr r3, [r5, #0] - 8006872: b103 cbz r3, 8006876 <_sbrk_r+0x1a> - 8006874: 6023 str r3, [r4, #0] - 8006876: bd38 pop {r3, r4, r5, pc} - 8006878: 20001374 .word 0x20001374 - -0800687c <_raise_r>: - 800687c: 291f cmp r1, #31 - 800687e: b538 push {r3, r4, r5, lr} - 8006880: 4604 mov r4, r0 - 8006882: 460d mov r5, r1 - 8006884: d904 bls.n 8006890 <_raise_r+0x14> - 8006886: 2316 movs r3, #22 - 8006888: 6003 str r3, [r0, #0] - 800688a: f04f 30ff mov.w r0, #4294967295 - 800688e: bd38 pop {r3, r4, r5, pc} - 8006890: f8d0 22dc ldr.w r2, [r0, #732] ; 0x2dc - 8006894: b112 cbz r2, 800689c <_raise_r+0x20> - 8006896: f852 3021 ldr.w r3, [r2, r1, lsl #2] - 800689a: b94b cbnz r3, 80068b0 <_raise_r+0x34> - 800689c: 4620 mov r0, r4 - 800689e: f000 f831 bl 8006904 <_getpid_r> - 80068a2: 462a mov r2, r5 - 80068a4: 4601 mov r1, r0 - 80068a6: 4620 mov r0, r4 - 80068a8: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} - 80068ac: f000 b818 b.w 80068e0 <_kill_r> - 80068b0: 2b01 cmp r3, #1 - 80068b2: d00a beq.n 80068ca <_raise_r+0x4e> - 80068b4: 1c59 adds r1, r3, #1 - 80068b6: d103 bne.n 80068c0 <_raise_r+0x44> - 80068b8: 2316 movs r3, #22 - 80068ba: 6003 str r3, [r0, #0] - 80068bc: 2001 movs r0, #1 - 80068be: e7e6 b.n 800688e <_raise_r+0x12> - 80068c0: 2400 movs r4, #0 - 80068c2: 4628 mov r0, r5 - 80068c4: f842 4025 str.w r4, [r2, r5, lsl #2] - 80068c8: 4798 blx r3 - 80068ca: 2000 movs r0, #0 - 80068cc: e7df b.n 800688e <_raise_r+0x12> - ... - -080068d0 : - 80068d0: 4b02 ldr r3, [pc, #8] ; (80068dc ) - 80068d2: 4601 mov r1, r0 - 80068d4: 6818 ldr r0, [r3, #0] - 80068d6: f7ff bfd1 b.w 800687c <_raise_r> - 80068da: bf00 nop - 80068dc: 2000001c .word 0x2000001c - -080068e0 <_kill_r>: - 80068e0: b538 push {r3, r4, r5, lr} - 80068e2: 2300 movs r3, #0 - 80068e4: 4d06 ldr r5, [pc, #24] ; (8006900 <_kill_r+0x20>) - 80068e6: 4604 mov r4, r0 - 80068e8: 4608 mov r0, r1 - 80068ea: 4611 mov r1, r2 - 80068ec: 602b str r3, [r5, #0] - 80068ee: f7fc f9a6 bl 8002c3e <_kill> - 80068f2: 1c43 adds r3, r0, #1 - 80068f4: d102 bne.n 80068fc <_kill_r+0x1c> - 80068f6: 682b ldr r3, [r5, #0] - 80068f8: b103 cbz r3, 80068fc <_kill_r+0x1c> - 80068fa: 6023 str r3, [r4, #0] - 80068fc: bd38 pop {r3, r4, r5, pc} - 80068fe: bf00 nop - 8006900: 20001374 .word 0x20001374 - -08006904 <_getpid_r>: - 8006904: f7fc b994 b.w 8002c30 <_getpid> - -08006908 : - 8006908: b40e push {r1, r2, r3} - 800690a: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 - 800690e: b500 push {lr} - 8006910: b09c sub sp, #112 ; 0x70 - 8006912: ab1d add r3, sp, #116 ; 0x74 - 8006914: 9002 str r0, [sp, #8] - 8006916: 9006 str r0, [sp, #24] - 8006918: 9107 str r1, [sp, #28] - 800691a: 9104 str r1, [sp, #16] - 800691c: 4808 ldr r0, [pc, #32] ; (8006940 ) - 800691e: 4909 ldr r1, [pc, #36] ; (8006944 ) - 8006920: f853 2b04 ldr.w r2, [r3], #4 - 8006924: 9105 str r1, [sp, #20] - 8006926: 6800 ldr r0, [r0, #0] - 8006928: a902 add r1, sp, #8 - 800692a: 9301 str r3, [sp, #4] - 800692c: f000 f8ae bl 8006a8c <_svfprintf_r> - 8006930: 2200 movs r2, #0 - 8006932: 9b02 ldr r3, [sp, #8] - 8006934: 701a strb r2, [r3, #0] - 8006936: b01c add sp, #112 ; 0x70 - 8006938: f85d eb04 ldr.w lr, [sp], #4 - 800693c: b003 add sp, #12 - 800693e: 4770 bx lr - 8006940: 2000001c .word 0x2000001c - 8006944: ffff0208 .word 0xffff0208 - -08006948 <_strtoull_l.constprop.0>: - 8006948: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} - 800694c: 4689 mov r9, r1 - 800694e: 461d mov r5, r3 - 8006950: 460e mov r6, r1 - 8006952: 4692 mov sl, r2 - 8006954: 4a47 ldr r2, [pc, #284] ; (8006a74 <_strtoull_l.constprop.0+0x12c>) - 8006956: 9001 str r0, [sp, #4] - 8006958: 4633 mov r3, r6 - 800695a: f816 4b01 ldrb.w r4, [r6], #1 - 800695e: 5ca7 ldrb r7, [r4, r2] - 8006960: f017 0708 ands.w r7, r7, #8 - 8006964: d1f8 bne.n 8006958 <_strtoull_l.constprop.0+0x10> - 8006966: 2c2d cmp r4, #45 ; 0x2d - 8006968: d14a bne.n 8006a00 <_strtoull_l.constprop.0+0xb8> - 800696a: 2701 movs r7, #1 - 800696c: 7834 ldrb r4, [r6, #0] - 800696e: 1c9e adds r6, r3, #2 - 8006970: 2d00 cmp r5, #0 - 8006972: d07b beq.n 8006a6c <_strtoull_l.constprop.0+0x124> - 8006974: 2d10 cmp r5, #16 - 8006976: d109 bne.n 800698c <_strtoull_l.constprop.0+0x44> - 8006978: 2c30 cmp r4, #48 ; 0x30 - 800697a: d107 bne.n 800698c <_strtoull_l.constprop.0+0x44> - 800697c: 7833 ldrb r3, [r6, #0] - 800697e: f003 03df and.w r3, r3, #223 ; 0xdf - 8006982: 2b58 cmp r3, #88 ; 0x58 - 8006984: d16d bne.n 8006a62 <_strtoull_l.constprop.0+0x11a> - 8006986: 2510 movs r5, #16 - 8006988: 7874 ldrb r4, [r6, #1] - 800698a: 3602 adds r6, #2 - 800698c: ea4f 7be5 mov.w fp, r5, asr #31 - 8006990: 462a mov r2, r5 - 8006992: 465b mov r3, fp - 8006994: f04f 30ff mov.w r0, #4294967295 - 8006998: f04f 31ff mov.w r1, #4294967295 - 800699c: f7fa fb78 bl 8001090 <__aeabi_uldivmod> - 80069a0: 462a mov r2, r5 - 80069a2: 9000 str r0, [sp, #0] - 80069a4: 4688 mov r8, r1 - 80069a6: 465b mov r3, fp - 80069a8: f04f 30ff mov.w r0, #4294967295 - 80069ac: f04f 31ff mov.w r1, #4294967295 - 80069b0: f7fa fb6e bl 8001090 <__aeabi_uldivmod> - 80069b4: 2300 movs r3, #0 - 80069b6: 4618 mov r0, r3 - 80069b8: 4619 mov r1, r3 - 80069ba: f1a4 0c30 sub.w ip, r4, #48 ; 0x30 - 80069be: f1bc 0f09 cmp.w ip, #9 - 80069c2: d822 bhi.n 8006a0a <_strtoull_l.constprop.0+0xc2> - 80069c4: 4664 mov r4, ip - 80069c6: 42a5 cmp r5, r4 - 80069c8: dd30 ble.n 8006a2c <_strtoull_l.constprop.0+0xe4> - 80069ca: 2b00 cmp r3, #0 - 80069cc: db2b blt.n 8006a26 <_strtoull_l.constprop.0+0xde> - 80069ce: 9b00 ldr r3, [sp, #0] - 80069d0: 4283 cmp r3, r0 - 80069d2: eb78 0301 sbcs.w r3, r8, r1 - 80069d6: d326 bcc.n 8006a26 <_strtoull_l.constprop.0+0xde> - 80069d8: 9b00 ldr r3, [sp, #0] - 80069da: 4588 cmp r8, r1 - 80069dc: bf08 it eq - 80069de: 4283 cmpeq r3, r0 - 80069e0: d101 bne.n 80069e6 <_strtoull_l.constprop.0+0x9e> - 80069e2: 42a2 cmp r2, r4 - 80069e4: db1f blt.n 8006a26 <_strtoull_l.constprop.0+0xde> - 80069e6: 4369 muls r1, r5 - 80069e8: fb00 110b mla r1, r0, fp, r1 - 80069ec: fba5 0300 umull r0, r3, r5, r0 - 80069f0: 4419 add r1, r3 - 80069f2: 2301 movs r3, #1 - 80069f4: 1820 adds r0, r4, r0 - 80069f6: eb41 71e4 adc.w r1, r1, r4, asr #31 - 80069fa: f816 4b01 ldrb.w r4, [r6], #1 - 80069fe: e7dc b.n 80069ba <_strtoull_l.constprop.0+0x72> - 8006a00: 2c2b cmp r4, #43 ; 0x2b - 8006a02: bf04 itt eq - 8006a04: 7834 ldrbeq r4, [r6, #0] - 8006a06: 1c9e addeq r6, r3, #2 - 8006a08: e7b2 b.n 8006970 <_strtoull_l.constprop.0+0x28> - 8006a0a: f1a4 0c41 sub.w ip, r4, #65 ; 0x41 - 8006a0e: f1bc 0f19 cmp.w ip, #25 - 8006a12: d801 bhi.n 8006a18 <_strtoull_l.constprop.0+0xd0> - 8006a14: 3c37 subs r4, #55 ; 0x37 - 8006a16: e7d6 b.n 80069c6 <_strtoull_l.constprop.0+0x7e> - 8006a18: f1a4 0c61 sub.w ip, r4, #97 ; 0x61 - 8006a1c: f1bc 0f19 cmp.w ip, #25 - 8006a20: d804 bhi.n 8006a2c <_strtoull_l.constprop.0+0xe4> - 8006a22: 3c57 subs r4, #87 ; 0x57 - 8006a24: e7cf b.n 80069c6 <_strtoull_l.constprop.0+0x7e> - 8006a26: f04f 33ff mov.w r3, #4294967295 - 8006a2a: e7e6 b.n 80069fa <_strtoull_l.constprop.0+0xb2> - 8006a2c: 2b00 cmp r3, #0 - 8006a2e: da0b bge.n 8006a48 <_strtoull_l.constprop.0+0x100> - 8006a30: 2322 movs r3, #34 ; 0x22 - 8006a32: f04f 30ff mov.w r0, #4294967295 - 8006a36: 9a01 ldr r2, [sp, #4] - 8006a38: 4601 mov r1, r0 - 8006a3a: 6013 str r3, [r2, #0] - 8006a3c: f1ba 0f00 cmp.w sl, #0 - 8006a40: d10a bne.n 8006a58 <_strtoull_l.constprop.0+0x110> - 8006a42: b003 add sp, #12 - 8006a44: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 8006a48: b117 cbz r7, 8006a50 <_strtoull_l.constprop.0+0x108> - 8006a4a: 4240 negs r0, r0 - 8006a4c: eb61 0141 sbc.w r1, r1, r1, lsl #1 - 8006a50: f1ba 0f00 cmp.w sl, #0 - 8006a54: d0f5 beq.n 8006a42 <_strtoull_l.constprop.0+0xfa> - 8006a56: b10b cbz r3, 8006a5c <_strtoull_l.constprop.0+0x114> - 8006a58: f106 39ff add.w r9, r6, #4294967295 - 8006a5c: f8ca 9000 str.w r9, [sl] - 8006a60: e7ef b.n 8006a42 <_strtoull_l.constprop.0+0xfa> - 8006a62: 2430 movs r4, #48 ; 0x30 - 8006a64: 2d00 cmp r5, #0 - 8006a66: d191 bne.n 800698c <_strtoull_l.constprop.0+0x44> - 8006a68: 2508 movs r5, #8 - 8006a6a: e78f b.n 800698c <_strtoull_l.constprop.0+0x44> - 8006a6c: 2c30 cmp r4, #48 ; 0x30 - 8006a6e: d085 beq.n 800697c <_strtoull_l.constprop.0+0x34> - 8006a70: 250a movs r5, #10 - 8006a72: e78b b.n 800698c <_strtoull_l.constprop.0+0x44> - 8006a74: 0800b135 .word 0x0800b135 - -08006a78 : - 8006a78: 4613 mov r3, r2 - 8006a7a: 460a mov r2, r1 - 8006a7c: 4601 mov r1, r0 - 8006a7e: 4802 ldr r0, [pc, #8] ; (8006a88 ) - 8006a80: 6800 ldr r0, [r0, #0] - 8006a82: f7ff bf61 b.w 8006948 <_strtoull_l.constprop.0> - 8006a86: bf00 nop - 8006a88: 2000001c .word 0x2000001c - -08006a8c <_svfprintf_r>: - 8006a8c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8006a90: b0d3 sub sp, #332 ; 0x14c - 8006a92: 468b mov fp, r1 - 8006a94: 4692 mov sl, r2 - 8006a96: 461e mov r6, r3 - 8006a98: 4681 mov r9, r0 - 8006a9a: f002 f951 bl 8008d40 <_localeconv_r> - 8006a9e: 6803 ldr r3, [r0, #0] - 8006aa0: 4618 mov r0, r3 - 8006aa2: 9317 str r3, [sp, #92] ; 0x5c - 8006aa4: f7f9 fb5e bl 8000164 - 8006aa8: f8bb 300c ldrh.w r3, [fp, #12] - 8006aac: 9012 str r0, [sp, #72] ; 0x48 - 8006aae: 0618 lsls r0, r3, #24 - 8006ab0: d518 bpl.n 8006ae4 <_svfprintf_r+0x58> - 8006ab2: f8db 3010 ldr.w r3, [fp, #16] - 8006ab6: b9ab cbnz r3, 8006ae4 <_svfprintf_r+0x58> - 8006ab8: 2140 movs r1, #64 ; 0x40 - 8006aba: 4648 mov r0, r9 - 8006abc: f7ff fc70 bl 80063a0 <_malloc_r> - 8006ac0: f8cb 0000 str.w r0, [fp] - 8006ac4: f8cb 0010 str.w r0, [fp, #16] - 8006ac8: b948 cbnz r0, 8006ade <_svfprintf_r+0x52> - 8006aca: 230c movs r3, #12 - 8006acc: f8c9 3000 str.w r3, [r9] - 8006ad0: f04f 33ff mov.w r3, #4294967295 - 8006ad4: 930f str r3, [sp, #60] ; 0x3c - 8006ad6: 980f ldr r0, [sp, #60] ; 0x3c - 8006ad8: b053 add sp, #332 ; 0x14c - 8006ada: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 8006ade: 2340 movs r3, #64 ; 0x40 - 8006ae0: f8cb 3014 str.w r3, [fp, #20] - 8006ae4: 2500 movs r5, #0 - 8006ae6: 2200 movs r2, #0 - 8006ae8: 2300 movs r3, #0 - 8006aea: e9cd 5527 strd r5, r5, [sp, #156] ; 0x9c - 8006aee: e9cd 2310 strd r2, r3, [sp, #64] ; 0x40 - 8006af2: e9cd 5519 strd r5, r5, [sp, #100] ; 0x64 - 8006af6: ac29 add r4, sp, #164 ; 0xa4 - 8006af8: 9426 str r4, [sp, #152] ; 0x98 - 8006afa: 9509 str r5, [sp, #36] ; 0x24 - 8006afc: 950d str r5, [sp, #52] ; 0x34 - 8006afe: 9515 str r5, [sp, #84] ; 0x54 - 8006b00: 9518 str r5, [sp, #96] ; 0x60 - 8006b02: 950f str r5, [sp, #60] ; 0x3c - 8006b04: 4653 mov r3, sl - 8006b06: 461d mov r5, r3 - 8006b08: f813 2b01 ldrb.w r2, [r3], #1 - 8006b0c: b10a cbz r2, 8006b12 <_svfprintf_r+0x86> - 8006b0e: 2a25 cmp r2, #37 ; 0x25 - 8006b10: d1f9 bne.n 8006b06 <_svfprintf_r+0x7a> - 8006b12: ebb5 070a subs.w r7, r5, sl - 8006b16: d00d beq.n 8006b34 <_svfprintf_r+0xa8> - 8006b18: 9b28 ldr r3, [sp, #160] ; 0xa0 - 8006b1a: e9c4 a700 strd sl, r7, [r4] - 8006b1e: 443b add r3, r7 - 8006b20: 9328 str r3, [sp, #160] ; 0xa0 - 8006b22: 9b27 ldr r3, [sp, #156] ; 0x9c - 8006b24: 3301 adds r3, #1 - 8006b26: 2b07 cmp r3, #7 - 8006b28: 9327 str r3, [sp, #156] ; 0x9c - 8006b2a: dc79 bgt.n 8006c20 <_svfprintf_r+0x194> - 8006b2c: 3408 adds r4, #8 - 8006b2e: 9b0f ldr r3, [sp, #60] ; 0x3c - 8006b30: 443b add r3, r7 - 8006b32: 930f str r3, [sp, #60] ; 0x3c - 8006b34: 782b ldrb r3, [r5, #0] - 8006b36: 2b00 cmp r3, #0 - 8006b38: f001 813a beq.w 8007db0 <_svfprintf_r+0x1324> - 8006b3c: 2300 movs r3, #0 - 8006b3e: f04f 32ff mov.w r2, #4294967295 - 8006b42: 4698 mov r8, r3 - 8006b44: 9207 str r2, [sp, #28] - 8006b46: 270a movs r7, #10 - 8006b48: 222b movs r2, #43 ; 0x2b - 8006b4a: 3501 adds r5, #1 - 8006b4c: f88d 307b strb.w r3, [sp, #123] ; 0x7b - 8006b50: 9313 str r3, [sp, #76] ; 0x4c - 8006b52: 462b mov r3, r5 - 8006b54: f813 1b01 ldrb.w r1, [r3], #1 - 8006b58: 910a str r1, [sp, #40] ; 0x28 - 8006b5a: 930e str r3, [sp, #56] ; 0x38 - 8006b5c: 9b0a ldr r3, [sp, #40] ; 0x28 - 8006b5e: 3b20 subs r3, #32 - 8006b60: 2b5a cmp r3, #90 ; 0x5a - 8006b62: f200 85ac bhi.w 80076be <_svfprintf_r+0xc32> - 8006b66: e8df f013 tbh [pc, r3, lsl #1] - 8006b6a: 007e .short 0x007e - 8006b6c: 05aa05aa .word 0x05aa05aa - 8006b70: 05aa0086 .word 0x05aa0086 - 8006b74: 05aa05aa .word 0x05aa05aa - 8006b78: 05aa0065 .word 0x05aa0065 - 8006b7c: 008905aa .word 0x008905aa - 8006b80: 05aa0093 .word 0x05aa0093 - 8006b84: 00960090 .word 0x00960090 - 8006b88: 00b305aa .word 0x00b305aa - 8006b8c: 00b600b6 .word 0x00b600b6 - 8006b90: 00b600b6 .word 0x00b600b6 - 8006b94: 00b600b6 .word 0x00b600b6 - 8006b98: 00b600b6 .word 0x00b600b6 - 8006b9c: 05aa00b6 .word 0x05aa00b6 - 8006ba0: 05aa05aa .word 0x05aa05aa - 8006ba4: 05aa05aa .word 0x05aa05aa - 8006ba8: 05aa05aa .word 0x05aa05aa - 8006bac: 05aa0125 .word 0x05aa0125 - 8006bb0: 00f600e3 .word 0x00f600e3 - 8006bb4: 01250125 .word 0x01250125 - 8006bb8: 05aa0125 .word 0x05aa0125 - 8006bbc: 05aa05aa .word 0x05aa05aa - 8006bc0: 00c605aa .word 0x00c605aa - 8006bc4: 05aa05aa .word 0x05aa05aa - 8006bc8: 05aa0482 .word 0x05aa0482 - 8006bcc: 05aa05aa .word 0x05aa05aa - 8006bd0: 05aa04cd .word 0x05aa04cd - 8006bd4: 05aa04ee .word 0x05aa04ee - 8006bd8: 051005aa .word 0x051005aa - 8006bdc: 05aa05aa .word 0x05aa05aa - 8006be0: 05aa05aa .word 0x05aa05aa - 8006be4: 05aa05aa .word 0x05aa05aa - 8006be8: 05aa05aa .word 0x05aa05aa - 8006bec: 05aa0125 .word 0x05aa0125 - 8006bf0: 00f800e3 .word 0x00f800e3 - 8006bf4: 01250125 .word 0x01250125 - 8006bf8: 00c90125 .word 0x00c90125 - 8006bfc: 00dd00f8 .word 0x00dd00f8 - 8006c00: 00d605aa .word 0x00d605aa - 8006c04: 045d05aa .word 0x045d05aa - 8006c08: 04bb0484 .word 0x04bb0484 - 8006c0c: 05aa00dd .word 0x05aa00dd - 8006c10: 007c04cd .word 0x007c04cd - 8006c14: 05aa04f0 .word 0x05aa04f0 - 8006c18: 052f05aa .word 0x052f05aa - 8006c1c: 007c05aa .word 0x007c05aa - 8006c20: 4659 mov r1, fp - 8006c22: 4648 mov r0, r9 - 8006c24: aa26 add r2, sp, #152 ; 0x98 - 8006c26: f002 fc1c bl 8009462 <__ssprint_r> - 8006c2a: 2800 cmp r0, #0 - 8006c2c: f040 812f bne.w 8006e8e <_svfprintf_r+0x402> - 8006c30: ac29 add r4, sp, #164 ; 0xa4 - 8006c32: e77c b.n 8006b2e <_svfprintf_r+0xa2> - 8006c34: 4648 mov r0, r9 - 8006c36: f002 f883 bl 8008d40 <_localeconv_r> - 8006c3a: 6843 ldr r3, [r0, #4] - 8006c3c: 4618 mov r0, r3 - 8006c3e: 9318 str r3, [sp, #96] ; 0x60 - 8006c40: f7f9 fa90 bl 8000164 - 8006c44: 9015 str r0, [sp, #84] ; 0x54 - 8006c46: 4648 mov r0, r9 - 8006c48: f002 f87a bl 8008d40 <_localeconv_r> - 8006c4c: 6883 ldr r3, [r0, #8] - 8006c4e: 222b movs r2, #43 ; 0x2b - 8006c50: 930d str r3, [sp, #52] ; 0x34 - 8006c52: 9b15 ldr r3, [sp, #84] ; 0x54 - 8006c54: b12b cbz r3, 8006c62 <_svfprintf_r+0x1d6> - 8006c56: 9b0d ldr r3, [sp, #52] ; 0x34 - 8006c58: b11b cbz r3, 8006c62 <_svfprintf_r+0x1d6> - 8006c5a: 781b ldrb r3, [r3, #0] - 8006c5c: b10b cbz r3, 8006c62 <_svfprintf_r+0x1d6> - 8006c5e: f448 6880 orr.w r8, r8, #1024 ; 0x400 - 8006c62: 9d0e ldr r5, [sp, #56] ; 0x38 - 8006c64: e775 b.n 8006b52 <_svfprintf_r+0xc6> - 8006c66: f89d 307b ldrb.w r3, [sp, #123] ; 0x7b - 8006c6a: 2b00 cmp r3, #0 - 8006c6c: d1f9 bne.n 8006c62 <_svfprintf_r+0x1d6> - 8006c6e: 2320 movs r3, #32 - 8006c70: f88d 307b strb.w r3, [sp, #123] ; 0x7b - 8006c74: e7f5 b.n 8006c62 <_svfprintf_r+0x1d6> - 8006c76: f048 0801 orr.w r8, r8, #1 - 8006c7a: e7f2 b.n 8006c62 <_svfprintf_r+0x1d6> - 8006c7c: f856 3b04 ldr.w r3, [r6], #4 - 8006c80: 2b00 cmp r3, #0 - 8006c82: 9313 str r3, [sp, #76] ; 0x4c - 8006c84: daed bge.n 8006c62 <_svfprintf_r+0x1d6> - 8006c86: 425b negs r3, r3 - 8006c88: 9313 str r3, [sp, #76] ; 0x4c - 8006c8a: f048 0804 orr.w r8, r8, #4 - 8006c8e: e7e8 b.n 8006c62 <_svfprintf_r+0x1d6> - 8006c90: f88d 207b strb.w r2, [sp, #123] ; 0x7b - 8006c94: e7e5 b.n 8006c62 <_svfprintf_r+0x1d6> - 8006c96: 9d0e ldr r5, [sp, #56] ; 0x38 - 8006c98: f815 3b01 ldrb.w r3, [r5], #1 - 8006c9c: 2b2a cmp r3, #42 ; 0x2a - 8006c9e: 930a str r3, [sp, #40] ; 0x28 - 8006ca0: d113 bne.n 8006cca <_svfprintf_r+0x23e> - 8006ca2: f856 0b04 ldr.w r0, [r6], #4 - 8006ca6: 950e str r5, [sp, #56] ; 0x38 - 8006ca8: ea40 73e0 orr.w r3, r0, r0, asr #31 - 8006cac: 9307 str r3, [sp, #28] - 8006cae: e7d8 b.n 8006c62 <_svfprintf_r+0x1d6> - 8006cb0: 9907 ldr r1, [sp, #28] - 8006cb2: fb07 3301 mla r3, r7, r1, r3 - 8006cb6: 9307 str r3, [sp, #28] - 8006cb8: f815 3b01 ldrb.w r3, [r5], #1 - 8006cbc: 930a str r3, [sp, #40] ; 0x28 - 8006cbe: 9b0a ldr r3, [sp, #40] ; 0x28 - 8006cc0: 3b30 subs r3, #48 ; 0x30 - 8006cc2: 2b09 cmp r3, #9 - 8006cc4: d9f4 bls.n 8006cb0 <_svfprintf_r+0x224> - 8006cc6: 950e str r5, [sp, #56] ; 0x38 - 8006cc8: e748 b.n 8006b5c <_svfprintf_r+0xd0> - 8006cca: 2300 movs r3, #0 - 8006ccc: 9307 str r3, [sp, #28] - 8006cce: e7f6 b.n 8006cbe <_svfprintf_r+0x232> - 8006cd0: f048 0880 orr.w r8, r8, #128 ; 0x80 - 8006cd4: e7c5 b.n 8006c62 <_svfprintf_r+0x1d6> - 8006cd6: 2300 movs r3, #0 - 8006cd8: 9d0e ldr r5, [sp, #56] ; 0x38 - 8006cda: 9313 str r3, [sp, #76] ; 0x4c - 8006cdc: 9b0a ldr r3, [sp, #40] ; 0x28 - 8006cde: 9913 ldr r1, [sp, #76] ; 0x4c - 8006ce0: 3b30 subs r3, #48 ; 0x30 - 8006ce2: fb07 3301 mla r3, r7, r1, r3 - 8006ce6: 9313 str r3, [sp, #76] ; 0x4c - 8006ce8: f815 3b01 ldrb.w r3, [r5], #1 - 8006cec: 930a str r3, [sp, #40] ; 0x28 - 8006cee: 3b30 subs r3, #48 ; 0x30 - 8006cf0: 2b09 cmp r3, #9 - 8006cf2: d9f3 bls.n 8006cdc <_svfprintf_r+0x250> - 8006cf4: e7e7 b.n 8006cc6 <_svfprintf_r+0x23a> - 8006cf6: f048 0808 orr.w r8, r8, #8 - 8006cfa: e7b2 b.n 8006c62 <_svfprintf_r+0x1d6> - 8006cfc: 9b0e ldr r3, [sp, #56] ; 0x38 - 8006cfe: 781b ldrb r3, [r3, #0] - 8006d00: 2b68 cmp r3, #104 ; 0x68 - 8006d02: bf01 itttt eq - 8006d04: 9b0e ldreq r3, [sp, #56] ; 0x38 - 8006d06: f448 7800 orreq.w r8, r8, #512 ; 0x200 - 8006d0a: 3301 addeq r3, #1 - 8006d0c: 930e streq r3, [sp, #56] ; 0x38 - 8006d0e: bf18 it ne - 8006d10: f048 0840 orrne.w r8, r8, #64 ; 0x40 - 8006d14: e7a5 b.n 8006c62 <_svfprintf_r+0x1d6> - 8006d16: 9b0e ldr r3, [sp, #56] ; 0x38 - 8006d18: 781b ldrb r3, [r3, #0] - 8006d1a: 2b6c cmp r3, #108 ; 0x6c - 8006d1c: d105 bne.n 8006d2a <_svfprintf_r+0x29e> - 8006d1e: 9b0e ldr r3, [sp, #56] ; 0x38 - 8006d20: 3301 adds r3, #1 - 8006d22: 930e str r3, [sp, #56] ; 0x38 - 8006d24: f048 0820 orr.w r8, r8, #32 - 8006d28: e79b b.n 8006c62 <_svfprintf_r+0x1d6> - 8006d2a: f048 0810 orr.w r8, r8, #16 - 8006d2e: e798 b.n 8006c62 <_svfprintf_r+0x1d6> - 8006d30: 4632 mov r2, r6 - 8006d32: 2000 movs r0, #0 - 8006d34: f852 3b04 ldr.w r3, [r2], #4 - 8006d38: f88d 007b strb.w r0, [sp, #123] ; 0x7b - 8006d3c: 920b str r2, [sp, #44] ; 0x2c - 8006d3e: f88d 30e4 strb.w r3, [sp, #228] ; 0xe4 - 8006d42: 2301 movs r3, #1 - 8006d44: 4607 mov r7, r0 - 8006d46: 4606 mov r6, r0 - 8006d48: 4605 mov r5, r0 - 8006d4a: 9008 str r0, [sp, #32] - 8006d4c: 9307 str r3, [sp, #28] - 8006d4e: 900c str r0, [sp, #48] ; 0x30 - 8006d50: f10d 0ae4 add.w sl, sp, #228 ; 0xe4 - 8006d54: e1b0 b.n 80070b8 <_svfprintf_r+0x62c> - 8006d56: f048 0810 orr.w r8, r8, #16 - 8006d5a: f018 0f20 tst.w r8, #32 - 8006d5e: d011 beq.n 8006d84 <_svfprintf_r+0x2f8> - 8006d60: 1df3 adds r3, r6, #7 - 8006d62: f023 0307 bic.w r3, r3, #7 - 8006d66: 461a mov r2, r3 - 8006d68: f852 6b08 ldr.w r6, [r2], #8 - 8006d6c: 685f ldr r7, [r3, #4] - 8006d6e: 920b str r2, [sp, #44] ; 0x2c - 8006d70: 2f00 cmp r7, #0 - 8006d72: da05 bge.n 8006d80 <_svfprintf_r+0x2f4> - 8006d74: 232d movs r3, #45 ; 0x2d - 8006d76: 4276 negs r6, r6 - 8006d78: eb67 0747 sbc.w r7, r7, r7, lsl #1 - 8006d7c: f88d 307b strb.w r3, [sp, #123] ; 0x7b - 8006d80: 2301 movs r3, #1 - 8006d82: e387 b.n 8007494 <_svfprintf_r+0xa08> - 8006d84: 4633 mov r3, r6 - 8006d86: f853 7b04 ldr.w r7, [r3], #4 - 8006d8a: f018 0f10 tst.w r8, #16 - 8006d8e: 930b str r3, [sp, #44] ; 0x2c - 8006d90: d002 beq.n 8006d98 <_svfprintf_r+0x30c> - 8006d92: 463e mov r6, r7 - 8006d94: 17ff asrs r7, r7, #31 - 8006d96: e7eb b.n 8006d70 <_svfprintf_r+0x2e4> - 8006d98: f018 0f40 tst.w r8, #64 ; 0x40 - 8006d9c: d003 beq.n 8006da6 <_svfprintf_r+0x31a> - 8006d9e: b23e sxth r6, r7 - 8006da0: f347 37c0 sbfx r7, r7, #15, #1 - 8006da4: e7e4 b.n 8006d70 <_svfprintf_r+0x2e4> - 8006da6: f418 7f00 tst.w r8, #512 ; 0x200 - 8006daa: d0f2 beq.n 8006d92 <_svfprintf_r+0x306> - 8006dac: b27e sxtb r6, r7 - 8006dae: f347 17c0 sbfx r7, r7, #7, #1 - 8006db2: e7dd b.n 8006d70 <_svfprintf_r+0x2e4> - 8006db4: 3607 adds r6, #7 - 8006db6: f026 0307 bic.w r3, r6, #7 - 8006dba: 4619 mov r1, r3 - 8006dbc: e8f1 2302 ldrd r2, r3, [r1], #8 - 8006dc0: e9cd 2310 strd r2, r3, [sp, #64] ; 0x40 - 8006dc4: e9dd 6310 ldrd r6, r3, [sp, #64] ; 0x40 - 8006dc8: f023 4500 bic.w r5, r3, #2147483648 ; 0x80000000 - 8006dcc: 910b str r1, [sp, #44] ; 0x2c - 8006dce: f04f 32ff mov.w r2, #4294967295 - 8006dd2: 4630 mov r0, r6 - 8006dd4: 4629 mov r1, r5 - 8006dd6: 4b3a ldr r3, [pc, #232] ; (8006ec0 <_svfprintf_r+0x434>) - 8006dd8: f7f9 fe22 bl 8000a20 <__aeabi_dcmpun> - 8006ddc: bb18 cbnz r0, 8006e26 <_svfprintf_r+0x39a> - 8006dde: f04f 32ff mov.w r2, #4294967295 - 8006de2: 4630 mov r0, r6 - 8006de4: 4629 mov r1, r5 - 8006de6: 4b36 ldr r3, [pc, #216] ; (8006ec0 <_svfprintf_r+0x434>) - 8006de8: f7f9 fdfc bl 80009e4 <__aeabi_dcmple> - 8006dec: b9d8 cbnz r0, 8006e26 <_svfprintf_r+0x39a> - 8006dee: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 - 8006df2: 2200 movs r2, #0 - 8006df4: 2300 movs r3, #0 - 8006df6: f7f9 fdeb bl 80009d0 <__aeabi_dcmplt> - 8006dfa: b110 cbz r0, 8006e02 <_svfprintf_r+0x376> - 8006dfc: 232d movs r3, #45 ; 0x2d - 8006dfe: f88d 307b strb.w r3, [sp, #123] ; 0x7b - 8006e02: 4a30 ldr r2, [pc, #192] ; (8006ec4 <_svfprintf_r+0x438>) - 8006e04: 4830 ldr r0, [pc, #192] ; (8006ec8 <_svfprintf_r+0x43c>) - 8006e06: 9b0a ldr r3, [sp, #40] ; 0x28 - 8006e08: 2100 movs r1, #0 - 8006e0a: 2b47 cmp r3, #71 ; 0x47 - 8006e0c: bfd4 ite le - 8006e0e: 4692 movle sl, r2 - 8006e10: 4682 movgt sl, r0 - 8006e12: 2303 movs r3, #3 - 8006e14: e9cd 3107 strd r3, r1, [sp, #28] - 8006e18: f028 0880 bic.w r8, r8, #128 ; 0x80 - 8006e1c: 2700 movs r7, #0 - 8006e1e: 463e mov r6, r7 - 8006e20: 463b mov r3, r7 - 8006e22: f000 bfff b.w 8007e24 <_svfprintf_r+0x1398> - 8006e26: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 - 8006e2a: 4610 mov r0, r2 - 8006e2c: 4619 mov r1, r3 - 8006e2e: f7f9 fdf7 bl 8000a20 <__aeabi_dcmpun> - 8006e32: b148 cbz r0, 8006e48 <_svfprintf_r+0x3bc> - 8006e34: 9b11 ldr r3, [sp, #68] ; 0x44 - 8006e36: 4a25 ldr r2, [pc, #148] ; (8006ecc <_svfprintf_r+0x440>) - 8006e38: 2b00 cmp r3, #0 - 8006e3a: bfb8 it lt - 8006e3c: 232d movlt r3, #45 ; 0x2d - 8006e3e: 4824 ldr r0, [pc, #144] ; (8006ed0 <_svfprintf_r+0x444>) - 8006e40: bfb8 it lt - 8006e42: f88d 307b strblt.w r3, [sp, #123] ; 0x7b - 8006e46: e7de b.n 8006e06 <_svfprintf_r+0x37a> - 8006e48: 9b0a ldr r3, [sp, #40] ; 0x28 - 8006e4a: f023 0320 bic.w r3, r3, #32 - 8006e4e: 2b41 cmp r3, #65 ; 0x41 - 8006e50: 930c str r3, [sp, #48] ; 0x30 - 8006e52: d125 bne.n 8006ea0 <_svfprintf_r+0x414> - 8006e54: 2330 movs r3, #48 ; 0x30 - 8006e56: f88d 307c strb.w r3, [sp, #124] ; 0x7c - 8006e5a: 9b0a ldr r3, [sp, #40] ; 0x28 - 8006e5c: f048 0802 orr.w r8, r8, #2 - 8006e60: 2b61 cmp r3, #97 ; 0x61 - 8006e62: bf0c ite eq - 8006e64: 2378 moveq r3, #120 ; 0x78 - 8006e66: 2358 movne r3, #88 ; 0x58 - 8006e68: f88d 307d strb.w r3, [sp, #125] ; 0x7d - 8006e6c: 9b07 ldr r3, [sp, #28] - 8006e6e: 2b63 cmp r3, #99 ; 0x63 - 8006e70: dd30 ble.n 8006ed4 <_svfprintf_r+0x448> - 8006e72: 4648 mov r0, r9 - 8006e74: 1c59 adds r1, r3, #1 - 8006e76: f7ff fa93 bl 80063a0 <_malloc_r> - 8006e7a: 4682 mov sl, r0 - 8006e7c: 2800 cmp r0, #0 - 8006e7e: f040 81f7 bne.w 8007270 <_svfprintf_r+0x7e4> - 8006e82: f8bb 300c ldrh.w r3, [fp, #12] - 8006e86: f043 0340 orr.w r3, r3, #64 ; 0x40 - 8006e8a: f8ab 300c strh.w r3, [fp, #12] - 8006e8e: f8bb 300c ldrh.w r3, [fp, #12] - 8006e92: f013 0f40 tst.w r3, #64 ; 0x40 - 8006e96: 9b0f ldr r3, [sp, #60] ; 0x3c - 8006e98: bf18 it ne - 8006e9a: f04f 33ff movne.w r3, #4294967295 - 8006e9e: e619 b.n 8006ad4 <_svfprintf_r+0x48> - 8006ea0: 9b07 ldr r3, [sp, #28] - 8006ea2: 3301 adds r3, #1 - 8006ea4: f000 81e6 beq.w 8007274 <_svfprintf_r+0x7e8> - 8006ea8: 9b0c ldr r3, [sp, #48] ; 0x30 - 8006eaa: 2b47 cmp r3, #71 ; 0x47 - 8006eac: f040 81e5 bne.w 800727a <_svfprintf_r+0x7ee> - 8006eb0: 9b07 ldr r3, [sp, #28] - 8006eb2: 2b00 cmp r3, #0 - 8006eb4: f040 81e1 bne.w 800727a <_svfprintf_r+0x7ee> - 8006eb8: 9308 str r3, [sp, #32] - 8006eba: 2301 movs r3, #1 - 8006ebc: 9307 str r3, [sp, #28] - 8006ebe: e00c b.n 8006eda <_svfprintf_r+0x44e> - 8006ec0: 7fefffff .word 0x7fefffff - 8006ec4: 0800b0e0 .word 0x0800b0e0 - 8006ec8: 0800b0e4 .word 0x0800b0e4 - 8006ecc: 0800b0e8 .word 0x0800b0e8 - 8006ed0: 0800b0ec .word 0x0800b0ec - 8006ed4: 9008 str r0, [sp, #32] - 8006ed6: f10d 0ae4 add.w sl, sp, #228 ; 0xe4 - 8006eda: f448 7380 orr.w r3, r8, #256 ; 0x100 - 8006ede: 9314 str r3, [sp, #80] ; 0x50 - 8006ee0: e9dd 7310 ldrd r7, r3, [sp, #64] ; 0x40 - 8006ee4: 1e1d subs r5, r3, #0 - 8006ee6: bfae itee ge - 8006ee8: 2300 movge r3, #0 - 8006eea: f103 4500 addlt.w r5, r3, #2147483648 ; 0x80000000 - 8006eee: 232d movlt r3, #45 ; 0x2d - 8006ef0: 931c str r3, [sp, #112] ; 0x70 - 8006ef2: 9b0c ldr r3, [sp, #48] ; 0x30 - 8006ef4: 2b41 cmp r3, #65 ; 0x41 - 8006ef6: f040 81d8 bne.w 80072aa <_svfprintf_r+0x81e> - 8006efa: 4638 mov r0, r7 - 8006efc: aa20 add r2, sp, #128 ; 0x80 - 8006efe: 4629 mov r1, r5 - 8006f00: f002 fa68 bl 80093d4 - 8006f04: 2200 movs r2, #0 - 8006f06: f04f 537f mov.w r3, #1069547520 ; 0x3fc00000 - 8006f0a: f7f9 faef bl 80004ec <__aeabi_dmul> - 8006f0e: 2200 movs r2, #0 - 8006f10: 2300 movs r3, #0 - 8006f12: 4606 mov r6, r0 - 8006f14: 460f mov r7, r1 - 8006f16: f7f9 fd51 bl 80009bc <__aeabi_dcmpeq> - 8006f1a: b108 cbz r0, 8006f20 <_svfprintf_r+0x494> - 8006f1c: 2301 movs r3, #1 - 8006f1e: 9320 str r3, [sp, #128] ; 0x80 - 8006f20: 4bad ldr r3, [pc, #692] ; (80071d8 <_svfprintf_r+0x74c>) - 8006f22: 4aae ldr r2, [pc, #696] ; (80071dc <_svfprintf_r+0x750>) - 8006f24: 990a ldr r1, [sp, #40] ; 0x28 - 8006f26: 4655 mov r5, sl - 8006f28: 2961 cmp r1, #97 ; 0x61 - 8006f2a: bf18 it ne - 8006f2c: 461a movne r2, r3 - 8006f2e: 9b07 ldr r3, [sp, #28] - 8006f30: 921b str r2, [sp, #108] ; 0x6c - 8006f32: 3b01 subs r3, #1 - 8006f34: 9309 str r3, [sp, #36] ; 0x24 - 8006f36: 2200 movs r2, #0 - 8006f38: 4ba9 ldr r3, [pc, #676] ; (80071e0 <_svfprintf_r+0x754>) - 8006f3a: 4630 mov r0, r6 - 8006f3c: 4639 mov r1, r7 - 8006f3e: f7f9 fad5 bl 80004ec <__aeabi_dmul> - 8006f42: 460f mov r7, r1 - 8006f44: 4606 mov r6, r0 - 8006f46: f7f9 fd81 bl 8000a4c <__aeabi_d2iz> - 8006f4a: 901d str r0, [sp, #116] ; 0x74 - 8006f4c: f7f9 fa64 bl 8000418 <__aeabi_i2d> - 8006f50: 4602 mov r2, r0 - 8006f52: 460b mov r3, r1 - 8006f54: 4630 mov r0, r6 - 8006f56: 4639 mov r1, r7 - 8006f58: f7f9 f910 bl 800017c <__aeabi_dsub> - 8006f5c: 9a1d ldr r2, [sp, #116] ; 0x74 - 8006f5e: 9b1b ldr r3, [sp, #108] ; 0x6c - 8006f60: 4606 mov r6, r0 - 8006f62: 5c9b ldrb r3, [r3, r2] - 8006f64: 460f mov r7, r1 - 8006f66: f805 3b01 strb.w r3, [r5], #1 - 8006f6a: 9b09 ldr r3, [sp, #36] ; 0x24 - 8006f6c: 1c5a adds r2, r3, #1 - 8006f6e: 9316 str r3, [sp, #88] ; 0x58 - 8006f70: d007 beq.n 8006f82 <_svfprintf_r+0x4f6> - 8006f72: 3b01 subs r3, #1 - 8006f74: 9309 str r3, [sp, #36] ; 0x24 - 8006f76: 2200 movs r2, #0 - 8006f78: 2300 movs r3, #0 - 8006f7a: f7f9 fd1f bl 80009bc <__aeabi_dcmpeq> - 8006f7e: 2800 cmp r0, #0 - 8006f80: d0d9 beq.n 8006f36 <_svfprintf_r+0x4aa> - 8006f82: 2200 movs r2, #0 - 8006f84: 4630 mov r0, r6 - 8006f86: 4639 mov r1, r7 - 8006f88: 4b96 ldr r3, [pc, #600] ; (80071e4 <_svfprintf_r+0x758>) - 8006f8a: f7f9 fd3f bl 8000a0c <__aeabi_dcmpgt> - 8006f8e: b960 cbnz r0, 8006faa <_svfprintf_r+0x51e> - 8006f90: 2200 movs r2, #0 - 8006f92: 4630 mov r0, r6 - 8006f94: 4639 mov r1, r7 - 8006f96: 4b93 ldr r3, [pc, #588] ; (80071e4 <_svfprintf_r+0x758>) - 8006f98: f7f9 fd10 bl 80009bc <__aeabi_dcmpeq> - 8006f9c: 2800 cmp r0, #0 - 8006f9e: f000 817f beq.w 80072a0 <_svfprintf_r+0x814> - 8006fa2: 9b1d ldr r3, [sp, #116] ; 0x74 - 8006fa4: 07db lsls r3, r3, #31 - 8006fa6: f140 817b bpl.w 80072a0 <_svfprintf_r+0x814> - 8006faa: 2030 movs r0, #48 ; 0x30 - 8006fac: 9b1b ldr r3, [sp, #108] ; 0x6c - 8006fae: 9524 str r5, [sp, #144] ; 0x90 - 8006fb0: 7bd9 ldrb r1, [r3, #15] - 8006fb2: 9a24 ldr r2, [sp, #144] ; 0x90 - 8006fb4: 1e53 subs r3, r2, #1 - 8006fb6: 9324 str r3, [sp, #144] ; 0x90 - 8006fb8: f812 3c01 ldrb.w r3, [r2, #-1] - 8006fbc: 428b cmp r3, r1 - 8006fbe: f000 815e beq.w 800727e <_svfprintf_r+0x7f2> - 8006fc2: 2b39 cmp r3, #57 ; 0x39 - 8006fc4: bf0b itete eq - 8006fc6: 9b1b ldreq r3, [sp, #108] ; 0x6c - 8006fc8: 3301 addne r3, #1 - 8006fca: 7a9b ldrbeq r3, [r3, #10] - 8006fcc: b2db uxtbne r3, r3 - 8006fce: f802 3c01 strb.w r3, [r2, #-1] - 8006fd2: eba5 030a sub.w r3, r5, sl - 8006fd6: 9309 str r3, [sp, #36] ; 0x24 - 8006fd8: 9b0c ldr r3, [sp, #48] ; 0x30 - 8006fda: 9d20 ldr r5, [sp, #128] ; 0x80 - 8006fdc: 2b47 cmp r3, #71 ; 0x47 - 8006fde: f040 81b1 bne.w 8007344 <_svfprintf_r+0x8b8> - 8006fe2: 1cef adds r7, r5, #3 - 8006fe4: db03 blt.n 8006fee <_svfprintf_r+0x562> - 8006fe6: 9b07 ldr r3, [sp, #28] - 8006fe8: 42ab cmp r3, r5 - 8006fea: f280 81d6 bge.w 800739a <_svfprintf_r+0x90e> - 8006fee: 9b0a ldr r3, [sp, #40] ; 0x28 - 8006ff0: 3b02 subs r3, #2 - 8006ff2: 930a str r3, [sp, #40] ; 0x28 - 8006ff4: 990a ldr r1, [sp, #40] ; 0x28 - 8006ff6: f89d 2028 ldrb.w r2, [sp, #40] ; 0x28 - 8006ffa: f021 0120 bic.w r1, r1, #32 - 8006ffe: 2941 cmp r1, #65 ; 0x41 - 8007000: bf08 it eq - 8007002: 320f addeq r2, #15 - 8007004: f105 33ff add.w r3, r5, #4294967295 - 8007008: bf06 itte eq - 800700a: b2d2 uxtbeq r2, r2 - 800700c: 2101 moveq r1, #1 - 800700e: 2100 movne r1, #0 - 8007010: 2b00 cmp r3, #0 - 8007012: f88d 2088 strb.w r2, [sp, #136] ; 0x88 - 8007016: bfb4 ite lt - 8007018: 222d movlt r2, #45 ; 0x2d - 800701a: 222b movge r2, #43 ; 0x2b - 800701c: 9320 str r3, [sp, #128] ; 0x80 - 800701e: bfb8 it lt - 8007020: f1c5 0301 rsblt r3, r5, #1 - 8007024: 2b09 cmp r3, #9 - 8007026: f88d 2089 strb.w r2, [sp, #137] ; 0x89 - 800702a: f340 81a4 ble.w 8007376 <_svfprintf_r+0x8ea> - 800702e: 260a movs r6, #10 - 8007030: f10d 0297 add.w r2, sp, #151 ; 0x97 - 8007034: fb93 f5f6 sdiv r5, r3, r6 - 8007038: 4611 mov r1, r2 - 800703a: fb06 3015 mls r0, r6, r5, r3 - 800703e: 3030 adds r0, #48 ; 0x30 - 8007040: f801 0c01 strb.w r0, [r1, #-1] - 8007044: 4618 mov r0, r3 - 8007046: 2863 cmp r0, #99 ; 0x63 - 8007048: 462b mov r3, r5 - 800704a: f102 32ff add.w r2, r2, #4294967295 - 800704e: dcf1 bgt.n 8007034 <_svfprintf_r+0x5a8> - 8007050: 3330 adds r3, #48 ; 0x30 - 8007052: 1e88 subs r0, r1, #2 - 8007054: f802 3c01 strb.w r3, [r2, #-1] - 8007058: 4603 mov r3, r0 - 800705a: f10d 028a add.w r2, sp, #138 ; 0x8a - 800705e: f10d 0597 add.w r5, sp, #151 ; 0x97 - 8007062: 42ab cmp r3, r5 - 8007064: f0c0 8182 bcc.w 800736c <_svfprintf_r+0x8e0> - 8007068: f10d 0299 add.w r2, sp, #153 ; 0x99 - 800706c: 1a52 subs r2, r2, r1 - 800706e: 42a8 cmp r0, r5 - 8007070: bf88 it hi - 8007072: 2200 movhi r2, #0 - 8007074: f10d 038a add.w r3, sp, #138 ; 0x8a - 8007078: 441a add r2, r3 - 800707a: ab22 add r3, sp, #136 ; 0x88 - 800707c: 1ad3 subs r3, r2, r3 - 800707e: 9a09 ldr r2, [sp, #36] ; 0x24 - 8007080: 9319 str r3, [sp, #100] ; 0x64 - 8007082: 2a01 cmp r2, #1 - 8007084: 4413 add r3, r2 - 8007086: 9307 str r3, [sp, #28] - 8007088: dc02 bgt.n 8007090 <_svfprintf_r+0x604> - 800708a: f018 0f01 tst.w r8, #1 - 800708e: d003 beq.n 8007098 <_svfprintf_r+0x60c> - 8007090: 9b07 ldr r3, [sp, #28] - 8007092: 9a12 ldr r2, [sp, #72] ; 0x48 - 8007094: 4413 add r3, r2 - 8007096: 9307 str r3, [sp, #28] - 8007098: 2600 movs r6, #0 - 800709a: 4635 mov r5, r6 - 800709c: f428 6380 bic.w r3, r8, #1024 ; 0x400 - 80070a0: f443 7380 orr.w r3, r3, #256 ; 0x100 - 80070a4: 9314 str r3, [sp, #80] ; 0x50 - 80070a6: 960c str r6, [sp, #48] ; 0x30 - 80070a8: 9b1c ldr r3, [sp, #112] ; 0x70 - 80070aa: b113 cbz r3, 80070b2 <_svfprintf_r+0x626> - 80070ac: 232d movs r3, #45 ; 0x2d - 80070ae: f88d 307b strb.w r3, [sp, #123] ; 0x7b - 80070b2: 2700 movs r7, #0 - 80070b4: f8dd 8050 ldr.w r8, [sp, #80] ; 0x50 - 80070b8: 9b07 ldr r3, [sp, #28] - 80070ba: 42bb cmp r3, r7 - 80070bc: bfb8 it lt - 80070be: 463b movlt r3, r7 - 80070c0: 9314 str r3, [sp, #80] ; 0x50 - 80070c2: f89d 307b ldrb.w r3, [sp, #123] ; 0x7b - 80070c6: b113 cbz r3, 80070ce <_svfprintf_r+0x642> - 80070c8: 9b14 ldr r3, [sp, #80] ; 0x50 - 80070ca: 3301 adds r3, #1 - 80070cc: 9314 str r3, [sp, #80] ; 0x50 - 80070ce: f018 0302 ands.w r3, r8, #2 - 80070d2: 931b str r3, [sp, #108] ; 0x6c - 80070d4: bf1e ittt ne - 80070d6: 9b14 ldrne r3, [sp, #80] ; 0x50 - 80070d8: 3302 addne r3, #2 - 80070da: 9314 strne r3, [sp, #80] ; 0x50 - 80070dc: f018 0384 ands.w r3, r8, #132 ; 0x84 - 80070e0: 931c str r3, [sp, #112] ; 0x70 - 80070e2: d121 bne.n 8007128 <_svfprintf_r+0x69c> - 80070e4: e9dd 3213 ldrd r3, r2, [sp, #76] ; 0x4c - 80070e8: 1a9b subs r3, r3, r2 - 80070ea: 2b00 cmp r3, #0 - 80070ec: 9316 str r3, [sp, #88] ; 0x58 - 80070ee: dd1b ble.n 8007128 <_svfprintf_r+0x69c> - 80070f0: e9dd 2327 ldrd r2, r3, [sp, #156] ; 0x9c - 80070f4: 9816 ldr r0, [sp, #88] ; 0x58 - 80070f6: 3201 adds r2, #1 - 80070f8: 2810 cmp r0, #16 - 80070fa: 483b ldr r0, [pc, #236] ; (80071e8 <_svfprintf_r+0x75c>) - 80070fc: f104 0108 add.w r1, r4, #8 - 8007100: 6020 str r0, [r4, #0] - 8007102: f300 82eb bgt.w 80076dc <_svfprintf_r+0xc50> - 8007106: 9816 ldr r0, [sp, #88] ; 0x58 - 8007108: 2a07 cmp r2, #7 - 800710a: 4403 add r3, r0 - 800710c: e9cd 2327 strd r2, r3, [sp, #156] ; 0x9c - 8007110: 6060 str r0, [r4, #4] - 8007112: f340 82f8 ble.w 8007706 <_svfprintf_r+0xc7a> - 8007116: 4659 mov r1, fp - 8007118: 4648 mov r0, r9 - 800711a: aa26 add r2, sp, #152 ; 0x98 - 800711c: f002 f9a1 bl 8009462 <__ssprint_r> - 8007120: 2800 cmp r0, #0 - 8007122: f040 8623 bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007126: ac29 add r4, sp, #164 ; 0xa4 - 8007128: f89d 307b ldrb.w r3, [sp, #123] ; 0x7b - 800712c: b173 cbz r3, 800714c <_svfprintf_r+0x6c0> - 800712e: f10d 037b add.w r3, sp, #123 ; 0x7b - 8007132: 6023 str r3, [r4, #0] - 8007134: 2301 movs r3, #1 - 8007136: 6063 str r3, [r4, #4] - 8007138: 9b28 ldr r3, [sp, #160] ; 0xa0 - 800713a: 3301 adds r3, #1 - 800713c: 9328 str r3, [sp, #160] ; 0xa0 - 800713e: 9b27 ldr r3, [sp, #156] ; 0x9c - 8007140: 3301 adds r3, #1 - 8007142: 2b07 cmp r3, #7 - 8007144: 9327 str r3, [sp, #156] ; 0x9c - 8007146: f300 82e0 bgt.w 800770a <_svfprintf_r+0xc7e> - 800714a: 3408 adds r4, #8 - 800714c: 9b1b ldr r3, [sp, #108] ; 0x6c - 800714e: b16b cbz r3, 800716c <_svfprintf_r+0x6e0> - 8007150: ab1f add r3, sp, #124 ; 0x7c - 8007152: 6023 str r3, [r4, #0] - 8007154: 2302 movs r3, #2 - 8007156: 6063 str r3, [r4, #4] - 8007158: 9b28 ldr r3, [sp, #160] ; 0xa0 - 800715a: 3302 adds r3, #2 - 800715c: 9328 str r3, [sp, #160] ; 0xa0 - 800715e: 9b27 ldr r3, [sp, #156] ; 0x9c - 8007160: 3301 adds r3, #1 - 8007162: 2b07 cmp r3, #7 - 8007164: 9327 str r3, [sp, #156] ; 0x9c - 8007166: f300 82da bgt.w 800771e <_svfprintf_r+0xc92> - 800716a: 3408 adds r4, #8 - 800716c: 9b1c ldr r3, [sp, #112] ; 0x70 - 800716e: 2b80 cmp r3, #128 ; 0x80 - 8007170: d121 bne.n 80071b6 <_svfprintf_r+0x72a> - 8007172: e9dd 3213 ldrd r3, r2, [sp, #76] ; 0x4c - 8007176: 1a9b subs r3, r3, r2 - 8007178: 2b00 cmp r3, #0 - 800717a: 9316 str r3, [sp, #88] ; 0x58 - 800717c: dd1b ble.n 80071b6 <_svfprintf_r+0x72a> - 800717e: e9dd 2327 ldrd r2, r3, [sp, #156] ; 0x9c - 8007182: 9816 ldr r0, [sp, #88] ; 0x58 - 8007184: 3201 adds r2, #1 - 8007186: 2810 cmp r0, #16 - 8007188: 4818 ldr r0, [pc, #96] ; (80071ec <_svfprintf_r+0x760>) - 800718a: f104 0108 add.w r1, r4, #8 - 800718e: 6020 str r0, [r4, #0] - 8007190: f300 82cf bgt.w 8007732 <_svfprintf_r+0xca6> - 8007194: 9816 ldr r0, [sp, #88] ; 0x58 - 8007196: 2a07 cmp r2, #7 - 8007198: 4403 add r3, r0 - 800719a: e9cd 2327 strd r2, r3, [sp, #156] ; 0x9c - 800719e: 6060 str r0, [r4, #4] - 80071a0: f340 82dc ble.w 800775c <_svfprintf_r+0xcd0> - 80071a4: 4659 mov r1, fp - 80071a6: 4648 mov r0, r9 - 80071a8: aa26 add r2, sp, #152 ; 0x98 - 80071aa: f002 f95a bl 8009462 <__ssprint_r> - 80071ae: 2800 cmp r0, #0 - 80071b0: f040 85dc bne.w 8007d6c <_svfprintf_r+0x12e0> - 80071b4: ac29 add r4, sp, #164 ; 0xa4 - 80071b6: 9b07 ldr r3, [sp, #28] - 80071b8: 1aff subs r7, r7, r3 - 80071ba: 2f00 cmp r7, #0 - 80071bc: dd28 ble.n 8007210 <_svfprintf_r+0x784> - 80071be: e9dd 3227 ldrd r3, r2, [sp, #156] ; 0x9c - 80071c2: 480a ldr r0, [pc, #40] ; (80071ec <_svfprintf_r+0x760>) - 80071c4: 2f10 cmp r7, #16 - 80071c6: f103 0301 add.w r3, r3, #1 - 80071ca: f104 0108 add.w r1, r4, #8 - 80071ce: 6020 str r0, [r4, #0] - 80071d0: f300 82c6 bgt.w 8007760 <_svfprintf_r+0xcd4> - 80071d4: e00c b.n 80071f0 <_svfprintf_r+0x764> - 80071d6: bf00 nop - 80071d8: 0800b101 .word 0x0800b101 - 80071dc: 0800b0f0 .word 0x0800b0f0 - 80071e0: 40300000 .word 0x40300000 - 80071e4: 3fe00000 .word 0x3fe00000 - 80071e8: 0800b114 .word 0x0800b114 - 80071ec: 0800b124 .word 0x0800b124 - 80071f0: 6067 str r7, [r4, #4] - 80071f2: 2b07 cmp r3, #7 - 80071f4: 4417 add r7, r2 - 80071f6: e9cd 3727 strd r3, r7, [sp, #156] ; 0x9c - 80071fa: f340 82c4 ble.w 8007786 <_svfprintf_r+0xcfa> - 80071fe: 4659 mov r1, fp - 8007200: 4648 mov r0, r9 - 8007202: aa26 add r2, sp, #152 ; 0x98 - 8007204: f002 f92d bl 8009462 <__ssprint_r> - 8007208: 2800 cmp r0, #0 - 800720a: f040 85af bne.w 8007d6c <_svfprintf_r+0x12e0> - 800720e: ac29 add r4, sp, #164 ; 0xa4 - 8007210: f418 7f80 tst.w r8, #256 ; 0x100 - 8007214: 9f28 ldr r7, [sp, #160] ; 0xa0 - 8007216: f040 82bd bne.w 8007794 <_svfprintf_r+0xd08> - 800721a: 9b07 ldr r3, [sp, #28] - 800721c: f8c4 a000 str.w sl, [r4] - 8007220: 441f add r7, r3 - 8007222: 6063 str r3, [r4, #4] - 8007224: 9728 str r7, [sp, #160] ; 0xa0 - 8007226: 9b27 ldr r3, [sp, #156] ; 0x9c - 8007228: 3301 adds r3, #1 - 800722a: 2b07 cmp r3, #7 - 800722c: 9327 str r3, [sp, #156] ; 0x9c - 800722e: f300 82f6 bgt.w 800781e <_svfprintf_r+0xd92> - 8007232: 3408 adds r4, #8 - 8007234: f018 0f04 tst.w r8, #4 - 8007238: f040 857a bne.w 8007d30 <_svfprintf_r+0x12a4> - 800723c: e9dd 2113 ldrd r2, r1, [sp, #76] ; 0x4c - 8007240: 9b0f ldr r3, [sp, #60] ; 0x3c - 8007242: 428a cmp r2, r1 - 8007244: bfac ite ge - 8007246: 189b addge r3, r3, r2 - 8007248: 185b addlt r3, r3, r1 - 800724a: 930f str r3, [sp, #60] ; 0x3c - 800724c: 9b28 ldr r3, [sp, #160] ; 0xa0 - 800724e: b13b cbz r3, 8007260 <_svfprintf_r+0x7d4> - 8007250: 4659 mov r1, fp - 8007252: 4648 mov r0, r9 - 8007254: aa26 add r2, sp, #152 ; 0x98 - 8007256: f002 f904 bl 8009462 <__ssprint_r> - 800725a: 2800 cmp r0, #0 - 800725c: f040 8586 bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007260: 2300 movs r3, #0 - 8007262: 9327 str r3, [sp, #156] ; 0x9c - 8007264: 9b08 ldr r3, [sp, #32] - 8007266: 2b00 cmp r3, #0 - 8007268: f040 859c bne.w 8007da4 <_svfprintf_r+0x1318> - 800726c: ac29 add r4, sp, #164 ; 0xa4 - 800726e: e0e4 b.n 800743a <_svfprintf_r+0x9ae> - 8007270: 9008 str r0, [sp, #32] - 8007272: e632 b.n 8006eda <_svfprintf_r+0x44e> - 8007274: 2306 movs r3, #6 - 8007276: 9008 str r0, [sp, #32] - 8007278: e620 b.n 8006ebc <_svfprintf_r+0x430> - 800727a: 9008 str r0, [sp, #32] - 800727c: e62d b.n 8006eda <_svfprintf_r+0x44e> - 800727e: f802 0c01 strb.w r0, [r2, #-1] - 8007282: e696 b.n 8006fb2 <_svfprintf_r+0x526> - 8007284: f803 0b01 strb.w r0, [r3], #1 - 8007288: 1aca subs r2, r1, r3 - 800728a: 2a00 cmp r2, #0 - 800728c: dafa bge.n 8007284 <_svfprintf_r+0x7f8> - 800728e: 9a16 ldr r2, [sp, #88] ; 0x58 - 8007290: 9b16 ldr r3, [sp, #88] ; 0x58 - 8007292: 3201 adds r2, #1 - 8007294: f103 0301 add.w r3, r3, #1 - 8007298: bfb8 it lt - 800729a: 2300 movlt r3, #0 - 800729c: 441d add r5, r3 - 800729e: e698 b.n 8006fd2 <_svfprintf_r+0x546> - 80072a0: 9a16 ldr r2, [sp, #88] ; 0x58 - 80072a2: 462b mov r3, r5 - 80072a4: 2030 movs r0, #48 ; 0x30 - 80072a6: 18a9 adds r1, r5, r2 - 80072a8: e7ee b.n 8007288 <_svfprintf_r+0x7fc> - 80072aa: 9b0c ldr r3, [sp, #48] ; 0x30 - 80072ac: 2b46 cmp r3, #70 ; 0x46 - 80072ae: d005 beq.n 80072bc <_svfprintf_r+0x830> - 80072b0: 2b45 cmp r3, #69 ; 0x45 - 80072b2: d11b bne.n 80072ec <_svfprintf_r+0x860> - 80072b4: 9b07 ldr r3, [sp, #28] - 80072b6: 1c5e adds r6, r3, #1 - 80072b8: 2302 movs r3, #2 - 80072ba: e001 b.n 80072c0 <_svfprintf_r+0x834> - 80072bc: 2303 movs r3, #3 - 80072be: 9e07 ldr r6, [sp, #28] - 80072c0: aa24 add r2, sp, #144 ; 0x90 - 80072c2: 9204 str r2, [sp, #16] - 80072c4: aa21 add r2, sp, #132 ; 0x84 - 80072c6: 9203 str r2, [sp, #12] - 80072c8: aa20 add r2, sp, #128 ; 0x80 - 80072ca: e9cd 6201 strd r6, r2, [sp, #4] - 80072ce: 9300 str r3, [sp, #0] - 80072d0: 463a mov r2, r7 - 80072d2: 462b mov r3, r5 - 80072d4: 4648 mov r0, r9 - 80072d6: f000 fe57 bl 8007f88 <_dtoa_r> - 80072da: 9b0c ldr r3, [sp, #48] ; 0x30 - 80072dc: 4682 mov sl, r0 - 80072de: 2b47 cmp r3, #71 ; 0x47 - 80072e0: d106 bne.n 80072f0 <_svfprintf_r+0x864> - 80072e2: f018 0f01 tst.w r8, #1 - 80072e6: d103 bne.n 80072f0 <_svfprintf_r+0x864> - 80072e8: 9d24 ldr r5, [sp, #144] ; 0x90 - 80072ea: e672 b.n 8006fd2 <_svfprintf_r+0x546> - 80072ec: 9e07 ldr r6, [sp, #28] - 80072ee: e7e3 b.n 80072b8 <_svfprintf_r+0x82c> - 80072f0: eb0a 0306 add.w r3, sl, r6 - 80072f4: 9309 str r3, [sp, #36] ; 0x24 - 80072f6: 9b0c ldr r3, [sp, #48] ; 0x30 - 80072f8: 2b46 cmp r3, #70 ; 0x46 - 80072fa: d111 bne.n 8007320 <_svfprintf_r+0x894> - 80072fc: f89a 3000 ldrb.w r3, [sl] - 8007300: 2b30 cmp r3, #48 ; 0x30 - 8007302: d109 bne.n 8007318 <_svfprintf_r+0x88c> - 8007304: 2200 movs r2, #0 - 8007306: 2300 movs r3, #0 - 8007308: 4638 mov r0, r7 - 800730a: 4629 mov r1, r5 - 800730c: f7f9 fb56 bl 80009bc <__aeabi_dcmpeq> - 8007310: b910 cbnz r0, 8007318 <_svfprintf_r+0x88c> - 8007312: f1c6 0601 rsb r6, r6, #1 - 8007316: 9620 str r6, [sp, #128] ; 0x80 - 8007318: 9a09 ldr r2, [sp, #36] ; 0x24 - 800731a: 9b20 ldr r3, [sp, #128] ; 0x80 - 800731c: 441a add r2, r3 - 800731e: 9209 str r2, [sp, #36] ; 0x24 - 8007320: 2200 movs r2, #0 - 8007322: 2300 movs r3, #0 - 8007324: 4638 mov r0, r7 - 8007326: 4629 mov r1, r5 - 8007328: f7f9 fb48 bl 80009bc <__aeabi_dcmpeq> - 800732c: b108 cbz r0, 8007332 <_svfprintf_r+0x8a6> - 800732e: 9b09 ldr r3, [sp, #36] ; 0x24 - 8007330: 9324 str r3, [sp, #144] ; 0x90 - 8007332: 2230 movs r2, #48 ; 0x30 - 8007334: 9b24 ldr r3, [sp, #144] ; 0x90 - 8007336: 9909 ldr r1, [sp, #36] ; 0x24 - 8007338: 4299 cmp r1, r3 - 800733a: d9d5 bls.n 80072e8 <_svfprintf_r+0x85c> - 800733c: 1c59 adds r1, r3, #1 - 800733e: 9124 str r1, [sp, #144] ; 0x90 - 8007340: 701a strb r2, [r3, #0] - 8007342: e7f7 b.n 8007334 <_svfprintf_r+0x8a8> - 8007344: 9b0c ldr r3, [sp, #48] ; 0x30 - 8007346: 2b46 cmp r3, #70 ; 0x46 - 8007348: f47f ae54 bne.w 8006ff4 <_svfprintf_r+0x568> - 800734c: 9a07 ldr r2, [sp, #28] - 800734e: f008 0301 and.w r3, r8, #1 - 8007352: 2d00 cmp r5, #0 - 8007354: ea43 0302 orr.w r3, r3, r2 - 8007358: dd1a ble.n 8007390 <_svfprintf_r+0x904> - 800735a: 2b00 cmp r3, #0 - 800735c: d034 beq.n 80073c8 <_svfprintf_r+0x93c> - 800735e: 9b12 ldr r3, [sp, #72] ; 0x48 - 8007360: 18eb adds r3, r5, r3 - 8007362: 441a add r2, r3 - 8007364: 9207 str r2, [sp, #28] - 8007366: 2366 movs r3, #102 ; 0x66 - 8007368: 930a str r3, [sp, #40] ; 0x28 - 800736a: e033 b.n 80073d4 <_svfprintf_r+0x948> - 800736c: f813 6b01 ldrb.w r6, [r3], #1 - 8007370: f802 6b01 strb.w r6, [r2], #1 - 8007374: e675 b.n 8007062 <_svfprintf_r+0x5d6> - 8007376: b941 cbnz r1, 800738a <_svfprintf_r+0x8fe> - 8007378: 2230 movs r2, #48 ; 0x30 - 800737a: f88d 208a strb.w r2, [sp, #138] ; 0x8a - 800737e: f10d 028b add.w r2, sp, #139 ; 0x8b - 8007382: 3330 adds r3, #48 ; 0x30 - 8007384: f802 3b01 strb.w r3, [r2], #1 - 8007388: e677 b.n 800707a <_svfprintf_r+0x5ee> - 800738a: f10d 028a add.w r2, sp, #138 ; 0x8a - 800738e: e7f8 b.n 8007382 <_svfprintf_r+0x8f6> - 8007390: b1e3 cbz r3, 80073cc <_svfprintf_r+0x940> - 8007392: 9b12 ldr r3, [sp, #72] ; 0x48 - 8007394: 9a07 ldr r2, [sp, #28] - 8007396: 3301 adds r3, #1 - 8007398: e7e3 b.n 8007362 <_svfprintf_r+0x8d6> - 800739a: 9b09 ldr r3, [sp, #36] ; 0x24 - 800739c: 429d cmp r5, r3 - 800739e: db07 blt.n 80073b0 <_svfprintf_r+0x924> - 80073a0: f018 0f01 tst.w r8, #1 - 80073a4: d02b beq.n 80073fe <_svfprintf_r+0x972> - 80073a6: 9b12 ldr r3, [sp, #72] ; 0x48 - 80073a8: 18eb adds r3, r5, r3 - 80073aa: 9307 str r3, [sp, #28] - 80073ac: 2367 movs r3, #103 ; 0x67 - 80073ae: e7db b.n 8007368 <_svfprintf_r+0x8dc> - 80073b0: 9b09 ldr r3, [sp, #36] ; 0x24 - 80073b2: 9a12 ldr r2, [sp, #72] ; 0x48 - 80073b4: 2d00 cmp r5, #0 - 80073b6: 4413 add r3, r2 - 80073b8: 9307 str r3, [sp, #28] - 80073ba: dcf7 bgt.n 80073ac <_svfprintf_r+0x920> - 80073bc: 9a07 ldr r2, [sp, #28] - 80073be: f1c5 0301 rsb r3, r5, #1 - 80073c2: 441a add r2, r3 - 80073c4: 9207 str r2, [sp, #28] - 80073c6: e7f1 b.n 80073ac <_svfprintf_r+0x920> - 80073c8: 9507 str r5, [sp, #28] - 80073ca: e7cc b.n 8007366 <_svfprintf_r+0x8da> - 80073cc: 2366 movs r3, #102 ; 0x66 - 80073ce: 930a str r3, [sp, #40] ; 0x28 - 80073d0: 2301 movs r3, #1 - 80073d2: 9307 str r3, [sp, #28] - 80073d4: f418 6380 ands.w r3, r8, #1024 ; 0x400 - 80073d8: 930c str r3, [sp, #48] ; 0x30 - 80073da: d021 beq.n 8007420 <_svfprintf_r+0x994> - 80073dc: 2600 movs r6, #0 - 80073de: 2d00 cmp r5, #0 - 80073e0: 960c str r6, [sp, #48] ; 0x30 - 80073e2: f77f ae61 ble.w 80070a8 <_svfprintf_r+0x61c> - 80073e6: 9b0d ldr r3, [sp, #52] ; 0x34 - 80073e8: 781b ldrb r3, [r3, #0] - 80073ea: 2bff cmp r3, #255 ; 0xff - 80073ec: d109 bne.n 8007402 <_svfprintf_r+0x976> - 80073ee: 9b0c ldr r3, [sp, #48] ; 0x30 - 80073f0: 9a07 ldr r2, [sp, #28] - 80073f2: 9915 ldr r1, [sp, #84] ; 0x54 - 80073f4: 4433 add r3, r6 - 80073f6: fb01 2303 mla r3, r1, r3, r2 - 80073fa: 9307 str r3, [sp, #28] - 80073fc: e654 b.n 80070a8 <_svfprintf_r+0x61c> - 80073fe: 9507 str r5, [sp, #28] - 8007400: e7d4 b.n 80073ac <_svfprintf_r+0x920> - 8007402: 42ab cmp r3, r5 - 8007404: daf3 bge.n 80073ee <_svfprintf_r+0x962> - 8007406: 1aed subs r5, r5, r3 - 8007408: 9b0d ldr r3, [sp, #52] ; 0x34 - 800740a: 785b ldrb r3, [r3, #1] - 800740c: b133 cbz r3, 800741c <_svfprintf_r+0x990> - 800740e: 9b0c ldr r3, [sp, #48] ; 0x30 - 8007410: 3301 adds r3, #1 - 8007412: 930c str r3, [sp, #48] ; 0x30 - 8007414: 9b0d ldr r3, [sp, #52] ; 0x34 - 8007416: 3301 adds r3, #1 - 8007418: 930d str r3, [sp, #52] ; 0x34 - 800741a: e7e4 b.n 80073e6 <_svfprintf_r+0x95a> - 800741c: 3601 adds r6, #1 - 800741e: e7e2 b.n 80073e6 <_svfprintf_r+0x95a> - 8007420: 9e0c ldr r6, [sp, #48] ; 0x30 - 8007422: e641 b.n 80070a8 <_svfprintf_r+0x61c> - 8007424: 1d33 adds r3, r6, #4 - 8007426: f018 0f20 tst.w r8, #32 - 800742a: 930b str r3, [sp, #44] ; 0x2c - 800742c: d00a beq.n 8007444 <_svfprintf_r+0x9b8> - 800742e: 9a0f ldr r2, [sp, #60] ; 0x3c - 8007430: 6833 ldr r3, [r6, #0] - 8007432: 990f ldr r1, [sp, #60] ; 0x3c - 8007434: 17d2 asrs r2, r2, #31 - 8007436: e9c3 1200 strd r1, r2, [r3] - 800743a: 9e0b ldr r6, [sp, #44] ; 0x2c - 800743c: f8dd a038 ldr.w sl, [sp, #56] ; 0x38 - 8007440: f7ff bb60 b.w 8006b04 <_svfprintf_r+0x78> - 8007444: f018 0f10 tst.w r8, #16 - 8007448: d003 beq.n 8007452 <_svfprintf_r+0x9c6> - 800744a: 6833 ldr r3, [r6, #0] - 800744c: 9a0f ldr r2, [sp, #60] ; 0x3c - 800744e: 601a str r2, [r3, #0] - 8007450: e7f3 b.n 800743a <_svfprintf_r+0x9ae> - 8007452: f018 0f40 tst.w r8, #64 ; 0x40 - 8007456: d003 beq.n 8007460 <_svfprintf_r+0x9d4> - 8007458: 6833 ldr r3, [r6, #0] - 800745a: 9a0f ldr r2, [sp, #60] ; 0x3c - 800745c: 801a strh r2, [r3, #0] - 800745e: e7ec b.n 800743a <_svfprintf_r+0x9ae> - 8007460: f418 7f00 tst.w r8, #512 ; 0x200 - 8007464: d0f1 beq.n 800744a <_svfprintf_r+0x9be> - 8007466: 6833 ldr r3, [r6, #0] - 8007468: 9a0f ldr r2, [sp, #60] ; 0x3c - 800746a: 701a strb r2, [r3, #0] - 800746c: e7e5 b.n 800743a <_svfprintf_r+0x9ae> - 800746e: f048 0810 orr.w r8, r8, #16 - 8007472: f018 0320 ands.w r3, r8, #32 - 8007476: d020 beq.n 80074ba <_svfprintf_r+0xa2e> - 8007478: 1df3 adds r3, r6, #7 - 800747a: f023 0307 bic.w r3, r3, #7 - 800747e: 461a mov r2, r3 - 8007480: f852 6b08 ldr.w r6, [r2], #8 - 8007484: 685f ldr r7, [r3, #4] - 8007486: 920b str r2, [sp, #44] ; 0x2c - 8007488: 2300 movs r3, #0 - 800748a: f428 6880 bic.w r8, r8, #1024 ; 0x400 - 800748e: 2200 movs r2, #0 - 8007490: f88d 207b strb.w r2, [sp, #123] ; 0x7b - 8007494: 9a07 ldr r2, [sp, #28] - 8007496: 3201 adds r2, #1 - 8007498: f000 8495 beq.w 8007dc6 <_svfprintf_r+0x133a> - 800749c: f028 0280 bic.w r2, r8, #128 ; 0x80 - 80074a0: 9208 str r2, [sp, #32] - 80074a2: ea56 0207 orrs.w r2, r6, r7 - 80074a6: f040 8494 bne.w 8007dd2 <_svfprintf_r+0x1346> - 80074aa: 9a07 ldr r2, [sp, #28] - 80074ac: 2a00 cmp r2, #0 - 80074ae: f000 80fb beq.w 80076a8 <_svfprintf_r+0xc1c> - 80074b2: 2b01 cmp r3, #1 - 80074b4: f040 8490 bne.w 8007dd8 <_svfprintf_r+0x134c> - 80074b8: e09f b.n 80075fa <_svfprintf_r+0xb6e> - 80074ba: 4632 mov r2, r6 - 80074bc: f852 6b04 ldr.w r6, [r2], #4 - 80074c0: f018 0710 ands.w r7, r8, #16 - 80074c4: 920b str r2, [sp, #44] ; 0x2c - 80074c6: d001 beq.n 80074cc <_svfprintf_r+0xa40> - 80074c8: 461f mov r7, r3 - 80074ca: e7dd b.n 8007488 <_svfprintf_r+0x9fc> - 80074cc: f018 0340 ands.w r3, r8, #64 ; 0x40 - 80074d0: d001 beq.n 80074d6 <_svfprintf_r+0xa4a> - 80074d2: b2b6 uxth r6, r6 - 80074d4: e7d8 b.n 8007488 <_svfprintf_r+0x9fc> - 80074d6: f418 7700 ands.w r7, r8, #512 ; 0x200 - 80074da: d0d5 beq.n 8007488 <_svfprintf_r+0x9fc> - 80074dc: b2f6 uxtb r6, r6 - 80074de: e7f3 b.n 80074c8 <_svfprintf_r+0xa3c> - 80074e0: 4633 mov r3, r6 - 80074e2: f853 6b04 ldr.w r6, [r3], #4 - 80074e6: 2278 movs r2, #120 ; 0x78 - 80074e8: 930b str r3, [sp, #44] ; 0x2c - 80074ea: 2330 movs r3, #48 ; 0x30 - 80074ec: f88d 307c strb.w r3, [sp, #124] ; 0x7c - 80074f0: 4ba6 ldr r3, [pc, #664] ; (800778c <_svfprintf_r+0xd00>) - 80074f2: 2700 movs r7, #0 - 80074f4: 931a str r3, [sp, #104] ; 0x68 - 80074f6: f048 0802 orr.w r8, r8, #2 - 80074fa: 2302 movs r3, #2 - 80074fc: f88d 207d strb.w r2, [sp, #125] ; 0x7d - 8007500: 920a str r2, [sp, #40] ; 0x28 - 8007502: e7c4 b.n 800748e <_svfprintf_r+0xa02> - 8007504: 4633 mov r3, r6 - 8007506: 2500 movs r5, #0 - 8007508: f853 ab04 ldr.w sl, [r3], #4 - 800750c: f88d 507b strb.w r5, [sp, #123] ; 0x7b - 8007510: 930b str r3, [sp, #44] ; 0x2c - 8007512: 9b07 ldr r3, [sp, #28] - 8007514: 1c58 adds r0, r3, #1 - 8007516: d010 beq.n 800753a <_svfprintf_r+0xaae> - 8007518: 461a mov r2, r3 - 800751a: 4629 mov r1, r5 - 800751c: 4650 mov r0, sl - 800751e: f001 fc17 bl 8008d50 - 8007522: 9008 str r0, [sp, #32] - 8007524: 2800 cmp r0, #0 - 8007526: f000 80d6 beq.w 80076d6 <_svfprintf_r+0xc4a> - 800752a: eba0 030a sub.w r3, r0, sl - 800752e: 462f mov r7, r5 - 8007530: 462e mov r6, r5 - 8007532: e9cd 3507 strd r3, r5, [sp, #28] - 8007536: 950c str r5, [sp, #48] ; 0x30 - 8007538: e5be b.n 80070b8 <_svfprintf_r+0x62c> - 800753a: 4650 mov r0, sl - 800753c: f7f8 fe12 bl 8000164 - 8007540: e9cd 0507 strd r0, r5, [sp, #28] - 8007544: e46a b.n 8006e1c <_svfprintf_r+0x390> - 8007546: f048 0810 orr.w r8, r8, #16 - 800754a: f018 0320 ands.w r3, r8, #32 - 800754e: d009 beq.n 8007564 <_svfprintf_r+0xad8> - 8007550: 1df3 adds r3, r6, #7 - 8007552: f023 0307 bic.w r3, r3, #7 - 8007556: 461a mov r2, r3 - 8007558: f852 6b08 ldr.w r6, [r2], #8 - 800755c: 685f ldr r7, [r3, #4] - 800755e: 920b str r2, [sp, #44] ; 0x2c - 8007560: 2301 movs r3, #1 - 8007562: e794 b.n 800748e <_svfprintf_r+0xa02> - 8007564: 4632 mov r2, r6 - 8007566: f852 6b04 ldr.w r6, [r2], #4 - 800756a: f018 0710 ands.w r7, r8, #16 - 800756e: 920b str r2, [sp, #44] ; 0x2c - 8007570: d001 beq.n 8007576 <_svfprintf_r+0xaea> - 8007572: 461f mov r7, r3 - 8007574: e7f4 b.n 8007560 <_svfprintf_r+0xad4> - 8007576: f018 0340 ands.w r3, r8, #64 ; 0x40 - 800757a: d001 beq.n 8007580 <_svfprintf_r+0xaf4> - 800757c: b2b6 uxth r6, r6 - 800757e: e7ef b.n 8007560 <_svfprintf_r+0xad4> - 8007580: f418 7700 ands.w r7, r8, #512 ; 0x200 - 8007584: d0ec beq.n 8007560 <_svfprintf_r+0xad4> - 8007586: b2f6 uxtb r6, r6 - 8007588: e7f3 b.n 8007572 <_svfprintf_r+0xae6> - 800758a: 4b81 ldr r3, [pc, #516] ; (8007790 <_svfprintf_r+0xd04>) - 800758c: 931a str r3, [sp, #104] ; 0x68 - 800758e: f018 0320 ands.w r3, r8, #32 - 8007592: d01b beq.n 80075cc <_svfprintf_r+0xb40> - 8007594: 1df3 adds r3, r6, #7 - 8007596: f023 0307 bic.w r3, r3, #7 - 800759a: 461a mov r2, r3 - 800759c: f852 6b08 ldr.w r6, [r2], #8 - 80075a0: 685f ldr r7, [r3, #4] - 80075a2: 920b str r2, [sp, #44] ; 0x2c - 80075a4: f018 0f01 tst.w r8, #1 - 80075a8: d00a beq.n 80075c0 <_svfprintf_r+0xb34> - 80075aa: ea56 0307 orrs.w r3, r6, r7 - 80075ae: d007 beq.n 80075c0 <_svfprintf_r+0xb34> - 80075b0: 2330 movs r3, #48 ; 0x30 - 80075b2: f88d 307c strb.w r3, [sp, #124] ; 0x7c - 80075b6: 9b0a ldr r3, [sp, #40] ; 0x28 - 80075b8: f048 0802 orr.w r8, r8, #2 - 80075bc: f88d 307d strb.w r3, [sp, #125] ; 0x7d - 80075c0: 2302 movs r3, #2 - 80075c2: f428 6880 bic.w r8, r8, #1024 ; 0x400 - 80075c6: e762 b.n 800748e <_svfprintf_r+0xa02> - 80075c8: 4b70 ldr r3, [pc, #448] ; (800778c <_svfprintf_r+0xd00>) - 80075ca: e7df b.n 800758c <_svfprintf_r+0xb00> - 80075cc: 4632 mov r2, r6 - 80075ce: f852 6b04 ldr.w r6, [r2], #4 - 80075d2: f018 0710 ands.w r7, r8, #16 - 80075d6: 920b str r2, [sp, #44] ; 0x2c - 80075d8: d001 beq.n 80075de <_svfprintf_r+0xb52> - 80075da: 461f mov r7, r3 - 80075dc: e7e2 b.n 80075a4 <_svfprintf_r+0xb18> - 80075de: f018 0340 ands.w r3, r8, #64 ; 0x40 - 80075e2: d001 beq.n 80075e8 <_svfprintf_r+0xb5c> - 80075e4: b2b6 uxth r6, r6 - 80075e6: e7dd b.n 80075a4 <_svfprintf_r+0xb18> - 80075e8: f418 7700 ands.w r7, r8, #512 ; 0x200 - 80075ec: d0da beq.n 80075a4 <_svfprintf_r+0xb18> - 80075ee: b2f6 uxtb r6, r6 - 80075f0: e7f3 b.n 80075da <_svfprintf_r+0xb4e> - 80075f2: 2e0a cmp r6, #10 - 80075f4: f177 0300 sbcs.w r3, r7, #0 - 80075f8: d206 bcs.n 8007608 <_svfprintf_r+0xb7c> - 80075fa: 3630 adds r6, #48 ; 0x30 - 80075fc: f88d 6147 strb.w r6, [sp, #327] ; 0x147 - 8007600: f20d 1a47 addw sl, sp, #327 ; 0x147 - 8007604: f000 bc04 b.w 8007e10 <_svfprintf_r+0x1384> - 8007608: 2300 movs r3, #0 - 800760a: 9309 str r3, [sp, #36] ; 0x24 - 800760c: 9b08 ldr r3, [sp, #32] - 800760e: ad52 add r5, sp, #328 ; 0x148 - 8007610: f403 6880 and.w r8, r3, #1024 ; 0x400 - 8007614: 220a movs r2, #10 - 8007616: 2300 movs r3, #0 - 8007618: 4630 mov r0, r6 - 800761a: 4639 mov r1, r7 - 800761c: f7f9 fd38 bl 8001090 <__aeabi_uldivmod> - 8007620: 9b09 ldr r3, [sp, #36] ; 0x24 - 8007622: 3230 adds r2, #48 ; 0x30 - 8007624: 3301 adds r3, #1 - 8007626: f105 3aff add.w sl, r5, #4294967295 - 800762a: f805 2c01 strb.w r2, [r5, #-1] - 800762e: 9309 str r3, [sp, #36] ; 0x24 - 8007630: f1b8 0f00 cmp.w r8, #0 - 8007634: d019 beq.n 800766a <_svfprintf_r+0xbde> - 8007636: 9b0d ldr r3, [sp, #52] ; 0x34 - 8007638: 9a09 ldr r2, [sp, #36] ; 0x24 - 800763a: 781b ldrb r3, [r3, #0] - 800763c: 429a cmp r2, r3 - 800763e: d114 bne.n 800766a <_svfprintf_r+0xbde> - 8007640: 2aff cmp r2, #255 ; 0xff - 8007642: d012 beq.n 800766a <_svfprintf_r+0xbde> - 8007644: 2e0a cmp r6, #10 - 8007646: f177 0300 sbcs.w r3, r7, #0 - 800764a: d30e bcc.n 800766a <_svfprintf_r+0xbde> - 800764c: 9b15 ldr r3, [sp, #84] ; 0x54 - 800764e: 9918 ldr r1, [sp, #96] ; 0x60 - 8007650: ebaa 0a03 sub.w sl, sl, r3 - 8007654: 461a mov r2, r3 - 8007656: 4650 mov r0, sl - 8007658: f001 fef0 bl 800943c - 800765c: 9b0d ldr r3, [sp, #52] ; 0x34 - 800765e: 785d ldrb r5, [r3, #1] - 8007660: b195 cbz r5, 8007688 <_svfprintf_r+0xbfc> - 8007662: 3301 adds r3, #1 - 8007664: 930d str r3, [sp, #52] ; 0x34 - 8007666: 2300 movs r3, #0 - 8007668: 9309 str r3, [sp, #36] ; 0x24 - 800766a: 2300 movs r3, #0 - 800766c: 220a movs r2, #10 - 800766e: 4630 mov r0, r6 - 8007670: 4639 mov r1, r7 - 8007672: f7f9 fd0d bl 8001090 <__aeabi_uldivmod> - 8007676: 2e0a cmp r6, #10 - 8007678: f177 0300 sbcs.w r3, r7, #0 - 800767c: f0c0 83c8 bcc.w 8007e10 <_svfprintf_r+0x1384> - 8007680: 4606 mov r6, r0 - 8007682: 460f mov r7, r1 - 8007684: 4655 mov r5, sl - 8007686: e7c5 b.n 8007614 <_svfprintf_r+0xb88> - 8007688: 9509 str r5, [sp, #36] ; 0x24 - 800768a: e7ee b.n 800766a <_svfprintf_r+0xbde> - 800768c: 9a1a ldr r2, [sp, #104] ; 0x68 - 800768e: f006 030f and.w r3, r6, #15 - 8007692: 5cd3 ldrb r3, [r2, r3] - 8007694: 0936 lsrs r6, r6, #4 - 8007696: ea46 7607 orr.w r6, r6, r7, lsl #28 - 800769a: 093f lsrs r7, r7, #4 - 800769c: f80a 3d01 strb.w r3, [sl, #-1]! - 80076a0: ea56 0307 orrs.w r3, r6, r7 - 80076a4: d1f2 bne.n 800768c <_svfprintf_r+0xc00> - 80076a6: e3b3 b.n 8007e10 <_svfprintf_r+0x1384> - 80076a8: b933 cbnz r3, 80076b8 <_svfprintf_r+0xc2c> - 80076aa: f018 0f01 tst.w r8, #1 - 80076ae: d003 beq.n 80076b8 <_svfprintf_r+0xc2c> - 80076b0: 2330 movs r3, #48 ; 0x30 - 80076b2: f88d 3147 strb.w r3, [sp, #327] ; 0x147 - 80076b6: e7a3 b.n 8007600 <_svfprintf_r+0xb74> - 80076b8: f50d 7aa4 add.w sl, sp, #328 ; 0x148 - 80076bc: e3a8 b.n 8007e10 <_svfprintf_r+0x1384> - 80076be: 9b0a ldr r3, [sp, #40] ; 0x28 - 80076c0: 2b00 cmp r3, #0 - 80076c2: f000 8375 beq.w 8007db0 <_svfprintf_r+0x1324> - 80076c6: 2000 movs r0, #0 - 80076c8: f88d 30e4 strb.w r3, [sp, #228] ; 0xe4 - 80076cc: f88d 007b strb.w r0, [sp, #123] ; 0x7b - 80076d0: 960b str r6, [sp, #44] ; 0x2c - 80076d2: f7ff bb36 b.w 8006d42 <_svfprintf_r+0x2b6> - 80076d6: 9f08 ldr r7, [sp, #32] - 80076d8: f7ff bba1 b.w 8006e1e <_svfprintf_r+0x392> - 80076dc: 2010 movs r0, #16 - 80076de: 2a07 cmp r2, #7 - 80076e0: 4403 add r3, r0 - 80076e2: e9cd 2327 strd r2, r3, [sp, #156] ; 0x9c - 80076e6: 6060 str r0, [r4, #4] - 80076e8: dd08 ble.n 80076fc <_svfprintf_r+0xc70> - 80076ea: 4659 mov r1, fp - 80076ec: 4648 mov r0, r9 - 80076ee: aa26 add r2, sp, #152 ; 0x98 - 80076f0: f001 feb7 bl 8009462 <__ssprint_r> - 80076f4: 2800 cmp r0, #0 - 80076f6: f040 8339 bne.w 8007d6c <_svfprintf_r+0x12e0> - 80076fa: a929 add r1, sp, #164 ; 0xa4 - 80076fc: 9b16 ldr r3, [sp, #88] ; 0x58 - 80076fe: 460c mov r4, r1 - 8007700: 3b10 subs r3, #16 - 8007702: 9316 str r3, [sp, #88] ; 0x58 - 8007704: e4f4 b.n 80070f0 <_svfprintf_r+0x664> - 8007706: 460c mov r4, r1 - 8007708: e50e b.n 8007128 <_svfprintf_r+0x69c> - 800770a: 4659 mov r1, fp - 800770c: 4648 mov r0, r9 - 800770e: aa26 add r2, sp, #152 ; 0x98 - 8007710: f001 fea7 bl 8009462 <__ssprint_r> - 8007714: 2800 cmp r0, #0 - 8007716: f040 8329 bne.w 8007d6c <_svfprintf_r+0x12e0> - 800771a: ac29 add r4, sp, #164 ; 0xa4 - 800771c: e516 b.n 800714c <_svfprintf_r+0x6c0> - 800771e: 4659 mov r1, fp - 8007720: 4648 mov r0, r9 - 8007722: aa26 add r2, sp, #152 ; 0x98 - 8007724: f001 fe9d bl 8009462 <__ssprint_r> - 8007728: 2800 cmp r0, #0 - 800772a: f040 831f bne.w 8007d6c <_svfprintf_r+0x12e0> - 800772e: ac29 add r4, sp, #164 ; 0xa4 - 8007730: e51c b.n 800716c <_svfprintf_r+0x6e0> - 8007732: 2010 movs r0, #16 - 8007734: 2a07 cmp r2, #7 - 8007736: 4403 add r3, r0 - 8007738: e9cd 2327 strd r2, r3, [sp, #156] ; 0x9c - 800773c: 6060 str r0, [r4, #4] - 800773e: dd08 ble.n 8007752 <_svfprintf_r+0xcc6> - 8007740: 4659 mov r1, fp - 8007742: 4648 mov r0, r9 - 8007744: aa26 add r2, sp, #152 ; 0x98 - 8007746: f001 fe8c bl 8009462 <__ssprint_r> - 800774a: 2800 cmp r0, #0 - 800774c: f040 830e bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007750: a929 add r1, sp, #164 ; 0xa4 - 8007752: 9b16 ldr r3, [sp, #88] ; 0x58 - 8007754: 460c mov r4, r1 - 8007756: 3b10 subs r3, #16 - 8007758: 9316 str r3, [sp, #88] ; 0x58 - 800775a: e510 b.n 800717e <_svfprintf_r+0x6f2> - 800775c: 460c mov r4, r1 - 800775e: e52a b.n 80071b6 <_svfprintf_r+0x72a> - 8007760: 2010 movs r0, #16 - 8007762: 2b07 cmp r3, #7 - 8007764: 4402 add r2, r0 - 8007766: e9cd 3227 strd r3, r2, [sp, #156] ; 0x9c - 800776a: 6060 str r0, [r4, #4] - 800776c: dd08 ble.n 8007780 <_svfprintf_r+0xcf4> - 800776e: 4659 mov r1, fp - 8007770: 4648 mov r0, r9 - 8007772: aa26 add r2, sp, #152 ; 0x98 - 8007774: f001 fe75 bl 8009462 <__ssprint_r> - 8007778: 2800 cmp r0, #0 - 800777a: f040 82f7 bne.w 8007d6c <_svfprintf_r+0x12e0> - 800777e: a929 add r1, sp, #164 ; 0xa4 - 8007780: 460c mov r4, r1 - 8007782: 3f10 subs r7, #16 - 8007784: e51b b.n 80071be <_svfprintf_r+0x732> - 8007786: 460c mov r4, r1 - 8007788: e542 b.n 8007210 <_svfprintf_r+0x784> - 800778a: bf00 nop - 800778c: 0800b0f0 .word 0x0800b0f0 - 8007790: 0800b101 .word 0x0800b101 - 8007794: 9b0a ldr r3, [sp, #40] ; 0x28 - 8007796: 2b65 cmp r3, #101 ; 0x65 - 8007798: f340 8230 ble.w 8007bfc <_svfprintf_r+0x1170> - 800779c: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 - 80077a0: 2200 movs r2, #0 - 80077a2: 2300 movs r3, #0 - 80077a4: f7f9 f90a bl 80009bc <__aeabi_dcmpeq> - 80077a8: 2800 cmp r0, #0 - 80077aa: d068 beq.n 800787e <_svfprintf_r+0xdf2> - 80077ac: 4b6d ldr r3, [pc, #436] ; (8007964 <_svfprintf_r+0xed8>) - 80077ae: 6023 str r3, [r4, #0] - 80077b0: 2301 movs r3, #1 - 80077b2: 441f add r7, r3 - 80077b4: 6063 str r3, [r4, #4] - 80077b6: 9b27 ldr r3, [sp, #156] ; 0x9c - 80077b8: 9728 str r7, [sp, #160] ; 0xa0 - 80077ba: 3301 adds r3, #1 - 80077bc: 2b07 cmp r3, #7 - 80077be: 9327 str r3, [sp, #156] ; 0x9c - 80077c0: dc37 bgt.n 8007832 <_svfprintf_r+0xda6> - 80077c2: 3408 adds r4, #8 - 80077c4: 9b20 ldr r3, [sp, #128] ; 0x80 - 80077c6: 9a09 ldr r2, [sp, #36] ; 0x24 - 80077c8: 4293 cmp r3, r2 - 80077ca: db03 blt.n 80077d4 <_svfprintf_r+0xd48> - 80077cc: f018 0f01 tst.w r8, #1 - 80077d0: f43f ad30 beq.w 8007234 <_svfprintf_r+0x7a8> - 80077d4: 9b17 ldr r3, [sp, #92] ; 0x5c - 80077d6: 9a12 ldr r2, [sp, #72] ; 0x48 - 80077d8: 6023 str r3, [r4, #0] - 80077da: 9b12 ldr r3, [sp, #72] ; 0x48 - 80077dc: 6063 str r3, [r4, #4] - 80077de: 9b28 ldr r3, [sp, #160] ; 0xa0 - 80077e0: 4413 add r3, r2 - 80077e2: 9328 str r3, [sp, #160] ; 0xa0 - 80077e4: 9b27 ldr r3, [sp, #156] ; 0x9c - 80077e6: 3301 adds r3, #1 - 80077e8: 2b07 cmp r3, #7 - 80077ea: 9327 str r3, [sp, #156] ; 0x9c - 80077ec: dc2b bgt.n 8007846 <_svfprintf_r+0xdba> - 80077ee: 3408 adds r4, #8 - 80077f0: 9b09 ldr r3, [sp, #36] ; 0x24 - 80077f2: 1e5d subs r5, r3, #1 - 80077f4: 2d00 cmp r5, #0 - 80077f6: f77f ad1d ble.w 8007234 <_svfprintf_r+0x7a8> - 80077fa: 2710 movs r7, #16 - 80077fc: 4e5a ldr r6, [pc, #360] ; (8007968 <_svfprintf_r+0xedc>) - 80077fe: 2d10 cmp r5, #16 - 8007800: e9dd 3227 ldrd r3, r2, [sp, #156] ; 0x9c - 8007804: f104 0108 add.w r1, r4, #8 - 8007808: f103 0301 add.w r3, r3, #1 - 800780c: 6026 str r6, [r4, #0] - 800780e: dc24 bgt.n 800785a <_svfprintf_r+0xdce> - 8007810: 6065 str r5, [r4, #4] - 8007812: 2b07 cmp r3, #7 - 8007814: 4415 add r5, r2 - 8007816: e9cd 3527 strd r3, r5, [sp, #156] ; 0x9c - 800781a: f340 8286 ble.w 8007d2a <_svfprintf_r+0x129e> - 800781e: 4659 mov r1, fp - 8007820: 4648 mov r0, r9 - 8007822: aa26 add r2, sp, #152 ; 0x98 - 8007824: f001 fe1d bl 8009462 <__ssprint_r> - 8007828: 2800 cmp r0, #0 - 800782a: f040 829f bne.w 8007d6c <_svfprintf_r+0x12e0> - 800782e: ac29 add r4, sp, #164 ; 0xa4 - 8007830: e500 b.n 8007234 <_svfprintf_r+0x7a8> - 8007832: 4659 mov r1, fp - 8007834: 4648 mov r0, r9 - 8007836: aa26 add r2, sp, #152 ; 0x98 - 8007838: f001 fe13 bl 8009462 <__ssprint_r> - 800783c: 2800 cmp r0, #0 - 800783e: f040 8295 bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007842: ac29 add r4, sp, #164 ; 0xa4 - 8007844: e7be b.n 80077c4 <_svfprintf_r+0xd38> - 8007846: 4659 mov r1, fp - 8007848: 4648 mov r0, r9 - 800784a: aa26 add r2, sp, #152 ; 0x98 - 800784c: f001 fe09 bl 8009462 <__ssprint_r> - 8007850: 2800 cmp r0, #0 - 8007852: f040 828b bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007856: ac29 add r4, sp, #164 ; 0xa4 - 8007858: e7ca b.n 80077f0 <_svfprintf_r+0xd64> - 800785a: 3210 adds r2, #16 - 800785c: 2b07 cmp r3, #7 - 800785e: e9cd 3227 strd r3, r2, [sp, #156] ; 0x9c - 8007862: 6067 str r7, [r4, #4] - 8007864: dd08 ble.n 8007878 <_svfprintf_r+0xdec> - 8007866: 4659 mov r1, fp - 8007868: 4648 mov r0, r9 - 800786a: aa26 add r2, sp, #152 ; 0x98 - 800786c: f001 fdf9 bl 8009462 <__ssprint_r> - 8007870: 2800 cmp r0, #0 - 8007872: f040 827b bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007876: a929 add r1, sp, #164 ; 0xa4 - 8007878: 460c mov r4, r1 - 800787a: 3d10 subs r5, #16 - 800787c: e7bf b.n 80077fe <_svfprintf_r+0xd72> - 800787e: 9b20 ldr r3, [sp, #128] ; 0x80 - 8007880: 2b00 cmp r3, #0 - 8007882: dc73 bgt.n 800796c <_svfprintf_r+0xee0> - 8007884: 4b37 ldr r3, [pc, #220] ; (8007964 <_svfprintf_r+0xed8>) - 8007886: 6023 str r3, [r4, #0] - 8007888: 2301 movs r3, #1 - 800788a: 441f add r7, r3 - 800788c: 6063 str r3, [r4, #4] - 800788e: 9b27 ldr r3, [sp, #156] ; 0x9c - 8007890: 9728 str r7, [sp, #160] ; 0xa0 - 8007892: 3301 adds r3, #1 - 8007894: 2b07 cmp r3, #7 - 8007896: 9327 str r3, [sp, #156] ; 0x9c - 8007898: dc3d bgt.n 8007916 <_svfprintf_r+0xe8a> - 800789a: 3408 adds r4, #8 - 800789c: 9909 ldr r1, [sp, #36] ; 0x24 - 800789e: 9a20 ldr r2, [sp, #128] ; 0x80 - 80078a0: 9b28 ldr r3, [sp, #160] ; 0xa0 - 80078a2: 430a orrs r2, r1 - 80078a4: f008 0101 and.w r1, r8, #1 - 80078a8: 430a orrs r2, r1 - 80078aa: f43f acc3 beq.w 8007234 <_svfprintf_r+0x7a8> - 80078ae: 9a17 ldr r2, [sp, #92] ; 0x5c - 80078b0: 6022 str r2, [r4, #0] - 80078b2: 9a12 ldr r2, [sp, #72] ; 0x48 - 80078b4: 4413 add r3, r2 - 80078b6: 9328 str r3, [sp, #160] ; 0xa0 - 80078b8: 9b27 ldr r3, [sp, #156] ; 0x9c - 80078ba: 6062 str r2, [r4, #4] - 80078bc: 3301 adds r3, #1 - 80078be: 2b07 cmp r3, #7 - 80078c0: 9327 str r3, [sp, #156] ; 0x9c - 80078c2: dc32 bgt.n 800792a <_svfprintf_r+0xe9e> - 80078c4: 3408 adds r4, #8 - 80078c6: 9d20 ldr r5, [sp, #128] ; 0x80 - 80078c8: 2d00 cmp r5, #0 - 80078ca: da1b bge.n 8007904 <_svfprintf_r+0xe78> - 80078cc: 4623 mov r3, r4 - 80078ce: 2710 movs r7, #16 - 80078d0: 4e25 ldr r6, [pc, #148] ; (8007968 <_svfprintf_r+0xedc>) - 80078d2: 426d negs r5, r5 - 80078d4: 2d10 cmp r5, #16 - 80078d6: e9dd 2127 ldrd r2, r1, [sp, #156] ; 0x9c - 80078da: f104 0408 add.w r4, r4, #8 - 80078de: f102 0201 add.w r2, r2, #1 - 80078e2: 601e str r6, [r3, #0] - 80078e4: dc2b bgt.n 800793e <_svfprintf_r+0xeb2> - 80078e6: 605d str r5, [r3, #4] - 80078e8: 2a07 cmp r2, #7 - 80078ea: 440d add r5, r1 - 80078ec: e9cd 2527 strd r2, r5, [sp, #156] ; 0x9c - 80078f0: dd08 ble.n 8007904 <_svfprintf_r+0xe78> - 80078f2: 4659 mov r1, fp - 80078f4: 4648 mov r0, r9 - 80078f6: aa26 add r2, sp, #152 ; 0x98 - 80078f8: f001 fdb3 bl 8009462 <__ssprint_r> - 80078fc: 2800 cmp r0, #0 - 80078fe: f040 8235 bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007902: ac29 add r4, sp, #164 ; 0xa4 - 8007904: 9b09 ldr r3, [sp, #36] ; 0x24 - 8007906: 9a09 ldr r2, [sp, #36] ; 0x24 - 8007908: 6063 str r3, [r4, #4] - 800790a: 9b28 ldr r3, [sp, #160] ; 0xa0 - 800790c: f8c4 a000 str.w sl, [r4] - 8007910: 4413 add r3, r2 - 8007912: 9328 str r3, [sp, #160] ; 0xa0 - 8007914: e487 b.n 8007226 <_svfprintf_r+0x79a> - 8007916: 4659 mov r1, fp - 8007918: 4648 mov r0, r9 - 800791a: aa26 add r2, sp, #152 ; 0x98 - 800791c: f001 fda1 bl 8009462 <__ssprint_r> - 8007920: 2800 cmp r0, #0 - 8007922: f040 8223 bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007926: ac29 add r4, sp, #164 ; 0xa4 - 8007928: e7b8 b.n 800789c <_svfprintf_r+0xe10> - 800792a: 4659 mov r1, fp - 800792c: 4648 mov r0, r9 - 800792e: aa26 add r2, sp, #152 ; 0x98 - 8007930: f001 fd97 bl 8009462 <__ssprint_r> - 8007934: 2800 cmp r0, #0 - 8007936: f040 8219 bne.w 8007d6c <_svfprintf_r+0x12e0> - 800793a: ac29 add r4, sp, #164 ; 0xa4 - 800793c: e7c3 b.n 80078c6 <_svfprintf_r+0xe3a> - 800793e: 3110 adds r1, #16 - 8007940: 2a07 cmp r2, #7 - 8007942: e9cd 2127 strd r2, r1, [sp, #156] ; 0x9c - 8007946: 605f str r7, [r3, #4] - 8007948: dd08 ble.n 800795c <_svfprintf_r+0xed0> - 800794a: 4659 mov r1, fp - 800794c: 4648 mov r0, r9 - 800794e: aa26 add r2, sp, #152 ; 0x98 - 8007950: f001 fd87 bl 8009462 <__ssprint_r> - 8007954: 2800 cmp r0, #0 - 8007956: f040 8209 bne.w 8007d6c <_svfprintf_r+0x12e0> - 800795a: ac29 add r4, sp, #164 ; 0xa4 - 800795c: 4623 mov r3, r4 - 800795e: 3d10 subs r5, #16 - 8007960: e7b8 b.n 80078d4 <_svfprintf_r+0xe48> - 8007962: bf00 nop - 8007964: 0800b112 .word 0x0800b112 - 8007968: 0800b124 .word 0x0800b124 - 800796c: 9b09 ldr r3, [sp, #36] ; 0x24 - 800796e: 42ab cmp r3, r5 - 8007970: bfa8 it ge - 8007972: 462b movge r3, r5 - 8007974: 2b00 cmp r3, #0 - 8007976: 9307 str r3, [sp, #28] - 8007978: dd0a ble.n 8007990 <_svfprintf_r+0xf04> - 800797a: 441f add r7, r3 - 800797c: e9c4 a300 strd sl, r3, [r4] - 8007980: 9b27 ldr r3, [sp, #156] ; 0x9c - 8007982: 9728 str r7, [sp, #160] ; 0xa0 - 8007984: 3301 adds r3, #1 - 8007986: 2b07 cmp r3, #7 - 8007988: 9327 str r3, [sp, #156] ; 0x9c - 800798a: f300 8085 bgt.w 8007a98 <_svfprintf_r+0x100c> - 800798e: 3408 adds r4, #8 - 8007990: 9b07 ldr r3, [sp, #28] - 8007992: 2b00 cmp r3, #0 - 8007994: bfb4 ite lt - 8007996: 462f movlt r7, r5 - 8007998: 1aef subge r7, r5, r3 - 800799a: 2f00 cmp r7, #0 - 800799c: dd19 ble.n 80079d2 <_svfprintf_r+0xf46> - 800799e: e9dd 3227 ldrd r3, r2, [sp, #156] ; 0x9c - 80079a2: 4895 ldr r0, [pc, #596] ; (8007bf8 <_svfprintf_r+0x116c>) - 80079a4: 2f10 cmp r7, #16 - 80079a6: f103 0301 add.w r3, r3, #1 - 80079aa: f104 0108 add.w r1, r4, #8 - 80079ae: 6020 str r0, [r4, #0] - 80079b0: dc7c bgt.n 8007aac <_svfprintf_r+0x1020> - 80079b2: 6067 str r7, [r4, #4] - 80079b4: 2b07 cmp r3, #7 - 80079b6: 4417 add r7, r2 - 80079b8: e9cd 3727 strd r3, r7, [sp, #156] ; 0x9c - 80079bc: f340 8089 ble.w 8007ad2 <_svfprintf_r+0x1046> - 80079c0: 4659 mov r1, fp - 80079c2: 4648 mov r0, r9 - 80079c4: aa26 add r2, sp, #152 ; 0x98 - 80079c6: f001 fd4c bl 8009462 <__ssprint_r> - 80079ca: 2800 cmp r0, #0 - 80079cc: f040 81ce bne.w 8007d6c <_svfprintf_r+0x12e0> - 80079d0: ac29 add r4, sp, #164 ; 0xa4 - 80079d2: f418 6f80 tst.w r8, #1024 ; 0x400 - 80079d6: 4455 add r5, sl - 80079d8: d009 beq.n 80079ee <_svfprintf_r+0xf62> - 80079da: 9b0c ldr r3, [sp, #48] ; 0x30 - 80079dc: 2b00 cmp r3, #0 - 80079de: d17a bne.n 8007ad6 <_svfprintf_r+0x104a> - 80079e0: 2e00 cmp r6, #0 - 80079e2: d17a bne.n 8007ada <_svfprintf_r+0x104e> - 80079e4: 9b09 ldr r3, [sp, #36] ; 0x24 - 80079e6: 4453 add r3, sl - 80079e8: 429d cmp r5, r3 - 80079ea: bf28 it cs - 80079ec: 461d movcs r5, r3 - 80079ee: 9b20 ldr r3, [sp, #128] ; 0x80 - 80079f0: 9a09 ldr r2, [sp, #36] ; 0x24 - 80079f2: 4293 cmp r3, r2 - 80079f4: db02 blt.n 80079fc <_svfprintf_r+0xf70> - 80079f6: f018 0f01 tst.w r8, #1 - 80079fa: d00e beq.n 8007a1a <_svfprintf_r+0xf8e> - 80079fc: 9b17 ldr r3, [sp, #92] ; 0x5c - 80079fe: 9a12 ldr r2, [sp, #72] ; 0x48 - 8007a00: 6023 str r3, [r4, #0] - 8007a02: 9b12 ldr r3, [sp, #72] ; 0x48 - 8007a04: 6063 str r3, [r4, #4] - 8007a06: 9b28 ldr r3, [sp, #160] ; 0xa0 - 8007a08: 4413 add r3, r2 - 8007a0a: 9328 str r3, [sp, #160] ; 0xa0 - 8007a0c: 9b27 ldr r3, [sp, #156] ; 0x9c - 8007a0e: 3301 adds r3, #1 - 8007a10: 2b07 cmp r3, #7 - 8007a12: 9327 str r3, [sp, #156] ; 0x9c - 8007a14: f300 80db bgt.w 8007bce <_svfprintf_r+0x1142> - 8007a18: 3408 adds r4, #8 - 8007a1a: 9b09 ldr r3, [sp, #36] ; 0x24 - 8007a1c: 9e20 ldr r6, [sp, #128] ; 0x80 - 8007a1e: eb0a 0203 add.w r2, sl, r3 - 8007a22: 1b9e subs r6, r3, r6 - 8007a24: 1b52 subs r2, r2, r5 - 8007a26: 4296 cmp r6, r2 - 8007a28: bfa8 it ge - 8007a2a: 4616 movge r6, r2 - 8007a2c: 2e00 cmp r6, #0 - 8007a2e: dd0b ble.n 8007a48 <_svfprintf_r+0xfbc> - 8007a30: 9b28 ldr r3, [sp, #160] ; 0xa0 - 8007a32: e9c4 5600 strd r5, r6, [r4] - 8007a36: 4433 add r3, r6 - 8007a38: 9328 str r3, [sp, #160] ; 0xa0 - 8007a3a: 9b27 ldr r3, [sp, #156] ; 0x9c - 8007a3c: 3301 adds r3, #1 - 8007a3e: 2b07 cmp r3, #7 - 8007a40: 9327 str r3, [sp, #156] ; 0x9c - 8007a42: f300 80ce bgt.w 8007be2 <_svfprintf_r+0x1156> - 8007a46: 3408 adds r4, #8 - 8007a48: 9d20 ldr r5, [sp, #128] ; 0x80 - 8007a4a: 9b09 ldr r3, [sp, #36] ; 0x24 - 8007a4c: 2e00 cmp r6, #0 - 8007a4e: eba3 0505 sub.w r5, r3, r5 - 8007a52: bfa8 it ge - 8007a54: 1bad subge r5, r5, r6 - 8007a56: 2d00 cmp r5, #0 - 8007a58: f77f abec ble.w 8007234 <_svfprintf_r+0x7a8> - 8007a5c: 2710 movs r7, #16 - 8007a5e: 4e66 ldr r6, [pc, #408] ; (8007bf8 <_svfprintf_r+0x116c>) - 8007a60: 2d10 cmp r5, #16 - 8007a62: e9dd 3227 ldrd r3, r2, [sp, #156] ; 0x9c - 8007a66: f104 0108 add.w r1, r4, #8 - 8007a6a: f103 0301 add.w r3, r3, #1 - 8007a6e: 6026 str r6, [r4, #0] - 8007a70: f77f aece ble.w 8007810 <_svfprintf_r+0xd84> - 8007a74: 3210 adds r2, #16 - 8007a76: 2b07 cmp r3, #7 - 8007a78: e9cd 3227 strd r3, r2, [sp, #156] ; 0x9c - 8007a7c: 6067 str r7, [r4, #4] - 8007a7e: dd08 ble.n 8007a92 <_svfprintf_r+0x1006> - 8007a80: 4659 mov r1, fp - 8007a82: 4648 mov r0, r9 - 8007a84: aa26 add r2, sp, #152 ; 0x98 - 8007a86: f001 fcec bl 8009462 <__ssprint_r> - 8007a8a: 2800 cmp r0, #0 - 8007a8c: f040 816e bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007a90: a929 add r1, sp, #164 ; 0xa4 - 8007a92: 460c mov r4, r1 - 8007a94: 3d10 subs r5, #16 - 8007a96: e7e3 b.n 8007a60 <_svfprintf_r+0xfd4> - 8007a98: 4659 mov r1, fp - 8007a9a: 4648 mov r0, r9 - 8007a9c: aa26 add r2, sp, #152 ; 0x98 - 8007a9e: f001 fce0 bl 8009462 <__ssprint_r> - 8007aa2: 2800 cmp r0, #0 - 8007aa4: f040 8162 bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007aa8: ac29 add r4, sp, #164 ; 0xa4 - 8007aaa: e771 b.n 8007990 <_svfprintf_r+0xf04> - 8007aac: 2010 movs r0, #16 - 8007aae: 2b07 cmp r3, #7 - 8007ab0: 4402 add r2, r0 - 8007ab2: e9cd 3227 strd r3, r2, [sp, #156] ; 0x9c - 8007ab6: 6060 str r0, [r4, #4] - 8007ab8: dd08 ble.n 8007acc <_svfprintf_r+0x1040> - 8007aba: 4659 mov r1, fp - 8007abc: 4648 mov r0, r9 - 8007abe: aa26 add r2, sp, #152 ; 0x98 - 8007ac0: f001 fccf bl 8009462 <__ssprint_r> - 8007ac4: 2800 cmp r0, #0 - 8007ac6: f040 8151 bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007aca: a929 add r1, sp, #164 ; 0xa4 - 8007acc: 460c mov r4, r1 - 8007ace: 3f10 subs r7, #16 - 8007ad0: e765 b.n 800799e <_svfprintf_r+0xf12> - 8007ad2: 460c mov r4, r1 - 8007ad4: e77d b.n 80079d2 <_svfprintf_r+0xf46> - 8007ad6: 2e00 cmp r6, #0 - 8007ad8: d049 beq.n 8007b6e <_svfprintf_r+0x10e2> - 8007ada: 3e01 subs r6, #1 - 8007adc: 9b18 ldr r3, [sp, #96] ; 0x60 - 8007ade: 9a15 ldr r2, [sp, #84] ; 0x54 - 8007ae0: 6023 str r3, [r4, #0] - 8007ae2: 9b15 ldr r3, [sp, #84] ; 0x54 - 8007ae4: 6063 str r3, [r4, #4] - 8007ae6: 9b28 ldr r3, [sp, #160] ; 0xa0 - 8007ae8: 4413 add r3, r2 - 8007aea: 9328 str r3, [sp, #160] ; 0xa0 - 8007aec: 9b27 ldr r3, [sp, #156] ; 0x9c - 8007aee: 3301 adds r3, #1 - 8007af0: 2b07 cmp r3, #7 - 8007af2: 9327 str r3, [sp, #156] ; 0x9c - 8007af4: dc42 bgt.n 8007b7c <_svfprintf_r+0x10f0> - 8007af6: 3408 adds r4, #8 - 8007af8: 9b09 ldr r3, [sp, #36] ; 0x24 - 8007afa: 9a0d ldr r2, [sp, #52] ; 0x34 - 8007afc: 4453 add r3, sl - 8007afe: 7812 ldrb r2, [r2, #0] - 8007b00: 1b5b subs r3, r3, r5 - 8007b02: 429a cmp r2, r3 - 8007b04: bfa8 it ge - 8007b06: 461a movge r2, r3 - 8007b08: 2a00 cmp r2, #0 - 8007b0a: 9207 str r2, [sp, #28] - 8007b0c: dd0a ble.n 8007b24 <_svfprintf_r+0x1098> - 8007b0e: 9b28 ldr r3, [sp, #160] ; 0xa0 - 8007b10: e9c4 5200 strd r5, r2, [r4] - 8007b14: 4413 add r3, r2 - 8007b16: 9328 str r3, [sp, #160] ; 0xa0 - 8007b18: 9b27 ldr r3, [sp, #156] ; 0x9c - 8007b1a: 3301 adds r3, #1 - 8007b1c: 2b07 cmp r3, #7 - 8007b1e: 9327 str r3, [sp, #156] ; 0x9c - 8007b20: dc36 bgt.n 8007b90 <_svfprintf_r+0x1104> - 8007b22: 3408 adds r4, #8 - 8007b24: 9b0d ldr r3, [sp, #52] ; 0x34 - 8007b26: 781f ldrb r7, [r3, #0] - 8007b28: 9b07 ldr r3, [sp, #28] - 8007b2a: 2b00 cmp r3, #0 - 8007b2c: bfa8 it ge - 8007b2e: 1aff subge r7, r7, r3 - 8007b30: 2f00 cmp r7, #0 - 8007b32: dd18 ble.n 8007b66 <_svfprintf_r+0x10da> - 8007b34: e9dd 3227 ldrd r3, r2, [sp, #156] ; 0x9c - 8007b38: 482f ldr r0, [pc, #188] ; (8007bf8 <_svfprintf_r+0x116c>) - 8007b3a: 2f10 cmp r7, #16 - 8007b3c: f103 0301 add.w r3, r3, #1 - 8007b40: f104 0108 add.w r1, r4, #8 - 8007b44: 6020 str r0, [r4, #0] - 8007b46: dc2d bgt.n 8007ba4 <_svfprintf_r+0x1118> - 8007b48: 443a add r2, r7 - 8007b4a: 2b07 cmp r3, #7 - 8007b4c: e9cd 3227 strd r3, r2, [sp, #156] ; 0x9c - 8007b50: 6067 str r7, [r4, #4] - 8007b52: dd3a ble.n 8007bca <_svfprintf_r+0x113e> - 8007b54: 4659 mov r1, fp - 8007b56: 4648 mov r0, r9 - 8007b58: aa26 add r2, sp, #152 ; 0x98 - 8007b5a: f001 fc82 bl 8009462 <__ssprint_r> - 8007b5e: 2800 cmp r0, #0 - 8007b60: f040 8104 bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007b64: ac29 add r4, sp, #164 ; 0xa4 - 8007b66: 9b0d ldr r3, [sp, #52] ; 0x34 - 8007b68: 781b ldrb r3, [r3, #0] - 8007b6a: 441d add r5, r3 - 8007b6c: e735 b.n 80079da <_svfprintf_r+0xf4e> - 8007b6e: 9b0d ldr r3, [sp, #52] ; 0x34 - 8007b70: 3b01 subs r3, #1 - 8007b72: 930d str r3, [sp, #52] ; 0x34 - 8007b74: 9b0c ldr r3, [sp, #48] ; 0x30 - 8007b76: 3b01 subs r3, #1 - 8007b78: 930c str r3, [sp, #48] ; 0x30 - 8007b7a: e7af b.n 8007adc <_svfprintf_r+0x1050> - 8007b7c: 4659 mov r1, fp - 8007b7e: 4648 mov r0, r9 - 8007b80: aa26 add r2, sp, #152 ; 0x98 - 8007b82: f001 fc6e bl 8009462 <__ssprint_r> - 8007b86: 2800 cmp r0, #0 - 8007b88: f040 80f0 bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007b8c: ac29 add r4, sp, #164 ; 0xa4 - 8007b8e: e7b3 b.n 8007af8 <_svfprintf_r+0x106c> - 8007b90: 4659 mov r1, fp - 8007b92: 4648 mov r0, r9 - 8007b94: aa26 add r2, sp, #152 ; 0x98 - 8007b96: f001 fc64 bl 8009462 <__ssprint_r> - 8007b9a: 2800 cmp r0, #0 - 8007b9c: f040 80e6 bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007ba0: ac29 add r4, sp, #164 ; 0xa4 - 8007ba2: e7bf b.n 8007b24 <_svfprintf_r+0x1098> - 8007ba4: 2010 movs r0, #16 - 8007ba6: 2b07 cmp r3, #7 - 8007ba8: 4402 add r2, r0 - 8007baa: e9cd 3227 strd r3, r2, [sp, #156] ; 0x9c - 8007bae: 6060 str r0, [r4, #4] - 8007bb0: dd08 ble.n 8007bc4 <_svfprintf_r+0x1138> - 8007bb2: 4659 mov r1, fp - 8007bb4: 4648 mov r0, r9 - 8007bb6: aa26 add r2, sp, #152 ; 0x98 - 8007bb8: f001 fc53 bl 8009462 <__ssprint_r> - 8007bbc: 2800 cmp r0, #0 - 8007bbe: f040 80d5 bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007bc2: a929 add r1, sp, #164 ; 0xa4 - 8007bc4: 460c mov r4, r1 - 8007bc6: 3f10 subs r7, #16 - 8007bc8: e7b4 b.n 8007b34 <_svfprintf_r+0x10a8> - 8007bca: 460c mov r4, r1 - 8007bcc: e7cb b.n 8007b66 <_svfprintf_r+0x10da> - 8007bce: 4659 mov r1, fp - 8007bd0: 4648 mov r0, r9 - 8007bd2: aa26 add r2, sp, #152 ; 0x98 - 8007bd4: f001 fc45 bl 8009462 <__ssprint_r> - 8007bd8: 2800 cmp r0, #0 - 8007bda: f040 80c7 bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007bde: ac29 add r4, sp, #164 ; 0xa4 - 8007be0: e71b b.n 8007a1a <_svfprintf_r+0xf8e> - 8007be2: 4659 mov r1, fp - 8007be4: 4648 mov r0, r9 - 8007be6: aa26 add r2, sp, #152 ; 0x98 - 8007be8: f001 fc3b bl 8009462 <__ssprint_r> - 8007bec: 2800 cmp r0, #0 - 8007bee: f040 80bd bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007bf2: ac29 add r4, sp, #164 ; 0xa4 - 8007bf4: e728 b.n 8007a48 <_svfprintf_r+0xfbc> - 8007bf6: bf00 nop - 8007bf8: 0800b124 .word 0x0800b124 - 8007bfc: 9a09 ldr r2, [sp, #36] ; 0x24 - 8007bfe: 9b27 ldr r3, [sp, #156] ; 0x9c - 8007c00: 2a01 cmp r2, #1 - 8007c02: f107 0701 add.w r7, r7, #1 - 8007c06: f103 0301 add.w r3, r3, #1 - 8007c0a: f104 0508 add.w r5, r4, #8 - 8007c0e: dc02 bgt.n 8007c16 <_svfprintf_r+0x118a> - 8007c10: f018 0f01 tst.w r8, #1 - 8007c14: d07e beq.n 8007d14 <_svfprintf_r+0x1288> - 8007c16: 2201 movs r2, #1 - 8007c18: 2b07 cmp r3, #7 - 8007c1a: e9cd 3727 strd r3, r7, [sp, #156] ; 0x9c - 8007c1e: f8c4 a000 str.w sl, [r4] - 8007c22: 6062 str r2, [r4, #4] - 8007c24: dd08 ble.n 8007c38 <_svfprintf_r+0x11ac> - 8007c26: 4659 mov r1, fp - 8007c28: 4648 mov r0, r9 - 8007c2a: aa26 add r2, sp, #152 ; 0x98 - 8007c2c: f001 fc19 bl 8009462 <__ssprint_r> - 8007c30: 2800 cmp r0, #0 - 8007c32: f040 809b bne.w 8007d6c <_svfprintf_r+0x12e0> - 8007c36: ad29 add r5, sp, #164 ; 0xa4 - 8007c38: 9b17 ldr r3, [sp, #92] ; 0x5c - 8007c3a: 9a12 ldr r2, [sp, #72] ; 0x48 - 8007c3c: 602b str r3, [r5, #0] - 8007c3e: 9b12 ldr r3, [sp, #72] ; 0x48 - 8007c40: 606b str r3, [r5, #4] - 8007c42: 9b28 ldr r3, [sp, #160] ; 0xa0 - 8007c44: 4413 add r3, r2 - 8007c46: 9328 str r3, [sp, #160] ; 0xa0 - 8007c48: 9b27 ldr r3, [sp, #156] ; 0x9c - 8007c4a: 3301 adds r3, #1 - 8007c4c: 2b07 cmp r3, #7 - 8007c4e: 9327 str r3, [sp, #156] ; 0x9c - 8007c50: dc32 bgt.n 8007cb8 <_svfprintf_r+0x122c> - 8007c52: 3508 adds r5, #8 - 8007c54: 9b09 ldr r3, [sp, #36] ; 0x24 - 8007c56: 2200 movs r2, #0 - 8007c58: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 - 8007c5c: 1e5c subs r4, r3, #1 - 8007c5e: 2300 movs r3, #0 - 8007c60: f7f8 feac bl 80009bc <__aeabi_dcmpeq> - 8007c64: 2800 cmp r0, #0 - 8007c66: d130 bne.n 8007cca <_svfprintf_r+0x123e> - 8007c68: 9927 ldr r1, [sp, #156] ; 0x9c - 8007c6a: 9b28 ldr r3, [sp, #160] ; 0xa0 - 8007c6c: 9a09 ldr r2, [sp, #36] ; 0x24 - 8007c6e: 3101 adds r1, #1 - 8007c70: 3b01 subs r3, #1 - 8007c72: f10a 0001 add.w r0, sl, #1 - 8007c76: 4413 add r3, r2 - 8007c78: 2907 cmp r1, #7 - 8007c7a: e9c5 0400 strd r0, r4, [r5] - 8007c7e: e9cd 1327 strd r1, r3, [sp, #156] ; 0x9c - 8007c82: dd50 ble.n 8007d26 <_svfprintf_r+0x129a> - 8007c84: 4659 mov r1, fp - 8007c86: 4648 mov r0, r9 - 8007c88: aa26 add r2, sp, #152 ; 0x98 - 8007c8a: f001 fbea bl 8009462 <__ssprint_r> - 8007c8e: 2800 cmp r0, #0 - 8007c90: d16c bne.n 8007d6c <_svfprintf_r+0x12e0> - 8007c92: ad29 add r5, sp, #164 ; 0xa4 - 8007c94: ab22 add r3, sp, #136 ; 0x88 - 8007c96: 602b str r3, [r5, #0] - 8007c98: 9b19 ldr r3, [sp, #100] ; 0x64 - 8007c9a: 9a19 ldr r2, [sp, #100] ; 0x64 - 8007c9c: 606b str r3, [r5, #4] - 8007c9e: 9b28 ldr r3, [sp, #160] ; 0xa0 - 8007ca0: 4413 add r3, r2 - 8007ca2: 9328 str r3, [sp, #160] ; 0xa0 - 8007ca4: 9b27 ldr r3, [sp, #156] ; 0x9c - 8007ca6: 3301 adds r3, #1 - 8007ca8: 2b07 cmp r3, #7 - 8007caa: 9327 str r3, [sp, #156] ; 0x9c - 8007cac: f73f adb7 bgt.w 800781e <_svfprintf_r+0xd92> - 8007cb0: f105 0408 add.w r4, r5, #8 - 8007cb4: f7ff babe b.w 8007234 <_svfprintf_r+0x7a8> - 8007cb8: 4659 mov r1, fp - 8007cba: 4648 mov r0, r9 - 8007cbc: aa26 add r2, sp, #152 ; 0x98 - 8007cbe: f001 fbd0 bl 8009462 <__ssprint_r> - 8007cc2: 2800 cmp r0, #0 - 8007cc4: d152 bne.n 8007d6c <_svfprintf_r+0x12e0> - 8007cc6: ad29 add r5, sp, #164 ; 0xa4 - 8007cc8: e7c4 b.n 8007c54 <_svfprintf_r+0x11c8> - 8007cca: 2c00 cmp r4, #0 - 8007ccc: dde2 ble.n 8007c94 <_svfprintf_r+0x1208> - 8007cce: 2710 movs r7, #16 - 8007cd0: 4e56 ldr r6, [pc, #344] ; (8007e2c <_svfprintf_r+0x13a0>) - 8007cd2: 2c10 cmp r4, #16 - 8007cd4: e9dd 3227 ldrd r3, r2, [sp, #156] ; 0x9c - 8007cd8: f105 0108 add.w r1, r5, #8 - 8007cdc: f103 0301 add.w r3, r3, #1 - 8007ce0: 602e str r6, [r5, #0] - 8007ce2: dc07 bgt.n 8007cf4 <_svfprintf_r+0x1268> - 8007ce4: 606c str r4, [r5, #4] - 8007ce6: 2b07 cmp r3, #7 - 8007ce8: 4414 add r4, r2 - 8007cea: e9cd 3427 strd r3, r4, [sp, #156] ; 0x9c - 8007cee: dcc9 bgt.n 8007c84 <_svfprintf_r+0x11f8> - 8007cf0: 460d mov r5, r1 - 8007cf2: e7cf b.n 8007c94 <_svfprintf_r+0x1208> - 8007cf4: 3210 adds r2, #16 - 8007cf6: 2b07 cmp r3, #7 - 8007cf8: e9cd 3227 strd r3, r2, [sp, #156] ; 0x9c - 8007cfc: 606f str r7, [r5, #4] - 8007cfe: dd06 ble.n 8007d0e <_svfprintf_r+0x1282> - 8007d00: 4659 mov r1, fp - 8007d02: 4648 mov r0, r9 - 8007d04: aa26 add r2, sp, #152 ; 0x98 - 8007d06: f001 fbac bl 8009462 <__ssprint_r> - 8007d0a: bb78 cbnz r0, 8007d6c <_svfprintf_r+0x12e0> - 8007d0c: a929 add r1, sp, #164 ; 0xa4 - 8007d0e: 460d mov r5, r1 - 8007d10: 3c10 subs r4, #16 - 8007d12: e7de b.n 8007cd2 <_svfprintf_r+0x1246> - 8007d14: 2201 movs r2, #1 - 8007d16: 2b07 cmp r3, #7 - 8007d18: e9cd 3727 strd r3, r7, [sp, #156] ; 0x9c - 8007d1c: f8c4 a000 str.w sl, [r4] - 8007d20: 6062 str r2, [r4, #4] - 8007d22: ddb7 ble.n 8007c94 <_svfprintf_r+0x1208> - 8007d24: e7ae b.n 8007c84 <_svfprintf_r+0x11f8> - 8007d26: 3508 adds r5, #8 - 8007d28: e7b4 b.n 8007c94 <_svfprintf_r+0x1208> - 8007d2a: 460c mov r4, r1 - 8007d2c: f7ff ba82 b.w 8007234 <_svfprintf_r+0x7a8> - 8007d30: e9dd 3213 ldrd r3, r2, [sp, #76] ; 0x4c - 8007d34: 1a9d subs r5, r3, r2 - 8007d36: 2d00 cmp r5, #0 - 8007d38: f77f aa80 ble.w 800723c <_svfprintf_r+0x7b0> - 8007d3c: 2710 movs r7, #16 - 8007d3e: 4e3c ldr r6, [pc, #240] ; (8007e30 <_svfprintf_r+0x13a4>) - 8007d40: 2d10 cmp r5, #16 - 8007d42: e9dd 3227 ldrd r3, r2, [sp, #156] ; 0x9c - 8007d46: 6026 str r6, [r4, #0] - 8007d48: f103 0301 add.w r3, r3, #1 - 8007d4c: dc18 bgt.n 8007d80 <_svfprintf_r+0x12f4> - 8007d4e: 6065 str r5, [r4, #4] - 8007d50: 2b07 cmp r3, #7 - 8007d52: 4415 add r5, r2 - 8007d54: e9cd 3527 strd r3, r5, [sp, #156] ; 0x9c - 8007d58: f77f aa70 ble.w 800723c <_svfprintf_r+0x7b0> - 8007d5c: 4659 mov r1, fp - 8007d5e: 4648 mov r0, r9 - 8007d60: aa26 add r2, sp, #152 ; 0x98 - 8007d62: f001 fb7e bl 8009462 <__ssprint_r> - 8007d66: 2800 cmp r0, #0 - 8007d68: f43f aa68 beq.w 800723c <_svfprintf_r+0x7b0> - 8007d6c: 9b08 ldr r3, [sp, #32] - 8007d6e: 2b00 cmp r3, #0 - 8007d70: f43f a88d beq.w 8006e8e <_svfprintf_r+0x402> - 8007d74: 4619 mov r1, r3 - 8007d76: 4648 mov r0, r9 - 8007d78: f000 ff22 bl 8008bc0 <_free_r> - 8007d7c: f7ff b887 b.w 8006e8e <_svfprintf_r+0x402> - 8007d80: 3210 adds r2, #16 - 8007d82: 2b07 cmp r3, #7 - 8007d84: e9cd 3227 strd r3, r2, [sp, #156] ; 0x9c - 8007d88: 6067 str r7, [r4, #4] - 8007d8a: dc02 bgt.n 8007d92 <_svfprintf_r+0x1306> - 8007d8c: 3408 adds r4, #8 - 8007d8e: 3d10 subs r5, #16 - 8007d90: e7d6 b.n 8007d40 <_svfprintf_r+0x12b4> - 8007d92: 4659 mov r1, fp - 8007d94: 4648 mov r0, r9 - 8007d96: aa26 add r2, sp, #152 ; 0x98 - 8007d98: f001 fb63 bl 8009462 <__ssprint_r> - 8007d9c: 2800 cmp r0, #0 - 8007d9e: d1e5 bne.n 8007d6c <_svfprintf_r+0x12e0> - 8007da0: ac29 add r4, sp, #164 ; 0xa4 - 8007da2: e7f4 b.n 8007d8e <_svfprintf_r+0x1302> - 8007da4: 4648 mov r0, r9 - 8007da6: 9908 ldr r1, [sp, #32] - 8007da8: f000 ff0a bl 8008bc0 <_free_r> - 8007dac: f7ff ba5e b.w 800726c <_svfprintf_r+0x7e0> - 8007db0: 9b28 ldr r3, [sp, #160] ; 0xa0 - 8007db2: 2b00 cmp r3, #0 - 8007db4: f43f a86b beq.w 8006e8e <_svfprintf_r+0x402> - 8007db8: 4659 mov r1, fp - 8007dba: 4648 mov r0, r9 - 8007dbc: aa26 add r2, sp, #152 ; 0x98 - 8007dbe: f001 fb50 bl 8009462 <__ssprint_r> - 8007dc2: f7ff b864 b.w 8006e8e <_svfprintf_r+0x402> - 8007dc6: ea56 0207 orrs.w r2, r6, r7 - 8007dca: f8cd 8020 str.w r8, [sp, #32] - 8007dce: f43f ab70 beq.w 80074b2 <_svfprintf_r+0xa26> - 8007dd2: 2b01 cmp r3, #1 - 8007dd4: f43f ac0d beq.w 80075f2 <_svfprintf_r+0xb66> - 8007dd8: 2b02 cmp r3, #2 - 8007dda: f50d 7aa4 add.w sl, sp, #328 ; 0x148 - 8007dde: f43f ac55 beq.w 800768c <_svfprintf_r+0xc00> - 8007de2: f006 0307 and.w r3, r6, #7 - 8007de6: 08f6 lsrs r6, r6, #3 - 8007de8: ea46 7647 orr.w r6, r6, r7, lsl #29 - 8007dec: 08ff lsrs r7, r7, #3 - 8007dee: 3330 adds r3, #48 ; 0x30 - 8007df0: ea56 0107 orrs.w r1, r6, r7 - 8007df4: 4652 mov r2, sl - 8007df6: f80a 3d01 strb.w r3, [sl, #-1]! - 8007dfa: d1f2 bne.n 8007de2 <_svfprintf_r+0x1356> - 8007dfc: 9908 ldr r1, [sp, #32] - 8007dfe: 07c9 lsls r1, r1, #31 - 8007e00: d506 bpl.n 8007e10 <_svfprintf_r+0x1384> - 8007e02: 2b30 cmp r3, #48 ; 0x30 - 8007e04: d004 beq.n 8007e10 <_svfprintf_r+0x1384> - 8007e06: 2330 movs r3, #48 ; 0x30 - 8007e08: f80a 3c01 strb.w r3, [sl, #-1] - 8007e0c: f1a2 0a02 sub.w sl, r2, #2 - 8007e10: ab52 add r3, sp, #328 ; 0x148 - 8007e12: eba3 030a sub.w r3, r3, sl - 8007e16: 9f07 ldr r7, [sp, #28] - 8007e18: 9307 str r3, [sp, #28] - 8007e1a: 2300 movs r3, #0 - 8007e1c: 461e mov r6, r3 - 8007e1e: f8dd 8020 ldr.w r8, [sp, #32] - 8007e22: 9308 str r3, [sp, #32] - 8007e24: 461d mov r5, r3 - 8007e26: 930c str r3, [sp, #48] ; 0x30 - 8007e28: f7ff b946 b.w 80070b8 <_svfprintf_r+0x62c> - 8007e2c: 0800b124 .word 0x0800b124 - 8007e30: 0800b114 .word 0x0800b114 - -08007e34 : - 8007e34: 2808 cmp r0, #8 - 8007e36: b508 push {r3, lr} - 8007e38: d006 beq.n 8007e48 - 8007e3a: f7fe fa77 bl 800632c <__errno> - 8007e3e: 2316 movs r3, #22 - 8007e40: 6003 str r3, [r0, #0] - 8007e42: f04f 30ff mov.w r0, #4294967295 - 8007e46: bd08 pop {r3, pc} - 8007e48: f44f 5080 mov.w r0, #4096 ; 0x1000 - 8007e4c: e7fb b.n 8007e46 - ... - -08007e50 : - 8007e50: 4b02 ldr r3, [pc, #8] ; (8007e5c ) - 8007e52: b113 cbz r3, 8007e5a - 8007e54: 4802 ldr r0, [pc, #8] ; (8007e60 ) - 8007e56: f000 b805 b.w 8007e64 - 8007e5a: 4770 bx lr - 8007e5c: 00000000 .word 0x00000000 - 8007e60: 08008af1 .word 0x08008af1 - -08007e64 : - 8007e64: 2300 movs r3, #0 - 8007e66: 4601 mov r1, r0 - 8007e68: 461a mov r2, r3 - 8007e6a: 4618 mov r0, r3 - 8007e6c: f001 bb74 b.w 8009558 <__register_exitproc> - -08007e70 : - 8007e70: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8007e74: 6903 ldr r3, [r0, #16] - 8007e76: 690c ldr r4, [r1, #16] - 8007e78: 4607 mov r7, r0 - 8007e7a: 42a3 cmp r3, r4 - 8007e7c: f2c0 8082 blt.w 8007f84 - 8007e80: 3c01 subs r4, #1 - 8007e82: f100 0514 add.w r5, r0, #20 - 8007e86: f101 0814 add.w r8, r1, #20 - 8007e8a: eb05 0384 add.w r3, r5, r4, lsl #2 - 8007e8e: 9301 str r3, [sp, #4] - 8007e90: f858 3024 ldr.w r3, [r8, r4, lsl #2] - 8007e94: f855 2024 ldr.w r2, [r5, r4, lsl #2] - 8007e98: 3301 adds r3, #1 - 8007e9a: 429a cmp r2, r3 - 8007e9c: fbb2 f6f3 udiv r6, r2, r3 - 8007ea0: ea4f 0b84 mov.w fp, r4, lsl #2 - 8007ea4: eb08 0984 add.w r9, r8, r4, lsl #2 - 8007ea8: d331 bcc.n 8007f0e - 8007eaa: f04f 0e00 mov.w lr, #0 - 8007eae: 4640 mov r0, r8 - 8007eb0: 46ac mov ip, r5 - 8007eb2: 46f2 mov sl, lr - 8007eb4: f850 2b04 ldr.w r2, [r0], #4 - 8007eb8: b293 uxth r3, r2 - 8007eba: fb06 e303 mla r3, r6, r3, lr - 8007ebe: 0c12 lsrs r2, r2, #16 - 8007ec0: ea4f 4e13 mov.w lr, r3, lsr #16 - 8007ec4: b29b uxth r3, r3 - 8007ec6: fb06 e202 mla r2, r6, r2, lr - 8007eca: ebaa 0303 sub.w r3, sl, r3 - 8007ece: f8dc a000 ldr.w sl, [ip] - 8007ed2: ea4f 4e12 mov.w lr, r2, lsr #16 - 8007ed6: fa1f fa8a uxth.w sl, sl - 8007eda: 4453 add r3, sl - 8007edc: f8dc a000 ldr.w sl, [ip] - 8007ee0: b292 uxth r2, r2 - 8007ee2: ebc2 421a rsb r2, r2, sl, lsr #16 - 8007ee6: eb02 4223 add.w r2, r2, r3, asr #16 - 8007eea: b29b uxth r3, r3 - 8007eec: ea43 4302 orr.w r3, r3, r2, lsl #16 - 8007ef0: 4581 cmp r9, r0 - 8007ef2: ea4f 4a22 mov.w sl, r2, asr #16 - 8007ef6: f84c 3b04 str.w r3, [ip], #4 - 8007efa: d2db bcs.n 8007eb4 - 8007efc: f855 300b ldr.w r3, [r5, fp] - 8007f00: b92b cbnz r3, 8007f0e - 8007f02: 9b01 ldr r3, [sp, #4] - 8007f04: 3b04 subs r3, #4 - 8007f06: 429d cmp r5, r3 - 8007f08: 461a mov r2, r3 - 8007f0a: d32f bcc.n 8007f6c - 8007f0c: 613c str r4, [r7, #16] - 8007f0e: 4638 mov r0, r7 - 8007f10: f001 f95c bl 80091cc <__mcmp> - 8007f14: 2800 cmp r0, #0 - 8007f16: db25 blt.n 8007f64 - 8007f18: 4628 mov r0, r5 - 8007f1a: f04f 0c00 mov.w ip, #0 - 8007f1e: 3601 adds r6, #1 - 8007f20: f858 1b04 ldr.w r1, [r8], #4 - 8007f24: f8d0 e000 ldr.w lr, [r0] - 8007f28: b28b uxth r3, r1 - 8007f2a: ebac 0303 sub.w r3, ip, r3 - 8007f2e: fa1f f28e uxth.w r2, lr - 8007f32: 4413 add r3, r2 - 8007f34: 0c0a lsrs r2, r1, #16 - 8007f36: ebc2 421e rsb r2, r2, lr, lsr #16 - 8007f3a: eb02 4223 add.w r2, r2, r3, asr #16 - 8007f3e: b29b uxth r3, r3 - 8007f40: ea43 4302 orr.w r3, r3, r2, lsl #16 - 8007f44: 45c1 cmp r9, r8 - 8007f46: ea4f 4c22 mov.w ip, r2, asr #16 - 8007f4a: f840 3b04 str.w r3, [r0], #4 - 8007f4e: d2e7 bcs.n 8007f20 - 8007f50: f855 2024 ldr.w r2, [r5, r4, lsl #2] - 8007f54: eb05 0384 add.w r3, r5, r4, lsl #2 - 8007f58: b922 cbnz r2, 8007f64 - 8007f5a: 3b04 subs r3, #4 - 8007f5c: 429d cmp r5, r3 - 8007f5e: 461a mov r2, r3 - 8007f60: d30a bcc.n 8007f78 - 8007f62: 613c str r4, [r7, #16] - 8007f64: 4630 mov r0, r6 - 8007f66: b003 add sp, #12 - 8007f68: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 8007f6c: 6812 ldr r2, [r2, #0] - 8007f6e: 3b04 subs r3, #4 - 8007f70: 2a00 cmp r2, #0 - 8007f72: d1cb bne.n 8007f0c - 8007f74: 3c01 subs r4, #1 - 8007f76: e7c6 b.n 8007f06 - 8007f78: 6812 ldr r2, [r2, #0] - 8007f7a: 3b04 subs r3, #4 - 8007f7c: 2a00 cmp r2, #0 - 8007f7e: d1f0 bne.n 8007f62 - 8007f80: 3c01 subs r4, #1 - 8007f82: e7eb b.n 8007f5c - 8007f84: 2000 movs r0, #0 - 8007f86: e7ee b.n 8007f66 - -08007f88 <_dtoa_r>: - 8007f88: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8007f8c: 6c01 ldr r1, [r0, #64] ; 0x40 - 8007f8e: b097 sub sp, #92 ; 0x5c - 8007f90: 4681 mov r9, r0 - 8007f92: 4614 mov r4, r2 - 8007f94: 461d mov r5, r3 - 8007f96: 4692 mov sl, r2 - 8007f98: 469b mov fp, r3 - 8007f9a: 9e23 ldr r6, [sp, #140] ; 0x8c - 8007f9c: b149 cbz r1, 8007fb2 <_dtoa_r+0x2a> - 8007f9e: 2301 movs r3, #1 - 8007fa0: 6c42 ldr r2, [r0, #68] ; 0x44 - 8007fa2: 4093 lsls r3, r2 - 8007fa4: 608b str r3, [r1, #8] - 8007fa6: 604a str r2, [r1, #4] - 8007fa8: f000 ff05 bl 8008db6 <_Bfree> - 8007fac: 2300 movs r3, #0 - 8007fae: f8c9 3040 str.w r3, [r9, #64] ; 0x40 - 8007fb2: 1e2b subs r3, r5, #0 - 8007fb4: bfad iteet ge - 8007fb6: 2300 movge r3, #0 - 8007fb8: 2201 movlt r2, #1 - 8007fba: f023 4b00 biclt.w fp, r3, #2147483648 ; 0x80000000 - 8007fbe: 6033 strge r3, [r6, #0] - 8007fc0: 4b9f ldr r3, [pc, #636] ; (8008240 <_dtoa_r+0x2b8>) - 8007fc2: bfb8 it lt - 8007fc4: 6032 strlt r2, [r6, #0] - 8007fc6: ea33 030b bics.w r3, r3, fp - 8007fca: d119 bne.n 8008000 <_dtoa_r+0x78> - 8007fcc: f242 730f movw r3, #9999 ; 0x270f - 8007fd0: 9a22 ldr r2, [sp, #136] ; 0x88 - 8007fd2: 6013 str r3, [r2, #0] - 8007fd4: f3cb 0313 ubfx r3, fp, #0, #20 - 8007fd8: 4323 orrs r3, r4 - 8007fda: f000 8574 beq.w 8008ac6 <_dtoa_r+0xb3e> - 8007fde: 9b24 ldr r3, [sp, #144] ; 0x90 - 8007fe0: b90b cbnz r3, 8007fe6 <_dtoa_r+0x5e> - 8007fe2: 4b98 ldr r3, [pc, #608] ; (8008244 <_dtoa_r+0x2bc>) - 8007fe4: e020 b.n 8008028 <_dtoa_r+0xa0> - 8007fe6: 4b97 ldr r3, [pc, #604] ; (8008244 <_dtoa_r+0x2bc>) - 8007fe8: 9304 str r3, [sp, #16] - 8007fea: 3303 adds r3, #3 - 8007fec: 9a24 ldr r2, [sp, #144] ; 0x90 - 8007fee: 6013 str r3, [r2, #0] - 8007ff0: 9804 ldr r0, [sp, #16] - 8007ff2: b017 add sp, #92 ; 0x5c - 8007ff4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 8007ff8: 4b93 ldr r3, [pc, #588] ; (8008248 <_dtoa_r+0x2c0>) - 8007ffa: 9304 str r3, [sp, #16] - 8007ffc: 3308 adds r3, #8 - 8007ffe: e7f5 b.n 8007fec <_dtoa_r+0x64> - 8008000: 2200 movs r2, #0 - 8008002: 2300 movs r3, #0 - 8008004: 4650 mov r0, sl - 8008006: 4659 mov r1, fp - 8008008: e9cd ab0c strd sl, fp, [sp, #48] ; 0x30 - 800800c: f7f8 fcd6 bl 80009bc <__aeabi_dcmpeq> - 8008010: 4607 mov r7, r0 - 8008012: b158 cbz r0, 800802c <_dtoa_r+0xa4> - 8008014: 2301 movs r3, #1 - 8008016: 9a22 ldr r2, [sp, #136] ; 0x88 - 8008018: 6013 str r3, [r2, #0] - 800801a: 9b24 ldr r3, [sp, #144] ; 0x90 - 800801c: 2b00 cmp r3, #0 - 800801e: f000 854f beq.w 8008ac0 <_dtoa_r+0xb38> - 8008022: 488a ldr r0, [pc, #552] ; (800824c <_dtoa_r+0x2c4>) - 8008024: 6018 str r0, [r3, #0] - 8008026: 1e43 subs r3, r0, #1 - 8008028: 9304 str r3, [sp, #16] - 800802a: e7e1 b.n 8007ff0 <_dtoa_r+0x68> - 800802c: ab14 add r3, sp, #80 ; 0x50 - 800802e: 9301 str r3, [sp, #4] - 8008030: ab15 add r3, sp, #84 ; 0x54 - 8008032: 9300 str r3, [sp, #0] - 8008034: 4648 mov r0, r9 - 8008036: e9dd 230c ldrd r2, r3, [sp, #48] ; 0x30 - 800803a: f001 f96f bl 800931c <__d2b> - 800803e: f3cb 560a ubfx r6, fp, #20, #11 - 8008042: 9003 str r0, [sp, #12] - 8008044: 2e00 cmp r6, #0 - 8008046: d07c beq.n 8008142 <_dtoa_r+0x1ba> - 8008048: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 - 800804c: 9b0d ldr r3, [sp, #52] ; 0x34 - 800804e: f2a6 36ff subw r6, r6, #1023 ; 0x3ff - 8008052: f3c3 0313 ubfx r3, r3, #0, #20 - 8008056: f043 517f orr.w r1, r3, #1069547520 ; 0x3fc00000 - 800805a: f441 1140 orr.w r1, r1, #3145728 ; 0x300000 - 800805e: 9713 str r7, [sp, #76] ; 0x4c - 8008060: 2200 movs r2, #0 - 8008062: 4b7b ldr r3, [pc, #492] ; (8008250 <_dtoa_r+0x2c8>) - 8008064: f7f8 f88a bl 800017c <__aeabi_dsub> - 8008068: a36f add r3, pc, #444 ; (adr r3, 8008228 <_dtoa_r+0x2a0>) - 800806a: e9d3 2300 ldrd r2, r3, [r3] - 800806e: f7f8 fa3d bl 80004ec <__aeabi_dmul> - 8008072: a36f add r3, pc, #444 ; (adr r3, 8008230 <_dtoa_r+0x2a8>) - 8008074: e9d3 2300 ldrd r2, r3, [r3] - 8008078: f7f8 f882 bl 8000180 <__adddf3> - 800807c: 4604 mov r4, r0 - 800807e: 4630 mov r0, r6 - 8008080: 460d mov r5, r1 - 8008082: f7f8 f9c9 bl 8000418 <__aeabi_i2d> - 8008086: a36c add r3, pc, #432 ; (adr r3, 8008238 <_dtoa_r+0x2b0>) - 8008088: e9d3 2300 ldrd r2, r3, [r3] - 800808c: f7f8 fa2e bl 80004ec <__aeabi_dmul> - 8008090: 4602 mov r2, r0 - 8008092: 460b mov r3, r1 - 8008094: 4620 mov r0, r4 - 8008096: 4629 mov r1, r5 - 8008098: f7f8 f872 bl 8000180 <__adddf3> - 800809c: 4604 mov r4, r0 - 800809e: 460d mov r5, r1 - 80080a0: f7f8 fcd4 bl 8000a4c <__aeabi_d2iz> - 80080a4: 2200 movs r2, #0 - 80080a6: 4680 mov r8, r0 - 80080a8: 2300 movs r3, #0 - 80080aa: 4620 mov r0, r4 - 80080ac: 4629 mov r1, r5 - 80080ae: f7f8 fc8f bl 80009d0 <__aeabi_dcmplt> - 80080b2: b148 cbz r0, 80080c8 <_dtoa_r+0x140> - 80080b4: 4640 mov r0, r8 - 80080b6: f7f8 f9af bl 8000418 <__aeabi_i2d> - 80080ba: 4622 mov r2, r4 - 80080bc: 462b mov r3, r5 - 80080be: f7f8 fc7d bl 80009bc <__aeabi_dcmpeq> - 80080c2: b908 cbnz r0, 80080c8 <_dtoa_r+0x140> - 80080c4: f108 38ff add.w r8, r8, #4294967295 - 80080c8: f1b8 0f16 cmp.w r8, #22 - 80080cc: d856 bhi.n 800817c <_dtoa_r+0x1f4> - 80080ce: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 - 80080d2: 4b60 ldr r3, [pc, #384] ; (8008254 <_dtoa_r+0x2cc>) - 80080d4: eb03 03c8 add.w r3, r3, r8, lsl #3 - 80080d8: e9d3 2300 ldrd r2, r3, [r3] - 80080dc: f7f8 fc78 bl 80009d0 <__aeabi_dcmplt> - 80080e0: 2800 cmp r0, #0 - 80080e2: d04d beq.n 8008180 <_dtoa_r+0x1f8> - 80080e4: 2300 movs r3, #0 - 80080e6: f108 38ff add.w r8, r8, #4294967295 - 80080ea: 930f str r3, [sp, #60] ; 0x3c - 80080ec: 9b14 ldr r3, [sp, #80] ; 0x50 - 80080ee: 1b9e subs r6, r3, r6 - 80080f0: 1e73 subs r3, r6, #1 - 80080f2: 9309 str r3, [sp, #36] ; 0x24 - 80080f4: bf49 itett mi - 80080f6: f1c6 0301 rsbmi r3, r6, #1 - 80080fa: 2300 movpl r3, #0 - 80080fc: 9306 strmi r3, [sp, #24] - 80080fe: 2300 movmi r3, #0 - 8008100: bf54 ite pl - 8008102: 9306 strpl r3, [sp, #24] - 8008104: 9309 strmi r3, [sp, #36] ; 0x24 - 8008106: f1b8 0f00 cmp.w r8, #0 - 800810a: db3b blt.n 8008184 <_dtoa_r+0x1fc> - 800810c: 9b09 ldr r3, [sp, #36] ; 0x24 - 800810e: f8cd 8038 str.w r8, [sp, #56] ; 0x38 - 8008112: 4443 add r3, r8 - 8008114: 9309 str r3, [sp, #36] ; 0x24 - 8008116: 2300 movs r3, #0 - 8008118: 930a str r3, [sp, #40] ; 0x28 - 800811a: 9b20 ldr r3, [sp, #128] ; 0x80 - 800811c: 2b09 cmp r3, #9 - 800811e: d86b bhi.n 80081f8 <_dtoa_r+0x270> - 8008120: 2b05 cmp r3, #5 - 8008122: bfc4 itt gt - 8008124: 3b04 subgt r3, #4 - 8008126: 9320 strgt r3, [sp, #128] ; 0x80 - 8008128: 9b20 ldr r3, [sp, #128] ; 0x80 - 800812a: bfc8 it gt - 800812c: 2400 movgt r4, #0 - 800812e: f1a3 0302 sub.w r3, r3, #2 - 8008132: bfd8 it le - 8008134: 2401 movle r4, #1 - 8008136: 2b03 cmp r3, #3 - 8008138: d869 bhi.n 800820e <_dtoa_r+0x286> - 800813a: e8df f003 tbb [pc, r3] - 800813e: 3a2d .short 0x3a2d - 8008140: 5b38 .short 0x5b38 - 8008142: e9dd 6314 ldrd r6, r3, [sp, #80] ; 0x50 - 8008146: 441e add r6, r3 - 8008148: f206 4332 addw r3, r6, #1074 ; 0x432 - 800814c: 2b20 cmp r3, #32 - 800814e: bfc3 ittte gt - 8008150: f1c3 0340 rsbgt r3, r3, #64 ; 0x40 - 8008154: f206 4012 addwgt r0, r6, #1042 ; 0x412 - 8008158: fa0b f303 lslgt.w r3, fp, r3 - 800815c: f1c3 0320 rsble r3, r3, #32 - 8008160: bfc6 itte gt - 8008162: fa24 f000 lsrgt.w r0, r4, r0 - 8008166: 4318 orrgt r0, r3 - 8008168: fa04 f003 lslle.w r0, r4, r3 - 800816c: f7f8 f944 bl 80003f8 <__aeabi_ui2d> - 8008170: 2301 movs r3, #1 - 8008172: f1a1 71f8 sub.w r1, r1, #32505856 ; 0x1f00000 - 8008176: 3e01 subs r6, #1 - 8008178: 9313 str r3, [sp, #76] ; 0x4c - 800817a: e771 b.n 8008060 <_dtoa_r+0xd8> - 800817c: 2301 movs r3, #1 - 800817e: e7b4 b.n 80080ea <_dtoa_r+0x162> - 8008180: 900f str r0, [sp, #60] ; 0x3c - 8008182: e7b3 b.n 80080ec <_dtoa_r+0x164> - 8008184: 9b06 ldr r3, [sp, #24] - 8008186: eba3 0308 sub.w r3, r3, r8 - 800818a: 9306 str r3, [sp, #24] - 800818c: f1c8 0300 rsb r3, r8, #0 - 8008190: 930a str r3, [sp, #40] ; 0x28 - 8008192: 2300 movs r3, #0 - 8008194: 930e str r3, [sp, #56] ; 0x38 - 8008196: e7c0 b.n 800811a <_dtoa_r+0x192> - 8008198: 2300 movs r3, #0 - 800819a: 930b str r3, [sp, #44] ; 0x2c - 800819c: 9b21 ldr r3, [sp, #132] ; 0x84 - 800819e: 2b00 cmp r3, #0 - 80081a0: dc38 bgt.n 8008214 <_dtoa_r+0x28c> - 80081a2: 2301 movs r3, #1 - 80081a4: 461a mov r2, r3 - 80081a6: 9308 str r3, [sp, #32] - 80081a8: 9305 str r3, [sp, #20] - 80081aa: 9221 str r2, [sp, #132] ; 0x84 - 80081ac: e00b b.n 80081c6 <_dtoa_r+0x23e> - 80081ae: 2301 movs r3, #1 - 80081b0: e7f3 b.n 800819a <_dtoa_r+0x212> - 80081b2: 2300 movs r3, #0 - 80081b4: 930b str r3, [sp, #44] ; 0x2c - 80081b6: 9b21 ldr r3, [sp, #132] ; 0x84 - 80081b8: 4443 add r3, r8 - 80081ba: 9308 str r3, [sp, #32] - 80081bc: 3301 adds r3, #1 - 80081be: 2b01 cmp r3, #1 - 80081c0: 9305 str r3, [sp, #20] - 80081c2: bfb8 it lt - 80081c4: 2301 movlt r3, #1 - 80081c6: 2200 movs r2, #0 - 80081c8: f8c9 2044 str.w r2, [r9, #68] ; 0x44 - 80081cc: 2204 movs r2, #4 - 80081ce: f102 0014 add.w r0, r2, #20 - 80081d2: 4298 cmp r0, r3 - 80081d4: f8d9 1044 ldr.w r1, [r9, #68] ; 0x44 - 80081d8: d920 bls.n 800821c <_dtoa_r+0x294> - 80081da: 4648 mov r0, r9 - 80081dc: f000 fdc6 bl 8008d6c <_Balloc> - 80081e0: 9004 str r0, [sp, #16] - 80081e2: 2800 cmp r0, #0 - 80081e4: d13c bne.n 8008260 <_dtoa_r+0x2d8> - 80081e6: 4602 mov r2, r0 - 80081e8: f44f 71d5 mov.w r1, #426 ; 0x1aa - 80081ec: 4b1a ldr r3, [pc, #104] ; (8008258 <_dtoa_r+0x2d0>) - 80081ee: 481b ldr r0, [pc, #108] ; (800825c <_dtoa_r+0x2d4>) - 80081f0: f001 f9f4 bl 80095dc <__assert_func> - 80081f4: 2301 movs r3, #1 - 80081f6: e7dd b.n 80081b4 <_dtoa_r+0x22c> - 80081f8: 2401 movs r4, #1 - 80081fa: 2300 movs r3, #0 - 80081fc: 940b str r4, [sp, #44] ; 0x2c - 80081fe: 9320 str r3, [sp, #128] ; 0x80 - 8008200: f04f 33ff mov.w r3, #4294967295 - 8008204: 2200 movs r2, #0 - 8008206: 9308 str r3, [sp, #32] - 8008208: 9305 str r3, [sp, #20] - 800820a: 2312 movs r3, #18 - 800820c: e7cd b.n 80081aa <_dtoa_r+0x222> - 800820e: 2301 movs r3, #1 - 8008210: 930b str r3, [sp, #44] ; 0x2c - 8008212: e7f5 b.n 8008200 <_dtoa_r+0x278> - 8008214: 9b21 ldr r3, [sp, #132] ; 0x84 - 8008216: 9308 str r3, [sp, #32] - 8008218: 9305 str r3, [sp, #20] - 800821a: e7d4 b.n 80081c6 <_dtoa_r+0x23e> - 800821c: 3101 adds r1, #1 - 800821e: f8c9 1044 str.w r1, [r9, #68] ; 0x44 - 8008222: 0052 lsls r2, r2, #1 - 8008224: e7d3 b.n 80081ce <_dtoa_r+0x246> - 8008226: bf00 nop - 8008228: 636f4361 .word 0x636f4361 - 800822c: 3fd287a7 .word 0x3fd287a7 - 8008230: 8b60c8b3 .word 0x8b60c8b3 - 8008234: 3fc68a28 .word 0x3fc68a28 - 8008238: 509f79fb .word 0x509f79fb - 800823c: 3fd34413 .word 0x3fd34413 - 8008240: 7ff00000 .word 0x7ff00000 - 8008244: 0800b235 .word 0x0800b235 - 8008248: 0800b239 .word 0x0800b239 - 800824c: 0800b113 .word 0x0800b113 - 8008250: 3ff80000 .word 0x3ff80000 - 8008254: 0800b338 .word 0x0800b338 - 8008258: 0800b242 .word 0x0800b242 - 800825c: 0800b253 .word 0x0800b253 - 8008260: 9b04 ldr r3, [sp, #16] - 8008262: f8c9 3040 str.w r3, [r9, #64] ; 0x40 - 8008266: 9b05 ldr r3, [sp, #20] - 8008268: 2b0e cmp r3, #14 - 800826a: f200 80a1 bhi.w 80083b0 <_dtoa_r+0x428> - 800826e: 2c00 cmp r4, #0 - 8008270: f000 809e beq.w 80083b0 <_dtoa_r+0x428> - 8008274: f1b8 0f00 cmp.w r8, #0 - 8008278: dd34 ble.n 80082e4 <_dtoa_r+0x35c> - 800827a: 4a96 ldr r2, [pc, #600] ; (80084d4 <_dtoa_r+0x54c>) - 800827c: f008 030f and.w r3, r8, #15 - 8008280: eb02 03c3 add.w r3, r2, r3, lsl #3 - 8008284: f418 7f80 tst.w r8, #256 ; 0x100 - 8008288: e9d3 3400 ldrd r3, r4, [r3] - 800828c: ea4f 1528 mov.w r5, r8, asr #4 - 8008290: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40 - 8008294: d016 beq.n 80082c4 <_dtoa_r+0x33c> - 8008296: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 - 800829a: 4b8f ldr r3, [pc, #572] ; (80084d8 <_dtoa_r+0x550>) - 800829c: 2603 movs r6, #3 - 800829e: e9d3 2308 ldrd r2, r3, [r3, #32] - 80082a2: f7f8 fa4d bl 8000740 <__aeabi_ddiv> - 80082a6: 4682 mov sl, r0 - 80082a8: 468b mov fp, r1 - 80082aa: f005 050f and.w r5, r5, #15 - 80082ae: 4c8a ldr r4, [pc, #552] ; (80084d8 <_dtoa_r+0x550>) - 80082b0: b955 cbnz r5, 80082c8 <_dtoa_r+0x340> - 80082b2: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 - 80082b6: 4650 mov r0, sl - 80082b8: 4659 mov r1, fp - 80082ba: f7f8 fa41 bl 8000740 <__aeabi_ddiv> - 80082be: 4682 mov sl, r0 - 80082c0: 468b mov fp, r1 - 80082c2: e028 b.n 8008316 <_dtoa_r+0x38e> - 80082c4: 2602 movs r6, #2 - 80082c6: e7f2 b.n 80082ae <_dtoa_r+0x326> - 80082c8: 07e9 lsls r1, r5, #31 - 80082ca: d508 bpl.n 80082de <_dtoa_r+0x356> - 80082cc: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 - 80082d0: e9d4 2300 ldrd r2, r3, [r4] - 80082d4: f7f8 f90a bl 80004ec <__aeabi_dmul> - 80082d8: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 - 80082dc: 3601 adds r6, #1 - 80082de: 106d asrs r5, r5, #1 - 80082e0: 3408 adds r4, #8 - 80082e2: e7e5 b.n 80082b0 <_dtoa_r+0x328> - 80082e4: f000 809e beq.w 8008424 <_dtoa_r+0x49c> - 80082e8: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 - 80082ec: f1c8 0400 rsb r4, r8, #0 - 80082f0: 4b78 ldr r3, [pc, #480] ; (80084d4 <_dtoa_r+0x54c>) - 80082f2: f004 020f and.w r2, r4, #15 - 80082f6: eb03 03c2 add.w r3, r3, r2, lsl #3 - 80082fa: e9d3 2300 ldrd r2, r3, [r3] - 80082fe: f7f8 f8f5 bl 80004ec <__aeabi_dmul> - 8008302: 2602 movs r6, #2 - 8008304: 4682 mov sl, r0 - 8008306: 468b mov fp, r1 - 8008308: 2300 movs r3, #0 - 800830a: 4d73 ldr r5, [pc, #460] ; (80084d8 <_dtoa_r+0x550>) - 800830c: 1124 asrs r4, r4, #4 - 800830e: 2c00 cmp r4, #0 - 8008310: d17d bne.n 800840e <_dtoa_r+0x486> - 8008312: 2b00 cmp r3, #0 - 8008314: d1d3 bne.n 80082be <_dtoa_r+0x336> - 8008316: 9b0f ldr r3, [sp, #60] ; 0x3c - 8008318: 2b00 cmp r3, #0 - 800831a: f000 8085 beq.w 8008428 <_dtoa_r+0x4a0> - 800831e: 2200 movs r2, #0 - 8008320: 4650 mov r0, sl - 8008322: 4659 mov r1, fp - 8008324: 4b6d ldr r3, [pc, #436] ; (80084dc <_dtoa_r+0x554>) - 8008326: e9cd ab10 strd sl, fp, [sp, #64] ; 0x40 - 800832a: f7f8 fb51 bl 80009d0 <__aeabi_dcmplt> - 800832e: 2800 cmp r0, #0 - 8008330: d07a beq.n 8008428 <_dtoa_r+0x4a0> - 8008332: 9b05 ldr r3, [sp, #20] - 8008334: 2b00 cmp r3, #0 - 8008336: d077 beq.n 8008428 <_dtoa_r+0x4a0> - 8008338: 9b08 ldr r3, [sp, #32] - 800833a: 2b00 cmp r3, #0 - 800833c: dd36 ble.n 80083ac <_dtoa_r+0x424> - 800833e: 4650 mov r0, sl - 8008340: 4659 mov r1, fp - 8008342: 2200 movs r2, #0 - 8008344: 4b66 ldr r3, [pc, #408] ; (80084e0 <_dtoa_r+0x558>) - 8008346: f7f8 f8d1 bl 80004ec <__aeabi_dmul> - 800834a: 4682 mov sl, r0 - 800834c: 468b mov fp, r1 - 800834e: 9c08 ldr r4, [sp, #32] - 8008350: f108 35ff add.w r5, r8, #4294967295 - 8008354: 3601 adds r6, #1 - 8008356: 4630 mov r0, r6 - 8008358: f7f8 f85e bl 8000418 <__aeabi_i2d> - 800835c: 4652 mov r2, sl - 800835e: 465b mov r3, fp - 8008360: f7f8 f8c4 bl 80004ec <__aeabi_dmul> - 8008364: 2200 movs r2, #0 - 8008366: 4b5f ldr r3, [pc, #380] ; (80084e4 <_dtoa_r+0x55c>) - 8008368: f7f7 ff0a bl 8000180 <__adddf3> - 800836c: f1a1 7650 sub.w r6, r1, #54525952 ; 0x3400000 - 8008370: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 - 8008374: 9611 str r6, [sp, #68] ; 0x44 - 8008376: 2c00 cmp r4, #0 - 8008378: d159 bne.n 800842e <_dtoa_r+0x4a6> - 800837a: 2200 movs r2, #0 - 800837c: 4650 mov r0, sl - 800837e: 4659 mov r1, fp - 8008380: 4b59 ldr r3, [pc, #356] ; (80084e8 <_dtoa_r+0x560>) - 8008382: f7f7 fefb bl 800017c <__aeabi_dsub> - 8008386: 4633 mov r3, r6 - 8008388: 9a10 ldr r2, [sp, #64] ; 0x40 - 800838a: 4682 mov sl, r0 - 800838c: 468b mov fp, r1 - 800838e: f7f8 fb3d bl 8000a0c <__aeabi_dcmpgt> - 8008392: 2800 cmp r0, #0 - 8008394: f040 828b bne.w 80088ae <_dtoa_r+0x926> - 8008398: 4650 mov r0, sl - 800839a: 4659 mov r1, fp - 800839c: 9a10 ldr r2, [sp, #64] ; 0x40 - 800839e: f106 4300 add.w r3, r6, #2147483648 ; 0x80000000 - 80083a2: f7f8 fb15 bl 80009d0 <__aeabi_dcmplt> - 80083a6: 2800 cmp r0, #0 - 80083a8: f040 827f bne.w 80088aa <_dtoa_r+0x922> - 80083ac: e9dd ab0c ldrd sl, fp, [sp, #48] ; 0x30 - 80083b0: 9b15 ldr r3, [sp, #84] ; 0x54 - 80083b2: 2b00 cmp r3, #0 - 80083b4: f2c0 814d blt.w 8008652 <_dtoa_r+0x6ca> - 80083b8: f1b8 0f0e cmp.w r8, #14 - 80083bc: f300 8149 bgt.w 8008652 <_dtoa_r+0x6ca> - 80083c0: 4b44 ldr r3, [pc, #272] ; (80084d4 <_dtoa_r+0x54c>) - 80083c2: eb03 03c8 add.w r3, r3, r8, lsl #3 - 80083c6: e9d3 3400 ldrd r3, r4, [r3] - 80083ca: e9cd 3406 strd r3, r4, [sp, #24] - 80083ce: 9b21 ldr r3, [sp, #132] ; 0x84 - 80083d0: 2b00 cmp r3, #0 - 80083d2: f280 80d6 bge.w 8008582 <_dtoa_r+0x5fa> - 80083d6: 9b05 ldr r3, [sp, #20] - 80083d8: 2b00 cmp r3, #0 - 80083da: f300 80d2 bgt.w 8008582 <_dtoa_r+0x5fa> - 80083de: f040 8263 bne.w 80088a8 <_dtoa_r+0x920> - 80083e2: e9dd 0106 ldrd r0, r1, [sp, #24] - 80083e6: 2200 movs r2, #0 - 80083e8: 4b3f ldr r3, [pc, #252] ; (80084e8 <_dtoa_r+0x560>) - 80083ea: f7f8 f87f bl 80004ec <__aeabi_dmul> - 80083ee: 4652 mov r2, sl - 80083f0: 465b mov r3, fp - 80083f2: f7f8 fb01 bl 80009f8 <__aeabi_dcmpge> - 80083f6: 9c05 ldr r4, [sp, #20] - 80083f8: 4625 mov r5, r4 - 80083fa: 2800 cmp r0, #0 - 80083fc: f040 823c bne.w 8008878 <_dtoa_r+0x8f0> - 8008400: 2331 movs r3, #49 ; 0x31 - 8008402: 9e04 ldr r6, [sp, #16] - 8008404: f108 0801 add.w r8, r8, #1 - 8008408: f806 3b01 strb.w r3, [r6], #1 - 800840c: e238 b.n 8008880 <_dtoa_r+0x8f8> - 800840e: 07e2 lsls r2, r4, #31 - 8008410: d505 bpl.n 800841e <_dtoa_r+0x496> - 8008412: e9d5 2300 ldrd r2, r3, [r5] - 8008416: f7f8 f869 bl 80004ec <__aeabi_dmul> - 800841a: 2301 movs r3, #1 - 800841c: 3601 adds r6, #1 - 800841e: 1064 asrs r4, r4, #1 - 8008420: 3508 adds r5, #8 - 8008422: e774 b.n 800830e <_dtoa_r+0x386> - 8008424: 2602 movs r6, #2 - 8008426: e776 b.n 8008316 <_dtoa_r+0x38e> - 8008428: 4645 mov r5, r8 - 800842a: 9c05 ldr r4, [sp, #20] - 800842c: e793 b.n 8008356 <_dtoa_r+0x3ce> - 800842e: 9904 ldr r1, [sp, #16] - 8008430: 4b28 ldr r3, [pc, #160] ; (80084d4 <_dtoa_r+0x54c>) - 8008432: 4421 add r1, r4 - 8008434: 9112 str r1, [sp, #72] ; 0x48 - 8008436: 990b ldr r1, [sp, #44] ; 0x2c - 8008438: eb03 03c4 add.w r3, r3, r4, lsl #3 - 800843c: e9dd 6710 ldrd r6, r7, [sp, #64] ; 0x40 - 8008440: e953 2302 ldrd r2, r3, [r3, #-8] - 8008444: 2900 cmp r1, #0 - 8008446: d053 beq.n 80084f0 <_dtoa_r+0x568> - 8008448: 2000 movs r0, #0 - 800844a: 4928 ldr r1, [pc, #160] ; (80084ec <_dtoa_r+0x564>) - 800844c: f7f8 f978 bl 8000740 <__aeabi_ddiv> - 8008450: 4632 mov r2, r6 - 8008452: 463b mov r3, r7 - 8008454: f7f7 fe92 bl 800017c <__aeabi_dsub> - 8008458: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 - 800845c: 9e04 ldr r6, [sp, #16] - 800845e: 4659 mov r1, fp - 8008460: 4650 mov r0, sl - 8008462: f7f8 faf3 bl 8000a4c <__aeabi_d2iz> - 8008466: 4604 mov r4, r0 - 8008468: f7f7 ffd6 bl 8000418 <__aeabi_i2d> - 800846c: 4602 mov r2, r0 - 800846e: 460b mov r3, r1 - 8008470: 4650 mov r0, sl - 8008472: 4659 mov r1, fp - 8008474: f7f7 fe82 bl 800017c <__aeabi_dsub> - 8008478: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 - 800847c: 3430 adds r4, #48 ; 0x30 - 800847e: f806 4b01 strb.w r4, [r6], #1 - 8008482: 4682 mov sl, r0 - 8008484: 468b mov fp, r1 - 8008486: f7f8 faa3 bl 80009d0 <__aeabi_dcmplt> - 800848a: 2800 cmp r0, #0 - 800848c: d171 bne.n 8008572 <_dtoa_r+0x5ea> - 800848e: 4652 mov r2, sl - 8008490: 465b mov r3, fp - 8008492: 2000 movs r0, #0 - 8008494: 4911 ldr r1, [pc, #68] ; (80084dc <_dtoa_r+0x554>) - 8008496: f7f7 fe71 bl 800017c <__aeabi_dsub> - 800849a: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 - 800849e: f7f8 fa97 bl 80009d0 <__aeabi_dcmplt> - 80084a2: 2800 cmp r0, #0 - 80084a4: f040 80b7 bne.w 8008616 <_dtoa_r+0x68e> - 80084a8: 9b12 ldr r3, [sp, #72] ; 0x48 - 80084aa: 429e cmp r6, r3 - 80084ac: f43f af7e beq.w 80083ac <_dtoa_r+0x424> - 80084b0: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 - 80084b4: 2200 movs r2, #0 - 80084b6: 4b0a ldr r3, [pc, #40] ; (80084e0 <_dtoa_r+0x558>) - 80084b8: f7f8 f818 bl 80004ec <__aeabi_dmul> - 80084bc: 2200 movs r2, #0 - 80084be: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 - 80084c2: 4b07 ldr r3, [pc, #28] ; (80084e0 <_dtoa_r+0x558>) - 80084c4: 4650 mov r0, sl - 80084c6: 4659 mov r1, fp - 80084c8: f7f8 f810 bl 80004ec <__aeabi_dmul> - 80084cc: 4682 mov sl, r0 - 80084ce: 468b mov fp, r1 - 80084d0: e7c5 b.n 800845e <_dtoa_r+0x4d6> - 80084d2: bf00 nop - 80084d4: 0800b338 .word 0x0800b338 - 80084d8: 0800b310 .word 0x0800b310 - 80084dc: 3ff00000 .word 0x3ff00000 - 80084e0: 40240000 .word 0x40240000 - 80084e4: 401c0000 .word 0x401c0000 - 80084e8: 40140000 .word 0x40140000 - 80084ec: 3fe00000 .word 0x3fe00000 - 80084f0: 4630 mov r0, r6 - 80084f2: 4639 mov r1, r7 - 80084f4: f7f7 fffa bl 80004ec <__aeabi_dmul> - 80084f8: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 - 80084fc: 9f12 ldr r7, [sp, #72] ; 0x48 - 80084fe: 9e04 ldr r6, [sp, #16] - 8008500: 4659 mov r1, fp - 8008502: 4650 mov r0, sl - 8008504: f7f8 faa2 bl 8000a4c <__aeabi_d2iz> - 8008508: 4604 mov r4, r0 - 800850a: f7f7 ff85 bl 8000418 <__aeabi_i2d> - 800850e: 4602 mov r2, r0 - 8008510: 460b mov r3, r1 - 8008512: 4650 mov r0, sl - 8008514: 4659 mov r1, fp - 8008516: f7f7 fe31 bl 800017c <__aeabi_dsub> - 800851a: 3430 adds r4, #48 ; 0x30 - 800851c: 9b12 ldr r3, [sp, #72] ; 0x48 - 800851e: f806 4b01 strb.w r4, [r6], #1 - 8008522: 429e cmp r6, r3 - 8008524: 4682 mov sl, r0 - 8008526: 468b mov fp, r1 - 8008528: f04f 0200 mov.w r2, #0 - 800852c: d123 bne.n 8008576 <_dtoa_r+0x5ee> - 800852e: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 - 8008532: 4baf ldr r3, [pc, #700] ; (80087f0 <_dtoa_r+0x868>) - 8008534: f7f7 fe24 bl 8000180 <__adddf3> - 8008538: 4602 mov r2, r0 - 800853a: 460b mov r3, r1 - 800853c: 4650 mov r0, sl - 800853e: 4659 mov r1, fp - 8008540: f7f8 fa64 bl 8000a0c <__aeabi_dcmpgt> - 8008544: 2800 cmp r0, #0 - 8008546: d166 bne.n 8008616 <_dtoa_r+0x68e> - 8008548: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 - 800854c: 2000 movs r0, #0 - 800854e: 49a8 ldr r1, [pc, #672] ; (80087f0 <_dtoa_r+0x868>) - 8008550: f7f7 fe14 bl 800017c <__aeabi_dsub> - 8008554: 4602 mov r2, r0 - 8008556: 460b mov r3, r1 - 8008558: 4650 mov r0, sl - 800855a: 4659 mov r1, fp - 800855c: f7f8 fa38 bl 80009d0 <__aeabi_dcmplt> - 8008560: 2800 cmp r0, #0 - 8008562: f43f af23 beq.w 80083ac <_dtoa_r+0x424> - 8008566: 463e mov r6, r7 - 8008568: f816 3c01 ldrb.w r3, [r6, #-1] - 800856c: 3f01 subs r7, #1 - 800856e: 2b30 cmp r3, #48 ; 0x30 - 8008570: d0f9 beq.n 8008566 <_dtoa_r+0x5de> - 8008572: 46a8 mov r8, r5 - 8008574: e03e b.n 80085f4 <_dtoa_r+0x66c> - 8008576: 4b9f ldr r3, [pc, #636] ; (80087f4 <_dtoa_r+0x86c>) - 8008578: f7f7 ffb8 bl 80004ec <__aeabi_dmul> - 800857c: 4682 mov sl, r0 - 800857e: 468b mov fp, r1 - 8008580: e7be b.n 8008500 <_dtoa_r+0x578> - 8008582: 4654 mov r4, sl - 8008584: f04f 0a00 mov.w sl, #0 - 8008588: 465d mov r5, fp - 800858a: 9e04 ldr r6, [sp, #16] - 800858c: f8df b264 ldr.w fp, [pc, #612] ; 80087f4 <_dtoa_r+0x86c> - 8008590: e9dd 2306 ldrd r2, r3, [sp, #24] - 8008594: 4620 mov r0, r4 - 8008596: 4629 mov r1, r5 - 8008598: f7f8 f8d2 bl 8000740 <__aeabi_ddiv> - 800859c: f7f8 fa56 bl 8000a4c <__aeabi_d2iz> - 80085a0: 4607 mov r7, r0 - 80085a2: f7f7 ff39 bl 8000418 <__aeabi_i2d> - 80085a6: e9dd 2306 ldrd r2, r3, [sp, #24] - 80085aa: f7f7 ff9f bl 80004ec <__aeabi_dmul> - 80085ae: 4602 mov r2, r0 - 80085b0: 460b mov r3, r1 - 80085b2: 4620 mov r0, r4 - 80085b4: 4629 mov r1, r5 - 80085b6: f7f7 fde1 bl 800017c <__aeabi_dsub> - 80085ba: f107 0430 add.w r4, r7, #48 ; 0x30 - 80085be: f806 4b01 strb.w r4, [r6], #1 - 80085c2: 9c04 ldr r4, [sp, #16] - 80085c4: 9d05 ldr r5, [sp, #20] - 80085c6: 1b34 subs r4, r6, r4 - 80085c8: 42a5 cmp r5, r4 - 80085ca: 4602 mov r2, r0 - 80085cc: 460b mov r3, r1 - 80085ce: d133 bne.n 8008638 <_dtoa_r+0x6b0> - 80085d0: f7f7 fdd6 bl 8000180 <__adddf3> - 80085d4: e9dd 2306 ldrd r2, r3, [sp, #24] - 80085d8: 4604 mov r4, r0 - 80085da: 460d mov r5, r1 - 80085dc: f7f8 fa16 bl 8000a0c <__aeabi_dcmpgt> - 80085e0: b9c0 cbnz r0, 8008614 <_dtoa_r+0x68c> - 80085e2: e9dd 2306 ldrd r2, r3, [sp, #24] - 80085e6: 4620 mov r0, r4 - 80085e8: 4629 mov r1, r5 - 80085ea: f7f8 f9e7 bl 80009bc <__aeabi_dcmpeq> - 80085ee: b108 cbz r0, 80085f4 <_dtoa_r+0x66c> - 80085f0: 07fb lsls r3, r7, #31 - 80085f2: d40f bmi.n 8008614 <_dtoa_r+0x68c> - 80085f4: 4648 mov r0, r9 - 80085f6: 9903 ldr r1, [sp, #12] - 80085f8: f000 fbdd bl 8008db6 <_Bfree> - 80085fc: 2300 movs r3, #0 - 80085fe: 7033 strb r3, [r6, #0] - 8008600: 9b22 ldr r3, [sp, #136] ; 0x88 - 8008602: f108 0001 add.w r0, r8, #1 - 8008606: 6018 str r0, [r3, #0] - 8008608: 9b24 ldr r3, [sp, #144] ; 0x90 - 800860a: 2b00 cmp r3, #0 - 800860c: f43f acf0 beq.w 8007ff0 <_dtoa_r+0x68> - 8008610: 601e str r6, [r3, #0] - 8008612: e4ed b.n 8007ff0 <_dtoa_r+0x68> - 8008614: 4645 mov r5, r8 - 8008616: 4633 mov r3, r6 - 8008618: 461e mov r6, r3 - 800861a: f813 2d01 ldrb.w r2, [r3, #-1]! - 800861e: 2a39 cmp r2, #57 ; 0x39 - 8008620: d106 bne.n 8008630 <_dtoa_r+0x6a8> - 8008622: 9a04 ldr r2, [sp, #16] - 8008624: 429a cmp r2, r3 - 8008626: d1f7 bne.n 8008618 <_dtoa_r+0x690> - 8008628: 2230 movs r2, #48 ; 0x30 - 800862a: 9904 ldr r1, [sp, #16] - 800862c: 3501 adds r5, #1 - 800862e: 700a strb r2, [r1, #0] - 8008630: 781a ldrb r2, [r3, #0] - 8008632: 3201 adds r2, #1 - 8008634: 701a strb r2, [r3, #0] - 8008636: e79c b.n 8008572 <_dtoa_r+0x5ea> - 8008638: 4652 mov r2, sl - 800863a: 465b mov r3, fp - 800863c: f7f7 ff56 bl 80004ec <__aeabi_dmul> - 8008640: 2200 movs r2, #0 - 8008642: 2300 movs r3, #0 - 8008644: 4604 mov r4, r0 - 8008646: 460d mov r5, r1 - 8008648: f7f8 f9b8 bl 80009bc <__aeabi_dcmpeq> - 800864c: 2800 cmp r0, #0 - 800864e: d09f beq.n 8008590 <_dtoa_r+0x608> - 8008650: e7d0 b.n 80085f4 <_dtoa_r+0x66c> - 8008652: 9a0b ldr r2, [sp, #44] ; 0x2c - 8008654: 2a00 cmp r2, #0 - 8008656: f000 80cf beq.w 80087f8 <_dtoa_r+0x870> - 800865a: 9a20 ldr r2, [sp, #128] ; 0x80 - 800865c: 2a01 cmp r2, #1 - 800865e: f300 80ad bgt.w 80087bc <_dtoa_r+0x834> - 8008662: 9a13 ldr r2, [sp, #76] ; 0x4c - 8008664: 2a00 cmp r2, #0 - 8008666: f000 80a5 beq.w 80087b4 <_dtoa_r+0x82c> - 800866a: f203 4333 addw r3, r3, #1075 ; 0x433 - 800866e: 9c0a ldr r4, [sp, #40] ; 0x28 - 8008670: 9e06 ldr r6, [sp, #24] - 8008672: 9a06 ldr r2, [sp, #24] - 8008674: 2101 movs r1, #1 - 8008676: 441a add r2, r3 - 8008678: 9206 str r2, [sp, #24] - 800867a: 9a09 ldr r2, [sp, #36] ; 0x24 - 800867c: 4648 mov r0, r9 - 800867e: 441a add r2, r3 - 8008680: 9209 str r2, [sp, #36] ; 0x24 - 8008682: f000 fc35 bl 8008ef0 <__i2b> - 8008686: 4605 mov r5, r0 - 8008688: 2e00 cmp r6, #0 - 800868a: dd0c ble.n 80086a6 <_dtoa_r+0x71e> - 800868c: 9b09 ldr r3, [sp, #36] ; 0x24 - 800868e: 2b00 cmp r3, #0 - 8008690: dd09 ble.n 80086a6 <_dtoa_r+0x71e> - 8008692: 42b3 cmp r3, r6 - 8008694: bfa8 it ge - 8008696: 4633 movge r3, r6 - 8008698: 9a06 ldr r2, [sp, #24] - 800869a: 1af6 subs r6, r6, r3 - 800869c: 1ad2 subs r2, r2, r3 - 800869e: 9206 str r2, [sp, #24] - 80086a0: 9a09 ldr r2, [sp, #36] ; 0x24 - 80086a2: 1ad3 subs r3, r2, r3 - 80086a4: 9309 str r3, [sp, #36] ; 0x24 - 80086a6: 9b0a ldr r3, [sp, #40] ; 0x28 - 80086a8: b1f3 cbz r3, 80086e8 <_dtoa_r+0x760> - 80086aa: 9b0b ldr r3, [sp, #44] ; 0x2c - 80086ac: 2b00 cmp r3, #0 - 80086ae: f000 80a7 beq.w 8008800 <_dtoa_r+0x878> - 80086b2: 2c00 cmp r4, #0 - 80086b4: dd10 ble.n 80086d8 <_dtoa_r+0x750> - 80086b6: 4629 mov r1, r5 - 80086b8: 4622 mov r2, r4 - 80086ba: 4648 mov r0, r9 - 80086bc: f000 fcd6 bl 800906c <__pow5mult> - 80086c0: 9a03 ldr r2, [sp, #12] - 80086c2: 4601 mov r1, r0 - 80086c4: 4605 mov r5, r0 - 80086c6: 4648 mov r0, r9 - 80086c8: f000 fc28 bl 8008f1c <__multiply> - 80086cc: 4607 mov r7, r0 - 80086ce: 9903 ldr r1, [sp, #12] - 80086d0: 4648 mov r0, r9 - 80086d2: f000 fb70 bl 8008db6 <_Bfree> - 80086d6: 9703 str r7, [sp, #12] - 80086d8: 9b0a ldr r3, [sp, #40] ; 0x28 - 80086da: 1b1a subs r2, r3, r4 - 80086dc: d004 beq.n 80086e8 <_dtoa_r+0x760> - 80086de: 4648 mov r0, r9 - 80086e0: 9903 ldr r1, [sp, #12] - 80086e2: f000 fcc3 bl 800906c <__pow5mult> - 80086e6: 9003 str r0, [sp, #12] - 80086e8: 2101 movs r1, #1 - 80086ea: 4648 mov r0, r9 - 80086ec: f000 fc00 bl 8008ef0 <__i2b> - 80086f0: 9b0e ldr r3, [sp, #56] ; 0x38 - 80086f2: 4604 mov r4, r0 - 80086f4: 2b00 cmp r3, #0 - 80086f6: f340 8085 ble.w 8008804 <_dtoa_r+0x87c> - 80086fa: 461a mov r2, r3 - 80086fc: 4601 mov r1, r0 - 80086fe: 4648 mov r0, r9 - 8008700: f000 fcb4 bl 800906c <__pow5mult> - 8008704: 9b20 ldr r3, [sp, #128] ; 0x80 - 8008706: 4604 mov r4, r0 - 8008708: 2b01 cmp r3, #1 - 800870a: dd7e ble.n 800880a <_dtoa_r+0x882> - 800870c: 2700 movs r7, #0 - 800870e: 6923 ldr r3, [r4, #16] - 8008710: eb04 0383 add.w r3, r4, r3, lsl #2 - 8008714: 6918 ldr r0, [r3, #16] - 8008716: f000 fb9d bl 8008e54 <__hi0bits> - 800871a: f1c0 0020 rsb r0, r0, #32 - 800871e: 9b09 ldr r3, [sp, #36] ; 0x24 - 8008720: 4418 add r0, r3 - 8008722: f010 001f ands.w r0, r0, #31 - 8008726: f000 808e beq.w 8008846 <_dtoa_r+0x8be> - 800872a: f1c0 0320 rsb r3, r0, #32 - 800872e: 2b04 cmp r3, #4 - 8008730: f340 8087 ble.w 8008842 <_dtoa_r+0x8ba> - 8008734: f1c0 001c rsb r0, r0, #28 - 8008738: 9b06 ldr r3, [sp, #24] - 800873a: 4406 add r6, r0 - 800873c: 4403 add r3, r0 - 800873e: 9306 str r3, [sp, #24] - 8008740: 9b09 ldr r3, [sp, #36] ; 0x24 - 8008742: 4403 add r3, r0 - 8008744: 9309 str r3, [sp, #36] ; 0x24 - 8008746: 9b06 ldr r3, [sp, #24] - 8008748: 2b00 cmp r3, #0 - 800874a: dd05 ble.n 8008758 <_dtoa_r+0x7d0> - 800874c: 461a mov r2, r3 - 800874e: 4648 mov r0, r9 - 8008750: 9903 ldr r1, [sp, #12] - 8008752: f000 fccb bl 80090ec <__lshift> - 8008756: 9003 str r0, [sp, #12] - 8008758: 9b09 ldr r3, [sp, #36] ; 0x24 - 800875a: 2b00 cmp r3, #0 - 800875c: dd05 ble.n 800876a <_dtoa_r+0x7e2> - 800875e: 4621 mov r1, r4 - 8008760: 461a mov r2, r3 - 8008762: 4648 mov r0, r9 - 8008764: f000 fcc2 bl 80090ec <__lshift> - 8008768: 4604 mov r4, r0 - 800876a: 9b0f ldr r3, [sp, #60] ; 0x3c - 800876c: 2b00 cmp r3, #0 - 800876e: d06c beq.n 800884a <_dtoa_r+0x8c2> - 8008770: 4621 mov r1, r4 - 8008772: 9803 ldr r0, [sp, #12] - 8008774: f000 fd2a bl 80091cc <__mcmp> - 8008778: 2800 cmp r0, #0 - 800877a: da66 bge.n 800884a <_dtoa_r+0x8c2> - 800877c: 2300 movs r3, #0 - 800877e: 220a movs r2, #10 - 8008780: 4648 mov r0, r9 - 8008782: 9903 ldr r1, [sp, #12] - 8008784: f000 fb20 bl 8008dc8 <__multadd> - 8008788: 9b0b ldr r3, [sp, #44] ; 0x2c - 800878a: f108 38ff add.w r8, r8, #4294967295 - 800878e: 9003 str r0, [sp, #12] - 8008790: 2b00 cmp r3, #0 - 8008792: f000 819f beq.w 8008ad4 <_dtoa_r+0xb4c> - 8008796: 2300 movs r3, #0 - 8008798: 4629 mov r1, r5 - 800879a: 220a movs r2, #10 - 800879c: 4648 mov r0, r9 - 800879e: f000 fb13 bl 8008dc8 <__multadd> - 80087a2: 9b08 ldr r3, [sp, #32] - 80087a4: 4605 mov r5, r0 - 80087a6: 2b00 cmp r3, #0 - 80087a8: f300 808a bgt.w 80088c0 <_dtoa_r+0x938> - 80087ac: 9b20 ldr r3, [sp, #128] ; 0x80 - 80087ae: 2b02 cmp r3, #2 - 80087b0: dc53 bgt.n 800885a <_dtoa_r+0x8d2> - 80087b2: e085 b.n 80088c0 <_dtoa_r+0x938> - 80087b4: 9b14 ldr r3, [sp, #80] ; 0x50 - 80087b6: f1c3 0336 rsb r3, r3, #54 ; 0x36 - 80087ba: e758 b.n 800866e <_dtoa_r+0x6e6> - 80087bc: 9b05 ldr r3, [sp, #20] - 80087be: 1e5c subs r4, r3, #1 - 80087c0: 9b0a ldr r3, [sp, #40] ; 0x28 - 80087c2: 42a3 cmp r3, r4 - 80087c4: bfb7 itett lt - 80087c6: 9b0a ldrlt r3, [sp, #40] ; 0x28 - 80087c8: 1b1c subge r4, r3, r4 - 80087ca: 1ae2 sublt r2, r4, r3 - 80087cc: 9b0e ldrlt r3, [sp, #56] ; 0x38 - 80087ce: bfbe ittt lt - 80087d0: 940a strlt r4, [sp, #40] ; 0x28 - 80087d2: 189b addlt r3, r3, r2 - 80087d4: 930e strlt r3, [sp, #56] ; 0x38 - 80087d6: 9b05 ldr r3, [sp, #20] - 80087d8: bfb8 it lt - 80087da: 2400 movlt r4, #0 - 80087dc: 2b00 cmp r3, #0 - 80087de: bfb7 itett lt - 80087e0: e9dd 2305 ldrdlt r2, r3, [sp, #20] - 80087e4: e9dd 3605 ldrdge r3, r6, [sp, #20] - 80087e8: 1a9e sublt r6, r3, r2 - 80087ea: 2300 movlt r3, #0 - 80087ec: e741 b.n 8008672 <_dtoa_r+0x6ea> - 80087ee: bf00 nop - 80087f0: 3fe00000 .word 0x3fe00000 - 80087f4: 40240000 .word 0x40240000 - 80087f8: 9c0a ldr r4, [sp, #40] ; 0x28 - 80087fa: 9e06 ldr r6, [sp, #24] - 80087fc: 9d0b ldr r5, [sp, #44] ; 0x2c - 80087fe: e743 b.n 8008688 <_dtoa_r+0x700> - 8008800: 9a0a ldr r2, [sp, #40] ; 0x28 - 8008802: e76c b.n 80086de <_dtoa_r+0x756> - 8008804: 9b20 ldr r3, [sp, #128] ; 0x80 - 8008806: 2b01 cmp r3, #1 - 8008808: dc17 bgt.n 800883a <_dtoa_r+0x8b2> - 800880a: f1ba 0f00 cmp.w sl, #0 - 800880e: d114 bne.n 800883a <_dtoa_r+0x8b2> - 8008810: f3cb 0313 ubfx r3, fp, #0, #20 - 8008814: b99b cbnz r3, 800883e <_dtoa_r+0x8b6> - 8008816: f02b 4700 bic.w r7, fp, #2147483648 ; 0x80000000 - 800881a: 0d3f lsrs r7, r7, #20 - 800881c: 053f lsls r7, r7, #20 - 800881e: b137 cbz r7, 800882e <_dtoa_r+0x8a6> - 8008820: 2701 movs r7, #1 - 8008822: 9b06 ldr r3, [sp, #24] - 8008824: 3301 adds r3, #1 - 8008826: 9306 str r3, [sp, #24] - 8008828: 9b09 ldr r3, [sp, #36] ; 0x24 - 800882a: 3301 adds r3, #1 - 800882c: 9309 str r3, [sp, #36] ; 0x24 - 800882e: 9b0e ldr r3, [sp, #56] ; 0x38 - 8008830: 2b00 cmp r3, #0 - 8008832: f47f af6c bne.w 800870e <_dtoa_r+0x786> - 8008836: 2001 movs r0, #1 - 8008838: e771 b.n 800871e <_dtoa_r+0x796> - 800883a: 2700 movs r7, #0 - 800883c: e7f7 b.n 800882e <_dtoa_r+0x8a6> - 800883e: 4657 mov r7, sl - 8008840: e7f5 b.n 800882e <_dtoa_r+0x8a6> - 8008842: d080 beq.n 8008746 <_dtoa_r+0x7be> - 8008844: 4618 mov r0, r3 - 8008846: 301c adds r0, #28 - 8008848: e776 b.n 8008738 <_dtoa_r+0x7b0> - 800884a: 9b05 ldr r3, [sp, #20] - 800884c: 2b00 cmp r3, #0 - 800884e: dc31 bgt.n 80088b4 <_dtoa_r+0x92c> - 8008850: 9b20 ldr r3, [sp, #128] ; 0x80 - 8008852: 2b02 cmp r3, #2 - 8008854: dd2e ble.n 80088b4 <_dtoa_r+0x92c> - 8008856: 9b05 ldr r3, [sp, #20] - 8008858: 9308 str r3, [sp, #32] - 800885a: 9b08 ldr r3, [sp, #32] - 800885c: b963 cbnz r3, 8008878 <_dtoa_r+0x8f0> - 800885e: 4621 mov r1, r4 - 8008860: 2205 movs r2, #5 - 8008862: 4648 mov r0, r9 - 8008864: f000 fab0 bl 8008dc8 <__multadd> - 8008868: 4601 mov r1, r0 - 800886a: 4604 mov r4, r0 - 800886c: 9803 ldr r0, [sp, #12] - 800886e: f000 fcad bl 80091cc <__mcmp> - 8008872: 2800 cmp r0, #0 - 8008874: f73f adc4 bgt.w 8008400 <_dtoa_r+0x478> - 8008878: 9b21 ldr r3, [sp, #132] ; 0x84 - 800887a: 9e04 ldr r6, [sp, #16] - 800887c: ea6f 0803 mvn.w r8, r3 - 8008880: 2700 movs r7, #0 - 8008882: 4621 mov r1, r4 - 8008884: 4648 mov r0, r9 - 8008886: f000 fa96 bl 8008db6 <_Bfree> - 800888a: 2d00 cmp r5, #0 - 800888c: f43f aeb2 beq.w 80085f4 <_dtoa_r+0x66c> - 8008890: b12f cbz r7, 800889e <_dtoa_r+0x916> - 8008892: 42af cmp r7, r5 - 8008894: d003 beq.n 800889e <_dtoa_r+0x916> - 8008896: 4639 mov r1, r7 - 8008898: 4648 mov r0, r9 - 800889a: f000 fa8c bl 8008db6 <_Bfree> - 800889e: 4629 mov r1, r5 - 80088a0: 4648 mov r0, r9 - 80088a2: f000 fa88 bl 8008db6 <_Bfree> - 80088a6: e6a5 b.n 80085f4 <_dtoa_r+0x66c> - 80088a8: 2400 movs r4, #0 - 80088aa: 4625 mov r5, r4 - 80088ac: e7e4 b.n 8008878 <_dtoa_r+0x8f0> - 80088ae: 46a8 mov r8, r5 - 80088b0: 4625 mov r5, r4 - 80088b2: e5a5 b.n 8008400 <_dtoa_r+0x478> - 80088b4: 9b0b ldr r3, [sp, #44] ; 0x2c - 80088b6: 2b00 cmp r3, #0 - 80088b8: f000 80c4 beq.w 8008a44 <_dtoa_r+0xabc> - 80088bc: 9b05 ldr r3, [sp, #20] - 80088be: 9308 str r3, [sp, #32] - 80088c0: 2e00 cmp r6, #0 - 80088c2: dd05 ble.n 80088d0 <_dtoa_r+0x948> - 80088c4: 4629 mov r1, r5 - 80088c6: 4632 mov r2, r6 - 80088c8: 4648 mov r0, r9 - 80088ca: f000 fc0f bl 80090ec <__lshift> - 80088ce: 4605 mov r5, r0 - 80088d0: 2f00 cmp r7, #0 - 80088d2: d058 beq.n 8008986 <_dtoa_r+0x9fe> - 80088d4: 4648 mov r0, r9 - 80088d6: 6869 ldr r1, [r5, #4] - 80088d8: f000 fa48 bl 8008d6c <_Balloc> - 80088dc: 4606 mov r6, r0 - 80088de: b920 cbnz r0, 80088ea <_dtoa_r+0x962> - 80088e0: 4602 mov r2, r0 - 80088e2: f240 21ea movw r1, #746 ; 0x2ea - 80088e6: 4b7f ldr r3, [pc, #508] ; (8008ae4 <_dtoa_r+0xb5c>) - 80088e8: e481 b.n 80081ee <_dtoa_r+0x266> - 80088ea: 692a ldr r2, [r5, #16] - 80088ec: f105 010c add.w r1, r5, #12 - 80088f0: 3202 adds r2, #2 - 80088f2: 0092 lsls r2, r2, #2 - 80088f4: 300c adds r0, #12 - 80088f6: f7fd ff8f bl 8006818 - 80088fa: 2201 movs r2, #1 - 80088fc: 4631 mov r1, r6 - 80088fe: 4648 mov r0, r9 - 8008900: f000 fbf4 bl 80090ec <__lshift> - 8008904: 462f mov r7, r5 - 8008906: 4605 mov r5, r0 - 8008908: 9b04 ldr r3, [sp, #16] - 800890a: 9a04 ldr r2, [sp, #16] - 800890c: 3301 adds r3, #1 - 800890e: 9305 str r3, [sp, #20] - 8008910: 9b08 ldr r3, [sp, #32] - 8008912: 4413 add r3, r2 - 8008914: 930a str r3, [sp, #40] ; 0x28 - 8008916: f00a 0301 and.w r3, sl, #1 - 800891a: 9309 str r3, [sp, #36] ; 0x24 - 800891c: 9b05 ldr r3, [sp, #20] - 800891e: 4621 mov r1, r4 - 8008920: 9803 ldr r0, [sp, #12] - 8008922: f103 3bff add.w fp, r3, #4294967295 - 8008926: f7ff faa3 bl 8007e70 - 800892a: 4639 mov r1, r7 - 800892c: 9006 str r0, [sp, #24] - 800892e: f100 0a30 add.w sl, r0, #48 ; 0x30 - 8008932: 9803 ldr r0, [sp, #12] - 8008934: f000 fc4a bl 80091cc <__mcmp> - 8008938: 462a mov r2, r5 - 800893a: 9008 str r0, [sp, #32] - 800893c: 4621 mov r1, r4 - 800893e: 4648 mov r0, r9 - 8008940: f000 fc60 bl 8009204 <__mdiff> - 8008944: 68c2 ldr r2, [r0, #12] - 8008946: 4606 mov r6, r0 - 8008948: b9fa cbnz r2, 800898a <_dtoa_r+0xa02> - 800894a: 4601 mov r1, r0 - 800894c: 9803 ldr r0, [sp, #12] - 800894e: f000 fc3d bl 80091cc <__mcmp> - 8008952: 4602 mov r2, r0 - 8008954: 4631 mov r1, r6 - 8008956: 4648 mov r0, r9 - 8008958: 920b str r2, [sp, #44] ; 0x2c - 800895a: f000 fa2c bl 8008db6 <_Bfree> - 800895e: 9b20 ldr r3, [sp, #128] ; 0x80 - 8008960: 9a0b ldr r2, [sp, #44] ; 0x2c - 8008962: 9e05 ldr r6, [sp, #20] - 8008964: ea43 0102 orr.w r1, r3, r2 - 8008968: 9b09 ldr r3, [sp, #36] ; 0x24 - 800896a: 430b orrs r3, r1 - 800896c: d10f bne.n 800898e <_dtoa_r+0xa06> - 800896e: f1ba 0f39 cmp.w sl, #57 ; 0x39 - 8008972: d028 beq.n 80089c6 <_dtoa_r+0xa3e> - 8008974: 9b08 ldr r3, [sp, #32] - 8008976: 2b00 cmp r3, #0 - 8008978: dd02 ble.n 8008980 <_dtoa_r+0x9f8> - 800897a: 9b06 ldr r3, [sp, #24] - 800897c: f103 0a31 add.w sl, r3, #49 ; 0x31 - 8008980: f88b a000 strb.w sl, [fp] - 8008984: e77d b.n 8008882 <_dtoa_r+0x8fa> - 8008986: 4628 mov r0, r5 - 8008988: e7bc b.n 8008904 <_dtoa_r+0x97c> - 800898a: 2201 movs r2, #1 - 800898c: e7e2 b.n 8008954 <_dtoa_r+0x9cc> - 800898e: 9b08 ldr r3, [sp, #32] - 8008990: 2b00 cmp r3, #0 - 8008992: db04 blt.n 800899e <_dtoa_r+0xa16> - 8008994: 9920 ldr r1, [sp, #128] ; 0x80 - 8008996: 430b orrs r3, r1 - 8008998: 9909 ldr r1, [sp, #36] ; 0x24 - 800899a: 430b orrs r3, r1 - 800899c: d120 bne.n 80089e0 <_dtoa_r+0xa58> - 800899e: 2a00 cmp r2, #0 - 80089a0: ddee ble.n 8008980 <_dtoa_r+0x9f8> - 80089a2: 2201 movs r2, #1 - 80089a4: 9903 ldr r1, [sp, #12] - 80089a6: 4648 mov r0, r9 - 80089a8: f000 fba0 bl 80090ec <__lshift> - 80089ac: 4621 mov r1, r4 - 80089ae: 9003 str r0, [sp, #12] - 80089b0: f000 fc0c bl 80091cc <__mcmp> - 80089b4: 2800 cmp r0, #0 - 80089b6: dc03 bgt.n 80089c0 <_dtoa_r+0xa38> - 80089b8: d1e2 bne.n 8008980 <_dtoa_r+0x9f8> - 80089ba: f01a 0f01 tst.w sl, #1 - 80089be: d0df beq.n 8008980 <_dtoa_r+0x9f8> - 80089c0: f1ba 0f39 cmp.w sl, #57 ; 0x39 - 80089c4: d1d9 bne.n 800897a <_dtoa_r+0x9f2> - 80089c6: 2339 movs r3, #57 ; 0x39 - 80089c8: f88b 3000 strb.w r3, [fp] - 80089cc: 4633 mov r3, r6 - 80089ce: 461e mov r6, r3 - 80089d0: f816 2c01 ldrb.w r2, [r6, #-1] - 80089d4: 3b01 subs r3, #1 - 80089d6: 2a39 cmp r2, #57 ; 0x39 - 80089d8: d06a beq.n 8008ab0 <_dtoa_r+0xb28> - 80089da: 3201 adds r2, #1 - 80089dc: 701a strb r2, [r3, #0] - 80089de: e750 b.n 8008882 <_dtoa_r+0x8fa> - 80089e0: 2a00 cmp r2, #0 - 80089e2: dd07 ble.n 80089f4 <_dtoa_r+0xa6c> - 80089e4: f1ba 0f39 cmp.w sl, #57 ; 0x39 - 80089e8: d0ed beq.n 80089c6 <_dtoa_r+0xa3e> - 80089ea: f10a 0301 add.w r3, sl, #1 - 80089ee: f88b 3000 strb.w r3, [fp] - 80089f2: e746 b.n 8008882 <_dtoa_r+0x8fa> - 80089f4: 9b05 ldr r3, [sp, #20] - 80089f6: 9a0a ldr r2, [sp, #40] ; 0x28 - 80089f8: f803 ac01 strb.w sl, [r3, #-1] - 80089fc: 4293 cmp r3, r2 - 80089fe: d041 beq.n 8008a84 <_dtoa_r+0xafc> - 8008a00: 2300 movs r3, #0 - 8008a02: 220a movs r2, #10 - 8008a04: 9903 ldr r1, [sp, #12] - 8008a06: 4648 mov r0, r9 - 8008a08: f000 f9de bl 8008dc8 <__multadd> - 8008a0c: 42af cmp r7, r5 - 8008a0e: 9003 str r0, [sp, #12] - 8008a10: f04f 0300 mov.w r3, #0 - 8008a14: f04f 020a mov.w r2, #10 - 8008a18: 4639 mov r1, r7 - 8008a1a: 4648 mov r0, r9 - 8008a1c: d107 bne.n 8008a2e <_dtoa_r+0xaa6> - 8008a1e: f000 f9d3 bl 8008dc8 <__multadd> - 8008a22: 4607 mov r7, r0 - 8008a24: 4605 mov r5, r0 - 8008a26: 9b05 ldr r3, [sp, #20] - 8008a28: 3301 adds r3, #1 - 8008a2a: 9305 str r3, [sp, #20] - 8008a2c: e776 b.n 800891c <_dtoa_r+0x994> - 8008a2e: f000 f9cb bl 8008dc8 <__multadd> - 8008a32: 4629 mov r1, r5 - 8008a34: 4607 mov r7, r0 - 8008a36: 2300 movs r3, #0 - 8008a38: 220a movs r2, #10 - 8008a3a: 4648 mov r0, r9 - 8008a3c: f000 f9c4 bl 8008dc8 <__multadd> - 8008a40: 4605 mov r5, r0 - 8008a42: e7f0 b.n 8008a26 <_dtoa_r+0xa9e> - 8008a44: 9b05 ldr r3, [sp, #20] - 8008a46: 9308 str r3, [sp, #32] - 8008a48: 9e04 ldr r6, [sp, #16] - 8008a4a: 4621 mov r1, r4 - 8008a4c: 9803 ldr r0, [sp, #12] - 8008a4e: f7ff fa0f bl 8007e70 - 8008a52: 9b04 ldr r3, [sp, #16] - 8008a54: f100 0a30 add.w sl, r0, #48 ; 0x30 - 8008a58: f806 ab01 strb.w sl, [r6], #1 - 8008a5c: 1af2 subs r2, r6, r3 - 8008a5e: 9b08 ldr r3, [sp, #32] - 8008a60: 4293 cmp r3, r2 - 8008a62: dd07 ble.n 8008a74 <_dtoa_r+0xaec> - 8008a64: 2300 movs r3, #0 - 8008a66: 220a movs r2, #10 - 8008a68: 4648 mov r0, r9 - 8008a6a: 9903 ldr r1, [sp, #12] - 8008a6c: f000 f9ac bl 8008dc8 <__multadd> - 8008a70: 9003 str r0, [sp, #12] - 8008a72: e7ea b.n 8008a4a <_dtoa_r+0xac2> - 8008a74: 9b08 ldr r3, [sp, #32] - 8008a76: 2700 movs r7, #0 - 8008a78: 2b00 cmp r3, #0 - 8008a7a: bfcc ite gt - 8008a7c: 461e movgt r6, r3 - 8008a7e: 2601 movle r6, #1 - 8008a80: 9b04 ldr r3, [sp, #16] - 8008a82: 441e add r6, r3 - 8008a84: 2201 movs r2, #1 - 8008a86: 9903 ldr r1, [sp, #12] - 8008a88: 4648 mov r0, r9 - 8008a8a: f000 fb2f bl 80090ec <__lshift> - 8008a8e: 4621 mov r1, r4 - 8008a90: 9003 str r0, [sp, #12] - 8008a92: f000 fb9b bl 80091cc <__mcmp> - 8008a96: 2800 cmp r0, #0 - 8008a98: dc98 bgt.n 80089cc <_dtoa_r+0xa44> - 8008a9a: d102 bne.n 8008aa2 <_dtoa_r+0xb1a> - 8008a9c: f01a 0f01 tst.w sl, #1 - 8008aa0: d194 bne.n 80089cc <_dtoa_r+0xa44> - 8008aa2: 4633 mov r3, r6 - 8008aa4: 461e mov r6, r3 - 8008aa6: f813 2d01 ldrb.w r2, [r3, #-1]! - 8008aaa: 2a30 cmp r2, #48 ; 0x30 - 8008aac: d0fa beq.n 8008aa4 <_dtoa_r+0xb1c> - 8008aae: e6e8 b.n 8008882 <_dtoa_r+0x8fa> - 8008ab0: 9a04 ldr r2, [sp, #16] - 8008ab2: 429a cmp r2, r3 - 8008ab4: d18b bne.n 80089ce <_dtoa_r+0xa46> - 8008ab6: 2331 movs r3, #49 ; 0x31 - 8008ab8: f108 0801 add.w r8, r8, #1 - 8008abc: 7013 strb r3, [r2, #0] - 8008abe: e6e0 b.n 8008882 <_dtoa_r+0x8fa> - 8008ac0: 4b09 ldr r3, [pc, #36] ; (8008ae8 <_dtoa_r+0xb60>) - 8008ac2: f7ff bab1 b.w 8008028 <_dtoa_r+0xa0> - 8008ac6: 9b24 ldr r3, [sp, #144] ; 0x90 - 8008ac8: 2b00 cmp r3, #0 - 8008aca: f47f aa95 bne.w 8007ff8 <_dtoa_r+0x70> - 8008ace: 4b07 ldr r3, [pc, #28] ; (8008aec <_dtoa_r+0xb64>) - 8008ad0: f7ff baaa b.w 8008028 <_dtoa_r+0xa0> - 8008ad4: 9b08 ldr r3, [sp, #32] - 8008ad6: 2b00 cmp r3, #0 - 8008ad8: dcb6 bgt.n 8008a48 <_dtoa_r+0xac0> - 8008ada: 9b20 ldr r3, [sp, #128] ; 0x80 - 8008adc: 2b02 cmp r3, #2 - 8008ade: f73f aebc bgt.w 800885a <_dtoa_r+0x8d2> - 8008ae2: e7b1 b.n 8008a48 <_dtoa_r+0xac0> - 8008ae4: 0800b242 .word 0x0800b242 - 8008ae8: 0800b112 .word 0x0800b112 - 8008aec: 0800b239 .word 0x0800b239 - -08008af0 <__libc_fini_array>: - 8008af0: b538 push {r3, r4, r5, lr} - 8008af2: 4d07 ldr r5, [pc, #28] ; (8008b10 <__libc_fini_array+0x20>) - 8008af4: 4c07 ldr r4, [pc, #28] ; (8008b14 <__libc_fini_array+0x24>) - 8008af6: 1b64 subs r4, r4, r5 - 8008af8: 10a4 asrs r4, r4, #2 - 8008afa: b91c cbnz r4, 8008b04 <__libc_fini_array+0x14> - 8008afc: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} - 8008b00: f002 b9d6 b.w 800aeb0 <_fini> - 8008b04: 3c01 subs r4, #1 - 8008b06: f855 3024 ldr.w r3, [r5, r4, lsl #2] - 8008b0a: 4798 blx r3 - 8008b0c: e7f5 b.n 8008afa <__libc_fini_array+0xa> - 8008b0e: bf00 nop - 8008b10: 0800b488 .word 0x0800b488 - 8008b14: 0800b490 .word 0x0800b490 - -08008b18 <_malloc_trim_r>: - 8008b18: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 8008b1c: 4606 mov r6, r0 - 8008b1e: 2008 movs r0, #8 - 8008b20: 460c mov r4, r1 - 8008b22: f7ff f987 bl 8007e34 - 8008b26: 4680 mov r8, r0 - 8008b28: 4f22 ldr r7, [pc, #136] ; (8008bb4 <_malloc_trim_r+0x9c>) - 8008b2a: 4630 mov r0, r6 - 8008b2c: f7fd fe8a bl 8006844 <__malloc_lock> - 8008b30: 68bb ldr r3, [r7, #8] - 8008b32: 685d ldr r5, [r3, #4] - 8008b34: f025 0503 bic.w r5, r5, #3 - 8008b38: 1b2c subs r4, r5, r4 - 8008b3a: 3c11 subs r4, #17 - 8008b3c: 4444 add r4, r8 - 8008b3e: fbb4 f4f8 udiv r4, r4, r8 - 8008b42: 3c01 subs r4, #1 - 8008b44: fb08 f404 mul.w r4, r8, r4 - 8008b48: 45a0 cmp r8, r4 - 8008b4a: dd05 ble.n 8008b58 <_malloc_trim_r+0x40> - 8008b4c: 4630 mov r0, r6 - 8008b4e: f7fd fe7f bl 8006850 <__malloc_unlock> - 8008b52: 2000 movs r0, #0 - 8008b54: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8008b58: 2100 movs r1, #0 - 8008b5a: 4630 mov r0, r6 - 8008b5c: f7fd fe7e bl 800685c <_sbrk_r> - 8008b60: 68bb ldr r3, [r7, #8] - 8008b62: 442b add r3, r5 - 8008b64: 4298 cmp r0, r3 - 8008b66: d1f1 bne.n 8008b4c <_malloc_trim_r+0x34> - 8008b68: 4630 mov r0, r6 - 8008b6a: 4261 negs r1, r4 - 8008b6c: f7fd fe76 bl 800685c <_sbrk_r> - 8008b70: 3001 adds r0, #1 - 8008b72: d110 bne.n 8008b96 <_malloc_trim_r+0x7e> - 8008b74: 2100 movs r1, #0 - 8008b76: 4630 mov r0, r6 - 8008b78: f7fd fe70 bl 800685c <_sbrk_r> - 8008b7c: 68ba ldr r2, [r7, #8] - 8008b7e: 1a83 subs r3, r0, r2 - 8008b80: 2b0f cmp r3, #15 - 8008b82: dde3 ble.n 8008b4c <_malloc_trim_r+0x34> - 8008b84: 490c ldr r1, [pc, #48] ; (8008bb8 <_malloc_trim_r+0xa0>) - 8008b86: f043 0301 orr.w r3, r3, #1 - 8008b8a: 6809 ldr r1, [r1, #0] - 8008b8c: 6053 str r3, [r2, #4] - 8008b8e: 1a40 subs r0, r0, r1 - 8008b90: 490a ldr r1, [pc, #40] ; (8008bbc <_malloc_trim_r+0xa4>) - 8008b92: 6008 str r0, [r1, #0] - 8008b94: e7da b.n 8008b4c <_malloc_trim_r+0x34> - 8008b96: 68bb ldr r3, [r7, #8] - 8008b98: 4a08 ldr r2, [pc, #32] ; (8008bbc <_malloc_trim_r+0xa4>) - 8008b9a: 1b2d subs r5, r5, r4 - 8008b9c: f045 0501 orr.w r5, r5, #1 - 8008ba0: 605d str r5, [r3, #4] - 8008ba2: 6813 ldr r3, [r2, #0] - 8008ba4: 4630 mov r0, r6 - 8008ba6: 1b1b subs r3, r3, r4 - 8008ba8: 6013 str r3, [r2, #0] - 8008baa: f7fd fe51 bl 8006850 <__malloc_unlock> - 8008bae: 2001 movs r0, #1 - 8008bb0: e7d0 b.n 8008b54 <_malloc_trim_r+0x3c> - 8008bb2: bf00 nop - 8008bb4: 20000448 .word 0x20000448 - 8008bb8: 20000850 .word 0x20000850 - 8008bbc: 2000133c .word 0x2000133c - -08008bc0 <_free_r>: - 8008bc0: b5f8 push {r3, r4, r5, r6, r7, lr} - 8008bc2: 4605 mov r5, r0 - 8008bc4: 460f mov r7, r1 - 8008bc6: 2900 cmp r1, #0 - 8008bc8: f000 80b1 beq.w 8008d2e <_free_r+0x16e> - 8008bcc: f7fd fe3a bl 8006844 <__malloc_lock> - 8008bd0: f857 2c04 ldr.w r2, [r7, #-4] - 8008bd4: 4856 ldr r0, [pc, #344] ; (8008d30 <_free_r+0x170>) - 8008bd6: f022 0401 bic.w r4, r2, #1 - 8008bda: f1a7 0308 sub.w r3, r7, #8 - 8008bde: eb03 0c04 add.w ip, r3, r4 - 8008be2: 6881 ldr r1, [r0, #8] - 8008be4: f8dc 6004 ldr.w r6, [ip, #4] - 8008be8: 4561 cmp r1, ip - 8008bea: f026 0603 bic.w r6, r6, #3 - 8008bee: f002 0201 and.w r2, r2, #1 - 8008bf2: d11b bne.n 8008c2c <_free_r+0x6c> - 8008bf4: 4434 add r4, r6 - 8008bf6: b93a cbnz r2, 8008c08 <_free_r+0x48> - 8008bf8: f857 2c08 ldr.w r2, [r7, #-8] - 8008bfc: 1a9b subs r3, r3, r2 - 8008bfe: 4414 add r4, r2 - 8008c00: e9d3 1202 ldrd r1, r2, [r3, #8] - 8008c04: 60ca str r2, [r1, #12] - 8008c06: 6091 str r1, [r2, #8] - 8008c08: f044 0201 orr.w r2, r4, #1 - 8008c0c: 605a str r2, [r3, #4] - 8008c0e: 6083 str r3, [r0, #8] - 8008c10: 4b48 ldr r3, [pc, #288] ; (8008d34 <_free_r+0x174>) - 8008c12: 681b ldr r3, [r3, #0] - 8008c14: 42a3 cmp r3, r4 - 8008c16: d804 bhi.n 8008c22 <_free_r+0x62> - 8008c18: 4b47 ldr r3, [pc, #284] ; (8008d38 <_free_r+0x178>) - 8008c1a: 4628 mov r0, r5 - 8008c1c: 6819 ldr r1, [r3, #0] - 8008c1e: f7ff ff7b bl 8008b18 <_malloc_trim_r> - 8008c22: 4628 mov r0, r5 - 8008c24: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} - 8008c28: f7fd be12 b.w 8006850 <__malloc_unlock> - 8008c2c: f8cc 6004 str.w r6, [ip, #4] - 8008c30: 2a00 cmp r2, #0 - 8008c32: d138 bne.n 8008ca6 <_free_r+0xe6> - 8008c34: f857 1c08 ldr.w r1, [r7, #-8] - 8008c38: f100 0708 add.w r7, r0, #8 - 8008c3c: 1a5b subs r3, r3, r1 - 8008c3e: 440c add r4, r1 - 8008c40: 6899 ldr r1, [r3, #8] - 8008c42: 42b9 cmp r1, r7 - 8008c44: d031 beq.n 8008caa <_free_r+0xea> - 8008c46: 68df ldr r7, [r3, #12] - 8008c48: 60cf str r7, [r1, #12] - 8008c4a: 60b9 str r1, [r7, #8] - 8008c4c: eb0c 0106 add.w r1, ip, r6 - 8008c50: 6849 ldr r1, [r1, #4] - 8008c52: 07c9 lsls r1, r1, #31 - 8008c54: d40b bmi.n 8008c6e <_free_r+0xae> - 8008c56: f8dc 1008 ldr.w r1, [ip, #8] - 8008c5a: 4434 add r4, r6 - 8008c5c: bb3a cbnz r2, 8008cae <_free_r+0xee> - 8008c5e: 4e37 ldr r6, [pc, #220] ; (8008d3c <_free_r+0x17c>) - 8008c60: 42b1 cmp r1, r6 - 8008c62: d124 bne.n 8008cae <_free_r+0xee> - 8008c64: 2201 movs r2, #1 - 8008c66: e9c0 3304 strd r3, r3, [r0, #16] - 8008c6a: e9c3 1102 strd r1, r1, [r3, #8] - 8008c6e: f044 0101 orr.w r1, r4, #1 - 8008c72: 6059 str r1, [r3, #4] - 8008c74: 511c str r4, [r3, r4] - 8008c76: 2a00 cmp r2, #0 - 8008c78: d1d3 bne.n 8008c22 <_free_r+0x62> - 8008c7a: f5b4 7f00 cmp.w r4, #512 ; 0x200 - 8008c7e: d21b bcs.n 8008cb8 <_free_r+0xf8> - 8008c80: 0961 lsrs r1, r4, #5 - 8008c82: 08e2 lsrs r2, r4, #3 - 8008c84: 2401 movs r4, #1 - 8008c86: 408c lsls r4, r1 - 8008c88: 6841 ldr r1, [r0, #4] - 8008c8a: 3201 adds r2, #1 - 8008c8c: 430c orrs r4, r1 - 8008c8e: 6044 str r4, [r0, #4] - 8008c90: eb00 01c2 add.w r1, r0, r2, lsl #3 - 8008c94: f850 4032 ldr.w r4, [r0, r2, lsl #3] - 8008c98: 3908 subs r1, #8 - 8008c9a: e9c3 4102 strd r4, r1, [r3, #8] - 8008c9e: f840 3032 str.w r3, [r0, r2, lsl #3] - 8008ca2: 60e3 str r3, [r4, #12] - 8008ca4: e7bd b.n 8008c22 <_free_r+0x62> - 8008ca6: 2200 movs r2, #0 - 8008ca8: e7d0 b.n 8008c4c <_free_r+0x8c> - 8008caa: 2201 movs r2, #1 - 8008cac: e7ce b.n 8008c4c <_free_r+0x8c> - 8008cae: f8dc 600c ldr.w r6, [ip, #12] - 8008cb2: 60ce str r6, [r1, #12] - 8008cb4: 60b1 str r1, [r6, #8] - 8008cb6: e7da b.n 8008c6e <_free_r+0xae> - 8008cb8: f5b4 6f20 cmp.w r4, #2560 ; 0xa00 - 8008cbc: ea4f 2254 mov.w r2, r4, lsr #9 - 8008cc0: d214 bcs.n 8008cec <_free_r+0x12c> - 8008cc2: 09a2 lsrs r2, r4, #6 - 8008cc4: 3238 adds r2, #56 ; 0x38 - 8008cc6: 1c51 adds r1, r2, #1 - 8008cc8: f850 1031 ldr.w r1, [r0, r1, lsl #3] - 8008ccc: eb00 06c2 add.w r6, r0, r2, lsl #3 - 8008cd0: 428e cmp r6, r1 - 8008cd2: d125 bne.n 8008d20 <_free_r+0x160> - 8008cd4: 2401 movs r4, #1 - 8008cd6: 1092 asrs r2, r2, #2 - 8008cd8: fa04 f202 lsl.w r2, r4, r2 - 8008cdc: 6844 ldr r4, [r0, #4] - 8008cde: 4322 orrs r2, r4 - 8008ce0: 6042 str r2, [r0, #4] - 8008ce2: e9c3 1602 strd r1, r6, [r3, #8] - 8008ce6: 60b3 str r3, [r6, #8] - 8008ce8: 60cb str r3, [r1, #12] - 8008cea: e79a b.n 8008c22 <_free_r+0x62> - 8008cec: 2a14 cmp r2, #20 - 8008cee: d801 bhi.n 8008cf4 <_free_r+0x134> - 8008cf0: 325b adds r2, #91 ; 0x5b - 8008cf2: e7e8 b.n 8008cc6 <_free_r+0x106> - 8008cf4: 2a54 cmp r2, #84 ; 0x54 - 8008cf6: d802 bhi.n 8008cfe <_free_r+0x13e> - 8008cf8: 0b22 lsrs r2, r4, #12 - 8008cfa: 326e adds r2, #110 ; 0x6e - 8008cfc: e7e3 b.n 8008cc6 <_free_r+0x106> - 8008cfe: f5b2 7faa cmp.w r2, #340 ; 0x154 - 8008d02: d802 bhi.n 8008d0a <_free_r+0x14a> - 8008d04: 0be2 lsrs r2, r4, #15 - 8008d06: 3277 adds r2, #119 ; 0x77 - 8008d08: e7dd b.n 8008cc6 <_free_r+0x106> - 8008d0a: f240 5154 movw r1, #1364 ; 0x554 - 8008d0e: 428a cmp r2, r1 - 8008d10: bf96 itet ls - 8008d12: 0ca2 lsrls r2, r4, #18 - 8008d14: 227e movhi r2, #126 ; 0x7e - 8008d16: 327c addls r2, #124 ; 0x7c - 8008d18: e7d5 b.n 8008cc6 <_free_r+0x106> - 8008d1a: 6889 ldr r1, [r1, #8] - 8008d1c: 428e cmp r6, r1 - 8008d1e: d004 beq.n 8008d2a <_free_r+0x16a> - 8008d20: 684a ldr r2, [r1, #4] - 8008d22: f022 0203 bic.w r2, r2, #3 - 8008d26: 42a2 cmp r2, r4 - 8008d28: d8f7 bhi.n 8008d1a <_free_r+0x15a> - 8008d2a: 68ce ldr r6, [r1, #12] - 8008d2c: e7d9 b.n 8008ce2 <_free_r+0x122> - 8008d2e: bdf8 pop {r3, r4, r5, r6, r7, pc} - 8008d30: 20000448 .word 0x20000448 - 8008d34: 20000854 .word 0x20000854 - 8008d38: 2000136c .word 0x2000136c - 8008d3c: 20000450 .word 0x20000450 - -08008d40 <_localeconv_r>: - 8008d40: 4800 ldr r0, [pc, #0] ; (8008d44 <_localeconv_r+0x4>) - 8008d42: 4770 bx lr - 8008d44: 2000094c .word 0x2000094c - -08008d48 <__retarget_lock_init_recursive>: - 8008d48: 4770 bx lr - -08008d4a <__retarget_lock_close_recursive>: - 8008d4a: 4770 bx lr - -08008d4c <__retarget_lock_acquire_recursive>: - 8008d4c: 4770 bx lr - -08008d4e <__retarget_lock_release_recursive>: - 8008d4e: 4770 bx lr - -08008d50 : - 8008d50: 4603 mov r3, r0 - 8008d52: b510 push {r4, lr} - 8008d54: b2c9 uxtb r1, r1 - 8008d56: 4402 add r2, r0 - 8008d58: 4293 cmp r3, r2 - 8008d5a: 4618 mov r0, r3 - 8008d5c: d101 bne.n 8008d62 - 8008d5e: 2000 movs r0, #0 - 8008d60: e003 b.n 8008d6a - 8008d62: 7804 ldrb r4, [r0, #0] - 8008d64: 3301 adds r3, #1 - 8008d66: 428c cmp r4, r1 - 8008d68: d1f6 bne.n 8008d58 - 8008d6a: bd10 pop {r4, pc} - -08008d6c <_Balloc>: - 8008d6c: 6cc3 ldr r3, [r0, #76] ; 0x4c - 8008d6e: b570 push {r4, r5, r6, lr} - 8008d70: 4605 mov r5, r0 - 8008d72: 460c mov r4, r1 - 8008d74: b17b cbz r3, 8008d96 <_Balloc+0x2a> - 8008d76: 6ceb ldr r3, [r5, #76] ; 0x4c - 8008d78: f853 0024 ldr.w r0, [r3, r4, lsl #2] - 8008d7c: b9a0 cbnz r0, 8008da8 <_Balloc+0x3c> - 8008d7e: 2101 movs r1, #1 - 8008d80: fa01 f604 lsl.w r6, r1, r4 - 8008d84: 1d72 adds r2, r6, #5 - 8008d86: 4628 mov r0, r5 - 8008d88: 0092 lsls r2, r2, #2 - 8008d8a: f000 fc45 bl 8009618 <_calloc_r> - 8008d8e: b148 cbz r0, 8008da4 <_Balloc+0x38> - 8008d90: e9c0 4601 strd r4, r6, [r0, #4] - 8008d94: e00b b.n 8008dae <_Balloc+0x42> - 8008d96: 2221 movs r2, #33 ; 0x21 - 8008d98: 2104 movs r1, #4 - 8008d9a: f000 fc3d bl 8009618 <_calloc_r> - 8008d9e: 64e8 str r0, [r5, #76] ; 0x4c - 8008da0: 2800 cmp r0, #0 - 8008da2: d1e8 bne.n 8008d76 <_Balloc+0xa> - 8008da4: 2000 movs r0, #0 - 8008da6: bd70 pop {r4, r5, r6, pc} - 8008da8: 6802 ldr r2, [r0, #0] - 8008daa: f843 2024 str.w r2, [r3, r4, lsl #2] - 8008dae: 2300 movs r3, #0 - 8008db0: e9c0 3303 strd r3, r3, [r0, #12] - 8008db4: e7f7 b.n 8008da6 <_Balloc+0x3a> - -08008db6 <_Bfree>: - 8008db6: b131 cbz r1, 8008dc6 <_Bfree+0x10> - 8008db8: 6cc3 ldr r3, [r0, #76] ; 0x4c - 8008dba: 684a ldr r2, [r1, #4] - 8008dbc: f853 0022 ldr.w r0, [r3, r2, lsl #2] - 8008dc0: 6008 str r0, [r1, #0] - 8008dc2: f843 1022 str.w r1, [r3, r2, lsl #2] - 8008dc6: 4770 bx lr - -08008dc8 <__multadd>: - 8008dc8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 8008dcc: 4607 mov r7, r0 - 8008dce: 460c mov r4, r1 - 8008dd0: 461e mov r6, r3 - 8008dd2: 2000 movs r0, #0 - 8008dd4: 690d ldr r5, [r1, #16] - 8008dd6: f101 0c14 add.w ip, r1, #20 - 8008dda: f8dc 3000 ldr.w r3, [ip] - 8008dde: 3001 adds r0, #1 - 8008de0: b299 uxth r1, r3 - 8008de2: fb02 6101 mla r1, r2, r1, r6 - 8008de6: 0c1e lsrs r6, r3, #16 - 8008de8: 0c0b lsrs r3, r1, #16 - 8008dea: fb02 3306 mla r3, r2, r6, r3 - 8008dee: b289 uxth r1, r1 - 8008df0: eb01 4103 add.w r1, r1, r3, lsl #16 - 8008df4: 4285 cmp r5, r0 - 8008df6: ea4f 4613 mov.w r6, r3, lsr #16 - 8008dfa: f84c 1b04 str.w r1, [ip], #4 - 8008dfe: dcec bgt.n 8008dda <__multadd+0x12> - 8008e00: b30e cbz r6, 8008e46 <__multadd+0x7e> - 8008e02: 68a3 ldr r3, [r4, #8] - 8008e04: 42ab cmp r3, r5 - 8008e06: dc19 bgt.n 8008e3c <__multadd+0x74> - 8008e08: 6861 ldr r1, [r4, #4] - 8008e0a: 4638 mov r0, r7 - 8008e0c: 3101 adds r1, #1 - 8008e0e: f7ff ffad bl 8008d6c <_Balloc> - 8008e12: 4680 mov r8, r0 - 8008e14: b928 cbnz r0, 8008e22 <__multadd+0x5a> - 8008e16: 4602 mov r2, r0 - 8008e18: 21b5 movs r1, #181 ; 0xb5 - 8008e1a: 4b0c ldr r3, [pc, #48] ; (8008e4c <__multadd+0x84>) - 8008e1c: 480c ldr r0, [pc, #48] ; (8008e50 <__multadd+0x88>) - 8008e1e: f000 fbdd bl 80095dc <__assert_func> - 8008e22: 6922 ldr r2, [r4, #16] - 8008e24: f104 010c add.w r1, r4, #12 - 8008e28: 3202 adds r2, #2 - 8008e2a: 0092 lsls r2, r2, #2 - 8008e2c: 300c adds r0, #12 - 8008e2e: f7fd fcf3 bl 8006818 - 8008e32: 4621 mov r1, r4 - 8008e34: 4638 mov r0, r7 - 8008e36: f7ff ffbe bl 8008db6 <_Bfree> - 8008e3a: 4644 mov r4, r8 - 8008e3c: eb04 0385 add.w r3, r4, r5, lsl #2 - 8008e40: 3501 adds r5, #1 - 8008e42: 615e str r6, [r3, #20] - 8008e44: 6125 str r5, [r4, #16] - 8008e46: 4620 mov r0, r4 - 8008e48: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8008e4c: 0800b242 .word 0x0800b242 - 8008e50: 0800b2ae .word 0x0800b2ae - -08008e54 <__hi0bits>: - 8008e54: 0c02 lsrs r2, r0, #16 - 8008e56: 0412 lsls r2, r2, #16 - 8008e58: 4603 mov r3, r0 - 8008e5a: b9ca cbnz r2, 8008e90 <__hi0bits+0x3c> - 8008e5c: 0403 lsls r3, r0, #16 - 8008e5e: 2010 movs r0, #16 - 8008e60: f013 4f7f tst.w r3, #4278190080 ; 0xff000000 - 8008e64: bf04 itt eq - 8008e66: 021b lsleq r3, r3, #8 - 8008e68: 3008 addeq r0, #8 - 8008e6a: f013 4f70 tst.w r3, #4026531840 ; 0xf0000000 - 8008e6e: bf04 itt eq - 8008e70: 011b lsleq r3, r3, #4 - 8008e72: 3004 addeq r0, #4 - 8008e74: f013 4f40 tst.w r3, #3221225472 ; 0xc0000000 - 8008e78: bf04 itt eq - 8008e7a: 009b lsleq r3, r3, #2 - 8008e7c: 3002 addeq r0, #2 - 8008e7e: 2b00 cmp r3, #0 - 8008e80: db05 blt.n 8008e8e <__hi0bits+0x3a> - 8008e82: f013 4f80 tst.w r3, #1073741824 ; 0x40000000 - 8008e86: f100 0001 add.w r0, r0, #1 - 8008e8a: bf08 it eq - 8008e8c: 2020 moveq r0, #32 - 8008e8e: 4770 bx lr - 8008e90: 2000 movs r0, #0 - 8008e92: e7e5 b.n 8008e60 <__hi0bits+0xc> - -08008e94 <__lo0bits>: - 8008e94: 6803 ldr r3, [r0, #0] - 8008e96: 4602 mov r2, r0 - 8008e98: f013 0007 ands.w r0, r3, #7 - 8008e9c: d00b beq.n 8008eb6 <__lo0bits+0x22> - 8008e9e: 07d9 lsls r1, r3, #31 - 8008ea0: d421 bmi.n 8008ee6 <__lo0bits+0x52> - 8008ea2: 0798 lsls r0, r3, #30 - 8008ea4: bf49 itett mi - 8008ea6: 085b lsrmi r3, r3, #1 - 8008ea8: 089b lsrpl r3, r3, #2 - 8008eaa: 2001 movmi r0, #1 - 8008eac: 6013 strmi r3, [r2, #0] - 8008eae: bf5c itt pl - 8008eb0: 2002 movpl r0, #2 - 8008eb2: 6013 strpl r3, [r2, #0] - 8008eb4: 4770 bx lr - 8008eb6: b299 uxth r1, r3 - 8008eb8: b909 cbnz r1, 8008ebe <__lo0bits+0x2a> - 8008eba: 2010 movs r0, #16 - 8008ebc: 0c1b lsrs r3, r3, #16 - 8008ebe: b2d9 uxtb r1, r3 - 8008ec0: b909 cbnz r1, 8008ec6 <__lo0bits+0x32> - 8008ec2: 3008 adds r0, #8 - 8008ec4: 0a1b lsrs r3, r3, #8 - 8008ec6: 0719 lsls r1, r3, #28 - 8008ec8: bf04 itt eq - 8008eca: 091b lsreq r3, r3, #4 - 8008ecc: 3004 addeq r0, #4 - 8008ece: 0799 lsls r1, r3, #30 - 8008ed0: bf04 itt eq - 8008ed2: 089b lsreq r3, r3, #2 - 8008ed4: 3002 addeq r0, #2 - 8008ed6: 07d9 lsls r1, r3, #31 - 8008ed8: d403 bmi.n 8008ee2 <__lo0bits+0x4e> - 8008eda: 085b lsrs r3, r3, #1 - 8008edc: f100 0001 add.w r0, r0, #1 - 8008ee0: d003 beq.n 8008eea <__lo0bits+0x56> - 8008ee2: 6013 str r3, [r2, #0] - 8008ee4: 4770 bx lr - 8008ee6: 2000 movs r0, #0 - 8008ee8: 4770 bx lr - 8008eea: 2020 movs r0, #32 - 8008eec: 4770 bx lr - ... - -08008ef0 <__i2b>: - 8008ef0: b510 push {r4, lr} - 8008ef2: 460c mov r4, r1 - 8008ef4: 2101 movs r1, #1 - 8008ef6: f7ff ff39 bl 8008d6c <_Balloc> - 8008efa: 4602 mov r2, r0 - 8008efc: b928 cbnz r0, 8008f0a <__i2b+0x1a> - 8008efe: f44f 71a0 mov.w r1, #320 ; 0x140 - 8008f02: 4b04 ldr r3, [pc, #16] ; (8008f14 <__i2b+0x24>) - 8008f04: 4804 ldr r0, [pc, #16] ; (8008f18 <__i2b+0x28>) - 8008f06: f000 fb69 bl 80095dc <__assert_func> - 8008f0a: 2301 movs r3, #1 - 8008f0c: 6144 str r4, [r0, #20] - 8008f0e: 6103 str r3, [r0, #16] - 8008f10: bd10 pop {r4, pc} - 8008f12: bf00 nop - 8008f14: 0800b242 .word 0x0800b242 - 8008f18: 0800b2ae .word 0x0800b2ae - -08008f1c <__multiply>: - 8008f1c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8008f20: 4691 mov r9, r2 - 8008f22: 690a ldr r2, [r1, #16] - 8008f24: f8d9 3010 ldr.w r3, [r9, #16] - 8008f28: 460c mov r4, r1 - 8008f2a: 429a cmp r2, r3 - 8008f2c: bfbe ittt lt - 8008f2e: 460b movlt r3, r1 - 8008f30: 464c movlt r4, r9 - 8008f32: 4699 movlt r9, r3 - 8008f34: 6927 ldr r7, [r4, #16] - 8008f36: f8d9 a010 ldr.w sl, [r9, #16] - 8008f3a: 68a3 ldr r3, [r4, #8] - 8008f3c: 6861 ldr r1, [r4, #4] - 8008f3e: eb07 060a add.w r6, r7, sl - 8008f42: 42b3 cmp r3, r6 - 8008f44: b085 sub sp, #20 - 8008f46: bfb8 it lt - 8008f48: 3101 addlt r1, #1 - 8008f4a: f7ff ff0f bl 8008d6c <_Balloc> - 8008f4e: b930 cbnz r0, 8008f5e <__multiply+0x42> - 8008f50: 4602 mov r2, r0 - 8008f52: f240 115d movw r1, #349 ; 0x15d - 8008f56: 4b43 ldr r3, [pc, #268] ; (8009064 <__multiply+0x148>) - 8008f58: 4843 ldr r0, [pc, #268] ; (8009068 <__multiply+0x14c>) - 8008f5a: f000 fb3f bl 80095dc <__assert_func> - 8008f5e: f100 0514 add.w r5, r0, #20 - 8008f62: 462b mov r3, r5 - 8008f64: 2200 movs r2, #0 - 8008f66: eb05 0886 add.w r8, r5, r6, lsl #2 - 8008f6a: 4543 cmp r3, r8 - 8008f6c: d321 bcc.n 8008fb2 <__multiply+0x96> - 8008f6e: f104 0314 add.w r3, r4, #20 - 8008f72: eb03 0787 add.w r7, r3, r7, lsl #2 - 8008f76: f109 0314 add.w r3, r9, #20 - 8008f7a: eb03 028a add.w r2, r3, sl, lsl #2 - 8008f7e: 9202 str r2, [sp, #8] - 8008f80: 1b3a subs r2, r7, r4 - 8008f82: 3a15 subs r2, #21 - 8008f84: f022 0203 bic.w r2, r2, #3 - 8008f88: 3204 adds r2, #4 - 8008f8a: f104 0115 add.w r1, r4, #21 - 8008f8e: 428f cmp r7, r1 - 8008f90: bf38 it cc - 8008f92: 2204 movcc r2, #4 - 8008f94: 9201 str r2, [sp, #4] - 8008f96: 9a02 ldr r2, [sp, #8] - 8008f98: 9303 str r3, [sp, #12] - 8008f9a: 429a cmp r2, r3 - 8008f9c: d80c bhi.n 8008fb8 <__multiply+0x9c> - 8008f9e: 2e00 cmp r6, #0 - 8008fa0: dd03 ble.n 8008faa <__multiply+0x8e> - 8008fa2: f858 3d04 ldr.w r3, [r8, #-4]! - 8008fa6: 2b00 cmp r3, #0 - 8008fa8: d059 beq.n 800905e <__multiply+0x142> - 8008faa: 6106 str r6, [r0, #16] - 8008fac: b005 add sp, #20 - 8008fae: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 8008fb2: f843 2b04 str.w r2, [r3], #4 - 8008fb6: e7d8 b.n 8008f6a <__multiply+0x4e> - 8008fb8: f8b3 a000 ldrh.w sl, [r3] - 8008fbc: f1ba 0f00 cmp.w sl, #0 - 8008fc0: d023 beq.n 800900a <__multiply+0xee> - 8008fc2: 46a9 mov r9, r5 - 8008fc4: f04f 0c00 mov.w ip, #0 - 8008fc8: f104 0e14 add.w lr, r4, #20 - 8008fcc: f85e 2b04 ldr.w r2, [lr], #4 - 8008fd0: f8d9 1000 ldr.w r1, [r9] - 8008fd4: fa1f fb82 uxth.w fp, r2 - 8008fd8: b289 uxth r1, r1 - 8008fda: fb0a 110b mla r1, sl, fp, r1 - 8008fde: 4461 add r1, ip - 8008fe0: f8d9 c000 ldr.w ip, [r9] - 8008fe4: 0c12 lsrs r2, r2, #16 - 8008fe6: ea4f 4c1c mov.w ip, ip, lsr #16 - 8008fea: fb0a c202 mla r2, sl, r2, ip - 8008fee: eb02 4211 add.w r2, r2, r1, lsr #16 - 8008ff2: b289 uxth r1, r1 - 8008ff4: ea41 4102 orr.w r1, r1, r2, lsl #16 - 8008ff8: 4577 cmp r7, lr - 8008ffa: ea4f 4c12 mov.w ip, r2, lsr #16 - 8008ffe: f849 1b04 str.w r1, [r9], #4 - 8009002: d8e3 bhi.n 8008fcc <__multiply+0xb0> - 8009004: 9a01 ldr r2, [sp, #4] - 8009006: f845 c002 str.w ip, [r5, r2] - 800900a: 9a03 ldr r2, [sp, #12] - 800900c: 3304 adds r3, #4 - 800900e: f8b2 9002 ldrh.w r9, [r2, #2] - 8009012: f1b9 0f00 cmp.w r9, #0 - 8009016: d020 beq.n 800905a <__multiply+0x13e> - 8009018: 46ae mov lr, r5 - 800901a: f04f 0a00 mov.w sl, #0 - 800901e: 6829 ldr r1, [r5, #0] - 8009020: f104 0c14 add.w ip, r4, #20 - 8009024: f8bc b000 ldrh.w fp, [ip] - 8009028: f8be 2002 ldrh.w r2, [lr, #2] - 800902c: b289 uxth r1, r1 - 800902e: fb09 220b mla r2, r9, fp, r2 - 8009032: 4492 add sl, r2 - 8009034: ea41 410a orr.w r1, r1, sl, lsl #16 - 8009038: f84e 1b04 str.w r1, [lr], #4 - 800903c: f85c 2b04 ldr.w r2, [ip], #4 - 8009040: f8be 1000 ldrh.w r1, [lr] - 8009044: 0c12 lsrs r2, r2, #16 - 8009046: fb09 1102 mla r1, r9, r2, r1 - 800904a: 4567 cmp r7, ip - 800904c: eb01 411a add.w r1, r1, sl, lsr #16 - 8009050: ea4f 4a11 mov.w sl, r1, lsr #16 - 8009054: d8e6 bhi.n 8009024 <__multiply+0x108> - 8009056: 9a01 ldr r2, [sp, #4] - 8009058: 50a9 str r1, [r5, r2] - 800905a: 3504 adds r5, #4 - 800905c: e79b b.n 8008f96 <__multiply+0x7a> - 800905e: 3e01 subs r6, #1 - 8009060: e79d b.n 8008f9e <__multiply+0x82> - 8009062: bf00 nop - 8009064: 0800b242 .word 0x0800b242 - 8009068: 0800b2ae .word 0x0800b2ae - -0800906c <__pow5mult>: - 800906c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} - 8009070: 4615 mov r5, r2 - 8009072: f012 0203 ands.w r2, r2, #3 - 8009076: 4606 mov r6, r0 - 8009078: 460f mov r7, r1 - 800907a: d007 beq.n 800908c <__pow5mult+0x20> - 800907c: 4c1a ldr r4, [pc, #104] ; (80090e8 <__pow5mult+0x7c>) - 800907e: 3a01 subs r2, #1 - 8009080: 2300 movs r3, #0 - 8009082: f854 2022 ldr.w r2, [r4, r2, lsl #2] - 8009086: f7ff fe9f bl 8008dc8 <__multadd> - 800908a: 4607 mov r7, r0 - 800908c: 10ad asrs r5, r5, #2 - 800908e: d027 beq.n 80090e0 <__pow5mult+0x74> - 8009090: 6cb4 ldr r4, [r6, #72] ; 0x48 - 8009092: b944 cbnz r4, 80090a6 <__pow5mult+0x3a> - 8009094: f240 2171 movw r1, #625 ; 0x271 - 8009098: 4630 mov r0, r6 - 800909a: f7ff ff29 bl 8008ef0 <__i2b> - 800909e: 2300 movs r3, #0 - 80090a0: 4604 mov r4, r0 - 80090a2: 64b0 str r0, [r6, #72] ; 0x48 - 80090a4: 6003 str r3, [r0, #0] - 80090a6: f04f 0900 mov.w r9, #0 - 80090aa: 07eb lsls r3, r5, #31 - 80090ac: d50a bpl.n 80090c4 <__pow5mult+0x58> - 80090ae: 4639 mov r1, r7 - 80090b0: 4622 mov r2, r4 - 80090b2: 4630 mov r0, r6 - 80090b4: f7ff ff32 bl 8008f1c <__multiply> - 80090b8: 4680 mov r8, r0 - 80090ba: 4639 mov r1, r7 - 80090bc: 4630 mov r0, r6 - 80090be: f7ff fe7a bl 8008db6 <_Bfree> - 80090c2: 4647 mov r7, r8 - 80090c4: 106d asrs r5, r5, #1 - 80090c6: d00b beq.n 80090e0 <__pow5mult+0x74> - 80090c8: 6820 ldr r0, [r4, #0] - 80090ca: b938 cbnz r0, 80090dc <__pow5mult+0x70> - 80090cc: 4622 mov r2, r4 - 80090ce: 4621 mov r1, r4 - 80090d0: 4630 mov r0, r6 - 80090d2: f7ff ff23 bl 8008f1c <__multiply> - 80090d6: 6020 str r0, [r4, #0] - 80090d8: f8c0 9000 str.w r9, [r0] - 80090dc: 4604 mov r4, r0 - 80090de: e7e4 b.n 80090aa <__pow5mult+0x3e> - 80090e0: 4638 mov r0, r7 - 80090e2: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} - 80090e6: bf00 nop - 80090e8: 0800b400 .word 0x0800b400 - -080090ec <__lshift>: - 80090ec: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} - 80090f0: 460c mov r4, r1 - 80090f2: 4607 mov r7, r0 - 80090f4: 4691 mov r9, r2 - 80090f6: 6923 ldr r3, [r4, #16] - 80090f8: 6849 ldr r1, [r1, #4] - 80090fa: eb03 1862 add.w r8, r3, r2, asr #5 - 80090fe: 68a3 ldr r3, [r4, #8] - 8009100: ea4f 1a62 mov.w sl, r2, asr #5 - 8009104: f108 0601 add.w r6, r8, #1 - 8009108: 42b3 cmp r3, r6 - 800910a: db0b blt.n 8009124 <__lshift+0x38> - 800910c: 4638 mov r0, r7 - 800910e: f7ff fe2d bl 8008d6c <_Balloc> - 8009112: 4605 mov r5, r0 - 8009114: b948 cbnz r0, 800912a <__lshift+0x3e> - 8009116: 4602 mov r2, r0 - 8009118: f240 11d9 movw r1, #473 ; 0x1d9 - 800911c: 4b29 ldr r3, [pc, #164] ; (80091c4 <__lshift+0xd8>) - 800911e: 482a ldr r0, [pc, #168] ; (80091c8 <__lshift+0xdc>) - 8009120: f000 fa5c bl 80095dc <__assert_func> - 8009124: 3101 adds r1, #1 - 8009126: 005b lsls r3, r3, #1 - 8009128: e7ee b.n 8009108 <__lshift+0x1c> - 800912a: 2300 movs r3, #0 - 800912c: f100 0114 add.w r1, r0, #20 - 8009130: f100 0210 add.w r2, r0, #16 - 8009134: 4618 mov r0, r3 - 8009136: 4553 cmp r3, sl - 8009138: db37 blt.n 80091aa <__lshift+0xbe> - 800913a: 6920 ldr r0, [r4, #16] - 800913c: ea2a 7aea bic.w sl, sl, sl, asr #31 - 8009140: f104 0314 add.w r3, r4, #20 - 8009144: f019 091f ands.w r9, r9, #31 - 8009148: eb01 018a add.w r1, r1, sl, lsl #2 - 800914c: eb03 0080 add.w r0, r3, r0, lsl #2 - 8009150: d02f beq.n 80091b2 <__lshift+0xc6> - 8009152: 468a mov sl, r1 - 8009154: f04f 0c00 mov.w ip, #0 - 8009158: f1c9 0e20 rsb lr, r9, #32 - 800915c: 681a ldr r2, [r3, #0] - 800915e: fa02 f209 lsl.w r2, r2, r9 - 8009162: ea42 020c orr.w r2, r2, ip - 8009166: f84a 2b04 str.w r2, [sl], #4 - 800916a: f853 2b04 ldr.w r2, [r3], #4 - 800916e: 4298 cmp r0, r3 - 8009170: fa22 fc0e lsr.w ip, r2, lr - 8009174: d8f2 bhi.n 800915c <__lshift+0x70> - 8009176: 1b03 subs r3, r0, r4 - 8009178: 3b15 subs r3, #21 - 800917a: f023 0303 bic.w r3, r3, #3 - 800917e: 3304 adds r3, #4 - 8009180: f104 0215 add.w r2, r4, #21 - 8009184: 4290 cmp r0, r2 - 8009186: bf38 it cc - 8009188: 2304 movcc r3, #4 - 800918a: f841 c003 str.w ip, [r1, r3] - 800918e: f1bc 0f00 cmp.w ip, #0 - 8009192: d001 beq.n 8009198 <__lshift+0xac> - 8009194: f108 0602 add.w r6, r8, #2 - 8009198: 3e01 subs r6, #1 - 800919a: 4638 mov r0, r7 - 800919c: 4621 mov r1, r4 - 800919e: 612e str r6, [r5, #16] - 80091a0: f7ff fe09 bl 8008db6 <_Bfree> - 80091a4: 4628 mov r0, r5 - 80091a6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 80091aa: f842 0f04 str.w r0, [r2, #4]! - 80091ae: 3301 adds r3, #1 - 80091b0: e7c1 b.n 8009136 <__lshift+0x4a> - 80091b2: 3904 subs r1, #4 - 80091b4: f853 2b04 ldr.w r2, [r3], #4 - 80091b8: 4298 cmp r0, r3 - 80091ba: f841 2f04 str.w r2, [r1, #4]! - 80091be: d8f9 bhi.n 80091b4 <__lshift+0xc8> - 80091c0: e7ea b.n 8009198 <__lshift+0xac> - 80091c2: bf00 nop - 80091c4: 0800b242 .word 0x0800b242 - 80091c8: 0800b2ae .word 0x0800b2ae - -080091cc <__mcmp>: - 80091cc: 4603 mov r3, r0 - 80091ce: 690a ldr r2, [r1, #16] - 80091d0: 6900 ldr r0, [r0, #16] - 80091d2: b530 push {r4, r5, lr} - 80091d4: 1a80 subs r0, r0, r2 - 80091d6: d10d bne.n 80091f4 <__mcmp+0x28> - 80091d8: 3314 adds r3, #20 - 80091da: 3114 adds r1, #20 - 80091dc: eb03 0482 add.w r4, r3, r2, lsl #2 - 80091e0: eb01 0182 add.w r1, r1, r2, lsl #2 - 80091e4: f854 5d04 ldr.w r5, [r4, #-4]! - 80091e8: f851 2d04 ldr.w r2, [r1, #-4]! - 80091ec: 4295 cmp r5, r2 - 80091ee: d002 beq.n 80091f6 <__mcmp+0x2a> - 80091f0: d304 bcc.n 80091fc <__mcmp+0x30> - 80091f2: 2001 movs r0, #1 - 80091f4: bd30 pop {r4, r5, pc} - 80091f6: 42a3 cmp r3, r4 - 80091f8: d3f4 bcc.n 80091e4 <__mcmp+0x18> - 80091fa: e7fb b.n 80091f4 <__mcmp+0x28> - 80091fc: f04f 30ff mov.w r0, #4294967295 - 8009200: e7f8 b.n 80091f4 <__mcmp+0x28> - ... - -08009204 <__mdiff>: - 8009204: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8009208: 460d mov r5, r1 - 800920a: 4607 mov r7, r0 - 800920c: 4611 mov r1, r2 - 800920e: 4628 mov r0, r5 - 8009210: 4614 mov r4, r2 - 8009212: f7ff ffdb bl 80091cc <__mcmp> - 8009216: 1e06 subs r6, r0, #0 - 8009218: d111 bne.n 800923e <__mdiff+0x3a> - 800921a: 4631 mov r1, r6 - 800921c: 4638 mov r0, r7 - 800921e: f7ff fda5 bl 8008d6c <_Balloc> - 8009222: 4602 mov r2, r0 - 8009224: b928 cbnz r0, 8009232 <__mdiff+0x2e> - 8009226: f240 2132 movw r1, #562 ; 0x232 - 800922a: 4b3a ldr r3, [pc, #232] ; (8009314 <__mdiff+0x110>) - 800922c: 483a ldr r0, [pc, #232] ; (8009318 <__mdiff+0x114>) - 800922e: f000 f9d5 bl 80095dc <__assert_func> - 8009232: 2301 movs r3, #1 - 8009234: e9c0 3604 strd r3, r6, [r0, #16] - 8009238: 4610 mov r0, r2 - 800923a: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} - 800923e: bfa4 itt ge - 8009240: 4623 movge r3, r4 - 8009242: 462c movge r4, r5 - 8009244: 4638 mov r0, r7 - 8009246: 6861 ldr r1, [r4, #4] - 8009248: bfa6 itte ge - 800924a: 461d movge r5, r3 - 800924c: 2600 movge r6, #0 - 800924e: 2601 movlt r6, #1 - 8009250: f7ff fd8c bl 8008d6c <_Balloc> - 8009254: 4602 mov r2, r0 - 8009256: b918 cbnz r0, 8009260 <__mdiff+0x5c> - 8009258: f44f 7110 mov.w r1, #576 ; 0x240 - 800925c: 4b2d ldr r3, [pc, #180] ; (8009314 <__mdiff+0x110>) - 800925e: e7e5 b.n 800922c <__mdiff+0x28> - 8009260: f102 0814 add.w r8, r2, #20 - 8009264: 46c2 mov sl, r8 - 8009266: f04f 0c00 mov.w ip, #0 - 800926a: 6927 ldr r7, [r4, #16] - 800926c: 60c6 str r6, [r0, #12] - 800926e: 692e ldr r6, [r5, #16] - 8009270: f104 0014 add.w r0, r4, #20 - 8009274: f105 0914 add.w r9, r5, #20 - 8009278: eb00 0e87 add.w lr, r0, r7, lsl #2 - 800927c: eb09 0686 add.w r6, r9, r6, lsl #2 - 8009280: 3410 adds r4, #16 - 8009282: f854 bf04 ldr.w fp, [r4, #4]! - 8009286: f859 3b04 ldr.w r3, [r9], #4 - 800928a: fa1f f18b uxth.w r1, fp - 800928e: 448c add ip, r1 - 8009290: b299 uxth r1, r3 - 8009292: 0c1b lsrs r3, r3, #16 - 8009294: ebac 0101 sub.w r1, ip, r1 - 8009298: ebc3 431b rsb r3, r3, fp, lsr #16 - 800929c: eb03 4321 add.w r3, r3, r1, asr #16 - 80092a0: b289 uxth r1, r1 - 80092a2: ea4f 4c23 mov.w ip, r3, asr #16 - 80092a6: 454e cmp r6, r9 - 80092a8: ea41 4303 orr.w r3, r1, r3, lsl #16 - 80092ac: f84a 3b04 str.w r3, [sl], #4 - 80092b0: d8e7 bhi.n 8009282 <__mdiff+0x7e> - 80092b2: 1b73 subs r3, r6, r5 - 80092b4: 3b15 subs r3, #21 - 80092b6: f023 0303 bic.w r3, r3, #3 - 80092ba: 3515 adds r5, #21 - 80092bc: 3304 adds r3, #4 - 80092be: 42ae cmp r6, r5 - 80092c0: bf38 it cc - 80092c2: 2304 movcc r3, #4 - 80092c4: 4418 add r0, r3 - 80092c6: 4443 add r3, r8 - 80092c8: 461e mov r6, r3 - 80092ca: 4605 mov r5, r0 - 80092cc: 4575 cmp r5, lr - 80092ce: d30e bcc.n 80092ee <__mdiff+0xea> - 80092d0: f10e 0103 add.w r1, lr, #3 - 80092d4: 1a09 subs r1, r1, r0 - 80092d6: f021 0103 bic.w r1, r1, #3 - 80092da: 3803 subs r0, #3 - 80092dc: 4586 cmp lr, r0 - 80092de: bf38 it cc - 80092e0: 2100 movcc r1, #0 - 80092e2: 4419 add r1, r3 - 80092e4: f851 3d04 ldr.w r3, [r1, #-4]! - 80092e8: b18b cbz r3, 800930e <__mdiff+0x10a> - 80092ea: 6117 str r7, [r2, #16] - 80092ec: e7a4 b.n 8009238 <__mdiff+0x34> - 80092ee: f855 8b04 ldr.w r8, [r5], #4 - 80092f2: fa1f f188 uxth.w r1, r8 - 80092f6: 4461 add r1, ip - 80092f8: 140c asrs r4, r1, #16 - 80092fa: eb04 4418 add.w r4, r4, r8, lsr #16 - 80092fe: b289 uxth r1, r1 - 8009300: ea41 4104 orr.w r1, r1, r4, lsl #16 - 8009304: ea4f 4c24 mov.w ip, r4, asr #16 - 8009308: f846 1b04 str.w r1, [r6], #4 - 800930c: e7de b.n 80092cc <__mdiff+0xc8> - 800930e: 3f01 subs r7, #1 - 8009310: e7e8 b.n 80092e4 <__mdiff+0xe0> - 8009312: bf00 nop - 8009314: 0800b242 .word 0x0800b242 - 8009318: 0800b2ae .word 0x0800b2ae - -0800931c <__d2b>: - 800931c: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} - 8009320: 2101 movs r1, #1 - 8009322: e9dd 7608 ldrd r7, r6, [sp, #32] - 8009326: 4690 mov r8, r2 - 8009328: 461d mov r5, r3 - 800932a: f7ff fd1f bl 8008d6c <_Balloc> - 800932e: 4604 mov r4, r0 - 8009330: b930 cbnz r0, 8009340 <__d2b+0x24> - 8009332: 4602 mov r2, r0 - 8009334: f240 310a movw r1, #778 ; 0x30a - 8009338: 4b24 ldr r3, [pc, #144] ; (80093cc <__d2b+0xb0>) - 800933a: 4825 ldr r0, [pc, #148] ; (80093d0 <__d2b+0xb4>) - 800933c: f000 f94e bl 80095dc <__assert_func> - 8009340: f3c5 0313 ubfx r3, r5, #0, #20 - 8009344: f3c5 550a ubfx r5, r5, #20, #11 - 8009348: bb2d cbnz r5, 8009396 <__d2b+0x7a> - 800934a: 9301 str r3, [sp, #4] - 800934c: f1b8 0300 subs.w r3, r8, #0 - 8009350: d026 beq.n 80093a0 <__d2b+0x84> - 8009352: 4668 mov r0, sp - 8009354: 9300 str r3, [sp, #0] - 8009356: f7ff fd9d bl 8008e94 <__lo0bits> - 800935a: 9900 ldr r1, [sp, #0] - 800935c: b1f0 cbz r0, 800939c <__d2b+0x80> - 800935e: 9a01 ldr r2, [sp, #4] - 8009360: f1c0 0320 rsb r3, r0, #32 - 8009364: fa02 f303 lsl.w r3, r2, r3 - 8009368: 430b orrs r3, r1 - 800936a: 40c2 lsrs r2, r0 - 800936c: 6163 str r3, [r4, #20] - 800936e: 9201 str r2, [sp, #4] - 8009370: 9b01 ldr r3, [sp, #4] - 8009372: 2b00 cmp r3, #0 - 8009374: bf14 ite ne - 8009376: 2102 movne r1, #2 - 8009378: 2101 moveq r1, #1 - 800937a: 61a3 str r3, [r4, #24] - 800937c: 6121 str r1, [r4, #16] - 800937e: b1c5 cbz r5, 80093b2 <__d2b+0x96> - 8009380: f2a5 4533 subw r5, r5, #1075 ; 0x433 - 8009384: 4405 add r5, r0 - 8009386: f1c0 0035 rsb r0, r0, #53 ; 0x35 - 800938a: 603d str r5, [r7, #0] - 800938c: 6030 str r0, [r6, #0] - 800938e: 4620 mov r0, r4 - 8009390: b002 add sp, #8 - 8009392: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8009396: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 - 800939a: e7d6 b.n 800934a <__d2b+0x2e> - 800939c: 6161 str r1, [r4, #20] - 800939e: e7e7 b.n 8009370 <__d2b+0x54> - 80093a0: a801 add r0, sp, #4 - 80093a2: f7ff fd77 bl 8008e94 <__lo0bits> - 80093a6: 2101 movs r1, #1 - 80093a8: 9b01 ldr r3, [sp, #4] - 80093aa: 6121 str r1, [r4, #16] - 80093ac: 6163 str r3, [r4, #20] - 80093ae: 3020 adds r0, #32 - 80093b0: e7e5 b.n 800937e <__d2b+0x62> - 80093b2: eb04 0381 add.w r3, r4, r1, lsl #2 - 80093b6: f2a0 4032 subw r0, r0, #1074 ; 0x432 - 80093ba: 6038 str r0, [r7, #0] - 80093bc: 6918 ldr r0, [r3, #16] - 80093be: f7ff fd49 bl 8008e54 <__hi0bits> - 80093c2: ebc0 1141 rsb r1, r0, r1, lsl #5 - 80093c6: 6031 str r1, [r6, #0] - 80093c8: e7e1 b.n 800938e <__d2b+0x72> - 80093ca: bf00 nop - 80093cc: 0800b242 .word 0x0800b242 - 80093d0: 0800b2ae .word 0x0800b2ae - -080093d4 : - 80093d4: b5f8 push {r3, r4, r5, r6, r7, lr} - 80093d6: 4617 mov r7, r2 - 80093d8: 2200 movs r2, #0 - 80093da: 603a str r2, [r7, #0] - 80093dc: 4a14 ldr r2, [pc, #80] ; (8009430 ) - 80093de: f021 4600 bic.w r6, r1, #2147483648 ; 0x80000000 - 80093e2: 4296 cmp r6, r2 - 80093e4: 4604 mov r4, r0 - 80093e6: 460d mov r5, r1 - 80093e8: 460b mov r3, r1 - 80093ea: dc1e bgt.n 800942a - 80093ec: 4602 mov r2, r0 - 80093ee: 4332 orrs r2, r6 - 80093f0: d01b beq.n 800942a - 80093f2: 4a10 ldr r2, [pc, #64] ; (8009434 ) - 80093f4: 400a ands r2, r1 - 80093f6: b952 cbnz r2, 800940e - 80093f8: 2200 movs r2, #0 - 80093fa: 4b0f ldr r3, [pc, #60] ; (8009438 ) - 80093fc: f7f7 f876 bl 80004ec <__aeabi_dmul> - 8009400: f06f 0235 mvn.w r2, #53 ; 0x35 - 8009404: 4604 mov r4, r0 - 8009406: 460b mov r3, r1 - 8009408: f021 4600 bic.w r6, r1, #2147483648 ; 0x80000000 - 800940c: 603a str r2, [r7, #0] - 800940e: 683a ldr r2, [r7, #0] - 8009410: 1536 asrs r6, r6, #20 - 8009412: f023 43ff bic.w r3, r3, #2139095040 ; 0x7f800000 - 8009416: f2a6 36fe subw r6, r6, #1022 ; 0x3fe - 800941a: f423 03e0 bic.w r3, r3, #7340032 ; 0x700000 - 800941e: 4416 add r6, r2 - 8009420: f043 557f orr.w r5, r3, #1069547520 ; 0x3fc00000 - 8009424: 603e str r6, [r7, #0] - 8009426: f445 1500 orr.w r5, r5, #2097152 ; 0x200000 - 800942a: 4620 mov r0, r4 - 800942c: 4629 mov r1, r5 - 800942e: bdf8 pop {r3, r4, r5, r6, r7, pc} - 8009430: 7fefffff .word 0x7fefffff - 8009434: 7ff00000 .word 0x7ff00000 - 8009438: 43500000 .word 0x43500000 - -0800943c : - 800943c: 4603 mov r3, r0 - 800943e: b510 push {r4, lr} - 8009440: 3901 subs r1, #1 - 8009442: b132 cbz r2, 8009452 - 8009444: f811 4f01 ldrb.w r4, [r1, #1]! - 8009448: 3a01 subs r2, #1 - 800944a: f803 4b01 strb.w r4, [r3], #1 - 800944e: 2c00 cmp r4, #0 - 8009450: d1f7 bne.n 8009442 - 8009452: 2100 movs r1, #0 - 8009454: 441a add r2, r3 - 8009456: 4293 cmp r3, r2 - 8009458: d100 bne.n 800945c - 800945a: bd10 pop {r4, pc} - 800945c: f803 1b01 strb.w r1, [r3], #1 - 8009460: e7f9 b.n 8009456 - -08009462 <__ssprint_r>: - 8009462: 6893 ldr r3, [r2, #8] - 8009464: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8009468: 4680 mov r8, r0 - 800946a: 460c mov r4, r1 - 800946c: 4617 mov r7, r2 - 800946e: 2b00 cmp r3, #0 - 8009470: d061 beq.n 8009536 <__ssprint_r+0xd4> - 8009472: 2300 movs r3, #0 - 8009474: 469b mov fp, r3 - 8009476: f8d2 a000 ldr.w sl, [r2] - 800947a: 9301 str r3, [sp, #4] - 800947c: f1bb 0f00 cmp.w fp, #0 - 8009480: d02b beq.n 80094da <__ssprint_r+0x78> - 8009482: 68a6 ldr r6, [r4, #8] - 8009484: 455e cmp r6, fp - 8009486: d844 bhi.n 8009512 <__ssprint_r+0xb0> - 8009488: 89a2 ldrh r2, [r4, #12] - 800948a: f412 6f90 tst.w r2, #1152 ; 0x480 - 800948e: d03e beq.n 800950e <__ssprint_r+0xac> - 8009490: 6820 ldr r0, [r4, #0] - 8009492: 6921 ldr r1, [r4, #16] - 8009494: 6965 ldr r5, [r4, #20] - 8009496: eba0 0901 sub.w r9, r0, r1 - 800949a: eb05 0545 add.w r5, r5, r5, lsl #1 - 800949e: eb05 75d5 add.w r5, r5, r5, lsr #31 - 80094a2: f109 0001 add.w r0, r9, #1 - 80094a6: 106d asrs r5, r5, #1 - 80094a8: 4458 add r0, fp - 80094aa: 4285 cmp r5, r0 - 80094ac: bf38 it cc - 80094ae: 4605 movcc r5, r0 - 80094b0: 0553 lsls r3, r2, #21 - 80094b2: d545 bpl.n 8009540 <__ssprint_r+0xde> - 80094b4: 4629 mov r1, r5 - 80094b6: 4640 mov r0, r8 - 80094b8: f7fc ff72 bl 80063a0 <_malloc_r> - 80094bc: 4606 mov r6, r0 - 80094be: b9a0 cbnz r0, 80094ea <__ssprint_r+0x88> - 80094c0: 230c movs r3, #12 - 80094c2: f8c8 3000 str.w r3, [r8] - 80094c6: 89a3 ldrh r3, [r4, #12] - 80094c8: f04f 30ff mov.w r0, #4294967295 - 80094cc: f043 0340 orr.w r3, r3, #64 ; 0x40 - 80094d0: 81a3 strh r3, [r4, #12] - 80094d2: 2300 movs r3, #0 - 80094d4: e9c7 3301 strd r3, r3, [r7, #4] - 80094d8: e02f b.n 800953a <__ssprint_r+0xd8> - 80094da: f8da 3000 ldr.w r3, [sl] - 80094de: f8da b004 ldr.w fp, [sl, #4] - 80094e2: 9301 str r3, [sp, #4] - 80094e4: f10a 0a08 add.w sl, sl, #8 - 80094e8: e7c8 b.n 800947c <__ssprint_r+0x1a> - 80094ea: 464a mov r2, r9 - 80094ec: 6921 ldr r1, [r4, #16] - 80094ee: f7fd f993 bl 8006818 - 80094f2: 89a2 ldrh r2, [r4, #12] - 80094f4: f422 6290 bic.w r2, r2, #1152 ; 0x480 - 80094f8: f042 0280 orr.w r2, r2, #128 ; 0x80 - 80094fc: 81a2 strh r2, [r4, #12] - 80094fe: 6126 str r6, [r4, #16] - 8009500: 444e add r6, r9 - 8009502: 6026 str r6, [r4, #0] - 8009504: 465e mov r6, fp - 8009506: 6165 str r5, [r4, #20] - 8009508: eba5 0509 sub.w r5, r5, r9 - 800950c: 60a5 str r5, [r4, #8] - 800950e: 455e cmp r6, fp - 8009510: d900 bls.n 8009514 <__ssprint_r+0xb2> - 8009512: 465e mov r6, fp - 8009514: 4632 mov r2, r6 - 8009516: 9901 ldr r1, [sp, #4] - 8009518: 6820 ldr r0, [r4, #0] - 800951a: f000 f8dd bl 80096d8 - 800951e: 68a2 ldr r2, [r4, #8] - 8009520: 1b92 subs r2, r2, r6 - 8009522: 60a2 str r2, [r4, #8] - 8009524: 6822 ldr r2, [r4, #0] - 8009526: 4432 add r2, r6 - 8009528: 6022 str r2, [r4, #0] - 800952a: 68ba ldr r2, [r7, #8] - 800952c: eba2 030b sub.w r3, r2, fp - 8009530: 60bb str r3, [r7, #8] - 8009532: 2b00 cmp r3, #0 - 8009534: d1d1 bne.n 80094da <__ssprint_r+0x78> - 8009536: 2000 movs r0, #0 - 8009538: 6078 str r0, [r7, #4] - 800953a: b003 add sp, #12 - 800953c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 8009540: 462a mov r2, r5 - 8009542: 4640 mov r0, r8 - 8009544: f000 f8e2 bl 800970c <_realloc_r> - 8009548: 4606 mov r6, r0 - 800954a: 2800 cmp r0, #0 - 800954c: d1d7 bne.n 80094fe <__ssprint_r+0x9c> - 800954e: 4640 mov r0, r8 - 8009550: 6921 ldr r1, [r4, #16] - 8009552: f7ff fb35 bl 8008bc0 <_free_r> - 8009556: e7b3 b.n 80094c0 <__ssprint_r+0x5e> - -08009558 <__register_exitproc>: - 8009558: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} - 800955c: f8df a074 ldr.w sl, [pc, #116] ; 80095d4 <__register_exitproc+0x7c> - 8009560: 4606 mov r6, r0 - 8009562: f8da 0000 ldr.w r0, [sl] - 8009566: 4698 mov r8, r3 - 8009568: 460f mov r7, r1 - 800956a: 4691 mov r9, r2 - 800956c: f7ff fbee bl 8008d4c <__retarget_lock_acquire_recursive> - 8009570: 4b19 ldr r3, [pc, #100] ; (80095d8 <__register_exitproc+0x80>) - 8009572: 681b ldr r3, [r3, #0] - 8009574: f8d3 4148 ldr.w r4, [r3, #328] ; 0x148 - 8009578: b91c cbnz r4, 8009582 <__register_exitproc+0x2a> - 800957a: f503 74a6 add.w r4, r3, #332 ; 0x14c - 800957e: f8c3 4148 str.w r4, [r3, #328] ; 0x148 - 8009582: 6865 ldr r5, [r4, #4] - 8009584: f8da 0000 ldr.w r0, [sl] - 8009588: 2d1f cmp r5, #31 - 800958a: dd05 ble.n 8009598 <__register_exitproc+0x40> - 800958c: f7ff fbdf bl 8008d4e <__retarget_lock_release_recursive> - 8009590: f04f 30ff mov.w r0, #4294967295 - 8009594: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 8009598: b19e cbz r6, 80095c2 <__register_exitproc+0x6a> - 800959a: 2201 movs r2, #1 - 800959c: eb04 0185 add.w r1, r4, r5, lsl #2 - 80095a0: f8c1 9088 str.w r9, [r1, #136] ; 0x88 - 80095a4: f8d4 3188 ldr.w r3, [r4, #392] ; 0x188 - 80095a8: 40aa lsls r2, r5 - 80095aa: 4313 orrs r3, r2 - 80095ac: f8c4 3188 str.w r3, [r4, #392] ; 0x188 - 80095b0: 2e02 cmp r6, #2 - 80095b2: f8c1 8108 str.w r8, [r1, #264] ; 0x108 - 80095b6: bf02 ittt eq - 80095b8: f8d4 318c ldreq.w r3, [r4, #396] ; 0x18c - 80095bc: 4313 orreq r3, r2 - 80095be: f8c4 318c streq.w r3, [r4, #396] ; 0x18c - 80095c2: 1c6b adds r3, r5, #1 - 80095c4: 3502 adds r5, #2 - 80095c6: 6063 str r3, [r4, #4] - 80095c8: f844 7025 str.w r7, [r4, r5, lsl #2] - 80095cc: f7ff fbbf bl 8008d4e <__retarget_lock_release_recursive> - 80095d0: 2000 movs r0, #0 - 80095d2: e7df b.n 8009594 <__register_exitproc+0x3c> - 80095d4: 20000858 .word 0x20000858 - 80095d8: 0800b0dc .word 0x0800b0dc - -080095dc <__assert_func>: - 80095dc: b51f push {r0, r1, r2, r3, r4, lr} - 80095de: 4614 mov r4, r2 - 80095e0: 461a mov r2, r3 - 80095e2: 4b09 ldr r3, [pc, #36] ; (8009608 <__assert_func+0x2c>) - 80095e4: 4605 mov r5, r0 - 80095e6: 681b ldr r3, [r3, #0] - 80095e8: 68d8 ldr r0, [r3, #12] - 80095ea: b14c cbz r4, 8009600 <__assert_func+0x24> - 80095ec: 4b07 ldr r3, [pc, #28] ; (800960c <__assert_func+0x30>) - 80095ee: e9cd 3401 strd r3, r4, [sp, #4] - 80095f2: 9100 str r1, [sp, #0] - 80095f4: 462b mov r3, r5 - 80095f6: 4906 ldr r1, [pc, #24] ; (8009610 <__assert_func+0x34>) - 80095f8: f000 f844 bl 8009684 - 80095fc: f7fc fe8e bl 800631c - 8009600: 4b04 ldr r3, [pc, #16] ; (8009614 <__assert_func+0x38>) - 8009602: 461c mov r4, r3 - 8009604: e7f3 b.n 80095ee <__assert_func+0x12> - 8009606: bf00 nop - 8009608: 2000001c .word 0x2000001c - 800960c: 0800b40c .word 0x0800b40c - 8009610: 0800b419 .word 0x0800b419 - 8009614: 0800b447 .word 0x0800b447 - -08009618 <_calloc_r>: - 8009618: b538 push {r3, r4, r5, lr} - 800961a: fba1 1502 umull r1, r5, r1, r2 - 800961e: b92d cbnz r5, 800962c <_calloc_r+0x14> - 8009620: f7fc febe bl 80063a0 <_malloc_r> - 8009624: 4604 mov r4, r0 - 8009626: b938 cbnz r0, 8009638 <_calloc_r+0x20> - 8009628: 4620 mov r0, r4 - 800962a: bd38 pop {r3, r4, r5, pc} - 800962c: f7fc fe7e bl 800632c <__errno> - 8009630: 230c movs r3, #12 - 8009632: 2400 movs r4, #0 - 8009634: 6003 str r3, [r0, #0] - 8009636: e7f7 b.n 8009628 <_calloc_r+0x10> - 8009638: f850 2c04 ldr.w r2, [r0, #-4] - 800963c: f022 0203 bic.w r2, r2, #3 - 8009640: 3a04 subs r2, #4 - 8009642: 2a24 cmp r2, #36 ; 0x24 - 8009644: d819 bhi.n 800967a <_calloc_r+0x62> - 8009646: 2a13 cmp r2, #19 - 8009648: d915 bls.n 8009676 <_calloc_r+0x5e> - 800964a: 2a1b cmp r2, #27 - 800964c: e9c0 5500 strd r5, r5, [r0] - 8009650: d806 bhi.n 8009660 <_calloc_r+0x48> - 8009652: f100 0308 add.w r3, r0, #8 - 8009656: 2200 movs r2, #0 - 8009658: e9c3 2200 strd r2, r2, [r3] - 800965c: 609a str r2, [r3, #8] - 800965e: e7e3 b.n 8009628 <_calloc_r+0x10> - 8009660: 2a24 cmp r2, #36 ; 0x24 - 8009662: e9c0 5502 strd r5, r5, [r0, #8] - 8009666: bf11 iteee ne - 8009668: f100 0310 addne.w r3, r0, #16 - 800966c: 6105 streq r5, [r0, #16] - 800966e: f100 0318 addeq.w r3, r0, #24 - 8009672: 6145 streq r5, [r0, #20] - 8009674: e7ef b.n 8009656 <_calloc_r+0x3e> - 8009676: 4603 mov r3, r0 - 8009678: e7ed b.n 8009656 <_calloc_r+0x3e> - 800967a: 4629 mov r1, r5 - 800967c: f7fd f8da bl 8006834 - 8009680: e7d2 b.n 8009628 <_calloc_r+0x10> - ... - -08009684 : - 8009684: b40e push {r1, r2, r3} - 8009686: b503 push {r0, r1, lr} - 8009688: 4601 mov r1, r0 - 800968a: ab03 add r3, sp, #12 - 800968c: 4805 ldr r0, [pc, #20] ; (80096a4 ) - 800968e: f853 2b04 ldr.w r2, [r3], #4 - 8009692: 6800 ldr r0, [r0, #0] - 8009694: 9301 str r3, [sp, #4] - 8009696: f000 fa13 bl 8009ac0 <_vfiprintf_r> - 800969a: b002 add sp, #8 - 800969c: f85d eb04 ldr.w lr, [sp], #4 - 80096a0: b003 add sp, #12 - 80096a2: 4770 bx lr - 80096a4: 2000001c .word 0x2000001c - -080096a8 <__locale_mb_cur_max>: - 80096a8: 4b01 ldr r3, [pc, #4] ; (80096b0 <__locale_mb_cur_max+0x8>) - 80096aa: f893 0128 ldrb.w r0, [r3, #296] ; 0x128 - 80096ae: 4770 bx lr - 80096b0: 2000085c .word 0x2000085c - -080096b4 <__ascii_mbtowc>: - 80096b4: b082 sub sp, #8 - 80096b6: b901 cbnz r1, 80096ba <__ascii_mbtowc+0x6> - 80096b8: a901 add r1, sp, #4 - 80096ba: b142 cbz r2, 80096ce <__ascii_mbtowc+0x1a> - 80096bc: b14b cbz r3, 80096d2 <__ascii_mbtowc+0x1e> - 80096be: 7813 ldrb r3, [r2, #0] - 80096c0: 600b str r3, [r1, #0] - 80096c2: 7812 ldrb r2, [r2, #0] - 80096c4: 1e10 subs r0, r2, #0 - 80096c6: bf18 it ne - 80096c8: 2001 movne r0, #1 - 80096ca: b002 add sp, #8 - 80096cc: 4770 bx lr - 80096ce: 4610 mov r0, r2 - 80096d0: e7fb b.n 80096ca <__ascii_mbtowc+0x16> - 80096d2: f06f 0001 mvn.w r0, #1 - 80096d6: e7f8 b.n 80096ca <__ascii_mbtowc+0x16> - -080096d8 : - 80096d8: 4288 cmp r0, r1 - 80096da: b510 push {r4, lr} - 80096dc: eb01 0402 add.w r4, r1, r2 - 80096e0: d902 bls.n 80096e8 - 80096e2: 4284 cmp r4, r0 - 80096e4: 4623 mov r3, r4 - 80096e6: d807 bhi.n 80096f8 - 80096e8: 1e43 subs r3, r0, #1 - 80096ea: 42a1 cmp r1, r4 - 80096ec: d008 beq.n 8009700 - 80096ee: f811 2b01 ldrb.w r2, [r1], #1 - 80096f2: f803 2f01 strb.w r2, [r3, #1]! - 80096f6: e7f8 b.n 80096ea - 80096f8: 4601 mov r1, r0 - 80096fa: 4402 add r2, r0 - 80096fc: 428a cmp r2, r1 - 80096fe: d100 bne.n 8009702 - 8009700: bd10 pop {r4, pc} - 8009702: f813 4d01 ldrb.w r4, [r3, #-1]! - 8009706: f802 4d01 strb.w r4, [r2, #-1]! - 800970a: e7f7 b.n 80096fc - -0800970c <_realloc_r>: - 800970c: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8009710: 460c mov r4, r1 - 8009712: 4681 mov r9, r0 - 8009714: 4611 mov r1, r2 - 8009716: b924 cbnz r4, 8009722 <_realloc_r+0x16> - 8009718: b003 add sp, #12 - 800971a: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 800971e: f7fc be3f b.w 80063a0 <_malloc_r> - 8009722: 9201 str r2, [sp, #4] - 8009724: f7fd f88e bl 8006844 <__malloc_lock> - 8009728: 9901 ldr r1, [sp, #4] - 800972a: f101 080b add.w r8, r1, #11 - 800972e: f1b8 0f16 cmp.w r8, #22 - 8009732: d90b bls.n 800974c <_realloc_r+0x40> - 8009734: f038 0807 bics.w r8, r8, #7 - 8009738: d50a bpl.n 8009750 <_realloc_r+0x44> - 800973a: 230c movs r3, #12 - 800973c: f04f 0b00 mov.w fp, #0 - 8009740: f8c9 3000 str.w r3, [r9] - 8009744: 4658 mov r0, fp - 8009746: b003 add sp, #12 - 8009748: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 800974c: f04f 0810 mov.w r8, #16 - 8009750: 4588 cmp r8, r1 - 8009752: d3f2 bcc.n 800973a <_realloc_r+0x2e> - 8009754: f854 5c04 ldr.w r5, [r4, #-4] - 8009758: f1a4 0a08 sub.w sl, r4, #8 - 800975c: f025 0603 bic.w r6, r5, #3 - 8009760: 45b0 cmp r8, r6 - 8009762: f340 8171 ble.w 8009a48 <_realloc_r+0x33c> - 8009766: 4a9c ldr r2, [pc, #624] ; (80099d8 <_realloc_r+0x2cc>) - 8009768: eb0a 0306 add.w r3, sl, r6 - 800976c: f8d2 c008 ldr.w ip, [r2, #8] - 8009770: 685a ldr r2, [r3, #4] - 8009772: 459c cmp ip, r3 - 8009774: d005 beq.n 8009782 <_realloc_r+0x76> - 8009776: f022 0001 bic.w r0, r2, #1 - 800977a: 4418 add r0, r3 - 800977c: 6840 ldr r0, [r0, #4] - 800977e: 07c7 lsls r7, r0, #31 - 8009780: d427 bmi.n 80097d2 <_realloc_r+0xc6> - 8009782: f022 0203 bic.w r2, r2, #3 - 8009786: 459c cmp ip, r3 - 8009788: eb06 0702 add.w r7, r6, r2 - 800978c: d119 bne.n 80097c2 <_realloc_r+0xb6> - 800978e: f108 0010 add.w r0, r8, #16 - 8009792: 42b8 cmp r0, r7 - 8009794: dc1f bgt.n 80097d6 <_realloc_r+0xca> - 8009796: 4a90 ldr r2, [pc, #576] ; (80099d8 <_realloc_r+0x2cc>) - 8009798: eba7 0708 sub.w r7, r7, r8 - 800979c: eb0a 0308 add.w r3, sl, r8 - 80097a0: f047 0701 orr.w r7, r7, #1 - 80097a4: 6093 str r3, [r2, #8] - 80097a6: 605f str r7, [r3, #4] - 80097a8: f854 3c04 ldr.w r3, [r4, #-4] - 80097ac: 4648 mov r0, r9 - 80097ae: f003 0301 and.w r3, r3, #1 - 80097b2: ea43 0308 orr.w r3, r3, r8 - 80097b6: f844 3c04 str.w r3, [r4, #-4] - 80097ba: f7fd f849 bl 8006850 <__malloc_unlock> - 80097be: 46a3 mov fp, r4 - 80097c0: e7c0 b.n 8009744 <_realloc_r+0x38> - 80097c2: 45b8 cmp r8, r7 - 80097c4: dc07 bgt.n 80097d6 <_realloc_r+0xca> - 80097c6: e9d3 3202 ldrd r3, r2, [r3, #8] - 80097ca: 60da str r2, [r3, #12] - 80097cc: 6093 str r3, [r2, #8] - 80097ce: 4655 mov r5, sl - 80097d0: e080 b.n 80098d4 <_realloc_r+0x1c8> - 80097d2: 2200 movs r2, #0 - 80097d4: 4613 mov r3, r2 - 80097d6: 07e8 lsls r0, r5, #31 - 80097d8: f100 80e8 bmi.w 80099ac <_realloc_r+0x2a0> - 80097dc: f854 5c08 ldr.w r5, [r4, #-8] - 80097e0: ebaa 0505 sub.w r5, sl, r5 - 80097e4: 6868 ldr r0, [r5, #4] - 80097e6: f020 0003 bic.w r0, r0, #3 - 80097ea: eb00 0b06 add.w fp, r0, r6 - 80097ee: 2b00 cmp r3, #0 - 80097f0: f000 80a7 beq.w 8009942 <_realloc_r+0x236> - 80097f4: 459c cmp ip, r3 - 80097f6: eb02 070b add.w r7, r2, fp - 80097fa: d14b bne.n 8009894 <_realloc_r+0x188> - 80097fc: f108 0310 add.w r3, r8, #16 - 8009800: 42bb cmp r3, r7 - 8009802: f300 809e bgt.w 8009942 <_realloc_r+0x236> - 8009806: 46ab mov fp, r5 - 8009808: 68eb ldr r3, [r5, #12] - 800980a: f85b 2f08 ldr.w r2, [fp, #8]! - 800980e: 60d3 str r3, [r2, #12] - 8009810: 609a str r2, [r3, #8] - 8009812: 1f32 subs r2, r6, #4 - 8009814: 2a24 cmp r2, #36 ; 0x24 - 8009816: d838 bhi.n 800988a <_realloc_r+0x17e> - 8009818: 2a13 cmp r2, #19 - 800981a: d934 bls.n 8009886 <_realloc_r+0x17a> - 800981c: 6823 ldr r3, [r4, #0] - 800981e: 2a1b cmp r2, #27 - 8009820: 60ab str r3, [r5, #8] - 8009822: 6863 ldr r3, [r4, #4] - 8009824: 60eb str r3, [r5, #12] - 8009826: d81b bhi.n 8009860 <_realloc_r+0x154> - 8009828: 3408 adds r4, #8 - 800982a: f105 0310 add.w r3, r5, #16 - 800982e: 6822 ldr r2, [r4, #0] - 8009830: 601a str r2, [r3, #0] - 8009832: 6862 ldr r2, [r4, #4] - 8009834: 605a str r2, [r3, #4] - 8009836: 68a2 ldr r2, [r4, #8] - 8009838: 609a str r2, [r3, #8] - 800983a: 4a67 ldr r2, [pc, #412] ; (80099d8 <_realloc_r+0x2cc>) - 800983c: eba7 0708 sub.w r7, r7, r8 - 8009840: eb05 0308 add.w r3, r5, r8 - 8009844: f047 0701 orr.w r7, r7, #1 - 8009848: 6093 str r3, [r2, #8] - 800984a: 605f str r7, [r3, #4] - 800984c: 686b ldr r3, [r5, #4] - 800984e: f003 0301 and.w r3, r3, #1 - 8009852: ea43 0308 orr.w r3, r3, r8 - 8009856: 606b str r3, [r5, #4] - 8009858: 4648 mov r0, r9 - 800985a: f7fc fff9 bl 8006850 <__malloc_unlock> - 800985e: e771 b.n 8009744 <_realloc_r+0x38> - 8009860: 68a3 ldr r3, [r4, #8] - 8009862: 2a24 cmp r2, #36 ; 0x24 - 8009864: 612b str r3, [r5, #16] - 8009866: 68e3 ldr r3, [r4, #12] - 8009868: bf18 it ne - 800986a: 3410 addne r4, #16 - 800986c: 616b str r3, [r5, #20] - 800986e: bf09 itett eq - 8009870: 6923 ldreq r3, [r4, #16] - 8009872: f105 0318 addne.w r3, r5, #24 - 8009876: 61ab streq r3, [r5, #24] - 8009878: 6962 ldreq r2, [r4, #20] - 800987a: bf02 ittt eq - 800987c: f105 0320 addeq.w r3, r5, #32 - 8009880: 61ea streq r2, [r5, #28] - 8009882: 3418 addeq r4, #24 - 8009884: e7d3 b.n 800982e <_realloc_r+0x122> - 8009886: 465b mov r3, fp - 8009888: e7d1 b.n 800982e <_realloc_r+0x122> - 800988a: 4621 mov r1, r4 - 800988c: 4658 mov r0, fp - 800988e: f7ff ff23 bl 80096d8 - 8009892: e7d2 b.n 800983a <_realloc_r+0x12e> - 8009894: 45b8 cmp r8, r7 - 8009896: dc54 bgt.n 8009942 <_realloc_r+0x236> - 8009898: e9d3 3202 ldrd r3, r2, [r3, #8] - 800989c: 4628 mov r0, r5 - 800989e: 60da str r2, [r3, #12] - 80098a0: 6093 str r3, [r2, #8] - 80098a2: f850 2f08 ldr.w r2, [r0, #8]! - 80098a6: 68eb ldr r3, [r5, #12] - 80098a8: 60d3 str r3, [r2, #12] - 80098aa: 609a str r2, [r3, #8] - 80098ac: 1f32 subs r2, r6, #4 - 80098ae: 2a24 cmp r2, #36 ; 0x24 - 80098b0: d843 bhi.n 800993a <_realloc_r+0x22e> - 80098b2: 2a13 cmp r2, #19 - 80098b4: d908 bls.n 80098c8 <_realloc_r+0x1bc> - 80098b6: 6823 ldr r3, [r4, #0] - 80098b8: 2a1b cmp r2, #27 - 80098ba: 60ab str r3, [r5, #8] - 80098bc: 6863 ldr r3, [r4, #4] - 80098be: 60eb str r3, [r5, #12] - 80098c0: d828 bhi.n 8009914 <_realloc_r+0x208> - 80098c2: 3408 adds r4, #8 - 80098c4: f105 0010 add.w r0, r5, #16 - 80098c8: 6823 ldr r3, [r4, #0] - 80098ca: 6003 str r3, [r0, #0] - 80098cc: 6863 ldr r3, [r4, #4] - 80098ce: 6043 str r3, [r0, #4] - 80098d0: 68a3 ldr r3, [r4, #8] - 80098d2: 6083 str r3, [r0, #8] - 80098d4: 686b ldr r3, [r5, #4] - 80098d6: eba7 0008 sub.w r0, r7, r8 - 80098da: 280f cmp r0, #15 - 80098dc: f003 0301 and.w r3, r3, #1 - 80098e0: eb05 0207 add.w r2, r5, r7 - 80098e4: f240 80b2 bls.w 8009a4c <_realloc_r+0x340> - 80098e8: eb05 0108 add.w r1, r5, r8 - 80098ec: ea48 0303 orr.w r3, r8, r3 - 80098f0: f040 0001 orr.w r0, r0, #1 - 80098f4: 606b str r3, [r5, #4] - 80098f6: 6048 str r0, [r1, #4] - 80098f8: 6853 ldr r3, [r2, #4] - 80098fa: 4648 mov r0, r9 - 80098fc: f043 0301 orr.w r3, r3, #1 - 8009900: 6053 str r3, [r2, #4] - 8009902: 3108 adds r1, #8 - 8009904: f7ff f95c bl 8008bc0 <_free_r> - 8009908: 4648 mov r0, r9 - 800990a: f7fc ffa1 bl 8006850 <__malloc_unlock> - 800990e: f105 0b08 add.w fp, r5, #8 - 8009912: e717 b.n 8009744 <_realloc_r+0x38> - 8009914: 68a3 ldr r3, [r4, #8] - 8009916: 2a24 cmp r2, #36 ; 0x24 - 8009918: 612b str r3, [r5, #16] - 800991a: 68e3 ldr r3, [r4, #12] - 800991c: bf18 it ne - 800991e: f105 0018 addne.w r0, r5, #24 - 8009922: 616b str r3, [r5, #20] - 8009924: bf09 itett eq - 8009926: 6923 ldreq r3, [r4, #16] - 8009928: 3410 addne r4, #16 - 800992a: 61ab streq r3, [r5, #24] - 800992c: 6963 ldreq r3, [r4, #20] - 800992e: bf02 ittt eq - 8009930: f105 0020 addeq.w r0, r5, #32 - 8009934: 61eb streq r3, [r5, #28] - 8009936: 3418 addeq r4, #24 - 8009938: e7c6 b.n 80098c8 <_realloc_r+0x1bc> - 800993a: 4621 mov r1, r4 - 800993c: f7ff fecc bl 80096d8 - 8009940: e7c8 b.n 80098d4 <_realloc_r+0x1c8> - 8009942: 45d8 cmp r8, fp - 8009944: dc32 bgt.n 80099ac <_realloc_r+0x2a0> - 8009946: 4628 mov r0, r5 - 8009948: 68eb ldr r3, [r5, #12] - 800994a: f850 2f08 ldr.w r2, [r0, #8]! - 800994e: 60d3 str r3, [r2, #12] - 8009950: 609a str r2, [r3, #8] - 8009952: 1f32 subs r2, r6, #4 - 8009954: 2a24 cmp r2, #36 ; 0x24 - 8009956: d825 bhi.n 80099a4 <_realloc_r+0x298> - 8009958: 2a13 cmp r2, #19 - 800995a: d908 bls.n 800996e <_realloc_r+0x262> - 800995c: 6823 ldr r3, [r4, #0] - 800995e: 2a1b cmp r2, #27 - 8009960: 60ab str r3, [r5, #8] - 8009962: 6863 ldr r3, [r4, #4] - 8009964: 60eb str r3, [r5, #12] - 8009966: d80a bhi.n 800997e <_realloc_r+0x272> - 8009968: 3408 adds r4, #8 - 800996a: f105 0010 add.w r0, r5, #16 - 800996e: 6823 ldr r3, [r4, #0] - 8009970: 6003 str r3, [r0, #0] - 8009972: 6863 ldr r3, [r4, #4] - 8009974: 6043 str r3, [r0, #4] - 8009976: 68a3 ldr r3, [r4, #8] - 8009978: 6083 str r3, [r0, #8] - 800997a: 465f mov r7, fp - 800997c: e7aa b.n 80098d4 <_realloc_r+0x1c8> - 800997e: 68a3 ldr r3, [r4, #8] - 8009980: 2a24 cmp r2, #36 ; 0x24 - 8009982: 612b str r3, [r5, #16] - 8009984: 68e3 ldr r3, [r4, #12] - 8009986: bf18 it ne - 8009988: f105 0018 addne.w r0, r5, #24 - 800998c: 616b str r3, [r5, #20] - 800998e: bf09 itett eq - 8009990: 6923 ldreq r3, [r4, #16] - 8009992: 3410 addne r4, #16 - 8009994: 61ab streq r3, [r5, #24] - 8009996: 6963 ldreq r3, [r4, #20] - 8009998: bf02 ittt eq - 800999a: f105 0020 addeq.w r0, r5, #32 - 800999e: 61eb streq r3, [r5, #28] - 80099a0: 3418 addeq r4, #24 - 80099a2: e7e4 b.n 800996e <_realloc_r+0x262> - 80099a4: 4621 mov r1, r4 - 80099a6: f7ff fe97 bl 80096d8 - 80099aa: e7e6 b.n 800997a <_realloc_r+0x26e> - 80099ac: 4648 mov r0, r9 - 80099ae: f7fc fcf7 bl 80063a0 <_malloc_r> - 80099b2: 4683 mov fp, r0 - 80099b4: 2800 cmp r0, #0 - 80099b6: f43f af4f beq.w 8009858 <_realloc_r+0x14c> - 80099ba: f854 3c04 ldr.w r3, [r4, #-4] - 80099be: f1a0 0208 sub.w r2, r0, #8 - 80099c2: f023 0301 bic.w r3, r3, #1 - 80099c6: 4453 add r3, sl - 80099c8: 4293 cmp r3, r2 - 80099ca: d107 bne.n 80099dc <_realloc_r+0x2d0> - 80099cc: f850 7c04 ldr.w r7, [r0, #-4] - 80099d0: f027 0703 bic.w r7, r7, #3 - 80099d4: 4437 add r7, r6 - 80099d6: e6fa b.n 80097ce <_realloc_r+0xc2> - 80099d8: 20000448 .word 0x20000448 - 80099dc: 1f32 subs r2, r6, #4 - 80099de: 2a24 cmp r2, #36 ; 0x24 - 80099e0: d82e bhi.n 8009a40 <_realloc_r+0x334> - 80099e2: 2a13 cmp r2, #19 - 80099e4: d929 bls.n 8009a3a <_realloc_r+0x32e> - 80099e6: 6823 ldr r3, [r4, #0] - 80099e8: 2a1b cmp r2, #27 - 80099ea: 6003 str r3, [r0, #0] - 80099ec: 6863 ldr r3, [r4, #4] - 80099ee: 6043 str r3, [r0, #4] - 80099f0: d80e bhi.n 8009a10 <_realloc_r+0x304> - 80099f2: f104 0208 add.w r2, r4, #8 - 80099f6: f100 0308 add.w r3, r0, #8 - 80099fa: 6811 ldr r1, [r2, #0] - 80099fc: 6019 str r1, [r3, #0] - 80099fe: 6851 ldr r1, [r2, #4] - 8009a00: 6059 str r1, [r3, #4] - 8009a02: 6892 ldr r2, [r2, #8] - 8009a04: 609a str r2, [r3, #8] - 8009a06: 4621 mov r1, r4 - 8009a08: 4648 mov r0, r9 - 8009a0a: f7ff f8d9 bl 8008bc0 <_free_r> - 8009a0e: e723 b.n 8009858 <_realloc_r+0x14c> - 8009a10: 68a3 ldr r3, [r4, #8] - 8009a12: 2a24 cmp r2, #36 ; 0x24 - 8009a14: 6083 str r3, [r0, #8] - 8009a16: 68e3 ldr r3, [r4, #12] - 8009a18: bf18 it ne - 8009a1a: f104 0210 addne.w r2, r4, #16 - 8009a1e: 60c3 str r3, [r0, #12] - 8009a20: bf09 itett eq - 8009a22: 6923 ldreq r3, [r4, #16] - 8009a24: f100 0310 addne.w r3, r0, #16 - 8009a28: 6103 streq r3, [r0, #16] - 8009a2a: 6961 ldreq r1, [r4, #20] - 8009a2c: bf02 ittt eq - 8009a2e: f104 0218 addeq.w r2, r4, #24 - 8009a32: f100 0318 addeq.w r3, r0, #24 - 8009a36: 6141 streq r1, [r0, #20] - 8009a38: e7df b.n 80099fa <_realloc_r+0x2ee> - 8009a3a: 4603 mov r3, r0 - 8009a3c: 4622 mov r2, r4 - 8009a3e: e7dc b.n 80099fa <_realloc_r+0x2ee> - 8009a40: 4621 mov r1, r4 - 8009a42: f7ff fe49 bl 80096d8 - 8009a46: e7de b.n 8009a06 <_realloc_r+0x2fa> - 8009a48: 4637 mov r7, r6 - 8009a4a: e6c0 b.n 80097ce <_realloc_r+0xc2> - 8009a4c: 431f orrs r7, r3 - 8009a4e: 606f str r7, [r5, #4] - 8009a50: 6853 ldr r3, [r2, #4] - 8009a52: f043 0301 orr.w r3, r3, #1 - 8009a56: 6053 str r3, [r2, #4] - 8009a58: e756 b.n 8009908 <_realloc_r+0x1fc> - 8009a5a: bf00 nop - -08009a5c <__sprint_r>: - 8009a5c: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8009a60: 6893 ldr r3, [r2, #8] - 8009a62: 4680 mov r8, r0 - 8009a64: 460f mov r7, r1 - 8009a66: 4614 mov r4, r2 - 8009a68: b91b cbnz r3, 8009a72 <__sprint_r+0x16> - 8009a6a: 4618 mov r0, r3 - 8009a6c: 6053 str r3, [r2, #4] - 8009a6e: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} - 8009a72: 6e4b ldr r3, [r1, #100] ; 0x64 - 8009a74: 049d lsls r5, r3, #18 - 8009a76: d520 bpl.n 8009aba <__sprint_r+0x5e> - 8009a78: 6815 ldr r5, [r2, #0] - 8009a7a: 3508 adds r5, #8 - 8009a7c: f04f 0900 mov.w r9, #0 - 8009a80: e955 b602 ldrd fp, r6, [r5, #-8] - 8009a84: ea4f 0a96 mov.w sl, r6, lsr #2 - 8009a88: 45ca cmp sl, r9 - 8009a8a: dc0b bgt.n 8009aa4 <__sprint_r+0x48> - 8009a8c: 68a0 ldr r0, [r4, #8] - 8009a8e: f026 0603 bic.w r6, r6, #3 - 8009a92: 1b80 subs r0, r0, r6 - 8009a94: 60a0 str r0, [r4, #8] - 8009a96: 3508 adds r5, #8 - 8009a98: 2800 cmp r0, #0 - 8009a9a: d1ef bne.n 8009a7c <__sprint_r+0x20> - 8009a9c: 2300 movs r3, #0 - 8009a9e: e9c4 3301 strd r3, r3, [r4, #4] - 8009aa2: e7e4 b.n 8009a6e <__sprint_r+0x12> - 8009aa4: 463a mov r2, r7 - 8009aa6: 4640 mov r0, r8 - 8009aa8: f85b 1029 ldr.w r1, [fp, r9, lsl #2] - 8009aac: f000 fe9b bl 800a7e6 <_fputwc_r> - 8009ab0: 1c43 adds r3, r0, #1 - 8009ab2: d0f3 beq.n 8009a9c <__sprint_r+0x40> - 8009ab4: f109 0901 add.w r9, r9, #1 - 8009ab8: e7e6 b.n 8009a88 <__sprint_r+0x2c> - 8009aba: f000 febd bl 800a838 <__sfvwrite_r> - 8009abe: e7ed b.n 8009a9c <__sprint_r+0x40> - -08009ac0 <_vfiprintf_r>: - 8009ac0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8009ac4: b0bb sub sp, #236 ; 0xec - 8009ac6: 460f mov r7, r1 - 8009ac8: 461d mov r5, r3 - 8009aca: 461c mov r4, r3 - 8009acc: 4681 mov r9, r0 - 8009ace: 9202 str r2, [sp, #8] - 8009ad0: b118 cbz r0, 8009ada <_vfiprintf_r+0x1a> - 8009ad2: 6b83 ldr r3, [r0, #56] ; 0x38 - 8009ad4: b90b cbnz r3, 8009ada <_vfiprintf_r+0x1a> - 8009ad6: f000 fe1d bl 800a714 <__sinit> - 8009ada: 6e7b ldr r3, [r7, #100] ; 0x64 - 8009adc: 07d8 lsls r0, r3, #31 - 8009ade: d405 bmi.n 8009aec <_vfiprintf_r+0x2c> - 8009ae0: 89bb ldrh r3, [r7, #12] - 8009ae2: 0599 lsls r1, r3, #22 - 8009ae4: d402 bmi.n 8009aec <_vfiprintf_r+0x2c> - 8009ae6: 6db8 ldr r0, [r7, #88] ; 0x58 - 8009ae8: f7ff f930 bl 8008d4c <__retarget_lock_acquire_recursive> - 8009aec: f9b7 300c ldrsh.w r3, [r7, #12] - 8009af0: 049a lsls r2, r3, #18 - 8009af2: d406 bmi.n 8009b02 <_vfiprintf_r+0x42> - 8009af4: f443 5300 orr.w r3, r3, #8192 ; 0x2000 - 8009af8: 81bb strh r3, [r7, #12] - 8009afa: 6e7b ldr r3, [r7, #100] ; 0x64 - 8009afc: f423 5300 bic.w r3, r3, #8192 ; 0x2000 - 8009b00: 667b str r3, [r7, #100] ; 0x64 - 8009b02: 89bb ldrh r3, [r7, #12] - 8009b04: 071e lsls r6, r3, #28 - 8009b06: d501 bpl.n 8009b0c <_vfiprintf_r+0x4c> - 8009b08: 693b ldr r3, [r7, #16] - 8009b0a: b9ab cbnz r3, 8009b38 <_vfiprintf_r+0x78> - 8009b0c: 4639 mov r1, r7 - 8009b0e: 4648 mov r0, r9 - 8009b10: f000 fcb2 bl 800a478 <__swsetup_r> - 8009b14: b180 cbz r0, 8009b38 <_vfiprintf_r+0x78> - 8009b16: 6e7b ldr r3, [r7, #100] ; 0x64 - 8009b18: 07d8 lsls r0, r3, #31 - 8009b1a: d506 bpl.n 8009b2a <_vfiprintf_r+0x6a> - 8009b1c: f04f 33ff mov.w r3, #4294967295 - 8009b20: 9303 str r3, [sp, #12] - 8009b22: 9803 ldr r0, [sp, #12] - 8009b24: b03b add sp, #236 ; 0xec - 8009b26: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 8009b2a: 89bb ldrh r3, [r7, #12] - 8009b2c: 0599 lsls r1, r3, #22 - 8009b2e: d4f5 bmi.n 8009b1c <_vfiprintf_r+0x5c> - 8009b30: 6db8 ldr r0, [r7, #88] ; 0x58 - 8009b32: f7ff f90c bl 8008d4e <__retarget_lock_release_recursive> - 8009b36: e7f1 b.n 8009b1c <_vfiprintf_r+0x5c> - 8009b38: 89bb ldrh r3, [r7, #12] - 8009b3a: f003 021a and.w r2, r3, #26 - 8009b3e: 2a0a cmp r2, #10 - 8009b40: d114 bne.n 8009b6c <_vfiprintf_r+0xac> - 8009b42: f9b7 200e ldrsh.w r2, [r7, #14] - 8009b46: 2a00 cmp r2, #0 - 8009b48: db10 blt.n 8009b6c <_vfiprintf_r+0xac> - 8009b4a: 6e7a ldr r2, [r7, #100] ; 0x64 - 8009b4c: 07d2 lsls r2, r2, #31 - 8009b4e: d404 bmi.n 8009b5a <_vfiprintf_r+0x9a> - 8009b50: 059e lsls r6, r3, #22 - 8009b52: d402 bmi.n 8009b5a <_vfiprintf_r+0x9a> - 8009b54: 6db8 ldr r0, [r7, #88] ; 0x58 - 8009b56: f7ff f8fa bl 8008d4e <__retarget_lock_release_recursive> - 8009b5a: 462b mov r3, r5 - 8009b5c: 4639 mov r1, r7 - 8009b5e: 4648 mov r0, r9 - 8009b60: 9a02 ldr r2, [sp, #8] - 8009b62: b03b add sp, #236 ; 0xec - 8009b64: e8bd 4ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8009b68: f000 bc38 b.w 800a3dc <__sbprintf> - 8009b6c: 2300 movs r3, #0 - 8009b6e: e9cd 330f strd r3, r3, [sp, #60] ; 0x3c - 8009b72: e9cd 3306 strd r3, r3, [sp, #24] - 8009b76: e9cd 3308 strd r3, r3, [sp, #32] - 8009b7a: ae11 add r6, sp, #68 ; 0x44 - 8009b7c: 960e str r6, [sp, #56] ; 0x38 - 8009b7e: 9303 str r3, [sp, #12] - 8009b80: 9b02 ldr r3, [sp, #8] - 8009b82: 461d mov r5, r3 - 8009b84: f813 2b01 ldrb.w r2, [r3], #1 - 8009b88: b10a cbz r2, 8009b8e <_vfiprintf_r+0xce> - 8009b8a: 2a25 cmp r2, #37 ; 0x25 - 8009b8c: d1f9 bne.n 8009b82 <_vfiprintf_r+0xc2> - 8009b8e: 9b02 ldr r3, [sp, #8] - 8009b90: ebb5 0803 subs.w r8, r5, r3 - 8009b94: d00d beq.n 8009bb2 <_vfiprintf_r+0xf2> - 8009b96: e9c6 3800 strd r3, r8, [r6] - 8009b9a: 9b10 ldr r3, [sp, #64] ; 0x40 - 8009b9c: 4443 add r3, r8 - 8009b9e: 9310 str r3, [sp, #64] ; 0x40 - 8009ba0: 9b0f ldr r3, [sp, #60] ; 0x3c - 8009ba2: 3301 adds r3, #1 - 8009ba4: 2b07 cmp r3, #7 - 8009ba6: 930f str r3, [sp, #60] ; 0x3c - 8009ba8: dc75 bgt.n 8009c96 <_vfiprintf_r+0x1d6> - 8009baa: 3608 adds r6, #8 - 8009bac: 9b03 ldr r3, [sp, #12] - 8009bae: 4443 add r3, r8 - 8009bb0: 9303 str r3, [sp, #12] - 8009bb2: 782b ldrb r3, [r5, #0] - 8009bb4: 2b00 cmp r3, #0 - 8009bb6: f000 83d5 beq.w 800a364 <_vfiprintf_r+0x8a4> - 8009bba: 2300 movs r3, #0 - 8009bbc: f04f 31ff mov.w r1, #4294967295 - 8009bc0: 469a mov sl, r3 - 8009bc2: 1c6a adds r2, r5, #1 - 8009bc4: f88d 3033 strb.w r3, [sp, #51] ; 0x33 - 8009bc8: 9101 str r1, [sp, #4] - 8009bca: 9304 str r3, [sp, #16] - 8009bcc: f812 3b01 ldrb.w r3, [r2], #1 - 8009bd0: 9202 str r2, [sp, #8] - 8009bd2: f1a3 0220 sub.w r2, r3, #32 - 8009bd6: 2a5a cmp r2, #90 ; 0x5a - 8009bd8: f200 831d bhi.w 800a216 <_vfiprintf_r+0x756> - 8009bdc: e8df f012 tbh [pc, r2, lsl #1] - 8009be0: 031b009a .word 0x031b009a - 8009be4: 00a2031b .word 0x00a2031b - 8009be8: 031b031b .word 0x031b031b - 8009bec: 0082031b .word 0x0082031b - 8009bf0: 031b031b .word 0x031b031b - 8009bf4: 00af00a5 .word 0x00af00a5 - 8009bf8: 00ac031b .word 0x00ac031b - 8009bfc: 031b00b1 .word 0x031b00b1 - 8009c00: 00cf00cc .word 0x00cf00cc - 8009c04: 00cf00cf .word 0x00cf00cf - 8009c08: 00cf00cf .word 0x00cf00cf - 8009c0c: 00cf00cf .word 0x00cf00cf - 8009c10: 00cf00cf .word 0x00cf00cf - 8009c14: 031b031b .word 0x031b031b - 8009c18: 031b031b .word 0x031b031b - 8009c1c: 031b031b .word 0x031b031b - 8009c20: 031b031b .word 0x031b031b - 8009c24: 00f9031b .word 0x00f9031b - 8009c28: 031b0107 .word 0x031b0107 - 8009c2c: 031b031b .word 0x031b031b - 8009c30: 031b031b .word 0x031b031b - 8009c34: 031b031b .word 0x031b031b - 8009c38: 031b031b .word 0x031b031b - 8009c3c: 0156031b .word 0x0156031b - 8009c40: 031b031b .word 0x031b031b - 8009c44: 01a0031b .word 0x01a0031b - 8009c48: 027d031b .word 0x027d031b - 8009c4c: 031b031b .word 0x031b031b - 8009c50: 031b029d .word 0x031b029d - 8009c54: 031b031b .word 0x031b031b - 8009c58: 031b031b .word 0x031b031b - 8009c5c: 031b031b .word 0x031b031b - 8009c60: 031b031b .word 0x031b031b - 8009c64: 00f9031b .word 0x00f9031b - 8009c68: 031b0109 .word 0x031b0109 - 8009c6c: 031b031b .word 0x031b031b - 8009c70: 010900df .word 0x010900df - 8009c74: 031b00f3 .word 0x031b00f3 - 8009c78: 031b00ec .word 0x031b00ec - 8009c7c: 01580134 .word 0x01580134 - 8009c80: 00f3018d .word 0x00f3018d - 8009c84: 01a0031b .word 0x01a0031b - 8009c88: 027f0098 .word 0x027f0098 - 8009c8c: 031b031b .word 0x031b031b - 8009c90: 031b0065 .word 0x031b0065 - 8009c94: 0098 .short 0x0098 - 8009c96: 4639 mov r1, r7 - 8009c98: 4648 mov r0, r9 - 8009c9a: aa0e add r2, sp, #56 ; 0x38 - 8009c9c: f7ff fede bl 8009a5c <__sprint_r> - 8009ca0: 2800 cmp r0, #0 - 8009ca2: f040 833e bne.w 800a322 <_vfiprintf_r+0x862> - 8009ca6: ae11 add r6, sp, #68 ; 0x44 - 8009ca8: e780 b.n 8009bac <_vfiprintf_r+0xec> - 8009caa: 4a9c ldr r2, [pc, #624] ; (8009f1c <_vfiprintf_r+0x45c>) - 8009cac: 9206 str r2, [sp, #24] - 8009cae: f01a 0220 ands.w r2, sl, #32 - 8009cb2: f000 8234 beq.w 800a11e <_vfiprintf_r+0x65e> - 8009cb6: 3407 adds r4, #7 - 8009cb8: f024 0207 bic.w r2, r4, #7 - 8009cbc: 4693 mov fp, r2 - 8009cbe: 6855 ldr r5, [r2, #4] - 8009cc0: f85b 4b08 ldr.w r4, [fp], #8 - 8009cc4: f01a 0f01 tst.w sl, #1 - 8009cc8: d009 beq.n 8009cde <_vfiprintf_r+0x21e> - 8009cca: ea54 0205 orrs.w r2, r4, r5 - 8009cce: bf1f itttt ne - 8009cd0: 2230 movne r2, #48 ; 0x30 - 8009cd2: f88d 3035 strbne.w r3, [sp, #53] ; 0x35 - 8009cd6: f88d 2034 strbne.w r2, [sp, #52] ; 0x34 - 8009cda: f04a 0a02 orrne.w sl, sl, #2 - 8009cde: f42a 6a80 bic.w sl, sl, #1024 ; 0x400 - 8009ce2: e118 b.n 8009f16 <_vfiprintf_r+0x456> - 8009ce4: 4648 mov r0, r9 - 8009ce6: f7ff f82b bl 8008d40 <_localeconv_r> - 8009cea: 6843 ldr r3, [r0, #4] - 8009cec: 4618 mov r0, r3 - 8009cee: 9309 str r3, [sp, #36] ; 0x24 - 8009cf0: f7f6 fa38 bl 8000164 - 8009cf4: 9008 str r0, [sp, #32] - 8009cf6: 4648 mov r0, r9 - 8009cf8: f7ff f822 bl 8008d40 <_localeconv_r> - 8009cfc: 6883 ldr r3, [r0, #8] - 8009cfe: 9307 str r3, [sp, #28] - 8009d00: 9b08 ldr r3, [sp, #32] - 8009d02: b12b cbz r3, 8009d10 <_vfiprintf_r+0x250> - 8009d04: 9b07 ldr r3, [sp, #28] - 8009d06: b11b cbz r3, 8009d10 <_vfiprintf_r+0x250> - 8009d08: 781b ldrb r3, [r3, #0] - 8009d0a: b10b cbz r3, 8009d10 <_vfiprintf_r+0x250> - 8009d0c: f44a 6a80 orr.w sl, sl, #1024 ; 0x400 - 8009d10: 9a02 ldr r2, [sp, #8] - 8009d12: e75b b.n 8009bcc <_vfiprintf_r+0x10c> - 8009d14: f89d 3033 ldrb.w r3, [sp, #51] ; 0x33 - 8009d18: 2b00 cmp r3, #0 - 8009d1a: d1f9 bne.n 8009d10 <_vfiprintf_r+0x250> - 8009d1c: 2320 movs r3, #32 - 8009d1e: f88d 3033 strb.w r3, [sp, #51] ; 0x33 - 8009d22: e7f5 b.n 8009d10 <_vfiprintf_r+0x250> - 8009d24: f04a 0a01 orr.w sl, sl, #1 - 8009d28: e7f2 b.n 8009d10 <_vfiprintf_r+0x250> - 8009d2a: f854 3b04 ldr.w r3, [r4], #4 - 8009d2e: 2b00 cmp r3, #0 - 8009d30: 9304 str r3, [sp, #16] - 8009d32: daed bge.n 8009d10 <_vfiprintf_r+0x250> - 8009d34: 425b negs r3, r3 - 8009d36: 9304 str r3, [sp, #16] - 8009d38: f04a 0a04 orr.w sl, sl, #4 - 8009d3c: e7e8 b.n 8009d10 <_vfiprintf_r+0x250> - 8009d3e: 232b movs r3, #43 ; 0x2b - 8009d40: e7ed b.n 8009d1e <_vfiprintf_r+0x25e> - 8009d42: 9a02 ldr r2, [sp, #8] - 8009d44: f812 3b01 ldrb.w r3, [r2], #1 - 8009d48: 2b2a cmp r3, #42 ; 0x2a - 8009d4a: d112 bne.n 8009d72 <_vfiprintf_r+0x2b2> - 8009d4c: f854 0b04 ldr.w r0, [r4], #4 - 8009d50: ea40 73e0 orr.w r3, r0, r0, asr #31 - 8009d54: e9cd 3201 strd r3, r2, [sp, #4] - 8009d58: e7da b.n 8009d10 <_vfiprintf_r+0x250> - 8009d5a: 200a movs r0, #10 - 8009d5c: 9b01 ldr r3, [sp, #4] - 8009d5e: fb00 1303 mla r3, r0, r3, r1 - 8009d62: 9301 str r3, [sp, #4] - 8009d64: f812 3b01 ldrb.w r3, [r2], #1 - 8009d68: f1a3 0130 sub.w r1, r3, #48 ; 0x30 - 8009d6c: 2909 cmp r1, #9 - 8009d6e: d9f4 bls.n 8009d5a <_vfiprintf_r+0x29a> - 8009d70: e72e b.n 8009bd0 <_vfiprintf_r+0x110> - 8009d72: 2100 movs r1, #0 - 8009d74: 9101 str r1, [sp, #4] - 8009d76: e7f7 b.n 8009d68 <_vfiprintf_r+0x2a8> - 8009d78: f04a 0a80 orr.w sl, sl, #128 ; 0x80 - 8009d7c: e7c8 b.n 8009d10 <_vfiprintf_r+0x250> - 8009d7e: 2100 movs r1, #0 - 8009d80: 9a02 ldr r2, [sp, #8] - 8009d82: 9104 str r1, [sp, #16] - 8009d84: 200a movs r0, #10 - 8009d86: 9904 ldr r1, [sp, #16] - 8009d88: 3b30 subs r3, #48 ; 0x30 - 8009d8a: fb00 3301 mla r3, r0, r1, r3 - 8009d8e: 9304 str r3, [sp, #16] - 8009d90: f812 3b01 ldrb.w r3, [r2], #1 - 8009d94: f1a3 0130 sub.w r1, r3, #48 ; 0x30 - 8009d98: 2909 cmp r1, #9 - 8009d9a: d9f3 bls.n 8009d84 <_vfiprintf_r+0x2c4> - 8009d9c: e718 b.n 8009bd0 <_vfiprintf_r+0x110> - 8009d9e: 9b02 ldr r3, [sp, #8] - 8009da0: 781b ldrb r3, [r3, #0] - 8009da2: 2b68 cmp r3, #104 ; 0x68 - 8009da4: bf01 itttt eq - 8009da6: 9b02 ldreq r3, [sp, #8] - 8009da8: f44a 7a00 orreq.w sl, sl, #512 ; 0x200 - 8009dac: 3301 addeq r3, #1 - 8009dae: 9302 streq r3, [sp, #8] - 8009db0: bf18 it ne - 8009db2: f04a 0a40 orrne.w sl, sl, #64 ; 0x40 - 8009db6: e7ab b.n 8009d10 <_vfiprintf_r+0x250> - 8009db8: 9b02 ldr r3, [sp, #8] - 8009dba: 781b ldrb r3, [r3, #0] - 8009dbc: 2b6c cmp r3, #108 ; 0x6c - 8009dbe: d105 bne.n 8009dcc <_vfiprintf_r+0x30c> - 8009dc0: 9b02 ldr r3, [sp, #8] - 8009dc2: 3301 adds r3, #1 - 8009dc4: 9302 str r3, [sp, #8] - 8009dc6: f04a 0a20 orr.w sl, sl, #32 - 8009dca: e7a1 b.n 8009d10 <_vfiprintf_r+0x250> - 8009dcc: f04a 0a10 orr.w sl, sl, #16 - 8009dd0: e79e b.n 8009d10 <_vfiprintf_r+0x250> - 8009dd2: 46a3 mov fp, r4 - 8009dd4: 2100 movs r1, #0 - 8009dd6: f85b 3b04 ldr.w r3, [fp], #4 - 8009dda: f88d 1033 strb.w r1, [sp, #51] ; 0x33 - 8009dde: f88d 3084 strb.w r3, [sp, #132] ; 0x84 - 8009de2: 2301 movs r3, #1 - 8009de4: 460d mov r5, r1 - 8009de6: 9301 str r3, [sp, #4] - 8009de8: f10d 0884 add.w r8, sp, #132 ; 0x84 - 8009dec: e0ad b.n 8009f4a <_vfiprintf_r+0x48a> - 8009dee: f04a 0a10 orr.w sl, sl, #16 - 8009df2: f01a 0f20 tst.w sl, #32 - 8009df6: d010 beq.n 8009e1a <_vfiprintf_r+0x35a> - 8009df8: 3407 adds r4, #7 - 8009dfa: f024 0307 bic.w r3, r4, #7 - 8009dfe: 469b mov fp, r3 - 8009e00: 685d ldr r5, [r3, #4] - 8009e02: f85b 4b08 ldr.w r4, [fp], #8 - 8009e06: 2d00 cmp r5, #0 - 8009e08: da05 bge.n 8009e16 <_vfiprintf_r+0x356> - 8009e0a: 232d movs r3, #45 ; 0x2d - 8009e0c: 4264 negs r4, r4 - 8009e0e: eb65 0545 sbc.w r5, r5, r5, lsl #1 - 8009e12: f88d 3033 strb.w r3, [sp, #51] ; 0x33 - 8009e16: 2301 movs r3, #1 - 8009e18: e04a b.n 8009eb0 <_vfiprintf_r+0x3f0> - 8009e1a: 46a3 mov fp, r4 - 8009e1c: f01a 0f10 tst.w sl, #16 - 8009e20: f85b 5b04 ldr.w r5, [fp], #4 - 8009e24: d002 beq.n 8009e2c <_vfiprintf_r+0x36c> - 8009e26: 462c mov r4, r5 - 8009e28: 17ed asrs r5, r5, #31 - 8009e2a: e7ec b.n 8009e06 <_vfiprintf_r+0x346> - 8009e2c: f01a 0f40 tst.w sl, #64 ; 0x40 - 8009e30: d003 beq.n 8009e3a <_vfiprintf_r+0x37a> - 8009e32: b22c sxth r4, r5 - 8009e34: f345 35c0 sbfx r5, r5, #15, #1 - 8009e38: e7e5 b.n 8009e06 <_vfiprintf_r+0x346> - 8009e3a: f41a 7f00 tst.w sl, #512 ; 0x200 - 8009e3e: d0f2 beq.n 8009e26 <_vfiprintf_r+0x366> - 8009e40: b26c sxtb r4, r5 - 8009e42: f345 15c0 sbfx r5, r5, #7, #1 - 8009e46: e7de b.n 8009e06 <_vfiprintf_r+0x346> - 8009e48: f01a 0f20 tst.w sl, #32 - 8009e4c: f104 0b04 add.w fp, r4, #4 - 8009e50: d007 beq.n 8009e62 <_vfiprintf_r+0x3a2> - 8009e52: 9a03 ldr r2, [sp, #12] - 8009e54: 6823 ldr r3, [r4, #0] - 8009e56: 9903 ldr r1, [sp, #12] - 8009e58: 17d2 asrs r2, r2, #31 - 8009e5a: e9c3 1200 strd r1, r2, [r3] - 8009e5e: 465c mov r4, fp - 8009e60: e68e b.n 8009b80 <_vfiprintf_r+0xc0> - 8009e62: f01a 0f10 tst.w sl, #16 - 8009e66: d003 beq.n 8009e70 <_vfiprintf_r+0x3b0> - 8009e68: 6823 ldr r3, [r4, #0] - 8009e6a: 9a03 ldr r2, [sp, #12] - 8009e6c: 601a str r2, [r3, #0] - 8009e6e: e7f6 b.n 8009e5e <_vfiprintf_r+0x39e> - 8009e70: f01a 0f40 tst.w sl, #64 ; 0x40 - 8009e74: d003 beq.n 8009e7e <_vfiprintf_r+0x3be> - 8009e76: 6823 ldr r3, [r4, #0] - 8009e78: 9a03 ldr r2, [sp, #12] - 8009e7a: 801a strh r2, [r3, #0] - 8009e7c: e7ef b.n 8009e5e <_vfiprintf_r+0x39e> - 8009e7e: f41a 7f00 tst.w sl, #512 ; 0x200 - 8009e82: d0f1 beq.n 8009e68 <_vfiprintf_r+0x3a8> - 8009e84: 6823 ldr r3, [r4, #0] - 8009e86: 9a03 ldr r2, [sp, #12] - 8009e88: 701a strb r2, [r3, #0] - 8009e8a: e7e8 b.n 8009e5e <_vfiprintf_r+0x39e> - 8009e8c: f04a 0a10 orr.w sl, sl, #16 - 8009e90: f01a 0320 ands.w r3, sl, #32 - 8009e94: d01f beq.n 8009ed6 <_vfiprintf_r+0x416> - 8009e96: 3407 adds r4, #7 - 8009e98: f024 0307 bic.w r3, r4, #7 - 8009e9c: 469b mov fp, r3 - 8009e9e: 685d ldr r5, [r3, #4] - 8009ea0: f85b 4b08 ldr.w r4, [fp], #8 - 8009ea4: 2300 movs r3, #0 - 8009ea6: f42a 6a80 bic.w sl, sl, #1024 ; 0x400 - 8009eaa: 2200 movs r2, #0 - 8009eac: f88d 2033 strb.w r2, [sp, #51] ; 0x33 - 8009eb0: 9a01 ldr r2, [sp, #4] - 8009eb2: 3201 adds r2, #1 - 8009eb4: f000 8263 beq.w 800a37e <_vfiprintf_r+0x8be> - 8009eb8: f02a 0280 bic.w r2, sl, #128 ; 0x80 - 8009ebc: 9205 str r2, [sp, #20] - 8009ebe: ea54 0205 orrs.w r2, r4, r5 - 8009ec2: f040 8262 bne.w 800a38a <_vfiprintf_r+0x8ca> - 8009ec6: 9a01 ldr r2, [sp, #4] - 8009ec8: 2a00 cmp r2, #0 - 8009eca: f000 8199 beq.w 800a200 <_vfiprintf_r+0x740> - 8009ece: 2b01 cmp r3, #1 - 8009ed0: f040 825e bne.w 800a390 <_vfiprintf_r+0x8d0> - 8009ed4: e13a b.n 800a14c <_vfiprintf_r+0x68c> - 8009ed6: 46a3 mov fp, r4 - 8009ed8: f01a 0510 ands.w r5, sl, #16 - 8009edc: f85b 4b04 ldr.w r4, [fp], #4 - 8009ee0: d001 beq.n 8009ee6 <_vfiprintf_r+0x426> - 8009ee2: 461d mov r5, r3 - 8009ee4: e7de b.n 8009ea4 <_vfiprintf_r+0x3e4> - 8009ee6: f01a 0340 ands.w r3, sl, #64 ; 0x40 - 8009eea: d001 beq.n 8009ef0 <_vfiprintf_r+0x430> - 8009eec: b2a4 uxth r4, r4 - 8009eee: e7d9 b.n 8009ea4 <_vfiprintf_r+0x3e4> - 8009ef0: f41a 7500 ands.w r5, sl, #512 ; 0x200 - 8009ef4: d0d6 beq.n 8009ea4 <_vfiprintf_r+0x3e4> - 8009ef6: b2e4 uxtb r4, r4 - 8009ef8: e7f3 b.n 8009ee2 <_vfiprintf_r+0x422> - 8009efa: 2330 movs r3, #48 ; 0x30 - 8009efc: f88d 3034 strb.w r3, [sp, #52] ; 0x34 - 8009f00: 2378 movs r3, #120 ; 0x78 - 8009f02: 46a3 mov fp, r4 - 8009f04: 2500 movs r5, #0 - 8009f06: f88d 3035 strb.w r3, [sp, #53] ; 0x35 - 8009f0a: 4b04 ldr r3, [pc, #16] ; (8009f1c <_vfiprintf_r+0x45c>) - 8009f0c: f85b 4b04 ldr.w r4, [fp], #4 - 8009f10: f04a 0a02 orr.w sl, sl, #2 - 8009f14: 9306 str r3, [sp, #24] - 8009f16: 2302 movs r3, #2 - 8009f18: e7c7 b.n 8009eaa <_vfiprintf_r+0x3ea> - 8009f1a: bf00 nop - 8009f1c: 0800b0f0 .word 0x0800b0f0 - 8009f20: 46a3 mov fp, r4 - 8009f22: 2500 movs r5, #0 - 8009f24: 9b01 ldr r3, [sp, #4] - 8009f26: f85b 8b04 ldr.w r8, [fp], #4 - 8009f2a: 1c5c adds r4, r3, #1 - 8009f2c: f88d 5033 strb.w r5, [sp, #51] ; 0x33 - 8009f30: f000 80ce beq.w 800a0d0 <_vfiprintf_r+0x610> - 8009f34: 461a mov r2, r3 - 8009f36: 4629 mov r1, r5 - 8009f38: 4640 mov r0, r8 - 8009f3a: f7fe ff09 bl 8008d50 - 8009f3e: 2800 cmp r0, #0 - 8009f40: f000 8173 beq.w 800a22a <_vfiprintf_r+0x76a> - 8009f44: eba0 0308 sub.w r3, r0, r8 - 8009f48: 9301 str r3, [sp, #4] - 8009f4a: 9b01 ldr r3, [sp, #4] - 8009f4c: 42ab cmp r3, r5 - 8009f4e: bfb8 it lt - 8009f50: 462b movlt r3, r5 - 8009f52: 9305 str r3, [sp, #20] - 8009f54: f89d 3033 ldrb.w r3, [sp, #51] ; 0x33 - 8009f58: b113 cbz r3, 8009f60 <_vfiprintf_r+0x4a0> - 8009f5a: 9b05 ldr r3, [sp, #20] - 8009f5c: 3301 adds r3, #1 - 8009f5e: 9305 str r3, [sp, #20] - 8009f60: f01a 0302 ands.w r3, sl, #2 - 8009f64: 930a str r3, [sp, #40] ; 0x28 - 8009f66: bf1e ittt ne - 8009f68: 9b05 ldrne r3, [sp, #20] - 8009f6a: 3302 addne r3, #2 - 8009f6c: 9305 strne r3, [sp, #20] - 8009f6e: f01a 0384 ands.w r3, sl, #132 ; 0x84 - 8009f72: 930b str r3, [sp, #44] ; 0x2c - 8009f74: d11f bne.n 8009fb6 <_vfiprintf_r+0x4f6> - 8009f76: e9dd 3204 ldrd r3, r2, [sp, #16] - 8009f7a: 1a9c subs r4, r3, r2 - 8009f7c: 2c00 cmp r4, #0 - 8009f7e: dd1a ble.n 8009fb6 <_vfiprintf_r+0x4f6> - 8009f80: e9dd 320f ldrd r3, r2, [sp, #60] ; 0x3c - 8009f84: 48aa ldr r0, [pc, #680] ; (800a230 <_vfiprintf_r+0x770>) - 8009f86: 2c10 cmp r4, #16 - 8009f88: f103 0301 add.w r3, r3, #1 - 8009f8c: f106 0108 add.w r1, r6, #8 - 8009f90: 6030 str r0, [r6, #0] - 8009f92: f300 8153 bgt.w 800a23c <_vfiprintf_r+0x77c> - 8009f96: 6074 str r4, [r6, #4] - 8009f98: 2b07 cmp r3, #7 - 8009f9a: 4414 add r4, r2 - 8009f9c: e9cd 340f strd r3, r4, [sp, #60] ; 0x3c - 8009fa0: f340 815e ble.w 800a260 <_vfiprintf_r+0x7a0> - 8009fa4: 4639 mov r1, r7 - 8009fa6: 4648 mov r0, r9 - 8009fa8: aa0e add r2, sp, #56 ; 0x38 - 8009faa: f7ff fd57 bl 8009a5c <__sprint_r> - 8009fae: 2800 cmp r0, #0 - 8009fb0: f040 81b7 bne.w 800a322 <_vfiprintf_r+0x862> - 8009fb4: ae11 add r6, sp, #68 ; 0x44 - 8009fb6: f89d 3033 ldrb.w r3, [sp, #51] ; 0x33 - 8009fba: b173 cbz r3, 8009fda <_vfiprintf_r+0x51a> - 8009fbc: f10d 0233 add.w r2, sp, #51 ; 0x33 - 8009fc0: 6032 str r2, [r6, #0] - 8009fc2: 2201 movs r2, #1 - 8009fc4: 9b0f ldr r3, [sp, #60] ; 0x3c - 8009fc6: 6072 str r2, [r6, #4] - 8009fc8: 9a10 ldr r2, [sp, #64] ; 0x40 - 8009fca: 3301 adds r3, #1 - 8009fcc: 3201 adds r2, #1 - 8009fce: 2b07 cmp r3, #7 - 8009fd0: e9cd 320f strd r3, r2, [sp, #60] ; 0x3c - 8009fd4: f300 8146 bgt.w 800a264 <_vfiprintf_r+0x7a4> - 8009fd8: 3608 adds r6, #8 - 8009fda: 9b0a ldr r3, [sp, #40] ; 0x28 - 8009fdc: b16b cbz r3, 8009ffa <_vfiprintf_r+0x53a> - 8009fde: aa0d add r2, sp, #52 ; 0x34 - 8009fe0: 6032 str r2, [r6, #0] - 8009fe2: 2202 movs r2, #2 - 8009fe4: 9b0f ldr r3, [sp, #60] ; 0x3c - 8009fe6: 6072 str r2, [r6, #4] - 8009fe8: 9a10 ldr r2, [sp, #64] ; 0x40 - 8009fea: 3301 adds r3, #1 - 8009fec: 3202 adds r2, #2 - 8009fee: 2b07 cmp r3, #7 - 8009ff0: e9cd 320f strd r3, r2, [sp, #60] ; 0x3c - 8009ff4: f300 813f bgt.w 800a276 <_vfiprintf_r+0x7b6> - 8009ff8: 3608 adds r6, #8 - 8009ffa: 9b0b ldr r3, [sp, #44] ; 0x2c - 8009ffc: 2b80 cmp r3, #128 ; 0x80 - 8009ffe: d11f bne.n 800a040 <_vfiprintf_r+0x580> - 800a000: e9dd 3204 ldrd r3, r2, [sp, #16] - 800a004: 1a9c subs r4, r3, r2 - 800a006: 2c00 cmp r4, #0 - 800a008: dd1a ble.n 800a040 <_vfiprintf_r+0x580> - 800a00a: e9dd 320f ldrd r3, r2, [sp, #60] ; 0x3c - 800a00e: 4889 ldr r0, [pc, #548] ; (800a234 <_vfiprintf_r+0x774>) - 800a010: 2c10 cmp r4, #16 - 800a012: f103 0301 add.w r3, r3, #1 - 800a016: f106 0108 add.w r1, r6, #8 - 800a01a: 6030 str r0, [r6, #0] - 800a01c: f300 8134 bgt.w 800a288 <_vfiprintf_r+0x7c8> - 800a020: 6074 str r4, [r6, #4] - 800a022: 2b07 cmp r3, #7 - 800a024: 4414 add r4, r2 - 800a026: e9cd 340f strd r3, r4, [sp, #60] ; 0x3c - 800a02a: f340 813f ble.w 800a2ac <_vfiprintf_r+0x7ec> - 800a02e: 4639 mov r1, r7 - 800a030: 4648 mov r0, r9 - 800a032: aa0e add r2, sp, #56 ; 0x38 - 800a034: f7ff fd12 bl 8009a5c <__sprint_r> - 800a038: 2800 cmp r0, #0 - 800a03a: f040 8172 bne.w 800a322 <_vfiprintf_r+0x862> - 800a03e: ae11 add r6, sp, #68 ; 0x44 - 800a040: 9b01 ldr r3, [sp, #4] - 800a042: 1aec subs r4, r5, r3 - 800a044: 2c00 cmp r4, #0 - 800a046: dd1a ble.n 800a07e <_vfiprintf_r+0x5be> - 800a048: 4d7a ldr r5, [pc, #488] ; (800a234 <_vfiprintf_r+0x774>) - 800a04a: 2c10 cmp r4, #16 - 800a04c: e9dd 310f ldrd r3, r1, [sp, #60] ; 0x3c - 800a050: f106 0208 add.w r2, r6, #8 - 800a054: f103 0301 add.w r3, r3, #1 - 800a058: 6035 str r5, [r6, #0] - 800a05a: f300 8129 bgt.w 800a2b0 <_vfiprintf_r+0x7f0> - 800a05e: 6074 str r4, [r6, #4] - 800a060: 2b07 cmp r3, #7 - 800a062: 440c add r4, r1 - 800a064: e9cd 340f strd r3, r4, [sp, #60] ; 0x3c - 800a068: f340 8133 ble.w 800a2d2 <_vfiprintf_r+0x812> - 800a06c: 4639 mov r1, r7 - 800a06e: 4648 mov r0, r9 - 800a070: aa0e add r2, sp, #56 ; 0x38 - 800a072: f7ff fcf3 bl 8009a5c <__sprint_r> - 800a076: 2800 cmp r0, #0 - 800a078: f040 8153 bne.w 800a322 <_vfiprintf_r+0x862> - 800a07c: ae11 add r6, sp, #68 ; 0x44 - 800a07e: 9b01 ldr r3, [sp, #4] - 800a080: 9810 ldr r0, [sp, #64] ; 0x40 - 800a082: 6073 str r3, [r6, #4] - 800a084: 4418 add r0, r3 - 800a086: 9b0f ldr r3, [sp, #60] ; 0x3c - 800a088: f8c6 8000 str.w r8, [r6] - 800a08c: 3301 adds r3, #1 - 800a08e: 2b07 cmp r3, #7 - 800a090: 9010 str r0, [sp, #64] ; 0x40 - 800a092: 930f str r3, [sp, #60] ; 0x3c - 800a094: f300 811f bgt.w 800a2d6 <_vfiprintf_r+0x816> - 800a098: f106 0308 add.w r3, r6, #8 - 800a09c: f01a 0f04 tst.w sl, #4 - 800a0a0: f040 8121 bne.w 800a2e6 <_vfiprintf_r+0x826> - 800a0a4: e9dd 3203 ldrd r3, r2, [sp, #12] - 800a0a8: 9905 ldr r1, [sp, #20] - 800a0aa: 428a cmp r2, r1 - 800a0ac: bfac ite ge - 800a0ae: 189b addge r3, r3, r2 - 800a0b0: 185b addlt r3, r3, r1 - 800a0b2: 9303 str r3, [sp, #12] - 800a0b4: 9b10 ldr r3, [sp, #64] ; 0x40 - 800a0b6: b13b cbz r3, 800a0c8 <_vfiprintf_r+0x608> - 800a0b8: 4639 mov r1, r7 - 800a0ba: 4648 mov r0, r9 - 800a0bc: aa0e add r2, sp, #56 ; 0x38 - 800a0be: f7ff fccd bl 8009a5c <__sprint_r> - 800a0c2: 2800 cmp r0, #0 - 800a0c4: f040 812d bne.w 800a322 <_vfiprintf_r+0x862> - 800a0c8: 2300 movs r3, #0 - 800a0ca: ae11 add r6, sp, #68 ; 0x44 - 800a0cc: 930f str r3, [sp, #60] ; 0x3c - 800a0ce: e6c6 b.n 8009e5e <_vfiprintf_r+0x39e> - 800a0d0: 4640 mov r0, r8 - 800a0d2: f7f6 f847 bl 8000164 - 800a0d6: 9001 str r0, [sp, #4] - 800a0d8: e737 b.n 8009f4a <_vfiprintf_r+0x48a> - 800a0da: f04a 0a10 orr.w sl, sl, #16 - 800a0de: f01a 0320 ands.w r3, sl, #32 - 800a0e2: d008 beq.n 800a0f6 <_vfiprintf_r+0x636> - 800a0e4: 3407 adds r4, #7 - 800a0e6: f024 0307 bic.w r3, r4, #7 - 800a0ea: 469b mov fp, r3 - 800a0ec: 685d ldr r5, [r3, #4] - 800a0ee: f85b 4b08 ldr.w r4, [fp], #8 - 800a0f2: 2301 movs r3, #1 - 800a0f4: e6d9 b.n 8009eaa <_vfiprintf_r+0x3ea> - 800a0f6: 46a3 mov fp, r4 - 800a0f8: f01a 0510 ands.w r5, sl, #16 - 800a0fc: f85b 4b04 ldr.w r4, [fp], #4 - 800a100: d001 beq.n 800a106 <_vfiprintf_r+0x646> - 800a102: 461d mov r5, r3 - 800a104: e7f5 b.n 800a0f2 <_vfiprintf_r+0x632> - 800a106: f01a 0340 ands.w r3, sl, #64 ; 0x40 - 800a10a: d001 beq.n 800a110 <_vfiprintf_r+0x650> - 800a10c: b2a4 uxth r4, r4 - 800a10e: e7f0 b.n 800a0f2 <_vfiprintf_r+0x632> - 800a110: f41a 7500 ands.w r5, sl, #512 ; 0x200 - 800a114: d0ed beq.n 800a0f2 <_vfiprintf_r+0x632> - 800a116: b2e4 uxtb r4, r4 - 800a118: e7f3 b.n 800a102 <_vfiprintf_r+0x642> - 800a11a: 4a47 ldr r2, [pc, #284] ; (800a238 <_vfiprintf_r+0x778>) - 800a11c: e5c6 b.n 8009cac <_vfiprintf_r+0x1ec> - 800a11e: 46a3 mov fp, r4 - 800a120: f01a 0510 ands.w r5, sl, #16 - 800a124: f85b 4b04 ldr.w r4, [fp], #4 - 800a128: d001 beq.n 800a12e <_vfiprintf_r+0x66e> - 800a12a: 4615 mov r5, r2 - 800a12c: e5ca b.n 8009cc4 <_vfiprintf_r+0x204> - 800a12e: f01a 0240 ands.w r2, sl, #64 ; 0x40 - 800a132: d001 beq.n 800a138 <_vfiprintf_r+0x678> - 800a134: b2a4 uxth r4, r4 - 800a136: e5c5 b.n 8009cc4 <_vfiprintf_r+0x204> - 800a138: f41a 7500 ands.w r5, sl, #512 ; 0x200 - 800a13c: f43f adc2 beq.w 8009cc4 <_vfiprintf_r+0x204> - 800a140: b2e4 uxtb r4, r4 - 800a142: e7f2 b.n 800a12a <_vfiprintf_r+0x66a> - 800a144: 2c0a cmp r4, #10 - 800a146: f175 0300 sbcs.w r3, r5, #0 - 800a14a: d205 bcs.n 800a158 <_vfiprintf_r+0x698> - 800a14c: 3430 adds r4, #48 ; 0x30 - 800a14e: f88d 40e7 strb.w r4, [sp, #231] ; 0xe7 - 800a152: f10d 08e7 add.w r8, sp, #231 ; 0xe7 - 800a156: e137 b.n 800a3c8 <_vfiprintf_r+0x908> - 800a158: f04f 0a00 mov.w sl, #0 - 800a15c: ab3a add r3, sp, #232 ; 0xe8 - 800a15e: 930a str r3, [sp, #40] ; 0x28 - 800a160: 9b05 ldr r3, [sp, #20] - 800a162: f403 6380 and.w r3, r3, #1024 ; 0x400 - 800a166: 930b str r3, [sp, #44] ; 0x2c - 800a168: 9b0a ldr r3, [sp, #40] ; 0x28 - 800a16a: 220a movs r2, #10 - 800a16c: 4620 mov r0, r4 - 800a16e: 4629 mov r1, r5 - 800a170: f103 38ff add.w r8, r3, #4294967295 - 800a174: 2300 movs r3, #0 - 800a176: f7f6 ff8b bl 8001090 <__aeabi_uldivmod> - 800a17a: 9b0a ldr r3, [sp, #40] ; 0x28 - 800a17c: 3230 adds r2, #48 ; 0x30 - 800a17e: f803 2c01 strb.w r2, [r3, #-1] - 800a182: 9b0b ldr r3, [sp, #44] ; 0x2c - 800a184: f10a 0a01 add.w sl, sl, #1 - 800a188: b1d3 cbz r3, 800a1c0 <_vfiprintf_r+0x700> - 800a18a: 9b07 ldr r3, [sp, #28] - 800a18c: 781b ldrb r3, [r3, #0] - 800a18e: 4553 cmp r3, sl - 800a190: d116 bne.n 800a1c0 <_vfiprintf_r+0x700> - 800a192: f1ba 0fff cmp.w sl, #255 ; 0xff - 800a196: d013 beq.n 800a1c0 <_vfiprintf_r+0x700> - 800a198: 2c0a cmp r4, #10 - 800a19a: f175 0300 sbcs.w r3, r5, #0 - 800a19e: d30f bcc.n 800a1c0 <_vfiprintf_r+0x700> - 800a1a0: 9b08 ldr r3, [sp, #32] - 800a1a2: 9909 ldr r1, [sp, #36] ; 0x24 - 800a1a4: eba8 0803 sub.w r8, r8, r3 - 800a1a8: 461a mov r2, r3 - 800a1aa: 4640 mov r0, r8 - 800a1ac: f7ff f946 bl 800943c - 800a1b0: 9b07 ldr r3, [sp, #28] - 800a1b2: 785b ldrb r3, [r3, #1] - 800a1b4: b1a3 cbz r3, 800a1e0 <_vfiprintf_r+0x720> - 800a1b6: f04f 0a00 mov.w sl, #0 - 800a1ba: 9b07 ldr r3, [sp, #28] - 800a1bc: 3301 adds r3, #1 - 800a1be: 9307 str r3, [sp, #28] - 800a1c0: 2300 movs r3, #0 - 800a1c2: 220a movs r2, #10 - 800a1c4: 4620 mov r0, r4 - 800a1c6: 4629 mov r1, r5 - 800a1c8: f7f6 ff62 bl 8001090 <__aeabi_uldivmod> - 800a1cc: 2c0a cmp r4, #10 - 800a1ce: f175 0300 sbcs.w r3, r5, #0 - 800a1d2: f0c0 80f9 bcc.w 800a3c8 <_vfiprintf_r+0x908> - 800a1d6: 4604 mov r4, r0 - 800a1d8: 460d mov r5, r1 - 800a1da: f8cd 8028 str.w r8, [sp, #40] ; 0x28 - 800a1de: e7c3 b.n 800a168 <_vfiprintf_r+0x6a8> - 800a1e0: 469a mov sl, r3 - 800a1e2: e7ed b.n 800a1c0 <_vfiprintf_r+0x700> - 800a1e4: 9a06 ldr r2, [sp, #24] - 800a1e6: f004 030f and.w r3, r4, #15 - 800a1ea: 5cd3 ldrb r3, [r2, r3] - 800a1ec: 0924 lsrs r4, r4, #4 - 800a1ee: ea44 7405 orr.w r4, r4, r5, lsl #28 - 800a1f2: 092d lsrs r5, r5, #4 - 800a1f4: f808 3d01 strb.w r3, [r8, #-1]! - 800a1f8: ea54 0305 orrs.w r3, r4, r5 - 800a1fc: d1f2 bne.n 800a1e4 <_vfiprintf_r+0x724> - 800a1fe: e0e3 b.n 800a3c8 <_vfiprintf_r+0x908> - 800a200: b933 cbnz r3, 800a210 <_vfiprintf_r+0x750> - 800a202: f01a 0f01 tst.w sl, #1 - 800a206: d003 beq.n 800a210 <_vfiprintf_r+0x750> - 800a208: 2330 movs r3, #48 ; 0x30 - 800a20a: f88d 30e7 strb.w r3, [sp, #231] ; 0xe7 - 800a20e: e7a0 b.n 800a152 <_vfiprintf_r+0x692> - 800a210: f10d 08e8 add.w r8, sp, #232 ; 0xe8 - 800a214: e0d8 b.n 800a3c8 <_vfiprintf_r+0x908> - 800a216: 2b00 cmp r3, #0 - 800a218: f000 80a4 beq.w 800a364 <_vfiprintf_r+0x8a4> - 800a21c: 2100 movs r1, #0 - 800a21e: 46a3 mov fp, r4 - 800a220: f88d 3084 strb.w r3, [sp, #132] ; 0x84 - 800a224: f88d 1033 strb.w r1, [sp, #51] ; 0x33 - 800a228: e5db b.n 8009de2 <_vfiprintf_r+0x322> - 800a22a: 4605 mov r5, r0 - 800a22c: e68d b.n 8009f4a <_vfiprintf_r+0x48a> - 800a22e: bf00 nop - 800a230: 0800b452 .word 0x0800b452 - 800a234: 0800b462 .word 0x0800b462 - 800a238: 0800b101 .word 0x0800b101 - 800a23c: 2010 movs r0, #16 - 800a23e: 2b07 cmp r3, #7 - 800a240: 4402 add r2, r0 - 800a242: e9cd 320f strd r3, r2, [sp, #60] ; 0x3c - 800a246: 6070 str r0, [r6, #4] - 800a248: dd07 ble.n 800a25a <_vfiprintf_r+0x79a> - 800a24a: 4639 mov r1, r7 - 800a24c: 4648 mov r0, r9 - 800a24e: aa0e add r2, sp, #56 ; 0x38 - 800a250: f7ff fc04 bl 8009a5c <__sprint_r> - 800a254: 2800 cmp r0, #0 - 800a256: d164 bne.n 800a322 <_vfiprintf_r+0x862> - 800a258: a911 add r1, sp, #68 ; 0x44 - 800a25a: 460e mov r6, r1 - 800a25c: 3c10 subs r4, #16 - 800a25e: e68f b.n 8009f80 <_vfiprintf_r+0x4c0> - 800a260: 460e mov r6, r1 - 800a262: e6a8 b.n 8009fb6 <_vfiprintf_r+0x4f6> - 800a264: 4639 mov r1, r7 - 800a266: 4648 mov r0, r9 - 800a268: aa0e add r2, sp, #56 ; 0x38 - 800a26a: f7ff fbf7 bl 8009a5c <__sprint_r> - 800a26e: 2800 cmp r0, #0 - 800a270: d157 bne.n 800a322 <_vfiprintf_r+0x862> - 800a272: ae11 add r6, sp, #68 ; 0x44 - 800a274: e6b1 b.n 8009fda <_vfiprintf_r+0x51a> - 800a276: 4639 mov r1, r7 - 800a278: 4648 mov r0, r9 - 800a27a: aa0e add r2, sp, #56 ; 0x38 - 800a27c: f7ff fbee bl 8009a5c <__sprint_r> - 800a280: 2800 cmp r0, #0 - 800a282: d14e bne.n 800a322 <_vfiprintf_r+0x862> - 800a284: ae11 add r6, sp, #68 ; 0x44 - 800a286: e6b8 b.n 8009ffa <_vfiprintf_r+0x53a> - 800a288: 2010 movs r0, #16 - 800a28a: 2b07 cmp r3, #7 - 800a28c: 4402 add r2, r0 - 800a28e: e9cd 320f strd r3, r2, [sp, #60] ; 0x3c - 800a292: 6070 str r0, [r6, #4] - 800a294: dd07 ble.n 800a2a6 <_vfiprintf_r+0x7e6> - 800a296: 4639 mov r1, r7 - 800a298: 4648 mov r0, r9 - 800a29a: aa0e add r2, sp, #56 ; 0x38 - 800a29c: f7ff fbde bl 8009a5c <__sprint_r> - 800a2a0: 2800 cmp r0, #0 - 800a2a2: d13e bne.n 800a322 <_vfiprintf_r+0x862> - 800a2a4: a911 add r1, sp, #68 ; 0x44 - 800a2a6: 460e mov r6, r1 - 800a2a8: 3c10 subs r4, #16 - 800a2aa: e6ae b.n 800a00a <_vfiprintf_r+0x54a> - 800a2ac: 460e mov r6, r1 - 800a2ae: e6c7 b.n 800a040 <_vfiprintf_r+0x580> - 800a2b0: 2010 movs r0, #16 - 800a2b2: 2b07 cmp r3, #7 - 800a2b4: 4401 add r1, r0 - 800a2b6: e9cd 310f strd r3, r1, [sp, #60] ; 0x3c - 800a2ba: 6070 str r0, [r6, #4] - 800a2bc: dd06 ble.n 800a2cc <_vfiprintf_r+0x80c> - 800a2be: 4639 mov r1, r7 - 800a2c0: 4648 mov r0, r9 - 800a2c2: aa0e add r2, sp, #56 ; 0x38 - 800a2c4: f7ff fbca bl 8009a5c <__sprint_r> - 800a2c8: bb58 cbnz r0, 800a322 <_vfiprintf_r+0x862> - 800a2ca: aa11 add r2, sp, #68 ; 0x44 - 800a2cc: 4616 mov r6, r2 - 800a2ce: 3c10 subs r4, #16 - 800a2d0: e6bb b.n 800a04a <_vfiprintf_r+0x58a> - 800a2d2: 4616 mov r6, r2 - 800a2d4: e6d3 b.n 800a07e <_vfiprintf_r+0x5be> - 800a2d6: 4639 mov r1, r7 - 800a2d8: 4648 mov r0, r9 - 800a2da: aa0e add r2, sp, #56 ; 0x38 - 800a2dc: f7ff fbbe bl 8009a5c <__sprint_r> - 800a2e0: b9f8 cbnz r0, 800a322 <_vfiprintf_r+0x862> - 800a2e2: ab11 add r3, sp, #68 ; 0x44 - 800a2e4: e6da b.n 800a09c <_vfiprintf_r+0x5dc> - 800a2e6: e9dd 2104 ldrd r2, r1, [sp, #16] - 800a2ea: 1a54 subs r4, r2, r1 - 800a2ec: 2c00 cmp r4, #0 - 800a2ee: f77f aed9 ble.w 800a0a4 <_vfiprintf_r+0x5e4> - 800a2f2: 2610 movs r6, #16 - 800a2f4: 4d38 ldr r5, [pc, #224] ; (800a3d8 <_vfiprintf_r+0x918>) - 800a2f6: 2c10 cmp r4, #16 - 800a2f8: e9dd 210f ldrd r2, r1, [sp, #60] ; 0x3c - 800a2fc: 601d str r5, [r3, #0] - 800a2fe: f102 0201 add.w r2, r2, #1 - 800a302: dc1d bgt.n 800a340 <_vfiprintf_r+0x880> - 800a304: 605c str r4, [r3, #4] - 800a306: 2a07 cmp r2, #7 - 800a308: 440c add r4, r1 - 800a30a: e9cd 240f strd r2, r4, [sp, #60] ; 0x3c - 800a30e: f77f aec9 ble.w 800a0a4 <_vfiprintf_r+0x5e4> - 800a312: 4639 mov r1, r7 - 800a314: 4648 mov r0, r9 - 800a316: aa0e add r2, sp, #56 ; 0x38 - 800a318: f7ff fba0 bl 8009a5c <__sprint_r> - 800a31c: 2800 cmp r0, #0 - 800a31e: f43f aec1 beq.w 800a0a4 <_vfiprintf_r+0x5e4> - 800a322: 6e7b ldr r3, [r7, #100] ; 0x64 - 800a324: 07d9 lsls r1, r3, #31 - 800a326: d405 bmi.n 800a334 <_vfiprintf_r+0x874> - 800a328: 89bb ldrh r3, [r7, #12] - 800a32a: 059a lsls r2, r3, #22 - 800a32c: d402 bmi.n 800a334 <_vfiprintf_r+0x874> - 800a32e: 6db8 ldr r0, [r7, #88] ; 0x58 - 800a330: f7fe fd0d bl 8008d4e <__retarget_lock_release_recursive> - 800a334: 89bb ldrh r3, [r7, #12] - 800a336: 065b lsls r3, r3, #25 - 800a338: f57f abf3 bpl.w 8009b22 <_vfiprintf_r+0x62> - 800a33c: f7ff bbee b.w 8009b1c <_vfiprintf_r+0x5c> - 800a340: 3110 adds r1, #16 - 800a342: 2a07 cmp r2, #7 - 800a344: e9cd 210f strd r2, r1, [sp, #60] ; 0x3c - 800a348: 605e str r6, [r3, #4] - 800a34a: dc02 bgt.n 800a352 <_vfiprintf_r+0x892> - 800a34c: 3308 adds r3, #8 - 800a34e: 3c10 subs r4, #16 - 800a350: e7d1 b.n 800a2f6 <_vfiprintf_r+0x836> - 800a352: 4639 mov r1, r7 - 800a354: 4648 mov r0, r9 - 800a356: aa0e add r2, sp, #56 ; 0x38 - 800a358: f7ff fb80 bl 8009a5c <__sprint_r> - 800a35c: 2800 cmp r0, #0 - 800a35e: d1e0 bne.n 800a322 <_vfiprintf_r+0x862> - 800a360: ab11 add r3, sp, #68 ; 0x44 - 800a362: e7f4 b.n 800a34e <_vfiprintf_r+0x88e> - 800a364: 9b10 ldr r3, [sp, #64] ; 0x40 - 800a366: b913 cbnz r3, 800a36e <_vfiprintf_r+0x8ae> - 800a368: 2300 movs r3, #0 - 800a36a: 930f str r3, [sp, #60] ; 0x3c - 800a36c: e7d9 b.n 800a322 <_vfiprintf_r+0x862> - 800a36e: 4639 mov r1, r7 - 800a370: 4648 mov r0, r9 - 800a372: aa0e add r2, sp, #56 ; 0x38 - 800a374: f7ff fb72 bl 8009a5c <__sprint_r> - 800a378: 2800 cmp r0, #0 - 800a37a: d0f5 beq.n 800a368 <_vfiprintf_r+0x8a8> - 800a37c: e7d1 b.n 800a322 <_vfiprintf_r+0x862> - 800a37e: ea54 0205 orrs.w r2, r4, r5 - 800a382: f8cd a014 str.w sl, [sp, #20] - 800a386: f43f ada2 beq.w 8009ece <_vfiprintf_r+0x40e> - 800a38a: 2b01 cmp r3, #1 - 800a38c: f43f aeda beq.w 800a144 <_vfiprintf_r+0x684> - 800a390: 2b02 cmp r3, #2 - 800a392: f10d 08e8 add.w r8, sp, #232 ; 0xe8 - 800a396: f43f af25 beq.w 800a1e4 <_vfiprintf_r+0x724> - 800a39a: f004 0307 and.w r3, r4, #7 - 800a39e: 08e4 lsrs r4, r4, #3 - 800a3a0: ea44 7445 orr.w r4, r4, r5, lsl #29 - 800a3a4: 08ed lsrs r5, r5, #3 - 800a3a6: 3330 adds r3, #48 ; 0x30 - 800a3a8: ea54 0105 orrs.w r1, r4, r5 - 800a3ac: 4642 mov r2, r8 - 800a3ae: f808 3d01 strb.w r3, [r8, #-1]! - 800a3b2: d1f2 bne.n 800a39a <_vfiprintf_r+0x8da> - 800a3b4: 9905 ldr r1, [sp, #20] - 800a3b6: 07c8 lsls r0, r1, #31 - 800a3b8: d506 bpl.n 800a3c8 <_vfiprintf_r+0x908> - 800a3ba: 2b30 cmp r3, #48 ; 0x30 - 800a3bc: d004 beq.n 800a3c8 <_vfiprintf_r+0x908> - 800a3be: 2330 movs r3, #48 ; 0x30 - 800a3c0: f808 3c01 strb.w r3, [r8, #-1] - 800a3c4: f1a2 0802 sub.w r8, r2, #2 - 800a3c8: ab3a add r3, sp, #232 ; 0xe8 - 800a3ca: eba3 0308 sub.w r3, r3, r8 - 800a3ce: 9d01 ldr r5, [sp, #4] - 800a3d0: f8dd a014 ldr.w sl, [sp, #20] - 800a3d4: 9301 str r3, [sp, #4] - 800a3d6: e5b8 b.n 8009f4a <_vfiprintf_r+0x48a> - 800a3d8: 0800b452 .word 0x0800b452 - -0800a3dc <__sbprintf>: - 800a3dc: b5f0 push {r4, r5, r6, r7, lr} - 800a3de: 461f mov r7, r3 - 800a3e0: 898b ldrh r3, [r1, #12] - 800a3e2: f2ad 4d6c subw sp, sp, #1132 ; 0x46c - 800a3e6: f023 0302 bic.w r3, r3, #2 - 800a3ea: f8ad 300c strh.w r3, [sp, #12] - 800a3ee: 6e4b ldr r3, [r1, #100] ; 0x64 - 800a3f0: 4615 mov r5, r2 - 800a3f2: 9319 str r3, [sp, #100] ; 0x64 - 800a3f4: 89cb ldrh r3, [r1, #14] - 800a3f6: 4606 mov r6, r0 - 800a3f8: f8ad 300e strh.w r3, [sp, #14] - 800a3fc: 69cb ldr r3, [r1, #28] - 800a3fe: a816 add r0, sp, #88 ; 0x58 - 800a400: 9307 str r3, [sp, #28] - 800a402: 6a4b ldr r3, [r1, #36] ; 0x24 - 800a404: 460c mov r4, r1 - 800a406: 9309 str r3, [sp, #36] ; 0x24 - 800a408: ab1a add r3, sp, #104 ; 0x68 - 800a40a: 9300 str r3, [sp, #0] - 800a40c: 9304 str r3, [sp, #16] - 800a40e: f44f 6380 mov.w r3, #1024 ; 0x400 - 800a412: 9302 str r3, [sp, #8] - 800a414: 9305 str r3, [sp, #20] - 800a416: 2300 movs r3, #0 - 800a418: 9306 str r3, [sp, #24] - 800a41a: f7fe fc95 bl 8008d48 <__retarget_lock_init_recursive> - 800a41e: 462a mov r2, r5 - 800a420: 463b mov r3, r7 - 800a422: 4669 mov r1, sp - 800a424: 4630 mov r0, r6 - 800a426: f7ff fb4b bl 8009ac0 <_vfiprintf_r> - 800a42a: 1e05 subs r5, r0, #0 - 800a42c: db07 blt.n 800a43e <__sbprintf+0x62> - 800a42e: 4669 mov r1, sp - 800a430: 4630 mov r0, r6 - 800a432: f000 f903 bl 800a63c <_fflush_r> - 800a436: 2800 cmp r0, #0 - 800a438: bf18 it ne - 800a43a: f04f 35ff movne.w r5, #4294967295 - 800a43e: f8bd 300c ldrh.w r3, [sp, #12] - 800a442: 9816 ldr r0, [sp, #88] ; 0x58 - 800a444: 065b lsls r3, r3, #25 - 800a446: bf42 ittt mi - 800a448: 89a3 ldrhmi r3, [r4, #12] - 800a44a: f043 0340 orrmi.w r3, r3, #64 ; 0x40 - 800a44e: 81a3 strhmi r3, [r4, #12] - 800a450: f7fe fc7b bl 8008d4a <__retarget_lock_close_recursive> - 800a454: 4628 mov r0, r5 - 800a456: f20d 4d6c addw sp, sp, #1132 ; 0x46c - 800a45a: bdf0 pop {r4, r5, r6, r7, pc} - -0800a45c <__ascii_wctomb>: - 800a45c: 4603 mov r3, r0 - 800a45e: 4608 mov r0, r1 - 800a460: b141 cbz r1, 800a474 <__ascii_wctomb+0x18> - 800a462: 2aff cmp r2, #255 ; 0xff - 800a464: d904 bls.n 800a470 <__ascii_wctomb+0x14> - 800a466: 228a movs r2, #138 ; 0x8a - 800a468: f04f 30ff mov.w r0, #4294967295 - 800a46c: 601a str r2, [r3, #0] - 800a46e: 4770 bx lr - 800a470: 2001 movs r0, #1 - 800a472: 700a strb r2, [r1, #0] - 800a474: 4770 bx lr - ... - -0800a478 <__swsetup_r>: - 800a478: b538 push {r3, r4, r5, lr} - 800a47a: 4b2a ldr r3, [pc, #168] ; (800a524 <__swsetup_r+0xac>) - 800a47c: 4605 mov r5, r0 - 800a47e: 6818 ldr r0, [r3, #0] - 800a480: 460c mov r4, r1 - 800a482: b118 cbz r0, 800a48c <__swsetup_r+0x14> - 800a484: 6b83 ldr r3, [r0, #56] ; 0x38 - 800a486: b90b cbnz r3, 800a48c <__swsetup_r+0x14> - 800a488: f000 f944 bl 800a714 <__sinit> - 800a48c: 89a3 ldrh r3, [r4, #12] - 800a48e: f9b4 200c ldrsh.w r2, [r4, #12] - 800a492: 0718 lsls r0, r3, #28 - 800a494: d422 bmi.n 800a4dc <__swsetup_r+0x64> - 800a496: 06d9 lsls r1, r3, #27 - 800a498: d407 bmi.n 800a4aa <__swsetup_r+0x32> - 800a49a: 2309 movs r3, #9 - 800a49c: 602b str r3, [r5, #0] - 800a49e: f042 0340 orr.w r3, r2, #64 ; 0x40 - 800a4a2: f04f 30ff mov.w r0, #4294967295 - 800a4a6: 81a3 strh r3, [r4, #12] - 800a4a8: e034 b.n 800a514 <__swsetup_r+0x9c> - 800a4aa: 0758 lsls r0, r3, #29 - 800a4ac: d512 bpl.n 800a4d4 <__swsetup_r+0x5c> - 800a4ae: 6b21 ldr r1, [r4, #48] ; 0x30 - 800a4b0: b141 cbz r1, 800a4c4 <__swsetup_r+0x4c> - 800a4b2: f104 0340 add.w r3, r4, #64 ; 0x40 - 800a4b6: 4299 cmp r1, r3 - 800a4b8: d002 beq.n 800a4c0 <__swsetup_r+0x48> - 800a4ba: 4628 mov r0, r5 - 800a4bc: f7fe fb80 bl 8008bc0 <_free_r> - 800a4c0: 2300 movs r3, #0 - 800a4c2: 6323 str r3, [r4, #48] ; 0x30 - 800a4c4: 89a3 ldrh r3, [r4, #12] - 800a4c6: f023 0324 bic.w r3, r3, #36 ; 0x24 - 800a4ca: 81a3 strh r3, [r4, #12] - 800a4cc: 2300 movs r3, #0 - 800a4ce: 6063 str r3, [r4, #4] - 800a4d0: 6923 ldr r3, [r4, #16] - 800a4d2: 6023 str r3, [r4, #0] - 800a4d4: 89a3 ldrh r3, [r4, #12] - 800a4d6: f043 0308 orr.w r3, r3, #8 - 800a4da: 81a3 strh r3, [r4, #12] - 800a4dc: 6923 ldr r3, [r4, #16] - 800a4de: b94b cbnz r3, 800a4f4 <__swsetup_r+0x7c> - 800a4e0: 89a3 ldrh r3, [r4, #12] - 800a4e2: f403 7320 and.w r3, r3, #640 ; 0x280 - 800a4e6: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 800a4ea: d003 beq.n 800a4f4 <__swsetup_r+0x7c> - 800a4ec: 4621 mov r1, r4 - 800a4ee: 4628 mov r0, r5 - 800a4f0: f000 fb36 bl 800ab60 <__smakebuf_r> - 800a4f4: 89a0 ldrh r0, [r4, #12] - 800a4f6: f9b4 200c ldrsh.w r2, [r4, #12] - 800a4fa: f010 0301 ands.w r3, r0, #1 - 800a4fe: d00a beq.n 800a516 <__swsetup_r+0x9e> - 800a500: 2300 movs r3, #0 - 800a502: 60a3 str r3, [r4, #8] - 800a504: 6963 ldr r3, [r4, #20] - 800a506: 425b negs r3, r3 - 800a508: 61a3 str r3, [r4, #24] - 800a50a: 6923 ldr r3, [r4, #16] - 800a50c: b943 cbnz r3, 800a520 <__swsetup_r+0xa8> - 800a50e: f010 0080 ands.w r0, r0, #128 ; 0x80 - 800a512: d1c4 bne.n 800a49e <__swsetup_r+0x26> - 800a514: bd38 pop {r3, r4, r5, pc} - 800a516: 0781 lsls r1, r0, #30 - 800a518: bf58 it pl - 800a51a: 6963 ldrpl r3, [r4, #20] - 800a51c: 60a3 str r3, [r4, #8] - 800a51e: e7f4 b.n 800a50a <__swsetup_r+0x92> - 800a520: 2000 movs r0, #0 - 800a522: e7f7 b.n 800a514 <__swsetup_r+0x9c> - 800a524: 2000001c .word 0x2000001c - -0800a528 <__sflush_r>: - 800a528: b5f8 push {r3, r4, r5, r6, r7, lr} - 800a52a: 898b ldrh r3, [r1, #12] - 800a52c: 4605 mov r5, r0 - 800a52e: 0718 lsls r0, r3, #28 - 800a530: 460c mov r4, r1 - 800a532: f9b1 200c ldrsh.w r2, [r1, #12] - 800a536: d45e bmi.n 800a5f6 <__sflush_r+0xce> - 800a538: 684b ldr r3, [r1, #4] - 800a53a: f442 6200 orr.w r2, r2, #2048 ; 0x800 - 800a53e: 2b00 cmp r3, #0 - 800a540: 818a strh r2, [r1, #12] - 800a542: dc04 bgt.n 800a54e <__sflush_r+0x26> - 800a544: 6bcb ldr r3, [r1, #60] ; 0x3c - 800a546: 2b00 cmp r3, #0 - 800a548: dc01 bgt.n 800a54e <__sflush_r+0x26> - 800a54a: 2000 movs r0, #0 - 800a54c: bdf8 pop {r3, r4, r5, r6, r7, pc} - 800a54e: 6aa6 ldr r6, [r4, #40] ; 0x28 - 800a550: 2e00 cmp r6, #0 - 800a552: d0fa beq.n 800a54a <__sflush_r+0x22> - 800a554: 2300 movs r3, #0 - 800a556: f412 5280 ands.w r2, r2, #4096 ; 0x1000 - 800a55a: 682f ldr r7, [r5, #0] - 800a55c: 602b str r3, [r5, #0] - 800a55e: d036 beq.n 800a5ce <__sflush_r+0xa6> - 800a560: 6d20 ldr r0, [r4, #80] ; 0x50 - 800a562: 89a3 ldrh r3, [r4, #12] - 800a564: 075a lsls r2, r3, #29 - 800a566: d505 bpl.n 800a574 <__sflush_r+0x4c> - 800a568: 6863 ldr r3, [r4, #4] - 800a56a: 1ac0 subs r0, r0, r3 - 800a56c: 6b23 ldr r3, [r4, #48] ; 0x30 - 800a56e: b10b cbz r3, 800a574 <__sflush_r+0x4c> - 800a570: 6be3 ldr r3, [r4, #60] ; 0x3c - 800a572: 1ac0 subs r0, r0, r3 - 800a574: 2300 movs r3, #0 - 800a576: 4602 mov r2, r0 - 800a578: 6aa6 ldr r6, [r4, #40] ; 0x28 - 800a57a: 4628 mov r0, r5 - 800a57c: 69e1 ldr r1, [r4, #28] - 800a57e: 47b0 blx r6 - 800a580: 1c43 adds r3, r0, #1 - 800a582: 89a3 ldrh r3, [r4, #12] - 800a584: d106 bne.n 800a594 <__sflush_r+0x6c> - 800a586: 6829 ldr r1, [r5, #0] - 800a588: 291d cmp r1, #29 - 800a58a: d830 bhi.n 800a5ee <__sflush_r+0xc6> - 800a58c: 4a2a ldr r2, [pc, #168] ; (800a638 <__sflush_r+0x110>) - 800a58e: 40ca lsrs r2, r1 - 800a590: 07d6 lsls r6, r2, #31 - 800a592: d52c bpl.n 800a5ee <__sflush_r+0xc6> - 800a594: 2200 movs r2, #0 - 800a596: f423 6300 bic.w r3, r3, #2048 ; 0x800 - 800a59a: b21b sxth r3, r3 - 800a59c: 6062 str r2, [r4, #4] - 800a59e: 6922 ldr r2, [r4, #16] - 800a5a0: 04d9 lsls r1, r3, #19 - 800a5a2: 81a3 strh r3, [r4, #12] - 800a5a4: 6022 str r2, [r4, #0] - 800a5a6: d504 bpl.n 800a5b2 <__sflush_r+0x8a> - 800a5a8: 1c42 adds r2, r0, #1 - 800a5aa: d101 bne.n 800a5b0 <__sflush_r+0x88> - 800a5ac: 682b ldr r3, [r5, #0] - 800a5ae: b903 cbnz r3, 800a5b2 <__sflush_r+0x8a> - 800a5b0: 6520 str r0, [r4, #80] ; 0x50 - 800a5b2: 6b21 ldr r1, [r4, #48] ; 0x30 - 800a5b4: 602f str r7, [r5, #0] - 800a5b6: 2900 cmp r1, #0 - 800a5b8: d0c7 beq.n 800a54a <__sflush_r+0x22> - 800a5ba: f104 0340 add.w r3, r4, #64 ; 0x40 - 800a5be: 4299 cmp r1, r3 - 800a5c0: d002 beq.n 800a5c8 <__sflush_r+0xa0> - 800a5c2: 4628 mov r0, r5 - 800a5c4: f7fe fafc bl 8008bc0 <_free_r> - 800a5c8: 2000 movs r0, #0 - 800a5ca: 6320 str r0, [r4, #48] ; 0x30 - 800a5cc: e7be b.n 800a54c <__sflush_r+0x24> - 800a5ce: 69e1 ldr r1, [r4, #28] - 800a5d0: 2301 movs r3, #1 - 800a5d2: 4628 mov r0, r5 - 800a5d4: 47b0 blx r6 - 800a5d6: 1c41 adds r1, r0, #1 - 800a5d8: d1c3 bne.n 800a562 <__sflush_r+0x3a> - 800a5da: 682b ldr r3, [r5, #0] - 800a5dc: 2b00 cmp r3, #0 - 800a5de: d0c0 beq.n 800a562 <__sflush_r+0x3a> - 800a5e0: 2b1d cmp r3, #29 - 800a5e2: d001 beq.n 800a5e8 <__sflush_r+0xc0> - 800a5e4: 2b16 cmp r3, #22 - 800a5e6: d101 bne.n 800a5ec <__sflush_r+0xc4> - 800a5e8: 602f str r7, [r5, #0] - 800a5ea: e7ae b.n 800a54a <__sflush_r+0x22> - 800a5ec: 89a3 ldrh r3, [r4, #12] - 800a5ee: f043 0340 orr.w r3, r3, #64 ; 0x40 - 800a5f2: 81a3 strh r3, [r4, #12] - 800a5f4: e7aa b.n 800a54c <__sflush_r+0x24> - 800a5f6: 690f ldr r7, [r1, #16] - 800a5f8: 2f00 cmp r7, #0 - 800a5fa: d0a6 beq.n 800a54a <__sflush_r+0x22> - 800a5fc: 079b lsls r3, r3, #30 - 800a5fe: bf18 it ne - 800a600: 2300 movne r3, #0 - 800a602: 680e ldr r6, [r1, #0] - 800a604: bf08 it eq - 800a606: 694b ldreq r3, [r1, #20] - 800a608: 1bf6 subs r6, r6, r7 - 800a60a: 600f str r7, [r1, #0] - 800a60c: 608b str r3, [r1, #8] - 800a60e: 2e00 cmp r6, #0 - 800a610: dd9b ble.n 800a54a <__sflush_r+0x22> - 800a612: 4633 mov r3, r6 - 800a614: 463a mov r2, r7 - 800a616: 4628 mov r0, r5 - 800a618: 69e1 ldr r1, [r4, #28] - 800a61a: f8d4 c024 ldr.w ip, [r4, #36] ; 0x24 - 800a61e: 47e0 blx ip - 800a620: 2800 cmp r0, #0 - 800a622: dc06 bgt.n 800a632 <__sflush_r+0x10a> - 800a624: 89a3 ldrh r3, [r4, #12] - 800a626: f04f 30ff mov.w r0, #4294967295 - 800a62a: f043 0340 orr.w r3, r3, #64 ; 0x40 - 800a62e: 81a3 strh r3, [r4, #12] - 800a630: e78c b.n 800a54c <__sflush_r+0x24> - 800a632: 4407 add r7, r0 - 800a634: 1a36 subs r6, r6, r0 - 800a636: e7ea b.n 800a60e <__sflush_r+0xe6> - 800a638: 20400001 .word 0x20400001 - -0800a63c <_fflush_r>: - 800a63c: b538 push {r3, r4, r5, lr} - 800a63e: 460c mov r4, r1 - 800a640: 4605 mov r5, r0 - 800a642: b118 cbz r0, 800a64c <_fflush_r+0x10> - 800a644: 6b83 ldr r3, [r0, #56] ; 0x38 - 800a646: b90b cbnz r3, 800a64c <_fflush_r+0x10> - 800a648: f000 f864 bl 800a714 <__sinit> - 800a64c: f9b4 000c ldrsh.w r0, [r4, #12] - 800a650: b1b8 cbz r0, 800a682 <_fflush_r+0x46> - 800a652: 6e63 ldr r3, [r4, #100] ; 0x64 - 800a654: 07db lsls r3, r3, #31 - 800a656: d404 bmi.n 800a662 <_fflush_r+0x26> - 800a658: 0581 lsls r1, r0, #22 - 800a65a: d402 bmi.n 800a662 <_fflush_r+0x26> - 800a65c: 6da0 ldr r0, [r4, #88] ; 0x58 - 800a65e: f7fe fb75 bl 8008d4c <__retarget_lock_acquire_recursive> - 800a662: 4628 mov r0, r5 - 800a664: 4621 mov r1, r4 - 800a666: f7ff ff5f bl 800a528 <__sflush_r> - 800a66a: 6e63 ldr r3, [r4, #100] ; 0x64 - 800a66c: 4605 mov r5, r0 - 800a66e: 07da lsls r2, r3, #31 - 800a670: d405 bmi.n 800a67e <_fflush_r+0x42> - 800a672: 89a3 ldrh r3, [r4, #12] - 800a674: 059b lsls r3, r3, #22 - 800a676: d402 bmi.n 800a67e <_fflush_r+0x42> - 800a678: 6da0 ldr r0, [r4, #88] ; 0x58 - 800a67a: f7fe fb68 bl 8008d4e <__retarget_lock_release_recursive> - 800a67e: 4628 mov r0, r5 - 800a680: bd38 pop {r3, r4, r5, pc} - 800a682: 4605 mov r5, r0 - 800a684: e7fb b.n 800a67e <_fflush_r+0x42> - ... - -0800a688 : - 800a688: 2300 movs r3, #0 - 800a68a: b510 push {r4, lr} - 800a68c: 4604 mov r4, r0 - 800a68e: e9c0 3300 strd r3, r3, [r0] - 800a692: e9c0 3304 strd r3, r3, [r0, #16] - 800a696: 6083 str r3, [r0, #8] - 800a698: 8181 strh r1, [r0, #12] - 800a69a: 6643 str r3, [r0, #100] ; 0x64 - 800a69c: 81c2 strh r2, [r0, #14] - 800a69e: 6183 str r3, [r0, #24] - 800a6a0: 4619 mov r1, r3 - 800a6a2: 2208 movs r2, #8 - 800a6a4: 305c adds r0, #92 ; 0x5c - 800a6a6: f7fc f8c5 bl 8006834 - 800a6aa: 4b07 ldr r3, [pc, #28] ; (800a6c8 ) - 800a6ac: 61e4 str r4, [r4, #28] - 800a6ae: 6223 str r3, [r4, #32] - 800a6b0: 4b06 ldr r3, [pc, #24] ; (800a6cc ) - 800a6b2: f104 0058 add.w r0, r4, #88 ; 0x58 - 800a6b6: 6263 str r3, [r4, #36] ; 0x24 - 800a6b8: 4b05 ldr r3, [pc, #20] ; (800a6d0 ) - 800a6ba: 62a3 str r3, [r4, #40] ; 0x28 - 800a6bc: 4b05 ldr r3, [pc, #20] ; (800a6d4 ) - 800a6be: 62e3 str r3, [r4, #44] ; 0x2c - 800a6c0: e8bd 4010 ldmia.w sp!, {r4, lr} - 800a6c4: f7fe bb40 b.w 8008d48 <__retarget_lock_init_recursive> - 800a6c8: 0800abe1 .word 0x0800abe1 - 800a6cc: 0800ac03 .word 0x0800ac03 - 800a6d0: 0800ac3b .word 0x0800ac3b - 800a6d4: 0800ac5f .word 0x0800ac5f - -0800a6d8 <_cleanup_r>: - 800a6d8: 4901 ldr r1, [pc, #4] ; (800a6e0 <_cleanup_r+0x8>) - 800a6da: f000 b9f5 b.w 800aac8 <_fwalk_reent> - 800a6de: bf00 nop - 800a6e0: 0800ad69 .word 0x0800ad69 - -0800a6e4 <__sfp_lock_acquire>: - 800a6e4: 4801 ldr r0, [pc, #4] ; (800a6ec <__sfp_lock_acquire+0x8>) - 800a6e6: f7fe bb31 b.w 8008d4c <__retarget_lock_acquire_recursive> - 800a6ea: bf00 nop - 800a6ec: 20001372 .word 0x20001372 - -0800a6f0 <__sfp_lock_release>: - 800a6f0: 4801 ldr r0, [pc, #4] ; (800a6f8 <__sfp_lock_release+0x8>) - 800a6f2: f7fe bb2c b.w 8008d4e <__retarget_lock_release_recursive> - 800a6f6: bf00 nop - 800a6f8: 20001372 .word 0x20001372 - -0800a6fc <__sinit_lock_acquire>: - 800a6fc: 4801 ldr r0, [pc, #4] ; (800a704 <__sinit_lock_acquire+0x8>) - 800a6fe: f7fe bb25 b.w 8008d4c <__retarget_lock_acquire_recursive> - 800a702: bf00 nop - 800a704: 20001373 .word 0x20001373 - -0800a708 <__sinit_lock_release>: - 800a708: 4801 ldr r0, [pc, #4] ; (800a710 <__sinit_lock_release+0x8>) - 800a70a: f7fe bb20 b.w 8008d4e <__retarget_lock_release_recursive> - 800a70e: bf00 nop - 800a710: 20001373 .word 0x20001373 - -0800a714 <__sinit>: - 800a714: b510 push {r4, lr} - 800a716: 4604 mov r4, r0 - 800a718: f7ff fff0 bl 800a6fc <__sinit_lock_acquire> - 800a71c: 6ba2 ldr r2, [r4, #56] ; 0x38 - 800a71e: b11a cbz r2, 800a728 <__sinit+0x14> - 800a720: e8bd 4010 ldmia.w sp!, {r4, lr} - 800a724: f7ff bff0 b.w 800a708 <__sinit_lock_release> - 800a728: 4b0d ldr r3, [pc, #52] ; (800a760 <__sinit+0x4c>) - 800a72a: 2104 movs r1, #4 - 800a72c: 63e3 str r3, [r4, #60] ; 0x3c - 800a72e: 2303 movs r3, #3 - 800a730: f8c4 32e4 str.w r3, [r4, #740] ; 0x2e4 - 800a734: f504 733b add.w r3, r4, #748 ; 0x2ec - 800a738: f8c4 32e8 str.w r3, [r4, #744] ; 0x2e8 - 800a73c: 6860 ldr r0, [r4, #4] - 800a73e: f8c4 22e0 str.w r2, [r4, #736] ; 0x2e0 - 800a742: f7ff ffa1 bl 800a688 - 800a746: 2201 movs r2, #1 - 800a748: 2109 movs r1, #9 - 800a74a: 68a0 ldr r0, [r4, #8] - 800a74c: f7ff ff9c bl 800a688 - 800a750: 2202 movs r2, #2 - 800a752: 2112 movs r1, #18 - 800a754: 68e0 ldr r0, [r4, #12] - 800a756: f7ff ff97 bl 800a688 - 800a75a: 2301 movs r3, #1 - 800a75c: 63a3 str r3, [r4, #56] ; 0x38 - 800a75e: e7df b.n 800a720 <__sinit+0xc> - 800a760: 0800a6d9 .word 0x0800a6d9 - -0800a764 <__fputwc>: - 800a764: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} - 800a768: 4680 mov r8, r0 - 800a76a: 460e mov r6, r1 - 800a76c: 4615 mov r5, r2 - 800a76e: f7fe ff9b bl 80096a8 <__locale_mb_cur_max> - 800a772: 2801 cmp r0, #1 - 800a774: 4604 mov r4, r0 - 800a776: d11b bne.n 800a7b0 <__fputwc+0x4c> - 800a778: 1e73 subs r3, r6, #1 - 800a77a: 2bfe cmp r3, #254 ; 0xfe - 800a77c: d818 bhi.n 800a7b0 <__fputwc+0x4c> - 800a77e: f88d 6004 strb.w r6, [sp, #4] - 800a782: 2700 movs r7, #0 - 800a784: f10d 0904 add.w r9, sp, #4 - 800a788: 42a7 cmp r7, r4 - 800a78a: d020 beq.n 800a7ce <__fputwc+0x6a> - 800a78c: 68ab ldr r3, [r5, #8] - 800a78e: f817 1009 ldrb.w r1, [r7, r9] - 800a792: 3b01 subs r3, #1 - 800a794: 2b00 cmp r3, #0 - 800a796: 60ab str r3, [r5, #8] - 800a798: da04 bge.n 800a7a4 <__fputwc+0x40> - 800a79a: 69aa ldr r2, [r5, #24] - 800a79c: 4293 cmp r3, r2 - 800a79e: db1a blt.n 800a7d6 <__fputwc+0x72> - 800a7a0: 290a cmp r1, #10 - 800a7a2: d018 beq.n 800a7d6 <__fputwc+0x72> - 800a7a4: 682b ldr r3, [r5, #0] - 800a7a6: 1c5a adds r2, r3, #1 - 800a7a8: 602a str r2, [r5, #0] - 800a7aa: 7019 strb r1, [r3, #0] - 800a7ac: 3701 adds r7, #1 - 800a7ae: e7eb b.n 800a788 <__fputwc+0x24> - 800a7b0: 4632 mov r2, r6 - 800a7b2: 4640 mov r0, r8 - 800a7b4: f105 035c add.w r3, r5, #92 ; 0x5c - 800a7b8: a901 add r1, sp, #4 - 800a7ba: f000 fa9d bl 800acf8 <_wcrtomb_r> - 800a7be: 1c42 adds r2, r0, #1 - 800a7c0: 4604 mov r4, r0 - 800a7c2: d1de bne.n 800a782 <__fputwc+0x1e> - 800a7c4: 4606 mov r6, r0 - 800a7c6: 89ab ldrh r3, [r5, #12] - 800a7c8: f043 0340 orr.w r3, r3, #64 ; 0x40 - 800a7cc: 81ab strh r3, [r5, #12] - 800a7ce: 4630 mov r0, r6 - 800a7d0: b003 add sp, #12 - 800a7d2: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} - 800a7d6: 462a mov r2, r5 - 800a7d8: 4640 mov r0, r8 - 800a7da: f000 fa44 bl 800ac66 <__swbuf_r> - 800a7de: 1c43 adds r3, r0, #1 - 800a7e0: d1e4 bne.n 800a7ac <__fputwc+0x48> - 800a7e2: 4606 mov r6, r0 - 800a7e4: e7f3 b.n 800a7ce <__fputwc+0x6a> - -0800a7e6 <_fputwc_r>: - 800a7e6: 6e53 ldr r3, [r2, #100] ; 0x64 - 800a7e8: b570 push {r4, r5, r6, lr} - 800a7ea: 07db lsls r3, r3, #31 - 800a7ec: 4605 mov r5, r0 - 800a7ee: 460e mov r6, r1 - 800a7f0: 4614 mov r4, r2 - 800a7f2: d405 bmi.n 800a800 <_fputwc_r+0x1a> - 800a7f4: 8993 ldrh r3, [r2, #12] - 800a7f6: 0598 lsls r0, r3, #22 - 800a7f8: d402 bmi.n 800a800 <_fputwc_r+0x1a> - 800a7fa: 6d90 ldr r0, [r2, #88] ; 0x58 - 800a7fc: f7fe faa6 bl 8008d4c <__retarget_lock_acquire_recursive> - 800a800: f9b4 300c ldrsh.w r3, [r4, #12] - 800a804: 0499 lsls r1, r3, #18 - 800a806: d406 bmi.n 800a816 <_fputwc_r+0x30> - 800a808: f443 5300 orr.w r3, r3, #8192 ; 0x2000 - 800a80c: 81a3 strh r3, [r4, #12] - 800a80e: 6e63 ldr r3, [r4, #100] ; 0x64 - 800a810: f443 5300 orr.w r3, r3, #8192 ; 0x2000 - 800a814: 6663 str r3, [r4, #100] ; 0x64 - 800a816: 4622 mov r2, r4 - 800a818: 4628 mov r0, r5 - 800a81a: 4631 mov r1, r6 - 800a81c: f7ff ffa2 bl 800a764 <__fputwc> - 800a820: 6e63 ldr r3, [r4, #100] ; 0x64 - 800a822: 4605 mov r5, r0 - 800a824: 07da lsls r2, r3, #31 - 800a826: d405 bmi.n 800a834 <_fputwc_r+0x4e> - 800a828: 89a3 ldrh r3, [r4, #12] - 800a82a: 059b lsls r3, r3, #22 - 800a82c: d402 bmi.n 800a834 <_fputwc_r+0x4e> - 800a82e: 6da0 ldr r0, [r4, #88] ; 0x58 - 800a830: f7fe fa8d bl 8008d4e <__retarget_lock_release_recursive> - 800a834: 4628 mov r0, r5 - 800a836: bd70 pop {r4, r5, r6, pc} - -0800a838 <__sfvwrite_r>: - 800a838: 6893 ldr r3, [r2, #8] - 800a83a: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} - 800a83e: 4606 mov r6, r0 - 800a840: 460c mov r4, r1 - 800a842: 4690 mov r8, r2 - 800a844: b91b cbnz r3, 800a84e <__sfvwrite_r+0x16> - 800a846: 2000 movs r0, #0 - 800a848: b003 add sp, #12 - 800a84a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 800a84e: 898b ldrh r3, [r1, #12] - 800a850: 0718 lsls r0, r3, #28 - 800a852: d550 bpl.n 800a8f6 <__sfvwrite_r+0xbe> - 800a854: 690b ldr r3, [r1, #16] - 800a856: 2b00 cmp r3, #0 - 800a858: d04d beq.n 800a8f6 <__sfvwrite_r+0xbe> - 800a85a: 89a3 ldrh r3, [r4, #12] - 800a85c: f8d8 7000 ldr.w r7, [r8] - 800a860: f013 0902 ands.w r9, r3, #2 - 800a864: d16b bne.n 800a93e <__sfvwrite_r+0x106> - 800a866: f013 0301 ands.w r3, r3, #1 - 800a86a: f000 809b beq.w 800a9a4 <__sfvwrite_r+0x16c> - 800a86e: 4648 mov r0, r9 - 800a870: 46ca mov sl, r9 - 800a872: 46cb mov fp, r9 - 800a874: f1bb 0f00 cmp.w fp, #0 - 800a878: f000 8102 beq.w 800aa80 <__sfvwrite_r+0x248> - 800a87c: b950 cbnz r0, 800a894 <__sfvwrite_r+0x5c> - 800a87e: 465a mov r2, fp - 800a880: 210a movs r1, #10 - 800a882: 4650 mov r0, sl - 800a884: f7fe fa64 bl 8008d50 - 800a888: 2800 cmp r0, #0 - 800a88a: f000 80fe beq.w 800aa8a <__sfvwrite_r+0x252> - 800a88e: 3001 adds r0, #1 - 800a890: eba0 090a sub.w r9, r0, sl - 800a894: 6820 ldr r0, [r4, #0] - 800a896: 6921 ldr r1, [r4, #16] - 800a898: 45d9 cmp r9, fp - 800a89a: 464a mov r2, r9 - 800a89c: bf28 it cs - 800a89e: 465a movcs r2, fp - 800a8a0: 4288 cmp r0, r1 - 800a8a2: 6963 ldr r3, [r4, #20] - 800a8a4: f240 80f4 bls.w 800aa90 <__sfvwrite_r+0x258> - 800a8a8: 68a5 ldr r5, [r4, #8] - 800a8aa: 441d add r5, r3 - 800a8ac: 42aa cmp r2, r5 - 800a8ae: f340 80ef ble.w 800aa90 <__sfvwrite_r+0x258> - 800a8b2: 4651 mov r1, sl - 800a8b4: 462a mov r2, r5 - 800a8b6: f7fe ff0f bl 80096d8 - 800a8ba: 6823 ldr r3, [r4, #0] - 800a8bc: 4621 mov r1, r4 - 800a8be: 442b add r3, r5 - 800a8c0: 4630 mov r0, r6 - 800a8c2: 6023 str r3, [r4, #0] - 800a8c4: f7ff feba bl 800a63c <_fflush_r> - 800a8c8: 2800 cmp r0, #0 - 800a8ca: d166 bne.n 800a99a <__sfvwrite_r+0x162> - 800a8cc: ebb9 0905 subs.w r9, r9, r5 - 800a8d0: f040 80f6 bne.w 800aac0 <__sfvwrite_r+0x288> - 800a8d4: 4621 mov r1, r4 - 800a8d6: 4630 mov r0, r6 - 800a8d8: f7ff feb0 bl 800a63c <_fflush_r> - 800a8dc: 2800 cmp r0, #0 - 800a8de: d15c bne.n 800a99a <__sfvwrite_r+0x162> - 800a8e0: f8d8 2008 ldr.w r2, [r8, #8] - 800a8e4: 44aa add sl, r5 - 800a8e6: ebab 0b05 sub.w fp, fp, r5 - 800a8ea: 1b55 subs r5, r2, r5 - 800a8ec: f8c8 5008 str.w r5, [r8, #8] - 800a8f0: 2d00 cmp r5, #0 - 800a8f2: d1bf bne.n 800a874 <__sfvwrite_r+0x3c> - 800a8f4: e7a7 b.n 800a846 <__sfvwrite_r+0xe> - 800a8f6: 4621 mov r1, r4 - 800a8f8: 4630 mov r0, r6 - 800a8fa: f7ff fdbd bl 800a478 <__swsetup_r> - 800a8fe: 2800 cmp r0, #0 - 800a900: d0ab beq.n 800a85a <__sfvwrite_r+0x22> - 800a902: f04f 30ff mov.w r0, #4294967295 - 800a906: e79f b.n 800a848 <__sfvwrite_r+0x10> - 800a908: e9d7 b500 ldrd fp, r5, [r7] - 800a90c: 3708 adds r7, #8 - 800a90e: 2d00 cmp r5, #0 - 800a910: d0fa beq.n 800a908 <__sfvwrite_r+0xd0> - 800a912: 4555 cmp r5, sl - 800a914: 462b mov r3, r5 - 800a916: 465a mov r2, fp - 800a918: bf28 it cs - 800a91a: 4653 movcs r3, sl - 800a91c: 4630 mov r0, r6 - 800a91e: 69e1 ldr r1, [r4, #28] - 800a920: f8d4 c024 ldr.w ip, [r4, #36] ; 0x24 - 800a924: 47e0 blx ip - 800a926: 2800 cmp r0, #0 - 800a928: dd37 ble.n 800a99a <__sfvwrite_r+0x162> - 800a92a: f8d8 3008 ldr.w r3, [r8, #8] - 800a92e: 4483 add fp, r0 - 800a930: 1a2d subs r5, r5, r0 - 800a932: 1a18 subs r0, r3, r0 - 800a934: f8c8 0008 str.w r0, [r8, #8] - 800a938: 2800 cmp r0, #0 - 800a93a: d1e8 bne.n 800a90e <__sfvwrite_r+0xd6> - 800a93c: e783 b.n 800a846 <__sfvwrite_r+0xe> - 800a93e: f04f 0b00 mov.w fp, #0 - 800a942: f8df a180 ldr.w sl, [pc, #384] ; 800aac4 <__sfvwrite_r+0x28c> - 800a946: 465d mov r5, fp - 800a948: e7e1 b.n 800a90e <__sfvwrite_r+0xd6> - 800a94a: e9d7 9a00 ldrd r9, sl, [r7] - 800a94e: 3708 adds r7, #8 - 800a950: f1ba 0f00 cmp.w sl, #0 - 800a954: d0f9 beq.n 800a94a <__sfvwrite_r+0x112> - 800a956: 89a3 ldrh r3, [r4, #12] - 800a958: 6820 ldr r0, [r4, #0] - 800a95a: 0599 lsls r1, r3, #22 - 800a95c: 68a2 ldr r2, [r4, #8] - 800a95e: d563 bpl.n 800aa28 <__sfvwrite_r+0x1f0> - 800a960: 4552 cmp r2, sl - 800a962: d836 bhi.n 800a9d2 <__sfvwrite_r+0x19a> - 800a964: f413 6f90 tst.w r3, #1152 ; 0x480 - 800a968: d033 beq.n 800a9d2 <__sfvwrite_r+0x19a> - 800a96a: 6921 ldr r1, [r4, #16] - 800a96c: 6965 ldr r5, [r4, #20] - 800a96e: eba0 0b01 sub.w fp, r0, r1 - 800a972: eb05 0545 add.w r5, r5, r5, lsl #1 - 800a976: eb05 75d5 add.w r5, r5, r5, lsr #31 - 800a97a: f10b 0201 add.w r2, fp, #1 - 800a97e: 106d asrs r5, r5, #1 - 800a980: 4452 add r2, sl - 800a982: 4295 cmp r5, r2 - 800a984: bf38 it cc - 800a986: 4615 movcc r5, r2 - 800a988: 055b lsls r3, r3, #21 - 800a98a: d53d bpl.n 800aa08 <__sfvwrite_r+0x1d0> - 800a98c: 4629 mov r1, r5 - 800a98e: 4630 mov r0, r6 - 800a990: f7fb fd06 bl 80063a0 <_malloc_r> - 800a994: b948 cbnz r0, 800a9aa <__sfvwrite_r+0x172> - 800a996: 230c movs r3, #12 - 800a998: 6033 str r3, [r6, #0] - 800a99a: 89a3 ldrh r3, [r4, #12] - 800a99c: f043 0340 orr.w r3, r3, #64 ; 0x40 - 800a9a0: 81a3 strh r3, [r4, #12] - 800a9a2: e7ae b.n 800a902 <__sfvwrite_r+0xca> - 800a9a4: 4699 mov r9, r3 - 800a9a6: 469a mov sl, r3 - 800a9a8: e7d2 b.n 800a950 <__sfvwrite_r+0x118> - 800a9aa: 465a mov r2, fp - 800a9ac: 6921 ldr r1, [r4, #16] - 800a9ae: 9001 str r0, [sp, #4] - 800a9b0: f7fb ff32 bl 8006818 - 800a9b4: 89a2 ldrh r2, [r4, #12] - 800a9b6: 9b01 ldr r3, [sp, #4] - 800a9b8: f422 6290 bic.w r2, r2, #1152 ; 0x480 - 800a9bc: f042 0280 orr.w r2, r2, #128 ; 0x80 - 800a9c0: 81a2 strh r2, [r4, #12] - 800a9c2: 4652 mov r2, sl - 800a9c4: 6123 str r3, [r4, #16] - 800a9c6: 6165 str r5, [r4, #20] - 800a9c8: 445b add r3, fp - 800a9ca: eba5 050b sub.w r5, r5, fp - 800a9ce: 6023 str r3, [r4, #0] - 800a9d0: 60a5 str r5, [r4, #8] - 800a9d2: 4552 cmp r2, sl - 800a9d4: bf28 it cs - 800a9d6: 4652 movcs r2, sl - 800a9d8: 4655 mov r5, sl - 800a9da: 4649 mov r1, r9 - 800a9dc: 6820 ldr r0, [r4, #0] - 800a9de: 9201 str r2, [sp, #4] - 800a9e0: f7fe fe7a bl 80096d8 - 800a9e4: 68a3 ldr r3, [r4, #8] - 800a9e6: 9a01 ldr r2, [sp, #4] - 800a9e8: 1a9b subs r3, r3, r2 - 800a9ea: 60a3 str r3, [r4, #8] - 800a9ec: 6823 ldr r3, [r4, #0] - 800a9ee: 441a add r2, r3 - 800a9f0: 6022 str r2, [r4, #0] - 800a9f2: f8d8 0008 ldr.w r0, [r8, #8] - 800a9f6: 44a9 add r9, r5 - 800a9f8: ebaa 0a05 sub.w sl, sl, r5 - 800a9fc: 1b45 subs r5, r0, r5 - 800a9fe: f8c8 5008 str.w r5, [r8, #8] - 800aa02: 2d00 cmp r5, #0 - 800aa04: d1a4 bne.n 800a950 <__sfvwrite_r+0x118> - 800aa06: e71e b.n 800a846 <__sfvwrite_r+0xe> - 800aa08: 462a mov r2, r5 - 800aa0a: 4630 mov r0, r6 - 800aa0c: f7fe fe7e bl 800970c <_realloc_r> - 800aa10: 4603 mov r3, r0 - 800aa12: 2800 cmp r0, #0 - 800aa14: d1d5 bne.n 800a9c2 <__sfvwrite_r+0x18a> - 800aa16: 4630 mov r0, r6 - 800aa18: 6921 ldr r1, [r4, #16] - 800aa1a: f7fe f8d1 bl 8008bc0 <_free_r> - 800aa1e: 89a3 ldrh r3, [r4, #12] - 800aa20: f023 0380 bic.w r3, r3, #128 ; 0x80 - 800aa24: 81a3 strh r3, [r4, #12] - 800aa26: e7b6 b.n 800a996 <__sfvwrite_r+0x15e> - 800aa28: 6923 ldr r3, [r4, #16] - 800aa2a: 4283 cmp r3, r0 - 800aa2c: d302 bcc.n 800aa34 <__sfvwrite_r+0x1fc> - 800aa2e: 6961 ldr r1, [r4, #20] - 800aa30: 4551 cmp r1, sl - 800aa32: d915 bls.n 800aa60 <__sfvwrite_r+0x228> - 800aa34: 4552 cmp r2, sl - 800aa36: bf28 it cs - 800aa38: 4652 movcs r2, sl - 800aa3a: 4615 mov r5, r2 - 800aa3c: 4649 mov r1, r9 - 800aa3e: f7fe fe4b bl 80096d8 - 800aa42: 68a3 ldr r3, [r4, #8] - 800aa44: 6822 ldr r2, [r4, #0] - 800aa46: 1b5b subs r3, r3, r5 - 800aa48: 442a add r2, r5 - 800aa4a: 60a3 str r3, [r4, #8] - 800aa4c: 6022 str r2, [r4, #0] - 800aa4e: 2b00 cmp r3, #0 - 800aa50: d1cf bne.n 800a9f2 <__sfvwrite_r+0x1ba> - 800aa52: 4621 mov r1, r4 - 800aa54: 4630 mov r0, r6 - 800aa56: f7ff fdf1 bl 800a63c <_fflush_r> - 800aa5a: 2800 cmp r0, #0 - 800aa5c: d0c9 beq.n 800a9f2 <__sfvwrite_r+0x1ba> - 800aa5e: e79c b.n 800a99a <__sfvwrite_r+0x162> - 800aa60: f06f 4300 mvn.w r3, #2147483648 ; 0x80000000 - 800aa64: 459a cmp sl, r3 - 800aa66: bf38 it cc - 800aa68: 4653 movcc r3, sl - 800aa6a: fb93 f3f1 sdiv r3, r3, r1 - 800aa6e: 6a65 ldr r5, [r4, #36] ; 0x24 - 800aa70: 434b muls r3, r1 - 800aa72: 464a mov r2, r9 - 800aa74: 4630 mov r0, r6 - 800aa76: 69e1 ldr r1, [r4, #28] - 800aa78: 47a8 blx r5 - 800aa7a: 1e05 subs r5, r0, #0 - 800aa7c: dcb9 bgt.n 800a9f2 <__sfvwrite_r+0x1ba> - 800aa7e: e78c b.n 800a99a <__sfvwrite_r+0x162> - 800aa80: e9d7 ab00 ldrd sl, fp, [r7] - 800aa84: 2000 movs r0, #0 - 800aa86: 3708 adds r7, #8 - 800aa88: e6f4 b.n 800a874 <__sfvwrite_r+0x3c> - 800aa8a: f10b 0901 add.w r9, fp, #1 - 800aa8e: e701 b.n 800a894 <__sfvwrite_r+0x5c> - 800aa90: 4293 cmp r3, r2 - 800aa92: dc08 bgt.n 800aaa6 <__sfvwrite_r+0x26e> - 800aa94: 6a65 ldr r5, [r4, #36] ; 0x24 - 800aa96: 4652 mov r2, sl - 800aa98: 4630 mov r0, r6 - 800aa9a: 69e1 ldr r1, [r4, #28] - 800aa9c: 47a8 blx r5 - 800aa9e: 1e05 subs r5, r0, #0 - 800aaa0: f73f af14 bgt.w 800a8cc <__sfvwrite_r+0x94> - 800aaa4: e779 b.n 800a99a <__sfvwrite_r+0x162> - 800aaa6: 4651 mov r1, sl - 800aaa8: 9201 str r2, [sp, #4] - 800aaaa: f7fe fe15 bl 80096d8 - 800aaae: 9a01 ldr r2, [sp, #4] - 800aab0: 68a3 ldr r3, [r4, #8] - 800aab2: 4615 mov r5, r2 - 800aab4: 1a9b subs r3, r3, r2 - 800aab6: 60a3 str r3, [r4, #8] - 800aab8: 6823 ldr r3, [r4, #0] - 800aaba: 4413 add r3, r2 - 800aabc: 6023 str r3, [r4, #0] - 800aabe: e705 b.n 800a8cc <__sfvwrite_r+0x94> - 800aac0: 2001 movs r0, #1 - 800aac2: e70d b.n 800a8e0 <__sfvwrite_r+0xa8> - 800aac4: 7ffffc00 .word 0x7ffffc00 - -0800aac8 <_fwalk_reent>: - 800aac8: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} - 800aacc: 4606 mov r6, r0 - 800aace: 4688 mov r8, r1 - 800aad0: 2700 movs r7, #0 - 800aad2: f500 7438 add.w r4, r0, #736 ; 0x2e0 - 800aad6: e9d4 9501 ldrd r9, r5, [r4, #4] - 800aada: f1b9 0901 subs.w r9, r9, #1 - 800aade: d505 bpl.n 800aaec <_fwalk_reent+0x24> - 800aae0: 6824 ldr r4, [r4, #0] - 800aae2: 2c00 cmp r4, #0 - 800aae4: d1f7 bne.n 800aad6 <_fwalk_reent+0xe> - 800aae6: 4638 mov r0, r7 - 800aae8: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} - 800aaec: 89ab ldrh r3, [r5, #12] - 800aaee: 2b01 cmp r3, #1 - 800aaf0: d907 bls.n 800ab02 <_fwalk_reent+0x3a> - 800aaf2: f9b5 300e ldrsh.w r3, [r5, #14] - 800aaf6: 3301 adds r3, #1 - 800aaf8: d003 beq.n 800ab02 <_fwalk_reent+0x3a> - 800aafa: 4629 mov r1, r5 - 800aafc: 4630 mov r0, r6 - 800aafe: 47c0 blx r8 - 800ab00: 4307 orrs r7, r0 - 800ab02: 3568 adds r5, #104 ; 0x68 - 800ab04: e7e9 b.n 800aada <_fwalk_reent+0x12> - -0800ab06 <__swhatbuf_r>: - 800ab06: b570 push {r4, r5, r6, lr} - 800ab08: 460e mov r6, r1 - 800ab0a: f9b1 100e ldrsh.w r1, [r1, #14] - 800ab0e: 4614 mov r4, r2 - 800ab10: 2900 cmp r1, #0 - 800ab12: 461d mov r5, r3 - 800ab14: b096 sub sp, #88 ; 0x58 - 800ab16: da0a bge.n 800ab2e <__swhatbuf_r+0x28> - 800ab18: 2300 movs r3, #0 - 800ab1a: f9b6 100c ldrsh.w r1, [r6, #12] - 800ab1e: 602b str r3, [r5, #0] - 800ab20: f011 0080 ands.w r0, r1, #128 ; 0x80 - 800ab24: d116 bne.n 800ab54 <__swhatbuf_r+0x4e> - 800ab26: f44f 6380 mov.w r3, #1024 ; 0x400 - 800ab2a: 6023 str r3, [r4, #0] - 800ab2c: e015 b.n 800ab5a <__swhatbuf_r+0x54> - 800ab2e: 466a mov r2, sp - 800ab30: f000 f972 bl 800ae18 <_fstat_r> - 800ab34: 2800 cmp r0, #0 - 800ab36: dbef blt.n 800ab18 <__swhatbuf_r+0x12> - 800ab38: 9a01 ldr r2, [sp, #4] - 800ab3a: f44f 6000 mov.w r0, #2048 ; 0x800 - 800ab3e: f402 4270 and.w r2, r2, #61440 ; 0xf000 - 800ab42: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 - 800ab46: 425a negs r2, r3 - 800ab48: 415a adcs r2, r3 - 800ab4a: f44f 6380 mov.w r3, #1024 ; 0x400 - 800ab4e: 602a str r2, [r5, #0] - 800ab50: 6023 str r3, [r4, #0] - 800ab52: e002 b.n 800ab5a <__swhatbuf_r+0x54> - 800ab54: 2240 movs r2, #64 ; 0x40 - 800ab56: 4618 mov r0, r3 - 800ab58: 6022 str r2, [r4, #0] - 800ab5a: b016 add sp, #88 ; 0x58 - 800ab5c: bd70 pop {r4, r5, r6, pc} - ... - -0800ab60 <__smakebuf_r>: - 800ab60: 898b ldrh r3, [r1, #12] - 800ab62: b573 push {r0, r1, r4, r5, r6, lr} - 800ab64: 079d lsls r5, r3, #30 - 800ab66: 4606 mov r6, r0 - 800ab68: 460c mov r4, r1 - 800ab6a: d507 bpl.n 800ab7c <__smakebuf_r+0x1c> - 800ab6c: f104 0343 add.w r3, r4, #67 ; 0x43 - 800ab70: 6023 str r3, [r4, #0] - 800ab72: 6123 str r3, [r4, #16] - 800ab74: 2301 movs r3, #1 - 800ab76: 6163 str r3, [r4, #20] - 800ab78: b002 add sp, #8 - 800ab7a: bd70 pop {r4, r5, r6, pc} - 800ab7c: 466a mov r2, sp - 800ab7e: ab01 add r3, sp, #4 - 800ab80: f7ff ffc1 bl 800ab06 <__swhatbuf_r> - 800ab84: 9900 ldr r1, [sp, #0] - 800ab86: 4605 mov r5, r0 - 800ab88: 4630 mov r0, r6 - 800ab8a: f7fb fc09 bl 80063a0 <_malloc_r> - 800ab8e: b948 cbnz r0, 800aba4 <__smakebuf_r+0x44> - 800ab90: f9b4 300c ldrsh.w r3, [r4, #12] - 800ab94: 059a lsls r2, r3, #22 - 800ab96: d4ef bmi.n 800ab78 <__smakebuf_r+0x18> - 800ab98: f023 0303 bic.w r3, r3, #3 - 800ab9c: f043 0302 orr.w r3, r3, #2 - 800aba0: 81a3 strh r3, [r4, #12] - 800aba2: e7e3 b.n 800ab6c <__smakebuf_r+0xc> - 800aba4: 4b0d ldr r3, [pc, #52] ; (800abdc <__smakebuf_r+0x7c>) - 800aba6: 63f3 str r3, [r6, #60] ; 0x3c - 800aba8: 89a3 ldrh r3, [r4, #12] - 800abaa: 6020 str r0, [r4, #0] - 800abac: f043 0380 orr.w r3, r3, #128 ; 0x80 - 800abb0: 81a3 strh r3, [r4, #12] - 800abb2: 9b00 ldr r3, [sp, #0] - 800abb4: 6120 str r0, [r4, #16] - 800abb6: 6163 str r3, [r4, #20] - 800abb8: 9b01 ldr r3, [sp, #4] - 800abba: b15b cbz r3, 800abd4 <__smakebuf_r+0x74> - 800abbc: 4630 mov r0, r6 - 800abbe: f9b4 100e ldrsh.w r1, [r4, #14] - 800abc2: f000 f93b bl 800ae3c <_isatty_r> - 800abc6: b128 cbz r0, 800abd4 <__smakebuf_r+0x74> - 800abc8: 89a3 ldrh r3, [r4, #12] - 800abca: f023 0303 bic.w r3, r3, #3 - 800abce: f043 0301 orr.w r3, r3, #1 - 800abd2: 81a3 strh r3, [r4, #12] - 800abd4: 89a0 ldrh r0, [r4, #12] - 800abd6: 4305 orrs r5, r0 - 800abd8: 81a5 strh r5, [r4, #12] - 800abda: e7cd b.n 800ab78 <__smakebuf_r+0x18> - 800abdc: 0800a6d9 .word 0x0800a6d9 - -0800abe0 <__sread>: - 800abe0: b510 push {r4, lr} - 800abe2: 460c mov r4, r1 - 800abe4: f9b1 100e ldrsh.w r1, [r1, #14] - 800abe8: f000 f94a bl 800ae80 <_read_r> - 800abec: 2800 cmp r0, #0 - 800abee: bfab itete ge - 800abf0: 6d23 ldrge r3, [r4, #80] ; 0x50 - 800abf2: 89a3 ldrhlt r3, [r4, #12] - 800abf4: 181b addge r3, r3, r0 - 800abf6: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 - 800abfa: bfac ite ge - 800abfc: 6523 strge r3, [r4, #80] ; 0x50 - 800abfe: 81a3 strhlt r3, [r4, #12] - 800ac00: bd10 pop {r4, pc} - -0800ac02 <__swrite>: - 800ac02: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 800ac06: 461f mov r7, r3 - 800ac08: 898b ldrh r3, [r1, #12] - 800ac0a: 4605 mov r5, r0 - 800ac0c: 05db lsls r3, r3, #23 - 800ac0e: 460c mov r4, r1 - 800ac10: 4616 mov r6, r2 - 800ac12: d505 bpl.n 800ac20 <__swrite+0x1e> - 800ac14: 2302 movs r3, #2 - 800ac16: 2200 movs r2, #0 - 800ac18: f9b1 100e ldrsh.w r1, [r1, #14] - 800ac1c: f000 f91e bl 800ae5c <_lseek_r> - 800ac20: 89a3 ldrh r3, [r4, #12] - 800ac22: 4632 mov r2, r6 - 800ac24: f423 5380 bic.w r3, r3, #4096 ; 0x1000 - 800ac28: 81a3 strh r3, [r4, #12] - 800ac2a: 4628 mov r0, r5 - 800ac2c: 463b mov r3, r7 - 800ac2e: f9b4 100e ldrsh.w r1, [r4, #14] - 800ac32: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} - 800ac36: f000 b875 b.w 800ad24 <_write_r> - -0800ac3a <__sseek>: - 800ac3a: b510 push {r4, lr} - 800ac3c: 460c mov r4, r1 - 800ac3e: f9b1 100e ldrsh.w r1, [r1, #14] - 800ac42: f000 f90b bl 800ae5c <_lseek_r> - 800ac46: 1c43 adds r3, r0, #1 - 800ac48: 89a3 ldrh r3, [r4, #12] - 800ac4a: bf15 itete ne - 800ac4c: 6520 strne r0, [r4, #80] ; 0x50 - 800ac4e: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 - 800ac52: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 - 800ac56: 81a3 strheq r3, [r4, #12] - 800ac58: bf18 it ne - 800ac5a: 81a3 strhne r3, [r4, #12] - 800ac5c: bd10 pop {r4, pc} - -0800ac5e <__sclose>: - 800ac5e: f9b1 100e ldrsh.w r1, [r1, #14] - 800ac62: f000 b871 b.w 800ad48 <_close_r> - -0800ac66 <__swbuf_r>: - 800ac66: b5f8 push {r3, r4, r5, r6, r7, lr} - 800ac68: 460e mov r6, r1 - 800ac6a: 4614 mov r4, r2 - 800ac6c: 4605 mov r5, r0 - 800ac6e: b118 cbz r0, 800ac78 <__swbuf_r+0x12> - 800ac70: 6b83 ldr r3, [r0, #56] ; 0x38 - 800ac72: b90b cbnz r3, 800ac78 <__swbuf_r+0x12> - 800ac74: f7ff fd4e bl 800a714 <__sinit> - 800ac78: 69a3 ldr r3, [r4, #24] - 800ac7a: 60a3 str r3, [r4, #8] - 800ac7c: 89a3 ldrh r3, [r4, #12] - 800ac7e: 0719 lsls r1, r3, #28 - 800ac80: d529 bpl.n 800acd6 <__swbuf_r+0x70> - 800ac82: 6923 ldr r3, [r4, #16] - 800ac84: b33b cbz r3, 800acd6 <__swbuf_r+0x70> - 800ac86: f9b4 300c ldrsh.w r3, [r4, #12] - 800ac8a: b2f6 uxtb r6, r6 - 800ac8c: 049a lsls r2, r3, #18 - 800ac8e: 4637 mov r7, r6 - 800ac90: d52a bpl.n 800ace8 <__swbuf_r+0x82> - 800ac92: 6823 ldr r3, [r4, #0] - 800ac94: 6920 ldr r0, [r4, #16] - 800ac96: 1a18 subs r0, r3, r0 - 800ac98: 6963 ldr r3, [r4, #20] - 800ac9a: 4283 cmp r3, r0 - 800ac9c: dc04 bgt.n 800aca8 <__swbuf_r+0x42> - 800ac9e: 4621 mov r1, r4 - 800aca0: 4628 mov r0, r5 - 800aca2: f7ff fccb bl 800a63c <_fflush_r> - 800aca6: b9e0 cbnz r0, 800ace2 <__swbuf_r+0x7c> - 800aca8: 68a3 ldr r3, [r4, #8] - 800acaa: 3b01 subs r3, #1 - 800acac: 60a3 str r3, [r4, #8] - 800acae: 6823 ldr r3, [r4, #0] - 800acb0: 1c5a adds r2, r3, #1 - 800acb2: 6022 str r2, [r4, #0] - 800acb4: 701e strb r6, [r3, #0] - 800acb6: 6962 ldr r2, [r4, #20] - 800acb8: 1c43 adds r3, r0, #1 - 800acba: 429a cmp r2, r3 - 800acbc: d004 beq.n 800acc8 <__swbuf_r+0x62> - 800acbe: 89a3 ldrh r3, [r4, #12] - 800acc0: 07db lsls r3, r3, #31 - 800acc2: d506 bpl.n 800acd2 <__swbuf_r+0x6c> - 800acc4: 2e0a cmp r6, #10 - 800acc6: d104 bne.n 800acd2 <__swbuf_r+0x6c> - 800acc8: 4621 mov r1, r4 - 800acca: 4628 mov r0, r5 - 800accc: f7ff fcb6 bl 800a63c <_fflush_r> - 800acd0: b938 cbnz r0, 800ace2 <__swbuf_r+0x7c> - 800acd2: 4638 mov r0, r7 - 800acd4: bdf8 pop {r3, r4, r5, r6, r7, pc} - 800acd6: 4621 mov r1, r4 - 800acd8: 4628 mov r0, r5 - 800acda: f7ff fbcd bl 800a478 <__swsetup_r> - 800acde: 2800 cmp r0, #0 - 800ace0: d0d1 beq.n 800ac86 <__swbuf_r+0x20> - 800ace2: f04f 37ff mov.w r7, #4294967295 - 800ace6: e7f4 b.n 800acd2 <__swbuf_r+0x6c> - 800ace8: f443 5300 orr.w r3, r3, #8192 ; 0x2000 - 800acec: 81a3 strh r3, [r4, #12] - 800acee: 6e63 ldr r3, [r4, #100] ; 0x64 - 800acf0: f423 5300 bic.w r3, r3, #8192 ; 0x2000 - 800acf4: 6663 str r3, [r4, #100] ; 0x64 - 800acf6: e7cc b.n 800ac92 <__swbuf_r+0x2c> - -0800acf8 <_wcrtomb_r>: - 800acf8: b5f0 push {r4, r5, r6, r7, lr} - 800acfa: 4c09 ldr r4, [pc, #36] ; (800ad20 <_wcrtomb_r+0x28>) - 800acfc: 4605 mov r5, r0 - 800acfe: 461e mov r6, r3 - 800ad00: f8d4 70e0 ldr.w r7, [r4, #224] ; 0xe0 - 800ad04: b085 sub sp, #20 - 800ad06: b909 cbnz r1, 800ad0c <_wcrtomb_r+0x14> - 800ad08: 460a mov r2, r1 - 800ad0a: a901 add r1, sp, #4 - 800ad0c: 47b8 blx r7 - 800ad0e: 1c43 adds r3, r0, #1 - 800ad10: bf01 itttt eq - 800ad12: 2300 moveq r3, #0 - 800ad14: 6033 streq r3, [r6, #0] - 800ad16: 238a moveq r3, #138 ; 0x8a - 800ad18: 602b streq r3, [r5, #0] - 800ad1a: b005 add sp, #20 - 800ad1c: bdf0 pop {r4, r5, r6, r7, pc} - 800ad1e: bf00 nop - 800ad20: 2000085c .word 0x2000085c - -0800ad24 <_write_r>: - 800ad24: b538 push {r3, r4, r5, lr} - 800ad26: 4604 mov r4, r0 - 800ad28: 4608 mov r0, r1 - 800ad2a: 4611 mov r1, r2 - 800ad2c: 2200 movs r2, #0 - 800ad2e: 4d05 ldr r5, [pc, #20] ; (800ad44 <_write_r+0x20>) - 800ad30: 602a str r2, [r5, #0] - 800ad32: 461a mov r2, r3 - 800ad34: f7f7 ffba bl 8002cac <_write> - 800ad38: 1c43 adds r3, r0, #1 - 800ad3a: d102 bne.n 800ad42 <_write_r+0x1e> - 800ad3c: 682b ldr r3, [r5, #0] - 800ad3e: b103 cbz r3, 800ad42 <_write_r+0x1e> - 800ad40: 6023 str r3, [r4, #0] - 800ad42: bd38 pop {r3, r4, r5, pc} - 800ad44: 20001374 .word 0x20001374 - -0800ad48 <_close_r>: - 800ad48: b538 push {r3, r4, r5, lr} - 800ad4a: 2300 movs r3, #0 - 800ad4c: 4d05 ldr r5, [pc, #20] ; (800ad64 <_close_r+0x1c>) - 800ad4e: 4604 mov r4, r0 - 800ad50: 4608 mov r0, r1 - 800ad52: 602b str r3, [r5, #0] - 800ad54: f7f7 ffc6 bl 8002ce4 <_close> - 800ad58: 1c43 adds r3, r0, #1 - 800ad5a: d102 bne.n 800ad62 <_close_r+0x1a> - 800ad5c: 682b ldr r3, [r5, #0] - 800ad5e: b103 cbz r3, 800ad62 <_close_r+0x1a> - 800ad60: 6023 str r3, [r4, #0] - 800ad62: bd38 pop {r3, r4, r5, pc} - 800ad64: 20001374 .word 0x20001374 - -0800ad68 <_fclose_r>: - 800ad68: b570 push {r4, r5, r6, lr} - 800ad6a: 4606 mov r6, r0 - 800ad6c: 460c mov r4, r1 - 800ad6e: b911 cbnz r1, 800ad76 <_fclose_r+0xe> - 800ad70: 2500 movs r5, #0 - 800ad72: 4628 mov r0, r5 - 800ad74: bd70 pop {r4, r5, r6, pc} - 800ad76: b118 cbz r0, 800ad80 <_fclose_r+0x18> - 800ad78: 6b83 ldr r3, [r0, #56] ; 0x38 - 800ad7a: b90b cbnz r3, 800ad80 <_fclose_r+0x18> - 800ad7c: f7ff fcca bl 800a714 <__sinit> - 800ad80: 6e63 ldr r3, [r4, #100] ; 0x64 - 800ad82: 07d8 lsls r0, r3, #31 - 800ad84: d405 bmi.n 800ad92 <_fclose_r+0x2a> - 800ad86: 89a3 ldrh r3, [r4, #12] - 800ad88: 0599 lsls r1, r3, #22 - 800ad8a: d402 bmi.n 800ad92 <_fclose_r+0x2a> - 800ad8c: 6da0 ldr r0, [r4, #88] ; 0x58 - 800ad8e: f7fd ffdd bl 8008d4c <__retarget_lock_acquire_recursive> - 800ad92: f9b4 300c ldrsh.w r3, [r4, #12] - 800ad96: b93b cbnz r3, 800ada8 <_fclose_r+0x40> - 800ad98: 6e65 ldr r5, [r4, #100] ; 0x64 - 800ad9a: f015 0501 ands.w r5, r5, #1 - 800ad9e: d1e7 bne.n 800ad70 <_fclose_r+0x8> - 800ada0: 6da0 ldr r0, [r4, #88] ; 0x58 - 800ada2: f7fd ffd4 bl 8008d4e <__retarget_lock_release_recursive> - 800ada6: e7e4 b.n 800ad72 <_fclose_r+0xa> - 800ada8: 4621 mov r1, r4 - 800adaa: 4630 mov r0, r6 - 800adac: f7ff fbbc bl 800a528 <__sflush_r> - 800adb0: 6ae3 ldr r3, [r4, #44] ; 0x2c - 800adb2: 4605 mov r5, r0 - 800adb4: b133 cbz r3, 800adc4 <_fclose_r+0x5c> - 800adb6: 4630 mov r0, r6 - 800adb8: 69e1 ldr r1, [r4, #28] - 800adba: 4798 blx r3 - 800adbc: 2800 cmp r0, #0 - 800adbe: bfb8 it lt - 800adc0: f04f 35ff movlt.w r5, #4294967295 - 800adc4: 89a3 ldrh r3, [r4, #12] - 800adc6: 061a lsls r2, r3, #24 - 800adc8: d503 bpl.n 800add2 <_fclose_r+0x6a> - 800adca: 4630 mov r0, r6 - 800adcc: 6921 ldr r1, [r4, #16] - 800adce: f7fd fef7 bl 8008bc0 <_free_r> - 800add2: 6b21 ldr r1, [r4, #48] ; 0x30 - 800add4: b141 cbz r1, 800ade8 <_fclose_r+0x80> - 800add6: f104 0340 add.w r3, r4, #64 ; 0x40 - 800adda: 4299 cmp r1, r3 - 800addc: d002 beq.n 800ade4 <_fclose_r+0x7c> - 800adde: 4630 mov r0, r6 - 800ade0: f7fd feee bl 8008bc0 <_free_r> - 800ade4: 2300 movs r3, #0 - 800ade6: 6323 str r3, [r4, #48] ; 0x30 - 800ade8: 6c61 ldr r1, [r4, #68] ; 0x44 - 800adea: b121 cbz r1, 800adf6 <_fclose_r+0x8e> - 800adec: 4630 mov r0, r6 - 800adee: f7fd fee7 bl 8008bc0 <_free_r> - 800adf2: 2300 movs r3, #0 - 800adf4: 6463 str r3, [r4, #68] ; 0x44 - 800adf6: f7ff fc75 bl 800a6e4 <__sfp_lock_acquire> - 800adfa: 2300 movs r3, #0 - 800adfc: 81a3 strh r3, [r4, #12] - 800adfe: 6e63 ldr r3, [r4, #100] ; 0x64 - 800ae00: 07db lsls r3, r3, #31 - 800ae02: d402 bmi.n 800ae0a <_fclose_r+0xa2> - 800ae04: 6da0 ldr r0, [r4, #88] ; 0x58 - 800ae06: f7fd ffa2 bl 8008d4e <__retarget_lock_release_recursive> - 800ae0a: 6da0 ldr r0, [r4, #88] ; 0x58 - 800ae0c: f7fd ff9d bl 8008d4a <__retarget_lock_close_recursive> - 800ae10: f7ff fc6e bl 800a6f0 <__sfp_lock_release> - 800ae14: e7ad b.n 800ad72 <_fclose_r+0xa> - ... - -0800ae18 <_fstat_r>: - 800ae18: b538 push {r3, r4, r5, lr} - 800ae1a: 2300 movs r3, #0 - 800ae1c: 4d06 ldr r5, [pc, #24] ; (800ae38 <_fstat_r+0x20>) - 800ae1e: 4604 mov r4, r0 - 800ae20: 4608 mov r0, r1 - 800ae22: 4611 mov r1, r2 - 800ae24: 602b str r3, [r5, #0] - 800ae26: f7f7 ff68 bl 8002cfa <_fstat> - 800ae2a: 1c43 adds r3, r0, #1 - 800ae2c: d102 bne.n 800ae34 <_fstat_r+0x1c> - 800ae2e: 682b ldr r3, [r5, #0] - 800ae30: b103 cbz r3, 800ae34 <_fstat_r+0x1c> - 800ae32: 6023 str r3, [r4, #0] - 800ae34: bd38 pop {r3, r4, r5, pc} - 800ae36: bf00 nop - 800ae38: 20001374 .word 0x20001374 - -0800ae3c <_isatty_r>: - 800ae3c: b538 push {r3, r4, r5, lr} - 800ae3e: 2300 movs r3, #0 - 800ae40: 4d05 ldr r5, [pc, #20] ; (800ae58 <_isatty_r+0x1c>) - 800ae42: 4604 mov r4, r0 - 800ae44: 4608 mov r0, r1 - 800ae46: 602b str r3, [r5, #0] - 800ae48: f7f7 ff66 bl 8002d18 <_isatty> - 800ae4c: 1c43 adds r3, r0, #1 - 800ae4e: d102 bne.n 800ae56 <_isatty_r+0x1a> - 800ae50: 682b ldr r3, [r5, #0] - 800ae52: b103 cbz r3, 800ae56 <_isatty_r+0x1a> - 800ae54: 6023 str r3, [r4, #0] - 800ae56: bd38 pop {r3, r4, r5, pc} - 800ae58: 20001374 .word 0x20001374 - -0800ae5c <_lseek_r>: - 800ae5c: b538 push {r3, r4, r5, lr} - 800ae5e: 4604 mov r4, r0 - 800ae60: 4608 mov r0, r1 - 800ae62: 4611 mov r1, r2 - 800ae64: 2200 movs r2, #0 - 800ae66: 4d05 ldr r5, [pc, #20] ; (800ae7c <_lseek_r+0x20>) - 800ae68: 602a str r2, [r5, #0] - 800ae6a: 461a mov r2, r3 - 800ae6c: f7f7 ff5e bl 8002d2c <_lseek> - 800ae70: 1c43 adds r3, r0, #1 - 800ae72: d102 bne.n 800ae7a <_lseek_r+0x1e> - 800ae74: 682b ldr r3, [r5, #0] - 800ae76: b103 cbz r3, 800ae7a <_lseek_r+0x1e> - 800ae78: 6023 str r3, [r4, #0] - 800ae7a: bd38 pop {r3, r4, r5, pc} - 800ae7c: 20001374 .word 0x20001374 - -0800ae80 <_read_r>: - 800ae80: b538 push {r3, r4, r5, lr} - 800ae82: 4604 mov r4, r0 - 800ae84: 4608 mov r0, r1 - 800ae86: 4611 mov r1, r2 - 800ae88: 2200 movs r2, #0 - 800ae8a: 4d05 ldr r5, [pc, #20] ; (800aea0 <_read_r+0x20>) - 800ae8c: 602a str r2, [r5, #0] - 800ae8e: 461a mov r2, r3 - 800ae90: f7f7 feef bl 8002c72 <_read> - 800ae94: 1c43 adds r3, r0, #1 - 800ae96: d102 bne.n 800ae9e <_read_r+0x1e> - 800ae98: 682b ldr r3, [r5, #0] - 800ae9a: b103 cbz r3, 800ae9e <_read_r+0x1e> - 800ae9c: 6023 str r3, [r4, #0] - 800ae9e: bd38 pop {r3, r4, r5, pc} - 800aea0: 20001374 .word 0x20001374 - -0800aea4 <_init>: - 800aea4: b5f8 push {r3, r4, r5, r6, r7, lr} - 800aea6: bf00 nop - 800aea8: bcf8 pop {r3, r4, r5, r6, r7} - 800aeaa: bc08 pop {r3} - 800aeac: 469e mov lr, r3 - 800aeae: 4770 bx lr - -0800aeb0 <_fini>: - 800aeb0: b5f8 push {r3, r4, r5, r6, r7, lr} - 800aeb2: bf00 nop - 800aeb4: bcf8 pop {r3, r4, r5, r6, r7} - 800aeb6: bc08 pop {r3} - 800aeb8: 469e mov lr, r3 - 800aeba: 4770 bx lr diff --git a/Code/STM32/Debug/makefile b/Code/STM32/Debug/makefile deleted file mode 100644 index 4dc9c88..0000000 --- a/Code/STM32/Debug/makefile +++ /dev/null @@ -1,110 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (10.3-2021.10) -################################################################################ - --include ../makefile.init - -RM := rm -rf - -# All of the sources participating in the build are defined here --include sources.mk --include Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk --include Core/Startup/subdir.mk --include Core/Src/Components/subdir.mk --include Core/Src/subdir.mk --include objects.mk - -ifneq ($(MAKECMDGOALS),clean) -ifneq ($(strip $(CC_DEPS)),) --include $(CC_DEPS) -endif -ifneq ($(strip $(C++_DEPS)),) --include $(C++_DEPS) -endif -ifneq ($(strip $(C_UPPER_DEPS)),) --include $(C_UPPER_DEPS) -endif -ifneq ($(strip $(CXX_DEPS)),) --include $(CXX_DEPS) -endif -ifneq ($(strip $(S_DEPS)),) --include $(S_DEPS) -endif -ifneq ($(strip $(S_UPPER_DEPS)),) --include $(S_UPPER_DEPS) -endif -ifneq ($(strip $(C_DEPS)),) --include $(C_DEPS) -endif -ifneq ($(strip $(CPP_DEPS)),) --include $(CPP_DEPS) -endif -endif - --include ../makefile.defs - -OPTIONAL_TOOL_DEPS := \ -$(wildcard ../makefile.defs) \ -$(wildcard ../makefile.init) \ -$(wildcard ../makefile.targets) \ - - -BUILD_ARTIFACT_NAME := F103C8-PFC -BUILD_ARTIFACT_EXTENSION := elf -BUILD_ARTIFACT_PREFIX := -BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME)$(if $(BUILD_ARTIFACT_EXTENSION),.$(BUILD_ARTIFACT_EXTENSION),) - -# Add inputs and outputs from these tool invocations to the build variables -EXECUTABLES += \ -F103C8-PFC.elf \ - -MAP_FILES += \ -F103C8-PFC.map \ - -SIZE_OUTPUT += \ -default.size.stdout \ - -OBJDUMP_LIST += \ -F103C8-PFC.list \ - - -# All Target -all: main-build - -# Main-build Target -main-build: F103C8-PFC.elf secondary-outputs - -# Tool invocations -F103C8-PFC.elf F103C8-PFC.map: $(OBJS) $(USER_OBJS) C:\Users\Gabriel\OneDrive\Documentos\Trabalhos\ IME\PFC\Code\STM32\STM32F103C8TX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS) - arm-none-eabi-g++ -o "F103C8-PFC.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m3 -T"C:\Users\Gabriel\OneDrive\Documentos\Trabalhos IME\PFC\Code\STM32\STM32F103C8TX_FLASH.ld" --specs=nosys.specs -Wl,-Map="F103C8-PFC.map" -Wl,--gc-sections -static --specs=standard_c_nano_cpp.specs -mfloat-abi=soft -mthumb -Wl,--start-group -lc -lm -lstdc++ -lsupc++ -Wl,--end-group - @echo 'Finished building target: $@' - @echo ' ' - -default.size.stdout: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS) - arm-none-eabi-size $(EXECUTABLES) - @echo 'Finished building: $@' - @echo ' ' - -F103C8-PFC.list: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS) - arm-none-eabi-objdump -h -S $(EXECUTABLES) > "F103C8-PFC.list" - @echo 'Finished building: $@' - @echo ' ' - -# Other Targets -clean: - -$(RM) F103C8-PFC.elf F103C8-PFC.list F103C8-PFC.map default.size.stdout - -@echo ' ' - -secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST) - -fail-specified-linker-script-missing: - @echo 'Error: Cannot find the specified linker script. Check the linker settings in the build configuration.' - @exit 2 - -warn-no-linker-script-specified: - @echo 'Warning: No linker script specified. Check the linker settings in the build configuration.' - -.PHONY: all clean dependents main-build fail-specified-linker-script-missing warn-no-linker-script-specified - --include ../makefile.targets diff --git a/Code/STM32/Debug/objects.list b/Code/STM32/Debug/objects.list deleted file mode 100644 index 785d94a..0000000 --- a/Code/STM32/Debug/objects.list +++ /dev/null @@ -1,29 +0,0 @@ -"./Core/Src/Components/BTS7960B.o" -"./Core/Src/Components/ESP8266.o" -"./Core/Src/Components/SerialDebug.o" -"./Core/Src/Components/Start.o" -"./Core/Src/Components/StaticFIFO.o" -"./Core/Src/main.o" -"./Core/Src/stm32f1xx_hal_msp.o" -"./Core/Src/stm32f1xx_it.o" -"./Core/Src/syscalls.o" -"./Core/Src/sysmem.o" -"./Core/Src/system_stm32f1xx.o" -"./Core/Startup/startup_stm32f103c8tx.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.o" diff --git a/Code/STM32/Debug/objects.mk b/Code/STM32/Debug/objects.mk deleted file mode 100644 index 553832c..0000000 --- a/Code/STM32/Debug/objects.mk +++ /dev/null @@ -1,9 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (10.3-2021.10) -################################################################################ - -USER_OBJS := - -LIBS := - diff --git a/Code/STM32/Debug/sources.mk b/Code/STM32/Debug/sources.mk deleted file mode 100644 index 69d9bc0..0000000 --- a/Code/STM32/Debug/sources.mk +++ /dev/null @@ -1,39 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -# Toolchain: GNU Tools for STM32 (10.3-2021.10) -################################################################################ - -ELF_SRCS := -C_UPPER_SRCS := -CXX_SRCS := -C++_SRCS := -OBJ_SRCS := -S_SRCS := -CC_SRCS := -C_SRCS := -CPP_SRCS := -S_UPPER_SRCS := -O_SRCS := -CYCLO_FILES := -OBJDUMP_LIST := -C_UPPER_DEPS := -S_DEPS := -C_DEPS := -CC_DEPS := -SIZE_OUTPUT := -C++_DEPS := -SU_FILES := -EXECUTABLES := -OBJS := -CXX_DEPS := -MAP_FILES := -S_UPPER_DEPS := -CPP_DEPS := - -# Every subdirectory with source files must be described here -SUBDIRS := \ -Core/Src/Components \ -Core/Src \ -Core/Startup \ -Drivers/STM32F1xx_HAL_Driver/Src \ -